bcm2836.dtsi revision 257062
1252439Srpaulo/*
2252439Srpaulo * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
3252439Srpaulo *
4252439Srpaulo * Redistribution and use in source and binary forms, with or without
5252439Srpaulo * modification, are permitted provided that the following conditions
6252439Srpaulo * are met:
7252439Srpaulo * 1. Redistributions of source code must retain the above copyright
8252439Srpaulo *    notice, this list of conditions and the following disclaimer.
9252439Srpaulo * 2. Redistributions in binary form must reproduce the above copyright
10252439Srpaulo *    notice, this list of conditions and the following disclaimer in the
11252439Srpaulo *    documentation and/or other materials provided with the distribution.
12252439Srpaulo *
13252439Srpaulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14252439Srpaulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15252439Srpaulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16252439Srpaulo * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17252439Srpaulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18252439Srpaulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19252439Srpaulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20252439Srpaulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21252439Srpaulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22252439Srpaulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23252439Srpaulo * SUCH DAMAGE.
24252439Srpaulo *
25252439Srpaulo * $FreeBSD: head/sys/boot/fdt/dts/bcm2835.dtsi 257062 2013-10-24 16:27:33Z loos $
26252439Srpaulo */
27252439Srpaulo
28252439Srpaulo/ {
29252439Srpaulo	#address-cells = <1>;
30252439Srpaulo	#size-cells = <1>;
31252439Srpaulo
32252439Srpaulo	cpus {
33252439Srpaulo		cpu@0 {
34252439Srpaulo			compatible = "arm,1176jzf-s";
35252439Srpaulo		};
36252439Srpaulo	};
37252439Srpaulo
38252439Srpaulo
39252439Srpaulo	SOC: axi {
40252439Srpaulo		compatible = "simple-bus";
41252439Srpaulo		#address-cells = <1>;
42252439Srpaulo		#size-cells = <1>;
43252439Srpaulo		reg = <0x20000000 0x01000000>;
44252439Srpaulo		ranges = <0 0x20000000 0x01000000>;
45252439Srpaulo
46252439Srpaulo		intc: interrupt-controller {
47252439Srpaulo			compatible = "broadcom,bcm2835-armctrl-ic",
48252439Srpaulo				     "broadcom,bcm2708-armctrl-ic";
49252439Srpaulo			reg = <0xB200 0x200>;
50252439Srpaulo
51252439Srpaulo			interrupt-controller;
52252439Srpaulo			#interrupt-cells = <1>;
53252439Srpaulo
54252439Srpaulo			/* Bank 0
55252439Srpaulo			 * 0: ARM_TIMER
56252439Srpaulo			 * 1: ARM_MAILBOX
57252439Srpaulo			 * 2: ARM_DOORBELL_0
58252439Srpaulo			 * 3: ARM_DOORBELL_1
59252439Srpaulo			 * 4: VPU0_HALTED
60252439Srpaulo			 * 5: VPU1_HALTED
61252439Srpaulo			 * 6: ILLEGAL_TYPE0
62252439Srpaulo			 * 7: ILLEGAL_TYPE1
63252439Srpaulo			 */
64252439Srpaulo
65252439Srpaulo			/* Bank 1
66252439Srpaulo			 * 0: TIMER0		16: DMA0
67252439Srpaulo			 * 1: TIMER1		17: DMA1
68252439Srpaulo			 * 2: TIMER2		18: VC_DMA2
69252439Srpaulo			 * 3: TIMER3		19: VC_DMA3
70252439Srpaulo			 * 4: CODEC0		20: DMA4
71252439Srpaulo			 * 5: CODEC1		21: DMA5
72252439Srpaulo			 * 6: CODEC2		22: DMA6
73252439Srpaulo			 * 7: VC_JPEG		23: DMA7
74252439Srpaulo			 * 8: ISP		24: DMA8
75252439Srpaulo			 * 9: VC_USB		25: DMA9
76252439Srpaulo			 * 10: VC_3D		26: DMA10
77252439Srpaulo			 * 11: TRANSPOSER	27: DMA11
78252439Srpaulo			 * 12: MULTICORESYNC0	28: DMA12
79252439Srpaulo			 * 13: MULTICORESYNC1	29: AUX
80252439Srpaulo			 * 14: MULTICORESYNC2	30: ARM
81252439Srpaulo			 * 15: MULTICORESYNC3	31: VPUDMA
82252439Srpaulo			 */
83252439Srpaulo
84252439Srpaulo			/* Bank 2
85252439Srpaulo			 * 0: HOSTPORT		16: SMI
86252439Srpaulo			 * 1: VIDEOSCALER	17: GPIO0
87252439Srpaulo			 * 2: CCP2TX		18: GPIO1
88252439Srpaulo			 * 3: SDC		19: GPIO2
89252439Srpaulo			 * 4: DSI0		20: GPIO3
90252439Srpaulo			 * 5: AVE		21: VC_I2C
91252439Srpaulo			 * 6: CAM0		22: VC_SPI
92252439Srpaulo			 * 7: CAM1		23: VC_I2SPCM
93252439Srpaulo			 * 8: HDMI0		24: VC_SDIO
94252439Srpaulo			 * 9: HDMI1		25: VC_UART
95252439Srpaulo			 * 10: PIXELVALVE1	26: SLIMBUS
96252439Srpaulo			 * 11: I2CSPISLV	27: VEC
97252439Srpaulo			 * 12: DSI1		28: CPG
98252439Srpaulo			 * 13: PWA0		29: RNG
99252439Srpaulo			 * 14: PWA1		30: VC_ARASANSDIO
100252439Srpaulo			 * 15: CPR		31: AVSPMON
101252439Srpaulo			 */
102252439Srpaulo		};
103252439Srpaulo
104252439Srpaulo		timer {
105252439Srpaulo			compatible = "broadcom,bcm2835-system-timer", 
106252439Srpaulo				     "broadcom,bcm2708-system-timer";
107252439Srpaulo			reg = <0x3000 0x1000>;
108252439Srpaulo			interrupts = <8 9 10 11>;
109252439Srpaulo			interrupt-parent = <&intc>;
110252439Srpaulo
111252439Srpaulo			clock-frequency = <1000000>;
112252439Srpaulo		};
113252439Srpaulo
114252439Srpaulo		armtimer {
115252439Srpaulo			/* Not AMBA compatible */
116252439Srpaulo			compatible = "broadcom,bcm2835-sp804", "arm,sp804";
117252439Srpaulo			reg = <0xB400 0x24>;
118252439Srpaulo			interrupts = <0>;
119252439Srpaulo			interrupt-parent = <&intc>;
120252439Srpaulo		};
121252439Srpaulo
122252439Srpaulo		watchdog0 {
123252439Srpaulo			compatible = "broadcom,bcm2835-wdt",
124252439Srpaulo				     "broadcom,bcm2708-wdt";
125252439Srpaulo			reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
126252439Srpaulo		};
127252439Srpaulo
128252439Srpaulo		gpio: gpio {
129252439Srpaulo			compatible = "broadcom,bcm2835-gpio",
130252439Srpaulo				     "broadcom,bcm2708-gpio";
131252439Srpaulo			reg = <0x200000 0xb0>;
132252439Srpaulo
133252439Srpaulo			/* Unusual arrangement of interrupts 
134252439Srpaulo			 * (determined by testing)
135252439Srpaulo			 * 17: Bank 0 (GPIOs  0-31)
136252439Srpaulo			 * 19: Bank 1 (GPIOs 32-53)
137252439Srpaulo			 * 18: Bank 2
138252439Srpaulo			 * 20: All banks (GPIOs 0-53)
139252439Srpaulo			 */
140252439Srpaulo			interrupts = <57 59 58 60>;
141252439Srpaulo			interrupt-parent = <&intc>;
142252439Srpaulo
143252439Srpaulo			gpio-controller;
144252439Srpaulo			#gpio-cells = <2>;
145252439Srpaulo
146252439Srpaulo			interrupt-controller;
147252439Srpaulo			#interrupt-cells = <1>;
148252439Srpaulo
149252439Srpaulo			pinctrl-names = "default";
150252439Srpaulo			pinctrl-0 = <&pins_reserved>;
151252439Srpaulo
152252439Srpaulo			/* Pins that can short 3.3V to GND in output mode: 46-47
153252439Srpaulo			 * Pins used by VideoCore: 48-53
154252439Srpaulo			 */
155252439Srpaulo			broadcom,read-only = <46>, <47>, <48>, <49>, <50>, 
156252439Srpaulo			                     <51>, <52>, <53>;
157252439Srpaulo
158252439Srpaulo			/* BSC0 */
159252439Srpaulo			pins_bsc0_a: bsc0_a {
160252439Srpaulo				broadcom,pins = <0>, <1>;
161252439Srpaulo			};
162252439Srpaulo
163252439Srpaulo			pins_bsc0_b: bsc0_b {
164252439Srpaulo				broadcom,pins = <28>, <29>;
165252439Srpaulo			};
166252439Srpaulo
167252439Srpaulo			pins_bsc0_c: bsc0_c {
168252439Srpaulo				broadcom,pins = <44>, <45>;
169252439Srpaulo			};
170252439Srpaulo
171252439Srpaulo			/* BSC1 */
172252439Srpaulo			pins_bsc1_a: bsc1_a {
173252439Srpaulo				broadcom,pins = <2>, <3>;
174252439Srpaulo			};
175252439Srpaulo
176252439Srpaulo			pins_bsc1_b: bsc1_b {
177252439Srpaulo				broadcom,pins = <44>, <45>;
178252439Srpaulo			};
179252439Srpaulo
180252439Srpaulo			/* GPCLK0 */
181252439Srpaulo			pins_gpclk0_a: gpclk0_a {
182252439Srpaulo				broadcom,pins = <4>;
183252439Srpaulo			};
184252439Srpaulo
185252439Srpaulo			pins_gpclk0_b: gpclk0_b {
186252439Srpaulo				broadcom,pins = <20>;
187252439Srpaulo			};
188252439Srpaulo
189252439Srpaulo			pins_gpclk0_c: gpclk0_c {
190252439Srpaulo				broadcom,pins = <32>;
191252439Srpaulo			};
192252439Srpaulo
193252439Srpaulo			pins_gpclk0_d: gpclk0_d {
194252439Srpaulo				broadcom,pins = <34>;
195252439Srpaulo			};
196252439Srpaulo
197252439Srpaulo			/* GPCLK1 */
198252439Srpaulo			pins_gpclk1_a: gpclk1_a {
199252439Srpaulo				broadcom,pins = <5>;
200252439Srpaulo			};
201252439Srpaulo
202252439Srpaulo			pins_gpclk1_b: gpclk1_b {
203252439Srpaulo				broadcom,pins = <21>;
204252439Srpaulo			};
205252439Srpaulo
206252439Srpaulo			pins_gpclk1_c: gpclk1_c {
207252439Srpaulo				broadcom,pins = <42>;
208252439Srpaulo			};
209252439Srpaulo
210252439Srpaulo			pins_gpclk1_d: gpclk1_d {
211252439Srpaulo				broadcom,pins = <44>;
212252439Srpaulo			};
213252439Srpaulo
214252439Srpaulo			/* GPCLK2 */
215252439Srpaulo			pins_gpclk2_a: gpclk2_a {
216252439Srpaulo				broadcom,pins = <6>;
217252439Srpaulo			};
218252439Srpaulo
219252439Srpaulo			pins_gpclk2_b: gpclk2_b {
220252439Srpaulo				broadcom,pins = <43>;
221252439Srpaulo			};
222252439Srpaulo
223252439Srpaulo			/* SPI0 */
224252439Srpaulo			pins_spi0_a: spi0_a {
225252439Srpaulo				broadcom,pins = <7>, <8>, <9>, <10>, <11>;
226252439Srpaulo			};
227252439Srpaulo
228252439Srpaulo			pins_spi0_b: spi0_b {
229252439Srpaulo				broadcom,pins = <35>, <36>, <37>, <38>, <39>;
230252439Srpaulo			};
231252439Srpaulo
232252439Srpaulo			/* PWM */
233252439Srpaulo			pins_pwm0_a: pwm0_a {
234252439Srpaulo				broadcom,pins = <12>;
235252439Srpaulo			};
236252439Srpaulo
237252439Srpaulo			pins_pwm0_b: pwm0_b {
238252439Srpaulo				broadcom,pins = <18>;
239252439Srpaulo			};
240252439Srpaulo
241252439Srpaulo			pins_pwm0_c: pwm0_c {
242252439Srpaulo				broadcom,pins = <40>;
243252439Srpaulo			};
244252439Srpaulo
245252439Srpaulo			pins_pwm1_a: pwm1_a {
246252439Srpaulo				broadcom,pins = <13>;
247252439Srpaulo			};
248252439Srpaulo
249252439Srpaulo			pins_pwm1_b: pwm1_b {
250252439Srpaulo				broadcom,pins = <19>;
251252439Srpaulo			};
252252439Srpaulo
253252439Srpaulo			pins_pwm1_c: pwm1_c {
254252439Srpaulo				broadcom,pins = <41>;
255252439Srpaulo			};
256252439Srpaulo
257252439Srpaulo			pins_pwm1_d: pwm1_d {
258252439Srpaulo				broadcom,pins = <45>;
259252439Srpaulo			};
260252439Srpaulo
261252439Srpaulo			/* UART0 */
262252439Srpaulo			pins_uart0_a: uart0_a {
263252439Srpaulo				broadcom,pins = <14>, <15>;
264252439Srpaulo			};
265252439Srpaulo
266252439Srpaulo			pins_uart0_b: uart0_b {
267252439Srpaulo				broadcom,pins = <32>, <33>;
268252439Srpaulo			};
269252439Srpaulo
270252439Srpaulo			pins_uart0_c: uart0_c {
271252439Srpaulo				broadcom,pins = <36>, <37>;
272252439Srpaulo			};
273252439Srpaulo
274252439Srpaulo			pins_uart0_fc_a: uart0_fc_a {
275252439Srpaulo				broadcom,pins = <16>, <17>;
276252439Srpaulo			};
277252439Srpaulo
278252439Srpaulo			pins_uart0_fc_b: uart0_fc_b {
279252439Srpaulo				broadcom,pins = <30>, <31>;
280252439Srpaulo			};
281252439Srpaulo
282252439Srpaulo			pins_uart0_fc_c: uart0_fc_c {
283252439Srpaulo				broadcom,pins = <39>, <38>;
284252439Srpaulo			};
285252439Srpaulo
286252439Srpaulo			/* PCM */
287252439Srpaulo			pins_pcm_a: pcm_a {
288252439Srpaulo				broadcom,pins = <18>, <19>, <20>, <21>;
289252439Srpaulo			};
290252439Srpaulo
291252439Srpaulo			pins_pcm_b: pcm_b {
292252439Srpaulo				broadcom,pins = <28>, <29>, <30>, <31>;
293252439Srpaulo			};
294252439Srpaulo
295252439Srpaulo			/* Secondary Address Bus */
296252439Srpaulo			pins_sm_addr_a: sm_addr_a {
297252439Srpaulo				broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
298252439Srpaulo			};
299252439Srpaulo
300252439Srpaulo			pins_sm_addr_b: sm_addr_b {
301252439Srpaulo				broadcom,pins = <33>, <32>, <31>, <30>, <29>,
302252439Srpaulo				                <28>;
303252439Srpaulo			};
304252439Srpaulo
305252439Srpaulo			pins_sm_ctl_a: sm_ctl_a {
306252439Srpaulo				broadcom,pins = <6>, <7>;
307252439Srpaulo			};
308252439Srpaulo
309252439Srpaulo			pins_sm_ctl_b: sm_ctl_b {
310252439Srpaulo				broadcom,pins = <34>, <35>;
311252439Srpaulo			};
312252439Srpaulo
313252439Srpaulo			pins_sm_data_8bit_a: sm_data_8bit_a {
314252439Srpaulo				broadcom,pins = <8>, <9>, <10>, <11>, <12>,
315252439Srpaulo				                <13>, <14>, <15>;
316252439Srpaulo			};
317252439Srpaulo
318252439Srpaulo			pins_sm_data_8bit_b: sm_data_8bit_b {
319252439Srpaulo				broadcom,pins = <36>, <37>, <38>, <39>, <40>,
320252439Srpaulo				                <41>, <42>, <43>;
321252439Srpaulo			};
322252439Srpaulo
323252439Srpaulo			pins_sm_data_16bit: sm_data_16bit {
324252439Srpaulo				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
325252439Srpaulo				                <21>, <22>, <23>;
326252439Srpaulo			};
327252439Srpaulo
328252439Srpaulo			pins_sm_data_18bit: sm_data_18bit {
329252439Srpaulo				broadcom,pins = <24>, <25>;
330252439Srpaulo			};
331252439Srpaulo
332252439Srpaulo			/* BSCSL */
333252439Srpaulo			pins_bscsl: bscsl {
334252439Srpaulo				broadcom,pins = <18>, <19>;
335252439Srpaulo			};
336252439Srpaulo
337252439Srpaulo			/* SPISL */
338252439Srpaulo			pins_spisl: spisl {
339252439Srpaulo				broadcom,pins = <18>, <19>, <20>, <21>;
340252439Srpaulo			};
341252439Srpaulo
342252439Srpaulo			/* SPI1 */
343252439Srpaulo			pins_spi1: spi1 {
344252439Srpaulo				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
345252439Srpaulo				                <21>;
346252439Srpaulo			};
347252439Srpaulo
348252439Srpaulo			/* UART1 */
349252439Srpaulo			pins_uart1_a: uart1_a {
350252439Srpaulo				broadcom,pins = <14>, <15>;
351252439Srpaulo			};
352252439Srpaulo
353252439Srpaulo			pins_uart1_b: uart1_b {
354252439Srpaulo				broadcom,pins = <32>, <33>;
355252439Srpaulo			};
356252439Srpaulo
357252439Srpaulo			pins_uart1_c: uart1_c {
358252439Srpaulo				broadcom,pins = <40>, <41>;
359252439Srpaulo			};
360252439Srpaulo
361252439Srpaulo			pins_uart1_fc_a: uart1_fc_a {
362252439Srpaulo				broadcom,pins = <16>, <17>;
363252439Srpaulo			};
364252439Srpaulo
365252439Srpaulo			pins_uart1_fc_b: uart1_fc_b {
366252439Srpaulo				broadcom,pins = <30>, <31>;
367252439Srpaulo			};
368252439Srpaulo
369252439Srpaulo			pins_uart1_fc_c: uart1_fc_c {
370252439Srpaulo				broadcom,pins = <43>, <42>;
371252439Srpaulo			};
372252439Srpaulo
373252439Srpaulo			/* SPI2 */
374252439Srpaulo			pins_spi2: spi2 {
375252439Srpaulo				broadcom,pins = <40>, <41>, <42>, <43>, <44>,
376252439Srpaulo				                <45>;
377252439Srpaulo			};
378252439Srpaulo
379252439Srpaulo			/* ARM JTAG */
380252439Srpaulo			pins_arm_jtag_trst: arm_jtag_trst {
381252439Srpaulo				broadcom,pins = <22>;
382252439Srpaulo			};
383252439Srpaulo
384252439Srpaulo			pins_arm_jtag_a: arm_jtag_a {
385252439Srpaulo				broadcom,pins = <4>, <5>, <6>, <12>, <13>;
386252439Srpaulo			};
387252439Srpaulo
388252439Srpaulo			pins_arm_jtag_b: arm_jtag_b {
389252439Srpaulo				broadcom,pins = <23>, <24>, <25>, <26>, <27>;
390252439Srpaulo			};
391252439Srpaulo
392252439Srpaulo			/* Reserved */
393252439Srpaulo			pins_reserved: reserved {
394252439Srpaulo				broadcom,pins = <48>, <49>, <50>, <51>, <52>,
395252439Srpaulo				                <53>;
396252439Srpaulo			};
397252439Srpaulo		};
398252439Srpaulo
399256959Sloos		bsc0 {
400256959Sloos			compatible = "broadcom,bcm2835-bsc",
401256959Sloos				     "broadcom,bcm2708-bsc";
402256959Sloos			reg = <0x205000 0x20>;
403256959Sloos			interrupts = <61>;
404256959Sloos			interrupt-parent = <&intc>;
405256959Sloos		};
406256959Sloos
407256959Sloos		bsc1 {
408256959Sloos			compatible = "broadcom,bcm2835-bsc",
409256959Sloos				     "broadcom,bcm2708-bsc";
410256959Sloos			reg = <0x804000 0x20>;
411256959Sloos			interrupts = <61>;
412256959Sloos			interrupt-parent = <&intc>;
413256959Sloos		};
414256959Sloos
415257062Sloos		spi0 {
416257062Sloos			compatible = "broadcom,bcm2835-spi",
417257062Sloos				     "broadcom,bcm2708-spi";
418257062Sloos			reg = <0x204000 0x20>;
419257062Sloos			interrupts = <62>;
420257062Sloos			interrupt-parent = <&intc>;
421257062Sloos		};
422257062Sloos
423252439Srpaulo		dma: dma {
424252439Srpaulo			compatible = "broadcom,bcm2835-dma", 
425252439Srpaulo				     "broadcom,bcm2708-dma";
426252439Srpaulo			reg = <0x7000 0x1000>, <0xE05000 0x1000>;
427252439Srpaulo			interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
428252439Srpaulo			interrupt-parent = <&intc>;
429252439Srpaulo
430252439Srpaulo			broadcom,channels = <0>;	/* Set by VideoCore */
431252439Srpaulo		};
432252439Srpaulo
433252439Srpaulo		vc_mbox: mbox {
434252439Srpaulo			compatible = "broadcom,bcm2835-mbox", 
435252439Srpaulo				     "broadcom,bcm2708-mbox";
436252439Srpaulo			reg = <0xB880 0x40>;
437252439Srpaulo			interrupts = <1>;
438252439Srpaulo			interrupt-parent = <&intc>;
439252439Srpaulo
440252439Srpaulo			/* Channels
441252439Srpaulo			 * 0: Power
442252439Srpaulo			 * 1: Frame buffer
443252439Srpaulo			 * 2: Virtual UART
444252439Srpaulo			 * 3: VCHIQ
445252439Srpaulo			 * 4: LEDs
446252439Srpaulo			 * 5: Buttons
447252439Srpaulo			 * 6: Touch screen
448252439Srpaulo			 */
449252439Srpaulo		};
450252439Srpaulo
451252439Srpaulo		sdhci {
452252439Srpaulo			compatible = "broadcom,bcm2835-sdhci", 
453252439Srpaulo				     "broadcom,bcm2708-sdhci";
454252439Srpaulo			reg = <0x300000 0x100>;
455252439Srpaulo			interrupts = <70>;
456252439Srpaulo			interrupt-parent = <&intc>;
457252439Srpaulo
458252439Srpaulo			clock-frequency = <50000000>;	/* Set by VideoCore */
459252439Srpaulo		};
460252439Srpaulo
461252439Srpaulo		uart0: uart0 {
462252439Srpaulo			compatible = "broadcom,bcm2835-uart", 
463252439Srpaulo				     "broadcom,bcm2708-uart", "arm,pl011", 
464252439Srpaulo				     "arm,primecell";
465252439Srpaulo			reg = <0x201000 0x1000>;
466252439Srpaulo			interrupts = <65>;
467252439Srpaulo			interrupt-parent = <&intc>;
468252439Srpaulo
469252439Srpaulo			clock-frequency = <3000000>;	/* Set by VideoCore */
470252439Srpaulo			reg-shift = <2>;
471252439Srpaulo		};
472252439Srpaulo
473252439Srpaulo		vchiq {
474252439Srpaulo			compatible = "broadcom,bcm2835-vchiq";
475252439Srpaulo			reg = <0xB800 0x50>;
476252439Srpaulo			interrupts = <2>;
477252439Srpaulo			interrupt-parent = <&intc>;
478252439Srpaulo		};
479252439Srpaulo
480252439Srpaulo		usb {
481252439Srpaulo			compatible = "broadcom,bcm2835-usb", 
482252439Srpaulo				     "broadcom,bcm2708-usb", 
483252439Srpaulo				     "synopsys,designware-hs-otg2";
484252439Srpaulo			reg = <0x980000 0x20000>;
485252439Srpaulo			interrupts = <17>;
486252439Srpaulo			interrupt-parent = <&intc>;
487252439Srpaulo			#address-cells = <1>;
488252439Srpaulo			#size-cells = <0>;
489252439Srpaulo		};
490252439Srpaulo
491252439Srpaulo	};
492252439Srpaulo};
493