1252439Srpaulo/*
2252439Srpaulo * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
3252439Srpaulo *
4252439Srpaulo * Redistribution and use in source and binary forms, with or without
5252439Srpaulo * modification, are permitted provided that the following conditions
6252439Srpaulo * are met:
7252439Srpaulo * 1. Redistributions of source code must retain the above copyright
8252439Srpaulo *    notice, this list of conditions and the following disclaimer.
9252439Srpaulo * 2. Redistributions in binary form must reproduce the above copyright
10252439Srpaulo *    notice, this list of conditions and the following disclaimer in the
11252439Srpaulo *    documentation and/or other materials provided with the distribution.
12252439Srpaulo *
13252439Srpaulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14252439Srpaulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15252439Srpaulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16252439Srpaulo * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17252439Srpaulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18252439Srpaulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19252439Srpaulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20252439Srpaulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21252439Srpaulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22252439Srpaulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23252439Srpaulo * SUCH DAMAGE.
24252439Srpaulo *
25252439Srpaulo * $FreeBSD: releng/11.0/sys/boot/fdt/dts/arm/bcm2836.dtsi 297582 2016-04-05 13:45:23Z skra $
26252439Srpaulo */
27252439Srpaulo
28252439Srpaulo/ {
29252439Srpaulo	#address-cells = <1>;
30252439Srpaulo	#size-cells = <1>;
31252439Srpaulo
32280520Sandrew	timer {
33280520Sandrew		compatible = "arm,armv7-timer";
34280520Sandrew		clock-frequency = <19200000>;
35297545Sskra		interrupts = <0 1 3 2>;
36297545Sskra		interrupt-parent = <&local_intc>;
37252439Srpaulo	};
38252439Srpaulo
39252439Srpaulo	SOC: axi {
40252439Srpaulo		compatible = "simple-bus";
41252439Srpaulo		#address-cells = <1>;
42252439Srpaulo		#size-cells = <1>;
43280520Sandrew		reg = <0x3f000000 0x01000000>;
44297545Sskra		ranges = <0 0x3f000000 0x01000000>,
45297545Sskra		    <0x40000000 0x40000000 0x00001000>;
46252439Srpaulo
47297545Sskra		local_intc: local_intc {
48297545Sskra			compatible = "brcm,bcm2836-l1-intc";
49297545Sskra			reg = <0x40000000 0x100>;
50297545Sskra			interrupt-controller;
51297545Sskra			#interrupt-cells = <1>;
52297545Sskra			interrupt-parent = <&local_intc>;
53297545Sskra		};
54297545Sskra
55252439Srpaulo		intc: interrupt-controller {
56252439Srpaulo			compatible = "broadcom,bcm2835-armctrl-ic",
57252439Srpaulo				     "broadcom,bcm2708-armctrl-ic";
58252439Srpaulo			reg = <0xB200 0x200>;
59297545Sskra			interrupt-parent = <&local_intc>;
60297545Sskra			interrupts = <8>;
61252439Srpaulo
62252439Srpaulo			interrupt-controller;
63252439Srpaulo			#interrupt-cells = <1>;
64252439Srpaulo
65252439Srpaulo			/* Bank 0
66252439Srpaulo			 * 0: ARM_TIMER
67252439Srpaulo			 * 1: ARM_MAILBOX
68252439Srpaulo			 * 2: ARM_DOORBELL_0
69252439Srpaulo			 * 3: ARM_DOORBELL_1
70252439Srpaulo			 * 4: VPU0_HALTED
71252439Srpaulo			 * 5: VPU1_HALTED
72252439Srpaulo			 * 6: ILLEGAL_TYPE0
73252439Srpaulo			 * 7: ILLEGAL_TYPE1
74252439Srpaulo			 */
75252439Srpaulo
76252439Srpaulo			/* Bank 1
77252439Srpaulo			 * 0: TIMER0		16: DMA0
78252439Srpaulo			 * 1: TIMER1		17: DMA1
79252439Srpaulo			 * 2: TIMER2		18: VC_DMA2
80252439Srpaulo			 * 3: TIMER3		19: VC_DMA3
81252439Srpaulo			 * 4: CODEC0		20: DMA4
82252439Srpaulo			 * 5: CODEC1		21: DMA5
83252439Srpaulo			 * 6: CODEC2		22: DMA6
84252439Srpaulo			 * 7: VC_JPEG		23: DMA7
85252439Srpaulo			 * 8: ISP		24: DMA8
86252439Srpaulo			 * 9: VC_USB		25: DMA9
87252439Srpaulo			 * 10: VC_3D		26: DMA10
88252439Srpaulo			 * 11: TRANSPOSER	27: DMA11
89252439Srpaulo			 * 12: MULTICORESYNC0	28: DMA12
90252439Srpaulo			 * 13: MULTICORESYNC1	29: AUX
91252439Srpaulo			 * 14: MULTICORESYNC2	30: ARM
92252439Srpaulo			 * 15: MULTICORESYNC3	31: VPUDMA
93252439Srpaulo			 */
94252439Srpaulo
95252439Srpaulo			/* Bank 2
96252439Srpaulo			 * 0: HOSTPORT		16: SMI
97252439Srpaulo			 * 1: VIDEOSCALER	17: GPIO0
98252439Srpaulo			 * 2: CCP2TX		18: GPIO1
99252439Srpaulo			 * 3: SDC		19: GPIO2
100252439Srpaulo			 * 4: DSI0		20: GPIO3
101252439Srpaulo			 * 5: AVE		21: VC_I2C
102252439Srpaulo			 * 6: CAM0		22: VC_SPI
103252439Srpaulo			 * 7: CAM1		23: VC_I2SPCM
104252439Srpaulo			 * 8: HDMI0		24: VC_SDIO
105252439Srpaulo			 * 9: HDMI1		25: VC_UART
106252439Srpaulo			 * 10: PIXELVALVE1	26: SLIMBUS
107252439Srpaulo			 * 11: I2CSPISLV	27: VEC
108252439Srpaulo			 * 12: DSI1		28: CPG
109252439Srpaulo			 * 13: PWA0		29: RNG
110252439Srpaulo			 * 14: PWA1		30: VC_ARASANSDIO
111252439Srpaulo			 * 15: CPR		31: AVSPMON
112252439Srpaulo			 */
113252439Srpaulo		};
114252439Srpaulo
115281890Sloos		watchdog0 {
116281890Sloos			compatible = "broadcom,bcm2835-wdt",
117281890Sloos				     "broadcom,bcm2708-wdt";
118281890Sloos			reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
119281890Sloos		};
120281890Sloos
121252439Srpaulo		gpio: gpio {
122252439Srpaulo			compatible = "broadcom,bcm2835-gpio",
123252439Srpaulo				     "broadcom,bcm2708-gpio";
124252439Srpaulo			reg = <0x200000 0xb0>;
125252439Srpaulo
126252439Srpaulo			/* Unusual arrangement of interrupts 
127252439Srpaulo			 * (determined by testing)
128252439Srpaulo			 * 17: Bank 0 (GPIOs  0-31)
129252439Srpaulo			 * 19: Bank 1 (GPIOs 32-53)
130252439Srpaulo			 * 18: Bank 2
131252439Srpaulo			 * 20: All banks (GPIOs 0-53)
132252439Srpaulo			 */
133252439Srpaulo			interrupts = <57 59 58 60>;
134252439Srpaulo			interrupt-parent = <&intc>;
135252439Srpaulo
136252439Srpaulo			gpio-controller;
137252439Srpaulo			#gpio-cells = <2>;
138252439Srpaulo
139252439Srpaulo			interrupt-controller;
140297582Sskra			#interrupt-cells = <2>;
141252439Srpaulo
142252439Srpaulo			pinctrl-names = "default";
143252439Srpaulo			pinctrl-0 = <&pins_reserved>;
144252439Srpaulo
145281899Sloos			/* Pins that can short 3.3V to GND in output mode: 46
146252439Srpaulo			 * Pins used by VideoCore: 48-53
147252439Srpaulo			 */
148281899Sloos			broadcom,read-only = <46>, <48>, <49>, <50>,
149281899Sloos					     <51>, <52>, <53>;
150252439Srpaulo
151252439Srpaulo			/* BSC0 */
152252439Srpaulo			pins_bsc0_a: bsc0_a {
153252439Srpaulo				broadcom,pins = <0>, <1>;
154252439Srpaulo			};
155252439Srpaulo
156252439Srpaulo			pins_bsc0_b: bsc0_b {
157252439Srpaulo				broadcom,pins = <28>, <29>;
158252439Srpaulo			};
159252439Srpaulo
160252439Srpaulo			pins_bsc0_c: bsc0_c {
161252439Srpaulo				broadcom,pins = <44>, <45>;
162252439Srpaulo			};
163252439Srpaulo
164252439Srpaulo			/* BSC1 */
165252439Srpaulo			pins_bsc1_a: bsc1_a {
166252439Srpaulo				broadcom,pins = <2>, <3>;
167252439Srpaulo			};
168252439Srpaulo
169252439Srpaulo			pins_bsc1_b: bsc1_b {
170252439Srpaulo				broadcom,pins = <44>, <45>;
171252439Srpaulo			};
172252439Srpaulo
173252439Srpaulo			/* GPCLK0 */
174252439Srpaulo			pins_gpclk0_a: gpclk0_a {
175252439Srpaulo				broadcom,pins = <4>;
176252439Srpaulo			};
177252439Srpaulo
178252439Srpaulo			pins_gpclk0_b: gpclk0_b {
179252439Srpaulo				broadcom,pins = <20>;
180252439Srpaulo			};
181252439Srpaulo
182252439Srpaulo			pins_gpclk0_c: gpclk0_c {
183252439Srpaulo				broadcom,pins = <32>;
184252439Srpaulo			};
185252439Srpaulo
186252439Srpaulo			pins_gpclk0_d: gpclk0_d {
187252439Srpaulo				broadcom,pins = <34>;
188252439Srpaulo			};
189252439Srpaulo
190252439Srpaulo			/* GPCLK1 */
191252439Srpaulo			pins_gpclk1_a: gpclk1_a {
192252439Srpaulo				broadcom,pins = <5>;
193252439Srpaulo			};
194252439Srpaulo
195252439Srpaulo			pins_gpclk1_b: gpclk1_b {
196252439Srpaulo				broadcom,pins = <21>;
197252439Srpaulo			};
198252439Srpaulo
199252439Srpaulo			pins_gpclk1_c: gpclk1_c {
200252439Srpaulo				broadcom,pins = <42>;
201252439Srpaulo			};
202252439Srpaulo
203252439Srpaulo			pins_gpclk1_d: gpclk1_d {
204252439Srpaulo				broadcom,pins = <44>;
205252439Srpaulo			};
206252439Srpaulo
207252439Srpaulo			/* GPCLK2 */
208252439Srpaulo			pins_gpclk2_a: gpclk2_a {
209252439Srpaulo				broadcom,pins = <6>;
210252439Srpaulo			};
211252439Srpaulo
212252439Srpaulo			pins_gpclk2_b: gpclk2_b {
213252439Srpaulo				broadcom,pins = <43>;
214252439Srpaulo			};
215252439Srpaulo
216252439Srpaulo			/* SPI0 */
217252439Srpaulo			pins_spi0_a: spi0_a {
218252439Srpaulo				broadcom,pins = <7>, <8>, <9>, <10>, <11>;
219252439Srpaulo			};
220252439Srpaulo
221252439Srpaulo			pins_spi0_b: spi0_b {
222252439Srpaulo				broadcom,pins = <35>, <36>, <37>, <38>, <39>;
223252439Srpaulo			};
224252439Srpaulo
225252439Srpaulo			/* PWM */
226252439Srpaulo			pins_pwm0_a: pwm0_a {
227252439Srpaulo				broadcom,pins = <12>;
228252439Srpaulo			};
229252439Srpaulo
230252439Srpaulo			pins_pwm0_b: pwm0_b {
231252439Srpaulo				broadcom,pins = <18>;
232252439Srpaulo			};
233252439Srpaulo
234252439Srpaulo			pins_pwm0_c: pwm0_c {
235252439Srpaulo				broadcom,pins = <40>;
236252439Srpaulo			};
237252439Srpaulo
238252439Srpaulo			pins_pwm1_a: pwm1_a {
239252439Srpaulo				broadcom,pins = <13>;
240252439Srpaulo			};
241252439Srpaulo
242252439Srpaulo			pins_pwm1_b: pwm1_b {
243252439Srpaulo				broadcom,pins = <19>;
244252439Srpaulo			};
245252439Srpaulo
246252439Srpaulo			pins_pwm1_c: pwm1_c {
247252439Srpaulo				broadcom,pins = <41>;
248252439Srpaulo			};
249252439Srpaulo
250252439Srpaulo			pins_pwm1_d: pwm1_d {
251252439Srpaulo				broadcom,pins = <45>;
252252439Srpaulo			};
253252439Srpaulo
254252439Srpaulo			/* UART0 */
255252439Srpaulo			pins_uart0_a: uart0_a {
256252439Srpaulo				broadcom,pins = <14>, <15>;
257252439Srpaulo			};
258252439Srpaulo
259252439Srpaulo			pins_uart0_b: uart0_b {
260252439Srpaulo				broadcom,pins = <32>, <33>;
261252439Srpaulo			};
262252439Srpaulo
263252439Srpaulo			pins_uart0_c: uart0_c {
264252439Srpaulo				broadcom,pins = <36>, <37>;
265252439Srpaulo			};
266252439Srpaulo
267252439Srpaulo			pins_uart0_fc_a: uart0_fc_a {
268252439Srpaulo				broadcom,pins = <16>, <17>;
269252439Srpaulo			};
270252439Srpaulo
271252439Srpaulo			pins_uart0_fc_b: uart0_fc_b {
272252439Srpaulo				broadcom,pins = <30>, <31>;
273252439Srpaulo			};
274252439Srpaulo
275252439Srpaulo			pins_uart0_fc_c: uart0_fc_c {
276252439Srpaulo				broadcom,pins = <39>, <38>;
277252439Srpaulo			};
278252439Srpaulo
279252439Srpaulo			/* PCM */
280252439Srpaulo			pins_pcm_a: pcm_a {
281252439Srpaulo				broadcom,pins = <18>, <19>, <20>, <21>;
282252439Srpaulo			};
283252439Srpaulo
284252439Srpaulo			pins_pcm_b: pcm_b {
285252439Srpaulo				broadcom,pins = <28>, <29>, <30>, <31>;
286252439Srpaulo			};
287252439Srpaulo
288252439Srpaulo			/* Secondary Address Bus */
289252439Srpaulo			pins_sm_addr_a: sm_addr_a {
290252439Srpaulo				broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
291252439Srpaulo			};
292252439Srpaulo
293252439Srpaulo			pins_sm_addr_b: sm_addr_b {
294252439Srpaulo				broadcom,pins = <33>, <32>, <31>, <30>, <29>,
295252439Srpaulo				                <28>;
296252439Srpaulo			};
297252439Srpaulo
298252439Srpaulo			pins_sm_ctl_a: sm_ctl_a {
299252439Srpaulo				broadcom,pins = <6>, <7>;
300252439Srpaulo			};
301252439Srpaulo
302252439Srpaulo			pins_sm_ctl_b: sm_ctl_b {
303252439Srpaulo				broadcom,pins = <34>, <35>;
304252439Srpaulo			};
305252439Srpaulo
306252439Srpaulo			pins_sm_data_8bit_a: sm_data_8bit_a {
307252439Srpaulo				broadcom,pins = <8>, <9>, <10>, <11>, <12>,
308252439Srpaulo				                <13>, <14>, <15>;
309252439Srpaulo			};
310252439Srpaulo
311252439Srpaulo			pins_sm_data_8bit_b: sm_data_8bit_b {
312252439Srpaulo				broadcom,pins = <36>, <37>, <38>, <39>, <40>,
313252439Srpaulo				                <41>, <42>, <43>;
314252439Srpaulo			};
315252439Srpaulo
316252439Srpaulo			pins_sm_data_16bit: sm_data_16bit {
317252439Srpaulo				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
318252439Srpaulo				                <21>, <22>, <23>;
319252439Srpaulo			};
320252439Srpaulo
321252439Srpaulo			pins_sm_data_18bit: sm_data_18bit {
322252439Srpaulo				broadcom,pins = <24>, <25>;
323252439Srpaulo			};
324252439Srpaulo
325252439Srpaulo			/* BSCSL */
326252439Srpaulo			pins_bscsl: bscsl {
327252439Srpaulo				broadcom,pins = <18>, <19>;
328252439Srpaulo			};
329252439Srpaulo
330252439Srpaulo			/* SPISL */
331252439Srpaulo			pins_spisl: spisl {
332252439Srpaulo				broadcom,pins = <18>, <19>, <20>, <21>;
333252439Srpaulo			};
334252439Srpaulo
335252439Srpaulo			/* SPI1 */
336252439Srpaulo			pins_spi1: spi1 {
337252439Srpaulo				broadcom,pins = <16>, <17>, <18>, <19>, <20>,
338252439Srpaulo				                <21>;
339252439Srpaulo			};
340252439Srpaulo
341252439Srpaulo			/* UART1 */
342252439Srpaulo			pins_uart1_a: uart1_a {
343252439Srpaulo				broadcom,pins = <14>, <15>;
344252439Srpaulo			};
345252439Srpaulo
346252439Srpaulo			pins_uart1_b: uart1_b {
347252439Srpaulo				broadcom,pins = <32>, <33>;
348252439Srpaulo			};
349252439Srpaulo
350252439Srpaulo			pins_uart1_c: uart1_c {
351252439Srpaulo				broadcom,pins = <40>, <41>;
352252439Srpaulo			};
353252439Srpaulo
354252439Srpaulo			pins_uart1_fc_a: uart1_fc_a {
355252439Srpaulo				broadcom,pins = <16>, <17>;
356252439Srpaulo			};
357252439Srpaulo
358252439Srpaulo			pins_uart1_fc_b: uart1_fc_b {
359252439Srpaulo				broadcom,pins = <30>, <31>;
360252439Srpaulo			};
361252439Srpaulo
362252439Srpaulo			pins_uart1_fc_c: uart1_fc_c {
363252439Srpaulo				broadcom,pins = <43>, <42>;
364252439Srpaulo			};
365252439Srpaulo
366252439Srpaulo			/* SPI2 */
367252439Srpaulo			pins_spi2: spi2 {
368252439Srpaulo				broadcom,pins = <40>, <41>, <42>, <43>, <44>,
369252439Srpaulo				                <45>;
370252439Srpaulo			};
371252439Srpaulo
372252439Srpaulo			/* ARM JTAG */
373252439Srpaulo			pins_arm_jtag_trst: arm_jtag_trst {
374252439Srpaulo				broadcom,pins = <22>;
375252439Srpaulo			};
376252439Srpaulo
377252439Srpaulo			pins_arm_jtag_a: arm_jtag_a {
378252439Srpaulo				broadcom,pins = <4>, <5>, <6>, <12>, <13>;
379252439Srpaulo			};
380252439Srpaulo
381252439Srpaulo			pins_arm_jtag_b: arm_jtag_b {
382252439Srpaulo				broadcom,pins = <23>, <24>, <25>, <26>, <27>;
383252439Srpaulo			};
384252439Srpaulo
385252439Srpaulo			/* Reserved */
386252439Srpaulo			pins_reserved: reserved {
387252439Srpaulo				broadcom,pins = <48>, <49>, <50>, <51>, <52>,
388252439Srpaulo				                <53>;
389252439Srpaulo			};
390252439Srpaulo		};
391252439Srpaulo
392256959Sloos		bsc0 {
393288311Sloos			#address-cells = <1>;
394288311Sloos			#size-cells = <0>;
395256959Sloos			compatible = "broadcom,bcm2835-bsc",
396256959Sloos				     "broadcom,bcm2708-bsc";
397256959Sloos			reg = <0x205000 0x20>;
398256959Sloos			interrupts = <61>;
399256959Sloos			interrupt-parent = <&intc>;
400256959Sloos		};
401256959Sloos
402256959Sloos		bsc1 {
403288311Sloos			#address-cells = <1>;
404288311Sloos			#size-cells = <0>;
405256959Sloos			compatible = "broadcom,bcm2835-bsc",
406256959Sloos				     "broadcom,bcm2708-bsc";
407256959Sloos			reg = <0x804000 0x20>;
408256959Sloos			interrupts = <61>;
409256959Sloos			interrupt-parent = <&intc>;
410256959Sloos		};
411256959Sloos
412257062Sloos		spi0 {
413257062Sloos			compatible = "broadcom,bcm2835-spi",
414257062Sloos				     "broadcom,bcm2708-spi";
415257062Sloos			reg = <0x204000 0x20>;
416257062Sloos			interrupts = <62>;
417257062Sloos			interrupt-parent = <&intc>;
418257062Sloos		};
419257062Sloos
420252439Srpaulo		dma: dma {
421252439Srpaulo			compatible = "broadcom,bcm2835-dma", 
422252439Srpaulo				     "broadcom,bcm2708-dma";
423252439Srpaulo			reg = <0x7000 0x1000>, <0xE05000 0x1000>;
424252439Srpaulo			interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
425252439Srpaulo			interrupt-parent = <&intc>;
426252439Srpaulo
427252439Srpaulo			broadcom,channels = <0>;	/* Set by VideoCore */
428252439Srpaulo		};
429252439Srpaulo
430252439Srpaulo		vc_mbox: mbox {
431252439Srpaulo			compatible = "broadcom,bcm2835-mbox", 
432252439Srpaulo				     "broadcom,bcm2708-mbox";
433252439Srpaulo			reg = <0xB880 0x40>;
434252439Srpaulo			interrupts = <1>;
435252439Srpaulo			interrupt-parent = <&intc>;
436252439Srpaulo
437252439Srpaulo			/* Channels
438252439Srpaulo			 * 0: Power
439252439Srpaulo			 * 1: Frame buffer
440252439Srpaulo			 * 2: Virtual UART
441252439Srpaulo			 * 3: VCHIQ
442252439Srpaulo			 * 4: LEDs
443252439Srpaulo			 * 5: Buttons
444252439Srpaulo			 * 6: Touch screen
445252439Srpaulo			 */
446252439Srpaulo		};
447252439Srpaulo
448252439Srpaulo		sdhci {
449252439Srpaulo			compatible = "broadcom,bcm2835-sdhci", 
450252439Srpaulo				     "broadcom,bcm2708-sdhci";
451252439Srpaulo			reg = <0x300000 0x100>;
452252439Srpaulo			interrupts = <70>;
453252439Srpaulo			interrupt-parent = <&intc>;
454252439Srpaulo
455281859Sloos			clock-frequency = <250000000>;	/* Set by VideoCore */
456252439Srpaulo		};
457252439Srpaulo
458252439Srpaulo		uart0: uart0 {
459252439Srpaulo			compatible = "broadcom,bcm2835-uart", 
460252439Srpaulo				     "broadcom,bcm2708-uart", "arm,pl011", 
461252439Srpaulo				     "arm,primecell";
462252439Srpaulo			reg = <0x201000 0x1000>;
463252439Srpaulo			interrupts = <65>;
464252439Srpaulo			interrupt-parent = <&intc>;
465252439Srpaulo
466252439Srpaulo			clock-frequency = <3000000>;	/* Set by VideoCore */
467252439Srpaulo			reg-shift = <2>;
468252439Srpaulo		};
469252439Srpaulo
470290321Sgonzo		vchiq: vchiq {
471252439Srpaulo			compatible = "broadcom,bcm2835-vchiq";
472252439Srpaulo			reg = <0xB800 0x50>;
473252439Srpaulo			interrupts = <2>;
474252439Srpaulo			interrupt-parent = <&intc>;
475290321Sgonzo			cache-line-size = <32>;
476252439Srpaulo		};
477252439Srpaulo
478252439Srpaulo		usb {
479252439Srpaulo			compatible = "broadcom,bcm2835-usb", 
480252439Srpaulo				     "broadcom,bcm2708-usb", 
481252439Srpaulo				     "synopsys,designware-hs-otg2";
482252439Srpaulo			reg = <0x980000 0x20000>;
483252439Srpaulo			interrupts = <17>;
484252439Srpaulo			interrupt-parent = <&intc>;
485252439Srpaulo			#address-cells = <1>;
486252439Srpaulo			#size-cells = <0>;
487252439Srpaulo		};
488252439Srpaulo
489252439Srpaulo	};
490252439Srpaulo};
491