pte.h revision 297017
1280364Sandrew/*- 2280364Sandrew * Copyright (c) 2014 Andrew Turner 3280364Sandrew * Copyright (c) 2014-2015 The FreeBSD Foundation 4280364Sandrew * All rights reserved. 5280364Sandrew * 6280364Sandrew * This software was developed by Andrew Turner under 7280364Sandrew * sponsorship from the FreeBSD Foundation. 8280364Sandrew * 9280364Sandrew * Redistribution and use in source and binary forms, with or without 10280364Sandrew * modification, are permitted provided that the following conditions 11280364Sandrew * are met: 12280364Sandrew * 1. Redistributions of source code must retain the above copyright 13280364Sandrew * notice, this list of conditions and the following disclaimer. 14280364Sandrew * 2. Redistributions in binary form must reproduce the above copyright 15280364Sandrew * notice, this list of conditions and the following disclaimer in the 16280364Sandrew * documentation and/or other materials provided with the distribution. 17280364Sandrew * 18280364Sandrew * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19280364Sandrew * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20280364Sandrew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21280364Sandrew * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22280364Sandrew * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23280364Sandrew * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24280364Sandrew * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25280364Sandrew * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26280364Sandrew * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27280364Sandrew * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28280364Sandrew * SUCH DAMAGE. 29280364Sandrew * 30280364Sandrew * $FreeBSD: head/sys/arm64/include/pte.h 297017 2016-03-18 10:01:25Z andrew $ 31280364Sandrew */ 32280364Sandrew 33280364Sandrew#ifndef _MACHINE_PTE_H_ 34280364Sandrew#define _MACHINE_PTE_H_ 35280364Sandrew 36280364Sandrew#ifndef LOCORE 37280364Sandrewtypedef uint64_t pd_entry_t; /* page directory entry */ 38280364Sandrewtypedef uint64_t pt_entry_t; /* page table entry */ 39280364Sandrew#endif 40280364Sandrew 41280364Sandrew/* Block and Page attributes */ 42280364Sandrew/* TODO: Add the upper attributes */ 43280364Sandrew#define ATTR_MASK_H UINT64_C(0xfff0000000000000) 44280364Sandrew#define ATTR_MASK_L UINT64_C(0x0000000000000fff) 45280364Sandrew#define ATTR_MASK (ATTR_MASK_H | ATTR_MASK_L) 46280364Sandrew/* Bits 58:55 are reserved for software */ 47280364Sandrew#define ATTR_SW_MANAGED (1UL << 56) 48280364Sandrew#define ATTR_SW_WIRED (1UL << 55) 49280364Sandrew#define ATTR_nG (1 << 11) 50280364Sandrew#define ATTR_AF (1 << 10) 51280364Sandrew#define ATTR_SH(x) ((x) << 8) 52285314Sandrew#define ATTR_SH_MASK ATTR_SH(3) 53285314Sandrew#define ATTR_SH_NS 0 /* Non-shareable */ 54285314Sandrew#define ATTR_SH_OS 2 /* Outer-shareable */ 55285314Sandrew#define ATTR_SH_IS 3 /* Inner-shareable */ 56280364Sandrew#define ATTR_AP_RW_BIT (1 << 7) 57280364Sandrew#define ATTR_AP(x) ((x) << 6) 58280364Sandrew#define ATTR_AP_MASK ATTR_AP(3) 59280364Sandrew#define ATTR_AP_RW (0 << 1) 60280364Sandrew#define ATTR_AP_RO (1 << 1) 61280364Sandrew#define ATTR_AP_USER (1 << 0) 62280364Sandrew#define ATTR_NS (1 << 5) 63280364Sandrew#define ATTR_IDX(x) ((x) << 2) 64280364Sandrew#define ATTR_IDX_MASK (7 << 2) 65280364Sandrew 66285537Sandrew#ifdef SMP 67285537Sandrew#define ATTR_DEFAULT (ATTR_AF | ATTR_SH(ATTR_SH_IS)) 68285537Sandrew#else 69285537Sandrew#define ATTR_DEFAULT (ATTR_AF) 70285537Sandrew#endif 71285537Sandrew 72280364Sandrew#define ATTR_DESCR_MASK 3 73280364Sandrew 74280364Sandrew/* Level 0 table, 512GiB per entry */ 75280364Sandrew#define L0_SHIFT 39 76280364Sandrew#define L0_INVAL 0x0 /* An invalid address */ 77297017Sandrew /* 0x1 Level 0 doesn't support block translation */ 78280364Sandrew /* 0x2 also marks an invalid address */ 79280364Sandrew#define L0_TABLE 0x3 /* A next-level table */ 80280364Sandrew 81280364Sandrew/* Level 1 table, 1GiB per entry */ 82280364Sandrew#define L1_SHIFT 30 83280364Sandrew#define L1_SIZE (1 << L1_SHIFT) 84280364Sandrew#define L1_OFFSET (L1_SIZE - 1) 85280364Sandrew#define L1_INVAL L0_INVAL 86297017Sandrew#define L1_BLOCK 0x1 87280364Sandrew#define L1_TABLE L0_TABLE 88280364Sandrew 89280364Sandrew/* Level 2 table, 2MiB per entry */ 90280364Sandrew#define L2_SHIFT 21 91280364Sandrew#define L2_SIZE (1 << L2_SHIFT) 92280364Sandrew#define L2_OFFSET (L2_SIZE - 1) 93297017Sandrew#define L2_INVAL L1_INVAL 94297017Sandrew#define L2_BLOCK L1_BLOCK 95297017Sandrew#define L2_TABLE L1_TABLE 96280364Sandrew 97280364Sandrew#define L2_BLOCK_MASK UINT64_C(0xffffffe00000) 98280364Sandrew 99280364Sandrew/* Level 3 table, 4KiB per entry */ 100280364Sandrew#define L3_SHIFT 12 101280364Sandrew#define L3_SIZE (1 << L3_SHIFT) 102280364Sandrew#define L3_OFFSET (L3_SIZE - 1) 103280364Sandrew#define L3_SHIFT 12 104280364Sandrew#define L3_INVAL 0x0 105280364Sandrew /* 0x1 is reserved */ 106280364Sandrew /* 0x2 also marks an invalid address */ 107280364Sandrew#define L3_PAGE 0x3 108280364Sandrew 109280364Sandrew#define Ln_ENTRIES (1 << 9) 110280364Sandrew#define Ln_ADDR_MASK (Ln_ENTRIES - 1) 111280364Sandrew#define Ln_TABLE_MASK ((1 << 12) - 1) 112280364Sandrew 113280364Sandrew#endif /* !_MACHINE_PTE_H_ */ 114280364Sandrew 115280364Sandrew/* End of pte.h */ 116