pxa_machdep.c revision 286584
112115Sdyson/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */ 212115Sdyson 312115Sdyson/*- 412115Sdyson * Copyright (c) 1994-1998 Mark Brinicombe. 512115Sdyson * Copyright (c) 1994 Brini. 612115Sdyson * All rights reserved. 712115Sdyson * 812115Sdyson * This code is derived from software written for Brini by Mark Brinicombe 912115Sdyson * 1012115Sdyson * Redistribution and use in source and binary forms, with or without 1112115Sdyson * modification, are permitted provided that the following conditions 1212115Sdyson * are met: 1312115Sdyson * 1. Redistributions of source code must retain the above copyright 1412115Sdyson * notice, this list of conditions and the following disclaimer. 1512115Sdyson * 2. Redistributions in binary form must reproduce the above copyright 1612115Sdyson * notice, this list of conditions and the following disclaimer in the 1712115Sdyson * documentation and/or other materials provided with the distribution. 1812115Sdyson * 3. All advertising materials mentioning features or use of this software 1912115Sdyson * must display the following acknowledgement: 2012115Sdyson * This product includes software developed by Brini. 2112115Sdyson * 4. The name of the company nor the name of the author may be used to 2212115Sdyson * endorse or promote products derived from this software without specific 2312115Sdyson * prior written permission. 2412115Sdyson * 2512115Sdyson * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 2612115Sdyson * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 2712115Sdyson * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2812115Sdyson * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 2912115Sdyson * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 3012115Sdyson * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 3112115Sdyson * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3212115Sdyson * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 3312115Sdyson * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3412115Sdyson * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3512115Sdyson * SUCH DAMAGE. 3693016Sbde * 3712115Sdyson * RiscBSD kernel project 3812115Sdyson * 3912115Sdyson * machdep.c 4012115Sdyson * 4112115Sdyson * Machine dependant functions for kernel setup 4212115Sdyson * 4312115Sdyson * This file needs a lot of work. 4412115Sdyson * 4512115Sdyson * Created : 17/09/94 4660041Sphk */ 4712115Sdyson 4829906Skato#include "opt_ddb.h" 4924131Sbde#include "opt_kstack_pages.h" 5012115Sdyson 5112115Sdyson#include <sys/cdefs.h> 5271576Sjasone__FBSDID("$FreeBSD: head/sys/arm/xscale/pxa/pxa_machdep.c 286584 2015-08-10 17:18:21Z kib $"); 5312115Sdyson 5496749Siedowse#define _ARM32_BUS_DMA_PRIVATE 5596749Siedowse#include <sys/param.h> 5612115Sdyson#include <sys/systm.h> 5712115Sdyson#include <sys/sysproto.h> 5812115Sdyson#include <sys/signalvar.h> 5912115Sdyson#include <sys/imgact.h> 6012115Sdyson#include <sys/kernel.h> 6112115Sdyson#include <sys/ktr.h> 6292728Salfred#include <sys/linker.h> 6392728Salfred#include <sys/lock.h> 64122114Sbde#include <sys/malloc.h> 6596749Siedowse#include <sys/mutex.h> 6612115Sdyson#include <sys/pcpu.h> 67116271Sphk#include <sys/proc.h> 68116271Sphk#include <sys/ptrace.h> 69116271Sphk#include <sys/cons.h> 70116271Sphk#include <sys/bio.h> 71116271Sphk#include <sys/bus.h> 72116271Sphk#include <sys/buf.h> 73116271Sphk#include <sys/exec.h> 74116271Sphk#include <sys/kdb.h> 75116271Sphk#include <sys/msgbuf.h> 76132902Sphk#include <machine/reg.h> 77116271Sphk#include <machine/cpu.h> 7896749Siedowse 7996749Siedowse#include <vm/vm.h> 8030280Sphk#include <vm/pmap.h> 8112911Sphk#include <vm/vm_object.h> 82116271Sphk#include <vm/vm_page.h> 83116271Sphk#include <vm/vm_map.h> 84132902Sphk#include <machine/devmap.h> 85116271Sphk#include <machine/vmparam.h> 86116271Sphk#include <machine/pcb.h> 87116271Sphk#include <machine/undefined.h> 88116271Sphk#include <machine/machdep.h> 89116271Sphk#include <machine/metadata.h> 90116271Sphk#include <machine/armreg.h> 91116271Sphk#include <machine/bus.h> 9212115Sdyson#include <machine/physmem.h> 9312115Sdyson#include <sys/reboot.h> 9438909Sbde 9512115Sdyson#include <arm/xscale/pxa/pxareg.h> 9612115Sdyson#include <arm/xscale/pxa/pxavar.h> 9712115Sdyson 9812911Sphk#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 9912115Sdyson#define KERNEL_PT_IOPXS 1 100130585Sphk#define KERNEL_PT_BEFOREKERN 2 10193014Sbde#define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */ 10292728Salfred#define KERNEL_PT_AFKERNEL_NUM 9 10393014Sbde 10416322Sgpalmer/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 10516322Sgpalmer#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 10692728Salfred 10716322Sgpalmerstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 10812115Sdyson 10916322Sgpalmer/* Physical and virtual addresses for some global pages */ 11012115Sdyson 11112115Sdysonstruct pv_addr systempage; 11212115Sdysonstruct pv_addr msgbufpv; 11312115Sdysonstruct pv_addr irqstack; 11412115Sdysonstruct pv_addr undstack; 11512911Sphkstruct pv_addr abtstack; 11612115Sdysonstruct pv_addr kernelstack; 11712115Sdysonstruct pv_addr minidataclean; 11896752Siedowse 11996752Siedowsestatic void pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t, 120132805Sphk uint32_t *, uint32_t *); 12183366Sjulian 12296749Siedowse/* Static device mappings. */ 12312115Sdysonstatic const struct arm_devmap_entry pxa_devmap[] = { 12412115Sdyson /* 12512115Sdyson * Map the on-board devices up into the KVA region so we don't muck 12629208Sbde * up user-space. 12752782Smsmith */ 12829208Sbde { 12929208Sbde PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET, 130111119Simp PXA2X0_PERIPH_START, 13112115Sdyson PXA250_PERIPH_END - PXA2X0_PERIPH_START, 13285339Sdillon VM_PROT_READ|VM_PROT_WRITE, 13312115Sdyson PTE_DEVICE, 13412115Sdyson }, 13583366Sjulian { 0, 0, 0, 0, 0, } 13612115Sdyson}; 13712115Sdyson 13812115Sdyson#define SDRAM_START 0xa0000000 13912115Sdyson 14083366Sjulianextern vm_offset_t xscale_cache_clean_addr; 14112115Sdyson 14212115Sdysonvoid * 14312115Sdysoninitarm(struct arm_boot_params *abp) 14453452Sphk{ 14512115Sdyson struct pv_addr kernel_l1pt; 14612115Sdyson struct pv_addr dpcpu; 14796749Siedowse int loop; 14812115Sdyson u_int l1pagetable; 14912115Sdyson vm_offset_t freemempos; 15012115Sdyson vm_offset_t freemem_pt; 15112115Sdyson vm_offset_t afterkern; 15212115Sdyson vm_offset_t freemem_after; 15312115Sdyson vm_offset_t lastaddr; 15412115Sdyson int i, j; 15512115Sdyson uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS]; 15683366Sjulian 15712115Sdyson lastaddr = parse_boot_param(abp); 15812115Sdyson arm_physmem_kernaddr = abp->abp_physaddr; 15912115Sdyson set_cpufuncs(); 16012115Sdyson pcpu_init(pcpup, 0, sizeof(struct pcpu)); 16116322Sgpalmer PCPU_SET(curthread, &thread0); 16212115Sdyson 16312115Sdyson /* Do basic tuning, hz etc */ 16412115Sdyson init_param1(); 16512115Sdyson 16612115Sdyson freemempos = 0xa0200000; 16712115Sdyson /* Define a macro to simplify memory allocation */ 16812911Sphk#define valloc_pages(var, np) \ 169132902Sphk alloc_pages((var).pv_pa, (np)); \ 17096752Siedowse (var).pv_va = (var).pv_pa + 0x20000000; 17183366Sjulian 17212115Sdyson#define alloc_pages(var, np) \ 17397255Smux freemempos -= (np * PAGE_SIZE); \ 17497255Smux (var) = freemempos; \ 17512115Sdyson memset((char *)(var), 0, ((np) * PAGE_SIZE)); 17696749Siedowse 17796752Siedowse while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 17897255Smux freemempos -= PAGE_SIZE; 17969806Smjacob valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 18097255Smux for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 18139028Sbde if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 182132902Sphk valloc_pages(kernel_pt_table[loop], 18312115Sdyson L2_TABLE_SIZE / PAGE_SIZE); 18497255Smux } else { 18597255Smux kernel_pt_table[loop].pv_pa = freemempos + 18697255Smux (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 18773286Sadrian L2_TABLE_SIZE_REAL; 18873286Sadrian kernel_pt_table[loop].pv_va = 18973286Sadrian kernel_pt_table[loop].pv_pa + 0x20000000; 19097255Smux } 19197255Smux } 19297255Smux freemem_pt = freemempos; 19397255Smux freemempos = 0xa0100000; 19497255Smux /* 19597255Smux * Allocate a page for the system page mapped to V0x00000000 19612115Sdyson * This page will just contain the system vectors and can be 19712115Sdyson * shared by all processes. 19812115Sdyson */ 19912115Sdyson valloc_pages(systempage, 1); 20012115Sdyson 20196749Siedowse /* Allocate dynamic per-cpu area. */ 20212115Sdyson valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 20312115Sdyson dpcpu_init((void *)dpcpu.pv_va, 0); 20412115Sdyson 20512115Sdyson /* Allocate stacks for all modes */ 20612115Sdyson valloc_pages(irqstack, IRQ_STACK_SIZE); 20712115Sdyson valloc_pages(abtstack, ABT_STACK_SIZE); 20883366Sjulian valloc_pages(undstack, UND_STACK_SIZE); 20912115Sdyson valloc_pages(kernelstack, kstack_pages); 21083366Sjulian alloc_pages(minidataclean.pv_pa, 1); 21183366Sjulian valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 21239670Sbde /* 21339670Sbde * Allocate memory for the l1 and l2 page tables. The scheme to avoid 21439670Sbde * wasting memory by allocating the l1pt on the first 16k memory was 21539670Sbde * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for 21639670Sbde * this to work (which is supposed to be the case). 21712115Sdyson */ 21812115Sdyson 219132902Sphk /* 22012115Sdyson * Now we start construction of the L1 page table 22112115Sdyson * We start by mapping the L2 page tables into the L1. 22257839Sbde * This means that we can replace L1 mappings later on if necessary 22357839Sbde */ 22457839Sbde l1pagetable = kernel_l1pt.pv_va; 22557839Sbde 22639028Sbde /* Map the L2 pages tables in the L1 page table */ 22739028Sbde pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1), 22839028Sbde &kernel_pt_table[KERNEL_PT_SYS]); 22939028Sbde#if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */ 23039028Sbde pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE, 23193593Sjhb &kernel_pt_table[KERNEL_PT_IOPXS]); 23283366Sjulian#endif 23343301Sdillon pmap_link_l2pt(l1pagetable, KERNBASE, 23491406Sjhb &kernel_pt_table[KERNEL_PT_BEFOREKERN]); 23583366Sjulian pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000, 23639028Sbde VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 23739028Sbde pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000, 23883366Sjulian 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 23939028Sbde pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000, 24039028Sbde (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1), 24139670Sbde VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 24239670Sbde freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1); 24339670Sbde afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & 24439670Sbde ~(L1_S_SIZE - 1)); 24539670Sbde for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 24639670Sbde pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 24739670Sbde &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 24839670Sbde } 24939670Sbde pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 25039670Sbde VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 25139670Sbde 25239670Sbde 25339670Sbde /* Map the Mini-Data cache clean area. */ 25412115Sdyson xscale_setup_minidata(l1pagetable, afterkern, 25512115Sdyson minidataclean.pv_pa); 25639670Sbde 25712115Sdyson /* Map the vector page. */ 25897255Smux pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 25997255Smux VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 26097255Smux arm_devmap_bootstrap(l1pagetable, pxa_devmap); 26197255Smux 26297255Smux /* 26397255Smux * Give the XScale global cache clean code an appropriately 26497255Smux * sized chunk of unmapped VA space starting at 0xff000000 26512115Sdyson * (our device mappings end before this address). 26612115Sdyson */ 26712115Sdyson xscale_cache_clean_addr = 0xff000000U; 26812115Sdyson 269125786Sbde cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 27012115Sdyson setttb(kernel_l1pt.pv_pa); 27197255Smux cpu_tlb_flushID(); 27297255Smux cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 27397255Smux 27443301Sdillon /* 27512115Sdyson * Pages were allocated during the secondary bootstrap for the 27654655Seivind * stacks for different CPU modes. 27712115Sdyson * We must now set the r13 registers in the different CPU modes to 27812115Sdyson * point to these stacks. 27955756Sphk * Since the ARM stacks use STMFD etc. we must set r13 to the top end 28012115Sdyson * of the stack memory. 28155756Sphk */ 28212115Sdyson set_stackptrs(0); 28339028Sbde 28439028Sbde /* 28539028Sbde * We must now clean the cache again.... 28639028Sbde * Cleaning may be done by reading new data to displace any 28739028Sbde * dirty data in the cache. This will have happened in setttb() 28893593Sjhb * but since we are boot strapping the addresses used for the read 28939028Sbde * may have just been remapped and thus the cache could be out 29039028Sbde * of sync. A re-clean after the switch will cure this. 29139028Sbde * After booting there are no gross relocations of the kernel thus 29283366Sjulian * this problem will not occur after initarm(). 29391406Sjhb */ 29439028Sbde cpu_idcache_wbinv_all(); 29539028Sbde cpu_setup(); 29639028Sbde 29783366Sjulian /* 29839028Sbde * Sort out bus_space for on-board devices. 29939028Sbde */ 30029888Skato pxa_obio_tag_init(); 30183366Sjulian 30229888Skato /* 30312115Sdyson * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration 30412115Sdyson * registers. 30512115Sdyson */ 30612115Sdyson pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize); 30712115Sdyson 30812115Sdyson /* Fire up consoles. */ 30912115Sdyson cninit(); 31012115Sdyson 31112115Sdyson undefined_init(); 31296749Siedowse 31312115Sdyson init_proc0(kernelstack.pv_va); 31473286Sadrian 31573286Sadrian /* Enable MMU, I-cache, D-cache, write buffer. */ 31673286Sadrian arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 31773286Sadrian 31873286Sadrian pmap_curmaxkvaddr = afterkern + PAGE_SIZE; 31973286Sadrian vm_max_kernel_address = 0xe0000000; 32097255Smux pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt); 32112115Sdyson msgbufp = (void*)msgbufpv.pv_va; 32283366Sjulian msgbufinit(msgbufp, msgbufsize); 32312115Sdyson mutex_init(); 32412115Sdyson 32512115Sdyson /* 32612115Sdyson * Add the physical ram we have available. 32712115Sdyson * 32812115Sdyson * Exclude the kernel (and all the things we allocated which immediately 32912115Sdyson * follow the kernel) from the VM allocation pool but not from crash 33012115Sdyson * dumps. virtual_avail is a global variable which tracks the kva we've 33112115Sdyson * "allocated" while setting up pmaps. 33212115Sdyson * 33312115Sdyson * Prepare the list of physical memory available to the vm subsystem. 33412115Sdyson */ 33512115Sdyson for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) { 33612115Sdyson if (memsize[j] > 0) 33712115Sdyson arm_physmem_hardware_region(memstart[j], memsize[j]); 33812115Sdyson } 33912115Sdyson arm_physmem_exclude_region(freemem_pt, KERNPHYSADDR - 34012115Sdyson freemem_pt, EXFLAG_NOALLOC); 34112115Sdyson arm_physmem_exclude_region(freemempos, KERNPHYSADDR - 0x100000 - 34212115Sdyson freemempos, EXFLAG_NOALLOC); 34312115Sdyson arm_physmem_exclude_region(abp->abp_physaddr, 34412115Sdyson virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC); 34512115Sdyson arm_physmem_init_kernel_globals(); 34612115Sdyson 34712115Sdyson init_param2(physmem); 34812115Sdyson kdb_init(); 34912115Sdyson return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 35039671Sbde sizeof(struct pcb))); 35112115Sdyson} 35212115Sdyson 35312115Sdysonstatic void 35412115Sdysonpxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh, 35512115Sdyson uint32_t *memstart, uint32_t *memsize) 35612115Sdyson{ 35712115Sdyson uint32_t mdcnfg, dwid, dcac, drac, dnb; 35812115Sdyson int i; 35939671Sbde 36012115Sdyson mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG); 36112115Sdyson 36212115Sdyson /* 36312115Sdyson * Scan all 4 SDRAM banks 36412115Sdyson */ 36512115Sdyson for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) { 36612115Sdyson memstart[i] = 0; 36712115Sdyson memsize[i] = 0; 36812115Sdyson 36939671Sbde switch (i) { 37012115Sdyson case 0: 37112115Sdyson case 1: 37212115Sdyson if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) || 37312115Sdyson (i == 1 && (mdcnfg & MDCNFG_DE1) == 0)) 37412115Sdyson continue; 37512115Sdyson dwid = mdcnfg >> MDCNFD_DWID01_SHIFT; 37612115Sdyson dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT; 37712115Sdyson drac = mdcnfg >> MDCNFD_DRAC01_SHIFT; 37812115Sdyson dnb = mdcnfg >> MDCNFD_DNB01_SHIFT; 37955313Sbde break; 38055313Sbde 38155313Sbde case 2: 382130585Sphk case 3: 38355313Sbde if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) || 38455313Sbde (i == 3 && (mdcnfg & MDCNFG_DE3) == 0)) 38555313Sbde continue; 38655313Sbde dwid = mdcnfg >> MDCNFD_DWID23_SHIFT; 38755313Sbde dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT; 38855313Sbde drac = mdcnfg >> MDCNFD_DRAC23_SHIFT; 38955313Sbde dnb = mdcnfg >> MDCNFD_DNB23_SHIFT; 39055313Sbde break; 39155313Sbde default: 39255313Sbde panic("pxa_probe_sdram: impossible"); 39355313Sbde } 39455313Sbde 39555313Sbde dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */ 39655313Sbde dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */ 39755313Sbde drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */ 39855313Sbde dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */ 39955313Sbde 40055313Sbde memsize[i] = dwid * dcac * drac * dnb; 40155313Sbde memstart[i] = PXA2X0_SDRAM0_START + 40255313Sbde (i * PXA2X0_SDRAM_BANK_SIZE); 40355313Sbde } 40455313Sbde} 40555313Sbde 40655313Sbde#define TIMER_FREQUENCY 3686400 40755313Sbde#define UNIMPLEMENTED panic("%s: unimplemented", __func__) 40855313Sbde 40912115Sdyson/* XXXBJR: Belongs with DELAY in a timer.c of some sort. */ 41012115Sdysonvoid 41112115Sdysoncpu_startprofclock(void) 41212115Sdyson{ 41312115Sdyson UNIMPLEMENTED; 41412115Sdyson} 41512115Sdyson 41612115Sdysonvoid 41712115Sdysoncpu_stopprofclock(void) 41812115Sdyson{ 41912115Sdyson UNIMPLEMENTED; 42012115Sdyson} 42112115Sdyson 42212115Sdysonstatic struct arm32_dma_range pxa_range = { 42312115Sdyson .dr_sysbase = 0, 42412115Sdyson .dr_busbase = 0, 42512115Sdyson .dr_len = ~0u, 42612115Sdyson}; 42712115Sdyson 42812115Sdysonstruct arm32_dma_range * 42912115Sdysonbus_dma_get_range(void) 43012115Sdyson{ 43112115Sdyson 43212115Sdyson return (&pxa_range); 43312115Sdyson} 43412115Sdyson 43512115Sdysonint 43612115Sdysonbus_dma_get_range_nb(void) 43712115Sdyson{ 43812115Sdyson 43912115Sdyson return (1); 44012115Sdyson} 44112115Sdyson