pxa_machdep.c revision 239268
1/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */ 2 3/*- 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * machdep.c 40 * 41 * Machine dependant functions for kernel setup 42 * 43 * This file needs a lot of work. 44 * 45 * Created : 17/09/94 46 */ 47 48#include "opt_ddb.h" 49 50#include <sys/cdefs.h> 51__FBSDID("$FreeBSD: head/sys/arm/xscale/pxa/pxa_machdep.c 239268 2012-08-15 03:03:03Z gonzo $"); 52 53#define _ARM32_BUS_DMA_PRIVATE 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/sysproto.h> 57#include <sys/signalvar.h> 58#include <sys/imgact.h> 59#include <sys/kernel.h> 60#include <sys/ktr.h> 61#include <sys/linker.h> 62#include <sys/lock.h> 63#include <sys/malloc.h> 64#include <sys/mutex.h> 65#include <sys/pcpu.h> 66#include <sys/proc.h> 67#include <sys/ptrace.h> 68#include <sys/cons.h> 69#include <sys/bio.h> 70#include <sys/bus.h> 71#include <sys/buf.h> 72#include <sys/exec.h> 73#include <sys/kdb.h> 74#include <sys/msgbuf.h> 75#include <machine/reg.h> 76#include <machine/cpu.h> 77 78#include <vm/vm.h> 79#include <vm/pmap.h> 80#include <vm/vm_object.h> 81#include <vm/vm_page.h> 82#include <vm/vm_pager.h> 83#include <vm/vm_map.h> 84#include <vm/vnode_pager.h> 85#include <machine/pmap.h> 86#include <machine/vmparam.h> 87#include <machine/pcb.h> 88#include <machine/undefined.h> 89#include <machine/machdep.h> 90#include <machine/metadata.h> 91#include <machine/armreg.h> 92#include <machine/bus.h> 93#include <sys/reboot.h> 94 95#include <arm/xscale/pxa/pxareg.h> 96#include <arm/xscale/pxa/pxavar.h> 97 98#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 99#define KERNEL_PT_IOPXS 1 100#define KERNEL_PT_BEFOREKERN 2 101#define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */ 102#define KERNEL_PT_AFKERNEL_NUM 9 103 104/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 105#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 106 107/* Define various stack sizes in pages */ 108#define IRQ_STACK_SIZE 1 109#define ABT_STACK_SIZE 1 110#define UND_STACK_SIZE 1 111 112extern u_int data_abort_handler_address; 113extern u_int prefetch_abort_handler_address; 114extern u_int undefined_handler_address; 115 116struct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 117 118/* Physical and virtual addresses for some global pages */ 119 120vm_paddr_t phys_avail[PXA2X0_SDRAM_BANKS * 2 + 4]; 121vm_paddr_t dump_avail[PXA2X0_SDRAM_BANKS * 2 + 4]; 122 123struct pv_addr systempage; 124struct pv_addr msgbufpv; 125struct pv_addr irqstack; 126struct pv_addr undstack; 127struct pv_addr abtstack; 128struct pv_addr kernelstack; 129struct pv_addr minidataclean; 130 131static void pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t, 132 uint32_t *, uint32_t *); 133 134/* Static device mappings. */ 135static const struct pmap_devmap pxa_devmap[] = { 136 /* 137 * Map the on-board devices up into the KVA region so we don't muck 138 * up user-space. 139 */ 140 { 141 PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET, 142 PXA2X0_PERIPH_START, 143 PXA250_PERIPH_END - PXA2X0_PERIPH_START, 144 VM_PROT_READ|VM_PROT_WRITE, 145 PTE_NOCACHE, 146 }, 147 { 0, 0, 0, 0, 0, } 148}; 149 150#define SDRAM_START 0xa0000000 151 152extern vm_offset_t xscale_cache_clean_addr; 153 154void * 155initarm(struct arm_boot_params *abp) 156{ 157 struct pv_addr kernel_l1pt; 158 struct pv_addr dpcpu; 159 int loop; 160 u_int l1pagetable; 161 vm_offset_t freemempos; 162 vm_offset_t freemem_pt; 163 vm_offset_t afterkern; 164 vm_offset_t freemem_after; 165 vm_offset_t lastaddr; 166 int i, j; 167 uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS]; 168 169 lastaddr = parse_boot_param(abp); 170 set_cpufuncs(); 171 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 172 PCPU_SET(curthread, &thread0); 173 174 /* Do basic tuning, hz etc */ 175 init_param1(); 176 177 freemempos = 0xa0200000; 178 /* Define a macro to simplify memory allocation */ 179#define valloc_pages(var, np) \ 180 alloc_pages((var).pv_pa, (np)); \ 181 (var).pv_va = (var).pv_pa + 0x20000000; 182 183#define alloc_pages(var, np) \ 184 freemempos -= (np * PAGE_SIZE); \ 185 (var) = freemempos; \ 186 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 187 188 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 189 freemempos -= PAGE_SIZE; 190 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 191 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 192 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 193 valloc_pages(kernel_pt_table[loop], 194 L2_TABLE_SIZE / PAGE_SIZE); 195 } else { 196 kernel_pt_table[loop].pv_pa = freemempos + 197 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 198 L2_TABLE_SIZE_REAL; 199 kernel_pt_table[loop].pv_va = 200 kernel_pt_table[loop].pv_pa + 0x20000000; 201 } 202 } 203 freemem_pt = freemempos; 204 freemempos = 0xa0100000; 205 /* 206 * Allocate a page for the system page mapped to V0x00000000 207 * This page will just contain the system vectors and can be 208 * shared by all processes. 209 */ 210 valloc_pages(systempage, 1); 211 212 /* Allocate dynamic per-cpu area. */ 213 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 214 dpcpu_init((void *)dpcpu.pv_va, 0); 215 216 /* Allocate stacks for all modes */ 217 valloc_pages(irqstack, IRQ_STACK_SIZE); 218 valloc_pages(abtstack, ABT_STACK_SIZE); 219 valloc_pages(undstack, UND_STACK_SIZE); 220 valloc_pages(kernelstack, KSTACK_PAGES); 221 alloc_pages(minidataclean.pv_pa, 1); 222 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 223#ifdef ARM_USE_SMALL_ALLOC 224 freemempos -= PAGE_SIZE; 225 freemem_pt = trunc_page(freemem_pt); 226 freemem_after = freemempos - ((freemem_pt - 0xa0100000) / 227 PAGE_SIZE) * sizeof(struct arm_small_page); 228 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000) 229 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1); 230 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) * 231 sizeof(struct arm_small_page); 232 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000) 233 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0); 234 freemempos = trunc_page(freemem_after); 235 freemempos -= PAGE_SIZE; 236#endif 237 /* 238 * Allocate memory for the l1 and l2 page tables. The scheme to avoid 239 * wasting memory by allocating the l1pt on the first 16k memory was 240 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for 241 * this to work (which is supposed to be the case). 242 */ 243 244 /* 245 * Now we start construction of the L1 page table 246 * We start by mapping the L2 page tables into the L1. 247 * This means that we can replace L1 mappings later on if necessary 248 */ 249 l1pagetable = kernel_l1pt.pv_va; 250 251 /* Map the L2 pages tables in the L1 page table */ 252 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1), 253 &kernel_pt_table[KERNEL_PT_SYS]); 254#if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */ 255 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE, 256 &kernel_pt_table[KERNEL_PT_IOPXS]); 257#endif 258 pmap_link_l2pt(l1pagetable, KERNBASE, 259 &kernel_pt_table[KERNEL_PT_BEFOREKERN]); 260 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000, 261 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 262 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000, 263 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 264 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000, 265 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1), 266 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 267 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1); 268 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & 269 ~(L1_S_SIZE - 1)); 270 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 271 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 272 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 273 } 274 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 275 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 276 277#ifdef ARM_USE_SMALL_ALLOC 278 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) { 279 arm_add_smallalloc_pages((void *)(freemem_after), 280 (void*)(freemem_after + PAGE_SIZE), 281 afterkern - (freemem_after + PAGE_SIZE), 0); 282 } 283#endif 284 285 /* Map the Mini-Data cache clean area. */ 286 xscale_setup_minidata(l1pagetable, afterkern, 287 minidataclean.pv_pa); 288 289 /* Map the vector page. */ 290 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 291 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 292 pmap_devmap_bootstrap(l1pagetable, pxa_devmap); 293 294 /* 295 * Give the XScale global cache clean code an appropriately 296 * sized chunk of unmapped VA space starting at 0xff000000 297 * (our device mappings end before this address). 298 */ 299 xscale_cache_clean_addr = 0xff000000U; 300 301 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 302 setttb(kernel_l1pt.pv_pa); 303 cpu_tlb_flushID(); 304 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 305 306 /* 307 * Pages were allocated during the secondary bootstrap for the 308 * stacks for different CPU modes. 309 * We must now set the r13 registers in the different CPU modes to 310 * point to these stacks. 311 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 312 * of the stack memory. 313 */ 314 set_stackptr(PSR_IRQ32_MODE, 315 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 316 set_stackptr(PSR_ABT32_MODE, 317 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 318 set_stackptr(PSR_UND32_MODE, 319 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 320 321 /* 322 * We must now clean the cache again.... 323 * Cleaning may be done by reading new data to displace any 324 * dirty data in the cache. This will have happened in setttb() 325 * but since we are boot strapping the addresses used for the read 326 * may have just been remapped and thus the cache could be out 327 * of sync. A re-clean after the switch will cure this. 328 * After booting there are no gross relocations of the kernel thus 329 * this problem will not occur after initarm(). 330 */ 331 cpu_idcache_wbinv_all(); 332 333 /* 334 * Sort out bus_space for on-board devices. 335 */ 336 pxa_obio_tag_init(); 337 338 /* 339 * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration 340 * registers. 341 */ 342 pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize); 343 344 physmem = 0; 345 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) { 346 physmem += memsize[i] / PAGE_SIZE; 347 } 348 349 /* Fire up consoles. */ 350 cninit(); 351 352 /* Set stack for exception handlers */ 353 data_abort_handler_address = (u_int)data_abort_handler; 354 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 355 undefined_handler_address = (u_int)undefinedinstruction_bounce; 356 undefined_init(); 357 358 init_proc0(kernelstack.pv_va); 359 360 /* Enable MMU, I-cache, D-cache, write buffer. */ 361 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 362 363 pmap_curmaxkvaddr = afterkern + PAGE_SIZE; 364 /* 365 * ARM USE_SMALL_ALLOC uses dump_avail, so it must be filled before 366 * calling pmap_bootstrap. 367 */ 368 i = 0; 369 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) { 370 if (memsize[j] > 0) { 371 dump_avail[i++] = round_page(memstart[j]); 372 dump_avail[i++] = 373 trunc_page(memstart[j] + memsize[j]); 374 } 375 } 376 dump_avail[i] = 0; 377 dump_avail[i] = 0; 378 pmap_bootstrap(pmap_curmaxkvaddr, 0xd0000000, &kernel_l1pt); 379 msgbufp = (void*)msgbufpv.pv_va; 380 msgbufinit(msgbufp, msgbufsize); 381 mutex_init(); 382 383 i = 0; 384#ifdef ARM_USE_SMALL_ALLOC 385 phys_avail[i++] = 0xa0000000; 386 phys_avail[i++] = 0xa0001000; /* 387 *XXX: Gross hack to get our 388 * pages in the vm_page_array 389 . */ 390#endif 391 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) { 392 if (memsize[j] > 0) { 393 phys_avail[i] = round_page(memstart[j]); 394 dump_avail[i++] = round_page(memstart[j]); 395 phys_avail[i] = 396 trunc_page(memstart[j] + memsize[j]); 397 dump_avail[i++] = 398 trunc_page(memstart[j] + memsize[j]); 399 } 400 } 401 402 dump_avail[i] = 0; 403 phys_avail[i++] = 0; 404 dump_avail[i] = 0; 405 phys_avail[i] = 0; 406#ifdef ARM_USE_SMALL_ALLOC 407 phys_avail[2] = round_page(virtual_avail - KERNBASE + phys_avail[2]); 408#else 409 phys_avail[0] = round_page(virtual_avail - KERNBASE + phys_avail[0]); 410#endif 411 412 init_param2(physmem); 413 kdb_init(); 414 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 415 sizeof(struct pcb))); 416} 417 418static void 419pxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh, 420 uint32_t *memstart, uint32_t *memsize) 421{ 422 uint32_t mdcnfg, dwid, dcac, drac, dnb; 423 int i; 424 425 mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG); 426 427 /* 428 * Scan all 4 SDRAM banks 429 */ 430 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) { 431 memstart[i] = 0; 432 memsize[i] = 0; 433 434 switch (i) { 435 case 0: 436 case 1: 437 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) || 438 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0)) 439 continue; 440 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT; 441 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT; 442 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT; 443 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT; 444 break; 445 446 case 2: 447 case 3: 448 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) || 449 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0)) 450 continue; 451 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT; 452 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT; 453 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT; 454 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT; 455 break; 456 default: 457 panic("pxa_probe_sdram: impossible"); 458 } 459 460 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */ 461 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */ 462 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */ 463 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */ 464 465 memsize[i] = dwid * dcac * drac * dnb; 466 memstart[i] = PXA2X0_SDRAM0_START + 467 (i * PXA2X0_SDRAM_BANK_SIZE); 468 } 469} 470 471#define TIMER_FREQUENCY 3686400 472#define UNIMPLEMENTED panic("%s: unimplemented", __func__) 473 474/* XXXBJR: Belongs with DELAY in a timer.c of some sort. */ 475void 476cpu_startprofclock(void) 477{ 478 UNIMPLEMENTED; 479} 480 481void 482cpu_stopprofclock(void) 483{ 484 UNIMPLEMENTED; 485} 486 487static struct arm32_dma_range pxa_range = { 488 .dr_sysbase = 0, 489 .dr_busbase = 0, 490 .dr_len = ~0u, 491}; 492 493struct arm32_dma_range * 494bus_dma_get_range(void) 495{ 496 497 return (&pxa_range); 498} 499 500int 501bus_dma_get_range_nb(void) 502{ 503 504 return (1); 505} 506