pxa_machdep.c revision 180584
1/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */ 2 3/*- 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * machdep.c 40 * 41 * Machine dependant functions for kernel setup 42 * 43 * This file needs a lot of work. 44 * 45 * Created : 17/09/94 46 */ 47 48#include "opt_msgbuf.h" 49#include "opt_ddb.h" 50 51#include <sys/cdefs.h> 52__FBSDID("$FreeBSD: head/sys/arm/xscale/pxa/pxa_machdep.c 180584 2008-07-18 06:14:36Z alc $"); 53 54#define _ARM32_BUS_DMA_PRIVATE 55#include <sys/param.h> 56#include <sys/systm.h> 57#include <sys/sysproto.h> 58#include <sys/signalvar.h> 59#include <sys/imgact.h> 60#include <sys/kernel.h> 61#include <sys/ktr.h> 62#include <sys/linker.h> 63#include <sys/lock.h> 64#include <sys/malloc.h> 65#include <sys/mutex.h> 66#include <sys/pcpu.h> 67#include <sys/proc.h> 68#include <sys/ptrace.h> 69#include <sys/cons.h> 70#include <sys/bio.h> 71#include <sys/bus.h> 72#include <sys/buf.h> 73#include <sys/exec.h> 74#include <sys/kdb.h> 75#include <sys/msgbuf.h> 76#include <machine/reg.h> 77#include <machine/cpu.h> 78 79#include <vm/vm.h> 80#include <vm/pmap.h> 81#include <vm/vm_object.h> 82#include <vm/vm_page.h> 83#include <vm/vm_pager.h> 84#include <vm/vm_map.h> 85#include <vm/vnode_pager.h> 86#include <machine/pmap.h> 87#include <machine/vmparam.h> 88#include <machine/pcb.h> 89#include <machine/undefined.h> 90#include <machine/machdep.h> 91#include <machine/metadata.h> 92#include <machine/armreg.h> 93#include <machine/bus.h> 94#include <sys/reboot.h> 95 96#include <arm/xscale/pxa/pxareg.h> 97#include <arm/xscale/pxa/pxavar.h> 98 99#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 100#define KERNEL_PT_IOPXS 1 101#define KERNEL_PT_BEFOREKERN 2 102#define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */ 103#define KERNEL_PT_AFKERNEL_NUM 9 104 105/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 106#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 107 108/* Define various stack sizes in pages */ 109#define IRQ_STACK_SIZE 1 110#define ABT_STACK_SIZE 1 111#define UND_STACK_SIZE 1 112 113extern u_int data_abort_handler_address; 114extern u_int prefetch_abort_handler_address; 115extern u_int undefined_handler_address; 116 117struct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 118 119extern void *_end; 120 121extern int *end; 122 123struct pcpu __pcpu; 124struct pcpu *pcpup = &__pcpu; 125 126/* Physical and virtual addresses for some global pages */ 127 128vm_paddr_t phys_avail[PXA2X0_SDRAM_BANKS * 2 + 4]; 129vm_paddr_t dump_avail[PXA2X0_SDRAM_BANKS * 2 + 4]; 130vm_offset_t physical_pages; 131 132struct pv_addr systempage; 133struct pv_addr msgbufpv; 134struct pv_addr irqstack; 135struct pv_addr undstack; 136struct pv_addr abtstack; 137struct pv_addr kernelstack; 138struct pv_addr minidataclean; 139 140static struct trapframe proc0_tf; 141 142static void pxa_probe_sdram(bus_space_tag_t, bus_space_handle_t, 143 uint32_t *, uint32_t *); 144 145/* Static device mappings. */ 146static const struct pmap_devmap pxa_devmap[] = { 147 /* 148 * Map the on-board devices up into the KVA region so we don't muck 149 * up user-space. 150 */ 151 { 152 PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET, 153 PXA2X0_PERIPH_START, 154 PXA250_PERIPH_END - PXA2X0_PERIPH_START, 155 VM_PROT_READ|VM_PROT_WRITE, 156 PTE_NOCACHE, 157 }, 158 { 0, 0, 0, 0, 0, } 159}; 160 161#define SDRAM_START 0xa0000000 162 163extern vm_offset_t xscale_cache_clean_addr; 164 165void * 166initarm(void *arg, void *arg2) 167{ 168 struct pv_addr kernel_l1pt; 169 int loop; 170 u_int l1pagetable; 171 vm_offset_t freemempos; 172 vm_offset_t freemem_pt; 173 vm_offset_t afterkern; 174 vm_offset_t freemem_after; 175 vm_offset_t lastaddr; 176 int i, j; 177 uint32_t memsize[PXA2X0_SDRAM_BANKS], memstart[PXA2X0_SDRAM_BANKS]; 178 179 set_cpufuncs(); 180 181 lastaddr = fake_preload_metadata(); 182 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 183 PCPU_SET(curthread, &thread0); 184 185 freemempos = 0xa0200000; 186 /* Define a macro to simplify memory allocation */ 187#define valloc_pages(var, np) \ 188 alloc_pages((var).pv_pa, (np)); \ 189 (var).pv_va = (var).pv_pa + 0x20000000; 190 191#define alloc_pages(var, np) \ 192 freemempos -= (np * PAGE_SIZE); \ 193 (var) = freemempos; \ 194 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 195 196 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 197 freemempos -= PAGE_SIZE; 198 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 199 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 200 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 201 valloc_pages(kernel_pt_table[loop], 202 L2_TABLE_SIZE / PAGE_SIZE); 203 } else { 204 kernel_pt_table[loop].pv_pa = freemempos + 205 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 206 L2_TABLE_SIZE_REAL; 207 kernel_pt_table[loop].pv_va = 208 kernel_pt_table[loop].pv_pa + 0x20000000; 209 } 210 i++; 211 } 212 freemem_pt = freemempos; 213 freemempos = 0xa0100000; 214 /* 215 * Allocate a page for the system page mapped to V0x00000000 216 * This page will just contain the system vectors and can be 217 * shared by all processes. 218 */ 219 valloc_pages(systempage, 1); 220 221 /* Allocate stacks for all modes */ 222 valloc_pages(irqstack, IRQ_STACK_SIZE); 223 valloc_pages(abtstack, ABT_STACK_SIZE); 224 valloc_pages(undstack, UND_STACK_SIZE); 225 valloc_pages(kernelstack, KSTACK_PAGES); 226 alloc_pages(minidataclean.pv_pa, 1); 227 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 228#ifdef ARM_USE_SMALL_ALLOC 229 freemempos -= PAGE_SIZE; 230 freemem_pt = trunc_page(freemem_pt); 231 freemem_after = freemempos - ((freemem_pt - 0xa0100000) / 232 PAGE_SIZE) * sizeof(struct arm_small_page); 233 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000) 234 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1); 235 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) * 236 sizeof(struct arm_small_page); 237 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000) 238 , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0); 239 freemempos = trunc_page(freemem_after); 240 freemempos -= PAGE_SIZE; 241#endif 242 /* 243 * Allocate memory for the l1 and l2 page tables. The scheme to avoid 244 * wasting memory by allocating the l1pt on the first 16k memory was 245 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for 246 * this to work (which is supposed to be the case). 247 */ 248 249 /* 250 * Now we start construction of the L1 page table 251 * We start by mapping the L2 page tables into the L1. 252 * This means that we can replace L1 mappings later on if necessary 253 */ 254 l1pagetable = kernel_l1pt.pv_va; 255 256 /* Map the L2 pages tables in the L1 page table */ 257 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1), 258 &kernel_pt_table[KERNEL_PT_SYS]); 259#if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */ 260 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE, 261 &kernel_pt_table[KERNEL_PT_IOPXS]); 262#endif 263 pmap_link_l2pt(l1pagetable, KERNBASE, 264 &kernel_pt_table[KERNEL_PT_BEFOREKERN]); 265 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000, 266 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 267 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000, 268 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 269 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000, 270 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1), 271 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 272 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1); 273 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & 274 ~(L1_S_SIZE - 1)); 275 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 276 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 277 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 278 } 279 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa, 280 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 281 282#ifdef ARM_USE_SMALL_ALLOC 283 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) { 284 arm_add_smallalloc_pages((void *)(freemem_after), 285 (void*)(freemem_after + PAGE_SIZE), 286 afterkern - (freemem_after + PAGE_SIZE), 0); 287 } 288#endif 289 290 /* Map the Mini-Data cache clean area. */ 291 xscale_setup_minidata(l1pagetable, afterkern, 292 minidataclean.pv_pa); 293 294 /* Map the vector page. */ 295 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 296 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 297 pmap_devmap_bootstrap(l1pagetable, pxa_devmap); 298 299 /* 300 * Give the XScale global cache clean code an appropriately 301 * sized chunk of unmapped VA space starting at 0xff000000 302 * (our device mappings end before this address). 303 */ 304 xscale_cache_clean_addr = 0xff000000U; 305 306 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 307 setttb(kernel_l1pt.pv_pa); 308 cpu_tlb_flushID(); 309 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 310 311 /* 312 * Pages were allocated during the secondary bootstrap for the 313 * stacks for different CPU modes. 314 * We must now set the r13 registers in the different CPU modes to 315 * point to these stacks. 316 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 317 * of the stack memory. 318 */ 319 set_stackptr(PSR_IRQ32_MODE, 320 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 321 set_stackptr(PSR_ABT32_MODE, 322 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 323 set_stackptr(PSR_UND32_MODE, 324 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 325 326 /* 327 * We must now clean the cache again.... 328 * Cleaning may be done by reading new data to displace any 329 * dirty data in the cache. This will have happened in setttb() 330 * but since we are boot strapping the addresses used for the read 331 * may have just been remapped and thus the cache could be out 332 * of sync. A re-clean after the switch will cure this. 333 * After booting there are no gross reloations of the kernel thus 334 * this problem will not occur after initarm(). 335 */ 336 cpu_idcache_wbinv_all(); 337 338 /* 339 * Sort out bus_space for on-board devices. 340 */ 341 pxa_obio_tag_init(); 342 343 /* 344 * Fetch the SDRAM start/size from the PXA2X0 SDRAM configration 345 * registers. 346 */ 347 pxa_probe_sdram(obio_tag, PXA2X0_MEMCTL_BASE, memstart, memsize); 348 349 physmem = 0; 350 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) { 351 physmem += memsize[i] / PAGE_SIZE; 352 } 353 354 /* Fire up consoles. */ 355 cninit(); 356 357 /* Set stack for exception handlers */ 358 data_abort_handler_address = (u_int)data_abort_handler; 359 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 360 undefined_handler_address = (u_int)undefinedinstruction_bounce; 361 undefined_init(); 362 363 proc_linkup(&proc0, &thread0); 364 thread0.td_kstack = kernelstack.pv_va; 365 thread0.td_pcb = (struct pcb *) 366 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 367 thread0.td_pcb->pcb_flags = 0; 368 thread0.td_frame = &proc0_tf; 369 pcpup->pc_curpcb = thread0.td_pcb; 370 371 /* Enable MMU, I-cache, D-cache, write buffer. */ 372 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 373 374 pmap_curmaxkvaddr = afterkern + PAGE_SIZE; 375 /* 376 * ARM USE_SMALL_ALLOC uses dump_avail, so it must be filled before 377 * calling pmap_bootstrap. 378 */ 379 i = 0; 380 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) { 381 if (memsize[j] > 0) { 382 dump_avail[i++] = round_page(memstart[j]); 383 dump_avail[i++] = 384 trunc_page(memstart[j] + memsize[j]); 385 } 386 } 387 dump_avail[i] = 0; 388 dump_avail[i] = 0; 389 pmap_bootstrap(pmap_curmaxkvaddr, 0xd0000000, &kernel_l1pt); 390 msgbufp = (void*)msgbufpv.pv_va; 391 msgbufinit(msgbufp, MSGBUF_SIZE); 392 mutex_init(); 393 394 i = 0; 395#ifdef ARM_USE_SMALL_ALLOC 396 phys_avail[i++] = 0xa0000000; 397 phys_avail[i++] = 0xa0001000; /* 398 *XXX: Gross hack to get our 399 * pages in the vm_page_array 400 . */ 401#endif 402 for (j = 0; j < PXA2X0_SDRAM_BANKS; j++) { 403 if (memsize[j] > 0) { 404 phys_avail[i] = round_page(memstart[j]); 405 dump_avail[i++] = round_page(memstart[j]); 406 phys_avail[i] = 407 trunc_page(memstart[j] + memsize[j]); 408 dump_avail[i++] = 409 trunc_page(memstart[j] + memsize[j]); 410 } 411 } 412 413 dump_avail[i] = 0; 414 phys_avail[i++] = 0; 415 dump_avail[i] = 0; 416 phys_avail[i] = 0; 417#ifdef ARM_USE_SMALL_ALLOC 418 phys_avail[2] = round_page(virtual_avail - KERNBASE + phys_avail[2]); 419#else 420 phys_avail[0] = round_page(virtual_avail - KERNBASE + phys_avail[0]); 421#endif 422 423 /* Do basic tuning, hz etc */ 424 init_param1(); 425 init_param2(physmem); 426 kdb_init(); 427 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 428 sizeof(struct pcb))); 429} 430 431static void 432pxa_probe_sdram(bus_space_tag_t bst, bus_space_handle_t bsh, 433 uint32_t *memstart, uint32_t *memsize) 434{ 435 uint32_t mdcnfg, dwid, dcac, drac, dnb; 436 int i; 437 438 mdcnfg = bus_space_read_4(bst, bsh, MEMCTL_MDCNFG); 439 440 /* 441 * Scan all 4 SDRAM banks 442 */ 443 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) { 444 memstart[i] = 0; 445 memsize[i] = 0; 446 447 switch (i) { 448 case 0: 449 case 1: 450 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) || 451 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0)) 452 continue; 453 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT; 454 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT; 455 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT; 456 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT; 457 break; 458 459 case 2: 460 case 3: 461 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) || 462 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0)) 463 continue; 464 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT; 465 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT; 466 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT; 467 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT; 468 break; 469 default: 470 panic("pxa_probe_sdram: impossible"); 471 } 472 473 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */ 474 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */ 475 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */ 476 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */ 477 478 memsize[i] = dwid * dcac * drac * dnb; 479 memstart[i] = PXA2X0_SDRAM0_START + 480 (i * PXA2X0_SDRAM_BANK_SIZE); 481 } 482} 483 484#define TIMER_FREQUENCY 3686400 485#define UNIMPLEMENTED panic("%s: unimplemented", __func__) 486 487/* XXXBJR: Belongs with DELAY in a timer.c of some sort. */ 488void 489cpu_startprofclock(void) 490{ 491 UNIMPLEMENTED; 492} 493 494void 495cpu_stopprofclock(void) 496{ 497 UNIMPLEMENTED; 498} 499 500static struct arm32_dma_range pxa_range = { 501 .dr_sysbase = 0, 502 .dr_busbase = 0, 503 .dr_len = ~0u, 504}; 505 506struct arm32_dma_range * 507bus_dma_get_range(void) 508{ 509 510 return (&pxa_range); 511} 512 513int 514bus_dma_get_range_nb(void) 515{ 516 517 return (1); 518} 519