ti_prcm.h revision 297395 
1/*
2 * Copyright (c) 2010
3 *	Ben Gray <ben.r.gray@gmail.com>.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by Ben Gray.
17 * 4. The name of the company nor the name of the author may be used to
18 *    endorse or promote products derived from this software without specific
19 *    prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
30 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/arm/ti/ti_prcm.h 297395 2016-03-29 19:11:04Z loos $
33 */
34
35
36/*
37 * Texas Instruments - OMAP3xxx series processors
38 *
39 * Reference:
40 *  OMAP35x Applications Processor
41 *   Technical Reference Manual
42 *  (omap35xx_techref.pdf)
43 */
44#ifndef _TI_PRCM_H_
45#define _TI_PRCM_H_
46
47typedef enum {
48
49	INVALID_CLK_IDENT = 0,
50
51	/* System clocks, typically you can only call ti_prcm_clk_get_source_freq()
52	 * on these clocks as they are enabled by default.
53	 */
54	SYS_CLK = 1,
55
56	/* The MPU (ARM) core clock */
57	MPU_CLK = 20,
58
59	/* MMC modules */
60	MMC1_CLK = 100,
61	MMC2_CLK,
62	MMC3_CLK,
63	MMC4_CLK,
64	MMC5_CLK,
65	MMC6_CLK,
66
67	/* I2C modules */
68	I2C1_CLK = 200,
69	I2C2_CLK,
70	I2C3_CLK,
71	I2C4_CLK,
72	I2C5_CLK,
73
74	/* USB module(s) */
75	USBTLL_CLK = 300,
76	USBHSHOST_CLK,
77	USBFSHOST_CLK,
78	USBP1_PHY_CLK,
79	USBP2_PHY_CLK,
80	USBP1_UTMI_CLK,
81	USBP2_UTMI_CLK,
82	USBP1_HSIC_CLK,
83	USBP2_HSIC_CLK,
84
85	/* UART modules */
86	UART1_CLK = 400,
87	UART2_CLK,
88	UART3_CLK,
89	UART4_CLK,
90	UART5_CLK,
91	UART6_CLK,
92	UART7_CLK,
93	UART8_CLK,
94	UART9_CLK,
95
96	/* General purpose timer modules */
97	TIMER1_CLK = 500,
98	TIMER2_CLK,
99	TIMER3_CLK,
100	TIMER4_CLK,
101	TIMER5_CLK,
102	TIMER6_CLK,
103	TIMER7_CLK,
104	TIMER8_CLK,
105	TIMER9_CLK,
106	TIMER10_CLK,
107	TIMER11_CLK,
108	TIMER12_CLK,
109
110	/* McBSP module(s) */
111	MCBSP1_CLK = 600,
112	MCBSP2_CLK,
113	MCBSP3_CLK,
114	MCBSP4_CLK,
115	MCBSP5_CLK,
116
117	/* General purpose I/O modules */
118	GPIO1_CLK = 700,
119	GPIO2_CLK,
120	GPIO3_CLK,
121	GPIO4_CLK,
122	GPIO5_CLK,
123	GPIO6_CLK,
124	GPIO7_CLK,
125
126	/* sDMA module */
127	SDMA_CLK = 800,
128
129	/* CPSW modules */
130	CPSW_CLK = 1000,
131
132	/* Mentor USB modules */
133	MUSB0_CLK = 1100,
134
135	/* EDMA module */
136	EDMA_TPCC_CLK = 1200,
137	EDMA_TPTC0_CLK,
138	EDMA_TPTC1_CLK,
139	EDMA_TPTC2_CLK,
140
141	/* LCD controller module */
142	LCDC_CLK = 1300,
143
144	/* PWM modules */
145	PWMSS0_CLK = 1400,
146	PWMSS1_CLK,
147	PWMSS2_CLK,
148
149	/* Mailbox modules */
150	MAILBOX0_CLK = 1500,
151
152	/* Spinlock modules */
153	SPINLOCK0_CLK = 1600,
154
155	PRUSS_CLK = 1700,
156
157	TSC_ADC_CLK = 1800,
158
159	/* RTC module */
160	RTC_CLK = 1900,
161
162	/* McSPI */
163	SPI0_CLK = 2000,
164	SPI1_CLK,
165} clk_ident_t;
166
167/*
168 *
169 */
170typedef enum {
171	SYSCLK_CLK,   /* System clock */
172	EXT_CLK,
173
174	F32KHZ_CLK,   /* 32KHz clock */
175	F48MHZ_CLK,   /* 48MHz clock */
176	F64MHZ_CLK,   /* 64MHz clock */
177	F96MHZ_CLK,   /* 96MHz clock */
178
179} clk_src_t;
180
181struct ti_clock_dev {
182	/* The profile of the timer */
183	clk_ident_t  id;
184
185	/* A bunch of callbacks associated with the clock device */
186	int (*clk_activate)(struct ti_clock_dev *clkdev);
187	int (*clk_deactivate)(struct ti_clock_dev *clkdev);
188	int (*clk_set_source)(struct ti_clock_dev *clkdev,
189	    clk_src_t clksrc);
190	int (*clk_accessible)(struct ti_clock_dev *clkdev);
191	int (*clk_set_source_freq)(struct ti_clock_dev *clkdev,
192	    unsigned int freq);
193	int (*clk_get_source_freq)(struct ti_clock_dev *clkdev,
194	    unsigned int *freq);
195};
196
197int ti_prcm_clk_valid(clk_ident_t clk);
198int ti_prcm_clk_enable(clk_ident_t clk);
199int ti_prcm_clk_disable(clk_ident_t clk);
200int ti_prcm_clk_accessible(clk_ident_t clk);
201int ti_prcm_clk_disable_autoidle(clk_ident_t clk);
202int ti_prcm_clk_set_source(clk_ident_t clk, clk_src_t clksrc);
203int ti_prcm_clk_set_source_freq(clk_ident_t clk, unsigned int freq);
204int ti_prcm_clk_get_source_freq(clk_ident_t clk, unsigned int *freq);
205void ti_prcm_reset(void);
206
207#endif   /* _TI_PRCM_H_ */
208