mv_machdep.c revision 217688
1/*- 2 * Copyright (c) 1994-1998 Mark Brinicombe. 3 * Copyright (c) 1994 Brini. 4 * All rights reserved. 5 * 6 * This code is derived from software written for Brini by Mark Brinicombe 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Brini. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45 36 */ 37 38#include "opt_ddb.h" 39#include "opt_platform.h" 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/arm/mv/mv_machdep.c 217688 2011-01-21 10:26:26Z pluknet $"); 43 44#define _ARM32_BUS_DMA_PRIVATE 45#include <sys/param.h> 46#include <sys/systm.h> 47#include <sys/sysproto.h> 48#include <sys/signalvar.h> 49#include <sys/imgact.h> 50#include <sys/kernel.h> 51#include <sys/ktr.h> 52#include <sys/linker.h> 53#include <sys/lock.h> 54#include <sys/malloc.h> 55#include <sys/mutex.h> 56#include <sys/pcpu.h> 57#include <sys/proc.h> 58#include <sys/ptrace.h> 59#include <sys/cons.h> 60#include <sys/bio.h> 61#include <sys/bus.h> 62#include <sys/buf.h> 63#include <sys/exec.h> 64#include <sys/kdb.h> 65#include <sys/msgbuf.h> 66#include <machine/reg.h> 67#include <machine/cpu.h> 68#include <machine/fdt.h> 69 70#include <dev/fdt/fdt_common.h> 71#include <dev/ofw/openfirm.h> 72 73#include <vm/vm.h> 74#include <vm/pmap.h> 75#include <vm/vm_object.h> 76#include <vm/vm_page.h> 77#include <vm/vm_pager.h> 78#include <vm/vm_map.h> 79#include <machine/pte.h> 80#include <machine/pmap.h> 81#include <machine/vmparam.h> 82#include <machine/pcb.h> 83#include <machine/undefined.h> 84#include <machine/machdep.h> 85#include <machine/metadata.h> 86#include <machine/armreg.h> 87#include <machine/bus.h> 88#include <sys/reboot.h> 89 90#include <arm/mv/mvreg.h> /* XXX */ 91#include <arm/mv/mvvar.h> /* XXX eventually this should be eliminated */ 92#include <arm/mv/mvwin.h> 93 94#define DEBUG 95#undef DEBUG 96 97#ifdef DEBUG 98#define debugf(fmt, args...) printf(fmt, ##args) 99#else 100#define debugf(fmt, args...) 101#endif 102 103/* 104 * This is the number of L2 page tables required for covering max 105 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 106 * stacks etc.), uprounded to be divisible by 4. 107 */ 108#define KERNEL_PT_MAX 78 109 110/* Define various stack sizes in pages */ 111#define IRQ_STACK_SIZE 1 112#define ABT_STACK_SIZE 1 113#define UND_STACK_SIZE 1 114 115extern unsigned char kernbase[]; 116extern unsigned char _etext[]; 117extern unsigned char _edata[]; 118extern unsigned char __bss_start[]; 119extern unsigned char _end[]; 120 121extern u_int data_abort_handler_address; 122extern u_int prefetch_abort_handler_address; 123extern u_int undefined_handler_address; 124 125extern vm_offset_t pmap_bootstrap_lastaddr; 126extern int *end; 127 128struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 129struct pcpu __pcpu; 130struct pcpu *pcpup = &__pcpu; 131 132/* Physical and virtual addresses for some global pages */ 133 134vm_paddr_t phys_avail[10]; 135vm_paddr_t dump_avail[4]; 136vm_offset_t physical_pages; 137vm_offset_t pmap_bootstrap_lastaddr; 138 139const struct pmap_devmap *pmap_devmap_bootstrap_table; 140struct pv_addr systempage; 141struct pv_addr msgbufpv; 142struct pv_addr irqstack; 143struct pv_addr undstack; 144struct pv_addr abtstack; 145struct pv_addr kernelstack; 146 147static struct trapframe proc0_tf; 148 149static struct mem_region availmem_regions[FDT_MEM_REGIONS]; 150static int availmem_regions_sz; 151 152static void print_kenv(void); 153static void print_kernel_section_addr(void); 154 155static void physmap_init(void); 156static int platform_devmap_init(void); 157static int platform_mpp_init(void); 158 159static char * 160kenv_next(char *cp) 161{ 162 163 if (cp != NULL) { 164 while (*cp != 0) 165 cp++; 166 cp++; 167 if (*cp == 0) 168 cp = NULL; 169 } 170 return (cp); 171} 172 173static void 174print_kenv(void) 175{ 176 int len; 177 char *cp; 178 179 debugf("loader passed (static) kenv:\n"); 180 if (kern_envp == NULL) { 181 debugf(" no env, null ptr\n"); 182 return; 183 } 184 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 185 186 len = 0; 187 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 188 debugf(" %x %s\n", (uint32_t)cp, cp); 189} 190 191static void 192print_kernel_section_addr(void) 193{ 194 195 debugf("kernel image addresses:\n"); 196 debugf(" kernbase = 0x%08x\n", (uint32_t)kernbase); 197 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext); 198 debugf(" _edata = 0x%08x\n", (uint32_t)_edata); 199 debugf(" __bss_start = 0x%08x\n", (uint32_t)__bss_start); 200 debugf(" _end = 0x%08x\n", (uint32_t)_end); 201} 202 203static void 204physmap_init(void) 205{ 206 int i, j, cnt; 207 vm_offset_t phys_kernelend, kernload; 208 uint32_t s, e, sz; 209 struct mem_region *mp, *mp1; 210 211 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR); 212 kernload = KERNPHYSADDR; 213 214 /* 215 * Remove kernel physical address range from avail 216 * regions list. Page align all regions. 217 * Non-page aligned memory isn't very interesting to us. 218 * Also, sort the entries for ascending addresses. 219 */ 220 sz = 0; 221 cnt = availmem_regions_sz; 222 debugf("processing avail regions:\n"); 223 for (mp = availmem_regions; mp->mr_size; mp++) { 224 s = mp->mr_start; 225 e = mp->mr_start + mp->mr_size; 226 debugf(" %08x-%08x -> ", s, e); 227 /* Check whether this region holds all of the kernel. */ 228 if (s < kernload && e > phys_kernelend) { 229 availmem_regions[cnt].mr_start = phys_kernelend; 230 availmem_regions[cnt++].mr_size = e - phys_kernelend; 231 e = kernload; 232 } 233 /* Look whether this regions starts within the kernel. */ 234 if (s >= kernload && s < phys_kernelend) { 235 if (e <= phys_kernelend) 236 goto empty; 237 s = phys_kernelend; 238 } 239 /* Now look whether this region ends within the kernel. */ 240 if (e > kernload && e <= phys_kernelend) { 241 if (s >= kernload) { 242 goto empty; 243 } 244 e = kernload; 245 } 246 /* Now page align the start and size of the region. */ 247 s = round_page(s); 248 e = trunc_page(e); 249 if (e < s) 250 e = s; 251 sz = e - s; 252 debugf("%08x-%08x = %x\n", s, e, sz); 253 254 /* Check whether some memory is left here. */ 255 if (sz == 0) { 256 empty: 257 printf("skipping\n"); 258 bcopy(mp + 1, mp, 259 (cnt - (mp - availmem_regions)) * sizeof(*mp)); 260 cnt--; 261 mp--; 262 continue; 263 } 264 265 /* Do an insertion sort. */ 266 for (mp1 = availmem_regions; mp1 < mp; mp1++) 267 if (s < mp1->mr_start) 268 break; 269 if (mp1 < mp) { 270 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1); 271 mp1->mr_start = s; 272 mp1->mr_size = sz; 273 } else { 274 mp->mr_start = s; 275 mp->mr_size = sz; 276 } 277 } 278 availmem_regions_sz = cnt; 279 280 /* Fill in phys_avail table, based on availmem_regions */ 281 debugf("fill in phys_avail:\n"); 282 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) { 283 284 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n", 285 availmem_regions[i].mr_start, 286 availmem_regions[i].mr_start + availmem_regions[i].mr_size, 287 availmem_regions[i].mr_size); 288 289 phys_avail[j] = availmem_regions[i].mr_start; 290 phys_avail[j + 1] = availmem_regions[i].mr_start + 291 availmem_regions[i].mr_size; 292 } 293 phys_avail[j] = 0; 294 phys_avail[j + 1] = 0; 295} 296 297void * 298initarm(void *mdp, void *unused __unused) 299{ 300 struct pv_addr kernel_l1pt; 301 struct pv_addr dpcpu; 302 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 303 uint32_t memsize, l2size; 304 void *kmdp; 305 u_int l1pagetable; 306 int i = 0, j = 0; 307 308 kmdp = NULL; 309 lastaddr = 0; 310 memsize = 0; 311 dtbp = (vm_offset_t)NULL; 312 313 set_cpufuncs(); 314 315 /* 316 * Mask metadata pointer: it is supposed to be on page boundary. If 317 * the first argument (mdp) doesn't point to a valid address the 318 * bootloader must have passed us something else than the metadata 319 * ptr... In this case we want to fall back to some built-in settings. 320 */ 321 mdp = (void *)((uint32_t)mdp & ~PAGE_MASK); 322 323 /* Parse metadata and fetch parameters */ 324 if (mdp != NULL) { 325 preload_metadata = mdp; 326 kmdp = preload_search_by_type("elf kernel"); 327 if (kmdp != NULL) { 328 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 329 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 330 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 331 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, 332 vm_offset_t); 333 } 334 335 } else { 336 /* Fall back to hardcoded metadata. */ 337 lastaddr = fake_preload_metadata(); 338 } 339 340#if defined(FDT_DTB_STATIC) 341 /* 342 * In case the device tree blob was not retrieved (from metadata) try 343 * to use the statically embedded one. 344 */ 345 if (dtbp == (vm_offset_t)NULL) 346 dtbp = (vm_offset_t)&fdt_static_dtb; 347#endif 348 349 if (OF_install(OFW_FDT, 0) == FALSE) 350 while (1); 351 352 if (OF_init((void *)dtbp) != 0) 353 while (1); 354 355 /* Grab physical memory regions information from device tree. */ 356 if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz, 357 &memsize) != 0) 358 while(1); 359 360 if (fdt_immr_addr(MV_BASE) != 0) 361 while (1); 362 363 /* Platform-specific initialisation */ 364 pmap_bootstrap_lastaddr = fdt_immr_va - ARM_NOCACHE_KVA_SIZE; 365 366 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 367 PCPU_SET(curthread, &thread0); 368 369 /* Calculate number of L2 tables needed for mapping vm_page_array */ 370 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 371 l2size = (l2size >> L1_S_SHIFT) + 1; 372 373 /* 374 * Add one table for end of kernel map, one for stacks, msgbuf and 375 * L1 and L2 tables map and one for vectors map. 376 */ 377 l2size += 3; 378 379 /* Make it divisible by 4 */ 380 l2size = (l2size + 3) & ~3; 381 382#define KERNEL_TEXT_BASE (KERNBASE) 383 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 384 385 /* Define a macro to simplify memory allocation */ 386#define valloc_pages(var, np) \ 387 alloc_pages((var).pv_va, (np)); \ 388 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 389 390#define alloc_pages(var, np) \ 391 (var) = freemempos; \ 392 freemempos += (np * PAGE_SIZE); \ 393 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 394 395 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 396 freemempos += PAGE_SIZE; 397 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 398 399 for (i = 0; i < l2size; ++i) { 400 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 401 valloc_pages(kernel_pt_table[i], 402 L2_TABLE_SIZE / PAGE_SIZE); 403 j = i; 404 } else { 405 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 406 L2_TABLE_SIZE_REAL * (i - j); 407 kernel_pt_table[i].pv_pa = 408 kernel_pt_table[i].pv_va - KERNVIRTADDR + 409 KERNPHYSADDR; 410 411 } 412 } 413 /* 414 * Allocate a page for the system page mapped to 0x00000000 415 * or 0xffff0000. This page will just contain the system vectors 416 * and can be shared by all processes. 417 */ 418 valloc_pages(systempage, 1); 419 420 /* Allocate dynamic per-cpu area. */ 421 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 422 dpcpu_init((void *)dpcpu.pv_va, 0); 423 424 /* Allocate stacks for all modes */ 425 valloc_pages(irqstack, IRQ_STACK_SIZE); 426 valloc_pages(abtstack, ABT_STACK_SIZE); 427 valloc_pages(undstack, UND_STACK_SIZE); 428 valloc_pages(kernelstack, KSTACK_PAGES); 429 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 430 431 /* 432 * Now we start construction of the L1 page table 433 * We start by mapping the L2 page tables into the L1. 434 * This means that we can replace L1 mappings later on if necessary 435 */ 436 l1pagetable = kernel_l1pt.pv_va; 437 438 /* 439 * Try to map as much as possible of kernel text and data using 440 * 1MB section mapping and for the rest of initial kernel address 441 * space use L2 coarse tables. 442 * 443 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 444 * and kernel structures 445 */ 446 l2_start = lastaddr & ~(L1_S_OFFSET); 447 for (i = 0 ; i < l2size - 1; i++) 448 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 449 &kernel_pt_table[i]); 450 451 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 452 453 /* Map kernel code and data */ 454 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR, 455 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 456 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 457 458 459 /* Map L1 directory and allocated L2 page tables */ 460 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 461 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 462 463 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 464 kernel_pt_table[0].pv_pa, 465 L2_TABLE_SIZE_REAL * l2size, 466 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 467 468 /* Map allocated DPCPU, stacks and msgbuf */ 469 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 470 freemempos - dpcpu.pv_va, 471 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 472 473 /* Link and map the vector page */ 474 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 475 &kernel_pt_table[l2size - 1]); 476 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 477 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 478 479 /* Map pmap_devmap[] entries */ 480 if (platform_devmap_init() != 0) 481 while (1); 482 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table); 483 484 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 485 DOMAIN_CLIENT); 486 setttb(kernel_l1pt.pv_pa); 487 cpu_tlb_flushID(); 488 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 489 490 /* 491 * Only after the SOC registers block is mapped we can perform device 492 * tree fixups, as they may attempt to read parameters from hardware. 493 */ 494 OF_interpret("perform-fixup", 0); 495 496 /* 497 * Re-initialise MPP. It is important to call this prior to using 498 * console as the physical connection can be routed via MPP. 499 */ 500 if (platform_mpp_init() != 0) 501 while (1); 502 503 /* 504 * Initialize GPIO as early as possible. 505 */ 506 if (platform_gpio_init() != 0) 507 while (1); 508 509 cninit(); 510 physmem = memsize / PAGE_SIZE; 511 512 debugf("initarm: console initialized\n"); 513 debugf(" arg1 mdp = 0x%08x\n", (uint32_t)mdp); 514 debugf(" boothowto = 0x%08x\n", boothowto); 515 printf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 516 print_kernel_section_addr(); 517 print_kenv(); 518 519 /* 520 * Re-initialise decode windows 521 */ 522 if (soc_decode_win() != 0) 523 printf("WARNING: could not re-initialise decode windows! " 524 "Running with existing settings...\n"); 525 /* 526 * Pages were allocated during the secondary bootstrap for the 527 * stacks for different CPU modes. 528 * We must now set the r13 registers in the different CPU modes to 529 * point to these stacks. 530 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 531 * of the stack memory. 532 */ 533 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 534 set_stackptr(PSR_IRQ32_MODE, 535 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 536 set_stackptr(PSR_ABT32_MODE, 537 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 538 set_stackptr(PSR_UND32_MODE, 539 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 540 541 /* 542 * We must now clean the cache again.... 543 * Cleaning may be done by reading new data to displace any 544 * dirty data in the cache. This will have happened in setttb() 545 * but since we are boot strapping the addresses used for the read 546 * may have just been remapped and thus the cache could be out 547 * of sync. A re-clean after the switch will cure this. 548 * After booting there are no gross relocations of the kernel thus 549 * this problem will not occur after initarm(). 550 */ 551 cpu_idcache_wbinv_all(); 552 553 /* Set stack for exception handlers */ 554 data_abort_handler_address = (u_int)data_abort_handler; 555 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 556 undefined_handler_address = (u_int)undefinedinstruction_bounce; 557 undefined_init(); 558 559 proc_linkup0(&proc0, &thread0); 560 thread0.td_kstack = kernelstack.pv_va; 561 thread0.td_kstack_pages = KSTACK_PAGES; 562 thread0.td_pcb = (struct pcb *) 563 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 564 thread0.td_pcb->pcb_flags = 0; 565 thread0.td_frame = &proc0_tf; 566 pcpup->pc_curpcb = thread0.td_pcb; 567 568 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 569 570 dump_avail[0] = 0; 571 dump_avail[1] = memsize; 572 dump_avail[2] = 0; 573 dump_avail[3] = 0; 574 575 pmap_bootstrap(freemempos, pmap_bootstrap_lastaddr, &kernel_l1pt); 576 msgbufp = (void *)msgbufpv.pv_va; 577 msgbufinit(msgbufp, msgbufsize); 578 mutex_init(); 579 580 /* 581 * Prepare map of physical memory regions available to vm subsystem. 582 */ 583 physmap_init(); 584 585 /* Do basic tuning, hz etc */ 586 init_param1(); 587 init_param2(physmem); 588 kdb_init(); 589 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 590 sizeof(struct pcb))); 591} 592 593#define MPP_PIN_MAX 50 594#define MPP_PIN_CELLS 2 595#define MPP_PINS_PER_REG 8 596#define MPP_SEL(pin,func) (((func) & 0xf) << \ 597 (((pin) % MPP_PINS_PER_REG) * 4)) 598 599static int 600platform_mpp_init(void) 601{ 602 pcell_t pinmap[MPP_PIN_MAX * MPP_PIN_CELLS]; 603 int mpp[MPP_PIN_MAX]; 604 uint32_t ctrl_val, ctrl_offset; 605 pcell_t reg[4]; 606 u_long start, size; 607 phandle_t node; 608 pcell_t pin_cells, *pinmap_ptr, pin_count; 609 ssize_t len; 610 int par_addr_cells, par_size_cells; 611 int tuple_size, tuples, rv, pins, i, j; 612 int mpp_pin, mpp_function; 613 614 /* 615 * Try to access the MPP node directly i.e. through /aliases/mpp. 616 */ 617 if ((node = OF_finddevice("mpp")) != 0) 618 if (fdt_is_compatible(node, "mrvl,mpp")) 619 goto moveon; 620 /* 621 * Find the node the long way. 622 */ 623 if ((node = OF_finddevice("/")) == 0) 624 return (ENXIO); 625 626 if ((node = fdt_find_compatible(node, "simple-bus", 0)) == 0) 627 return (ENXIO); 628 629 if ((node = fdt_find_compatible(node, "mrvl,mpp", 0)) == 0) 630 return (ENXIO); 631moveon: 632 /* 633 * Process 'reg' prop. 634 */ 635 if ((rv = fdt_addrsize_cells(OF_parent(node), &par_addr_cells, 636 &par_size_cells)) != 0) 637 return(ENXIO); 638 639 tuple_size = sizeof(pcell_t) * (par_addr_cells + par_size_cells); 640 len = OF_getprop(node, "reg", reg, sizeof(reg)); 641 tuples = len / tuple_size; 642 if (tuple_size <= 0) 643 return (EINVAL); 644 645 /* 646 * Get address/size. XXX we assume only the first 'reg' tuple is used. 647 */ 648 rv = fdt_data_to_res(reg, par_addr_cells, par_size_cells, 649 &start, &size); 650 if (rv != 0) 651 return (rv); 652 start += fdt_immr_va; 653 654 /* 655 * Process 'pin-count' and 'pin-map' props. 656 */ 657 if (OF_getprop(node, "pin-count", &pin_count, sizeof(pin_count)) <= 0) 658 return (ENXIO); 659 pin_count = fdt32_to_cpu(pin_count); 660 if (pin_count > MPP_PIN_MAX) 661 return (ERANGE); 662 663 if (OF_getprop(node, "#pin-cells", &pin_cells, sizeof(pin_cells)) <= 0) 664 pin_cells = MPP_PIN_CELLS; 665 pin_cells = fdt32_to_cpu(pin_cells); 666 if (pin_cells > MPP_PIN_CELLS) 667 return (ERANGE); 668 tuple_size = sizeof(pcell_t) * pin_cells; 669 670 bzero(pinmap, sizeof(pinmap)); 671 len = OF_getprop(node, "pin-map", pinmap, sizeof(pinmap)); 672 if (len <= 0) 673 return (ERANGE); 674 if (len % tuple_size) 675 return (ERANGE); 676 pins = len / tuple_size; 677 if (pins > pin_count) 678 return (ERANGE); 679 /* 680 * Fill out a "mpp[pin] => function" table. All pins unspecified in 681 * the 'pin-map' property are defaulted to 0 function i.e. GPIO. 682 */ 683 bzero(mpp, sizeof(mpp)); 684 pinmap_ptr = pinmap; 685 for (i = 0; i < pins; i++) { 686 mpp_pin = fdt32_to_cpu(*pinmap_ptr); 687 mpp_function = fdt32_to_cpu(*(pinmap_ptr + 1)); 688 mpp[mpp_pin] = mpp_function; 689 pinmap_ptr += pin_cells; 690 } 691 692 /* 693 * Prepare and program MPP control register values. 694 */ 695 ctrl_offset = 0; 696 for (i = 0; i < pin_count;) { 697 ctrl_val = 0; 698 699 for (j = 0; j < MPP_PINS_PER_REG; j++) { 700 if (i + j == pin_count - 1) 701 break; 702 ctrl_val |= MPP_SEL(i + j, mpp[i + j]); 703 } 704 i += MPP_PINS_PER_REG; 705 bus_space_write_4(fdtbus_bs_tag, start, ctrl_offset, 706 ctrl_val); 707 708#if defined(SOC_MV_ORION) 709 /* 710 * Third MPP reg on Orion SoC is placed 711 * non-linearly (with different offset). 712 */ 713 if (i == (2 * MPP_PINS_PER_REG)) 714 ctrl_offset = 0x50; 715 else 716#endif 717 ctrl_offset += 4; 718 } 719 720 return (0); 721} 722 723#define FDT_DEVMAP_MAX (1 + 2 + 1 + 1) 724static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = { 725 { 0, 0, 0, 0, 0, } 726}; 727 728/* 729 * Construct pmap_devmap[] with DT-derived config data. 730 */ 731static int 732platform_devmap_init(void) 733{ 734 phandle_t root, child; 735 u_long base, size; 736 int i; 737 738 /* 739 * IMMR range. 740 */ 741 i = 0; 742 fdt_devmap[i].pd_va = fdt_immr_va; 743 fdt_devmap[i].pd_pa = fdt_immr_pa; 744 fdt_devmap[i].pd_size = fdt_immr_size; 745 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 746 fdt_devmap[i].pd_cache = PTE_NOCACHE; 747 i++; 748 749 /* 750 * PCI range(s). 751 */ 752 if ((root = OF_finddevice("/")) == 0) 753 return (ENXIO); 754 755 for (child = OF_child(root); child != 0; child = OF_peer(child)) 756 if (fdt_is_type(child, "pci")) { 757 /* 758 * Check space: each PCI node will consume 2 devmap 759 * entries. 760 */ 761 if (i + 1 >= FDT_DEVMAP_MAX) { 762 return (ENOMEM); 763 break; 764 } 765 766 /* 767 * XXX this should account for PCI and multiple ranges 768 * of a given kind. 769 */ 770 if (fdt_pci_devmap(child, &fdt_devmap[i], 771 MV_PCIE_IO_BASE, MV_PCIE_MEM_BASE) != 0) 772 return (ENXIO); 773 i += 2; 774 } 775 776 /* 777 * CESA SRAM range. 778 */ 779 if ((child = OF_finddevice("sram")) != 0) 780 if (fdt_is_compatible(child, "mrvl,cesa-sram")) 781 goto moveon; 782 783 if ((child = fdt_find_compatible(root, "mrvl,cesa-sram", 0)) == 0) 784 /* No CESA SRAM node. */ 785 goto out; 786moveon: 787 if (i >= FDT_DEVMAP_MAX) 788 return (ENOMEM); 789 790 if (fdt_regsize(child, &base, &size) != 0) 791 return (EINVAL); 792 793 fdt_devmap[i].pd_va = MV_CESA_SRAM_BASE; /* XXX */ 794 fdt_devmap[i].pd_pa = base; 795 fdt_devmap[i].pd_size = size; 796 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 797 fdt_devmap[i].pd_cache = PTE_NOCACHE; 798 799out: 800 pmap_devmap_bootstrap_table = &fdt_devmap[0]; 801 return (0); 802} 803 804struct arm32_dma_range * 805bus_dma_get_range(void) 806{ 807 808 return (NULL); 809} 810 811int 812bus_dma_get_range_nb(void) 813{ 814 815 return (0); 816} 817