mv_machdep.c revision 210247
1251881Speter/*- 2251881Speter * Copyright (c) 1994-1998 Mark Brinicombe. 3251881Speter * Copyright (c) 1994 Brini. 4251881Speter * All rights reserved. 5251881Speter * 6251881Speter * This code is derived from software written for Brini by Mark Brinicombe 7251881Speter * 8251881Speter * Redistribution and use in source and binary forms, with or without 9251881Speter * modification, are permitted provided that the following conditions 10251881Speter * are met: 11251881Speter * 1. Redistributions of source code must retain the above copyright 12251881Speter * notice, this list of conditions and the following disclaimer. 13251881Speter * 2. Redistributions in binary form must reproduce the above copyright 14251881Speter * notice, this list of conditions and the following disclaimer in the 15251881Speter * documentation and/or other materials provided with the distribution. 16251881Speter * 3. All advertising materials mentioning features or use of this software 17251881Speter * must display the following acknowledgement: 18251881Speter * This product includes software developed by Brini. 19251881Speter * 4. The name of the company nor the name of the author may be used to 20251881Speter * endorse or promote products derived from this software without specific 21251881Speter * prior written permission. 22251881Speter * 23251881Speter * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 24251881Speter * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25251881Speter * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26251881Speter * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27251881Speter * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28251881Speter * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29251881Speter * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30251881Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31251881Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32251881Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33251881Speter * SUCH DAMAGE. 34251881Speter * 35251881Speter * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45 36251881Speter */ 37251881Speter 38251881Speter#include "opt_msgbuf.h" 39251881Speter#include "opt_ddb.h" 40251881Speter#include "opt_platform.h" 41251881Speter 42251881Speter#include <sys/cdefs.h> 43251881Speter__FBSDID("$FreeBSD: head/sys/arm/mv/mv_machdep.c 210247 2010-07-19 18:47:18Z raj $"); 44251881Speter 45251881Speter#define _ARM32_BUS_DMA_PRIVATE 46251881Speter#include <sys/param.h> 47251881Speter#include <sys/systm.h> 48251881Speter#include <sys/sysproto.h> 49251881Speter#include <sys/signalvar.h> 50251881Speter#include <sys/imgact.h> 51251881Speter#include <sys/kernel.h> 52251881Speter#include <sys/ktr.h> 53251881Speter#include <sys/linker.h> 54251881Speter#include <sys/lock.h> 55251881Speter#include <sys/malloc.h> 56251881Speter#include <sys/mutex.h> 57251881Speter#include <sys/pcpu.h> 58251881Speter#include <sys/proc.h> 59251881Speter#include <sys/ptrace.h> 60251881Speter#include <sys/cons.h> 61251881Speter#include <sys/bio.h> 62251881Speter#include <sys/bus.h> 63251881Speter#include <sys/buf.h> 64251881Speter#include <sys/exec.h> 65251881Speter#include <sys/kdb.h> 66251881Speter#include <sys/msgbuf.h> 67251881Speter#include <machine/reg.h> 68251881Speter#include <machine/cpu.h> 69251881Speter#include <machine/fdt.h> 70251881Speter 71251881Speter#include <dev/fdt/fdt_common.h> 72251881Speter#include <dev/ofw/openfirm.h> 73251881Speter 74251881Speter#include <vm/vm.h> 75251881Speter#include <vm/pmap.h> 76251881Speter#include <vm/vm_object.h> 77251881Speter#include <vm/vm_page.h> 78251881Speter#include <vm/vm_pager.h> 79251881Speter#include <vm/vm_map.h> 80251881Speter#include <machine/pte.h> 81251881Speter#include <machine/pmap.h> 82251881Speter#include <machine/vmparam.h> 83251881Speter#include <machine/pcb.h> 84251881Speter#include <machine/undefined.h> 85251881Speter#include <machine/machdep.h> 86251881Speter#include <machine/metadata.h> 87251881Speter#include <machine/armreg.h> 88251881Speter#include <machine/bus.h> 89251881Speter#include <sys/reboot.h> 90251881Speter 91251881Speter#include <arm/mv/mvreg.h> /* XXX */ 92251881Speter#include <arm/mv/mvvar.h> /* XXX eventually this should be eliminated */ 93251881Speter#include <arm/mv/mvwin.h> 94251881Speter 95251881Speter#define DEBUG 96251881Speter#undef DEBUG 97251881Speter 98251881Speter#ifdef DEBUG 99251881Speter#define debugf(fmt, args...) printf(fmt, ##args) 100251881Speter#else 101251881Speter#define debugf(fmt, args...) 102251881Speter#endif 103251881Speter 104251881Speter/* 105251881Speter * This is the number of L2 page tables required for covering max 106251881Speter * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 107251881Speter * stacks etc.), uprounded to be divisible by 4. 108251881Speter */ 109251881Speter#define KERNEL_PT_MAX 78 110251881Speter 111251881Speter/* Define various stack sizes in pages */ 112251881Speter#define IRQ_STACK_SIZE 1 113251881Speter#define ABT_STACK_SIZE 1 114251881Speter#define UND_STACK_SIZE 1 115251881Speter 116251881Speterextern unsigned char kernbase[]; 117251881Speterextern unsigned char _etext[]; 118251881Speterextern unsigned char _edata[]; 119251881Speterextern unsigned char __bss_start[]; 120251881Speterextern unsigned char _end[]; 121251881Speter 122251881Speterextern u_int data_abort_handler_address; 123251881Speterextern u_int prefetch_abort_handler_address; 124251881Speterextern u_int undefined_handler_address; 125251881Speter 126251881Speterextern vm_offset_t pmap_bootstrap_lastaddr; 127251881Speterextern int *end; 128251881Speter 129251881Speterstruct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 130251881Speterstruct pcpu __pcpu; 131251881Speterstruct pcpu *pcpup = &__pcpu; 132251881Speter 133251881Speter/* Physical and virtual addresses for some global pages */ 134251881Speter 135251881Spetervm_paddr_t phys_avail[10]; 136251881Spetervm_paddr_t dump_avail[4]; 137251881Spetervm_offset_t physical_pages; 138251881Spetervm_offset_t pmap_bootstrap_lastaddr; 139251881Speter 140251881Speterconst struct pmap_devmap *pmap_devmap_bootstrap_table; 141251881Speterstruct pv_addr systempage; 142251881Speterstruct pv_addr msgbufpv; 143251881Speterstruct pv_addr irqstack; 144251881Speterstruct pv_addr undstack; 145251881Speterstruct pv_addr abtstack; 146251881Speterstruct pv_addr kernelstack; 147251881Speter 148251881Speterstatic struct trapframe proc0_tf; 149251881Speter 150251881Speterstatic struct mem_region availmem_regions[FDT_MEM_REGIONS]; 151251881Speterstatic int availmem_regions_sz; 152251881Speter 153251881Speterstatic void print_kenv(void); 154251881Speterstatic void print_kernel_section_addr(void); 155251881Speter 156251881Speterstatic void physmap_init(int); 157251881Speterstatic int platform_devmap_init(void); 158251881Speterstatic int platform_mpp_init(void); 159251881Speter 160251881Speterstatic char * 161251881Speterkenv_next(char *cp) 162251881Speter{ 163251881Speter 164251881Speter if (cp != NULL) { 165251881Speter while (*cp != 0) 166251881Speter cp++; 167251881Speter cp++; 168251881Speter if (*cp == 0) 169251881Speter cp = NULL; 170251881Speter } 171251881Speter return (cp); 172251881Speter} 173251881Speter 174251881Speterstatic void 175251881Speterprint_kenv(void) 176251881Speter{ 177251881Speter int len; 178251881Speter char *cp; 179251881Speter 180251881Speter debugf("loader passed (static) kenv:\n"); 181251881Speter if (kern_envp == NULL) { 182251881Speter debugf(" no env, null ptr\n"); 183251881Speter return; 184251881Speter } 185251881Speter debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp); 186251881Speter 187251881Speter len = 0; 188251881Speter for (cp = kern_envp; cp != NULL; cp = kenv_next(cp)) 189251881Speter debugf(" %x %s\n", (uint32_t)cp, cp); 190} 191 192static void 193print_kernel_section_addr(void) 194{ 195 196 debugf("kernel image addresses:\n"); 197 debugf(" kernbase = 0x%08x\n", (uint32_t)kernbase); 198 debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext); 199 debugf(" _edata = 0x%08x\n", (uint32_t)_edata); 200 debugf(" __bss_start = 0x%08x\n", (uint32_t)__bss_start); 201 debugf(" _end = 0x%08x\n", (uint32_t)_end); 202} 203 204static void 205physmap_init(int hardcoded) 206{ 207 int i, j, cnt; 208 vm_offset_t phys_kernelend, kernload; 209 uint32_t s, e, sz; 210 struct mem_region *mp, *mp1; 211 212 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR); 213 kernload = KERNPHYSADDR; 214 215 /* 216 * Use hardcoded physical addresses if we don't use memory regions 217 * from metadata. 218 */ 219 if (hardcoded) { 220 phys_avail[0] = 0; 221 phys_avail[1] = kernload; 222 223 phys_avail[2] = phys_kernelend; 224 phys_avail[3] = PHYSMEM_SIZE; 225 226 phys_avail[4] = 0; 227 phys_avail[5] = 0; 228 return; 229 } 230 231 /* 232 * Remove kernel physical address range from avail 233 * regions list. Page align all regions. 234 * Non-page aligned memory isn't very interesting to us. 235 * Also, sort the entries for ascending addresses. 236 */ 237 sz = 0; 238 cnt = availmem_regions_sz; 239 debugf("processing avail regions:\n"); 240 for (mp = availmem_regions; mp->mr_size; mp++) { 241 s = mp->mr_start; 242 e = mp->mr_start + mp->mr_size; 243 debugf(" %08x-%08x -> ", s, e); 244 /* Check whether this region holds all of the kernel. */ 245 if (s < kernload && e > phys_kernelend) { 246 availmem_regions[cnt].mr_start = phys_kernelend; 247 availmem_regions[cnt++].mr_size = e - phys_kernelend; 248 e = kernload; 249 } 250 /* Look whether this regions starts within the kernel. */ 251 if (s >= kernload && s < phys_kernelend) { 252 if (e <= phys_kernelend) 253 goto empty; 254 s = phys_kernelend; 255 } 256 /* Now look whether this region ends within the kernel. */ 257 if (e > kernload && e <= phys_kernelend) { 258 if (s >= kernload) { 259 goto empty; 260 } 261 e = kernload; 262 } 263 /* Now page align the start and size of the region. */ 264 s = round_page(s); 265 e = trunc_page(e); 266 if (e < s) 267 e = s; 268 sz = e - s; 269 debugf("%08x-%08x = %x\n", s, e, sz); 270 271 /* Check whether some memory is left here. */ 272 if (sz == 0) { 273 empty: 274 printf("skipping\n"); 275 bcopy(mp + 1, mp, 276 (cnt - (mp - availmem_regions)) * sizeof(*mp)); 277 cnt--; 278 mp--; 279 continue; 280 } 281 282 /* Do an insertion sort. */ 283 for (mp1 = availmem_regions; mp1 < mp; mp1++) 284 if (s < mp1->mr_start) 285 break; 286 if (mp1 < mp) { 287 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1); 288 mp1->mr_start = s; 289 mp1->mr_size = sz; 290 } else { 291 mp->mr_start = s; 292 mp->mr_size = sz; 293 } 294 } 295 availmem_regions_sz = cnt; 296 297 /* Fill in phys_avail table, based on availmem_regions */ 298 debugf("fill in phys_avail:\n"); 299 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) { 300 301 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n", 302 availmem_regions[i].mr_start, 303 availmem_regions[i].mr_start + availmem_regions[i].mr_size, 304 availmem_regions[i].mr_size); 305 306 phys_avail[j] = availmem_regions[i].mr_start; 307 phys_avail[j + 1] = availmem_regions[i].mr_start + 308 availmem_regions[i].mr_size; 309 } 310 phys_avail[j] = 0; 311 phys_avail[j + 1] = 0; 312} 313 314void * 315initarm(void *mdp, void *unused __unused) 316{ 317 struct pv_addr kernel_l1pt; 318 struct pv_addr dpcpu; 319 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 320 uint32_t memsize, l2size; 321 void *kmdp; 322 u_int l1pagetable; 323 int i = 0, j = 0; 324 325 kmdp = NULL; 326 lastaddr = 0; 327 memsize = 0; 328 dtbp = (vm_offset_t)NULL; 329 330 set_cpufuncs(); 331 332 /* 333 * Mask metadata pointer: it is supposed to be on page boundary. If 334 * the first argument (mdp) doesn't point to a valid address the 335 * bootloader must have passed us something else than the metadata 336 * ptr... In this case we want to fall back to some built-in settings. 337 */ 338 mdp = (void *)((uint32_t)mdp & ~PAGE_MASK); 339 340 /* Parse metadata and fetch parameters */ 341 if (mdp != NULL) { 342 preload_metadata = mdp; 343 kmdp = preload_search_by_type("elf kernel"); 344 if (kmdp != NULL) { 345 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 346 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); 347 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 348 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, 349 vm_offset_t); 350 } 351 352 } else { 353 /* Fall back to hardcoded metadata. */ 354 lastaddr = fake_preload_metadata(); 355 356 /* 357 * Assume a single memory region of size specified in board 358 * configuration file. 359 */ 360 memsize = PHYSMEM_SIZE; 361 } 362 363#if defined(FDT_DTB_STATIC) 364 /* 365 * In case the device tree blob was not retrieved (from metadata) try 366 * to use the statically embedded one. 367 */ 368 if (dtbp == (vm_offset_t)NULL) 369 dtbp = (vm_offset_t)&fdt_static_dtb; 370#endif 371 372 if (OF_install(OFW_FDT, 0) == FALSE) 373 while (1); 374 375 if (OF_init((void *)dtbp) != 0) 376 while (1); 377 378 /* Grab physical memory regions information from device tree. */ 379 if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz, 380 &memsize) != 0) 381 while(1); 382 383 if (fdt_immr_addr(MV_BASE) != 0) 384 while (1); 385 386 /* Platform-specific initialisation */ 387 pmap_bootstrap_lastaddr = fdt_immr_va - ARM_NOCACHE_KVA_SIZE; 388 389 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 390 PCPU_SET(curthread, &thread0); 391 392 /* Calculate number of L2 tables needed for mapping vm_page_array */ 393 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 394 l2size = (l2size >> L1_S_SHIFT) + 1; 395 396 /* 397 * Add one table for end of kernel map, one for stacks, msgbuf and 398 * L1 and L2 tables map and one for vectors map. 399 */ 400 l2size += 3; 401 402 /* Make it divisible by 4 */ 403 l2size = (l2size + 3) & ~3; 404 405#define KERNEL_TEXT_BASE (KERNBASE) 406 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 407 408 /* Define a macro to simplify memory allocation */ 409#define valloc_pages(var, np) \ 410 alloc_pages((var).pv_va, (np)); \ 411 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR); 412 413#define alloc_pages(var, np) \ 414 (var) = freemempos; \ 415 freemempos += (np * PAGE_SIZE); \ 416 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 417 418 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 419 freemempos += PAGE_SIZE; 420 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 421 422 for (i = 0; i < l2size; ++i) { 423 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 424 valloc_pages(kernel_pt_table[i], 425 L2_TABLE_SIZE / PAGE_SIZE); 426 j = i; 427 } else { 428 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 429 L2_TABLE_SIZE_REAL * (i - j); 430 kernel_pt_table[i].pv_pa = 431 kernel_pt_table[i].pv_va - KERNVIRTADDR + 432 KERNPHYSADDR; 433 434 } 435 } 436 /* 437 * Allocate a page for the system page mapped to 0x00000000 438 * or 0xffff0000. This page will just contain the system vectors 439 * and can be shared by all processes. 440 */ 441 valloc_pages(systempage, 1); 442 443 /* Allocate dynamic per-cpu area. */ 444 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 445 dpcpu_init((void *)dpcpu.pv_va, 0); 446 447 /* Allocate stacks for all modes */ 448 valloc_pages(irqstack, IRQ_STACK_SIZE); 449 valloc_pages(abtstack, ABT_STACK_SIZE); 450 valloc_pages(undstack, UND_STACK_SIZE); 451 valloc_pages(kernelstack, KSTACK_PAGES); 452 valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 453 454 /* 455 * Now we start construction of the L1 page table 456 * We start by mapping the L2 page tables into the L1. 457 * This means that we can replace L1 mappings later on if necessary 458 */ 459 l1pagetable = kernel_l1pt.pv_va; 460 461 /* 462 * Try to map as much as possible of kernel text and data using 463 * 1MB section mapping and for the rest of initial kernel address 464 * space use L2 coarse tables. 465 * 466 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 467 * and kernel structures 468 */ 469 l2_start = lastaddr & ~(L1_S_OFFSET); 470 for (i = 0 ; i < l2size - 1; i++) 471 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 472 &kernel_pt_table[i]); 473 474 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 475 476 /* Map kernel code and data */ 477 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR, 478 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 479 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 480 481 482 /* Map L1 directory and allocated L2 page tables */ 483 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 484 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 485 486 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 487 kernel_pt_table[0].pv_pa, 488 L2_TABLE_SIZE_REAL * l2size, 489 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 490 491 /* Map allocated DPCPU, stacks and msgbuf */ 492 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 493 freemempos - dpcpu.pv_va, 494 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 495 496 /* Link and map the vector page */ 497 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 498 &kernel_pt_table[l2size - 1]); 499 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 500 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 501 502 /* Map pmap_devmap[] entries */ 503 if (platform_devmap_init() != 0) 504 while (1); 505 pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table); 506 507 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | 508 DOMAIN_CLIENT); 509 setttb(kernel_l1pt.pv_pa); 510 cpu_tlb_flushID(); 511 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 512 513 /* 514 * Only after the SOC registers block is mapped we can perform device 515 * tree fixups, as they may attempt to read parameters from hardware. 516 */ 517 OF_interpret("perform-fixup", 0); 518 519 /* 520 * Re-initialise MPP. It is important to call this prior to using 521 * console as the physical connection can be routed via MPP. 522 */ 523 if (platform_mpp_init() != 0) 524 while (1); 525 526 /* 527 * Initialize GPIO as early as possible. 528 */ 529 if (platform_gpio_init() != 0) 530 while (1); 531 532 cninit(); 533 physmem = memsize / PAGE_SIZE; 534 535 debugf("initarm: console initialized\n"); 536 debugf(" arg1 mdp = 0x%08x\n", (uint32_t)mdp); 537 debugf(" boothowto = 0x%08x\n", boothowto); 538 printf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 539 print_kernel_section_addr(); 540 print_kenv(); 541 542 /* 543 * Re-initialise decode windows 544 */ 545 if (soc_decode_win() != 0) 546 printf("WARNING: could not re-initialise decode windows! " 547 "Running with existing settings...\n"); 548 /* 549 * Pages were allocated during the secondary bootstrap for the 550 * stacks for different CPU modes. 551 * We must now set the r13 registers in the different CPU modes to 552 * point to these stacks. 553 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 554 * of the stack memory. 555 */ 556 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 557 set_stackptr(PSR_IRQ32_MODE, 558 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 559 set_stackptr(PSR_ABT32_MODE, 560 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 561 set_stackptr(PSR_UND32_MODE, 562 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 563 564 /* 565 * We must now clean the cache again.... 566 * Cleaning may be done by reading new data to displace any 567 * dirty data in the cache. This will have happened in setttb() 568 * but since we are boot strapping the addresses used for the read 569 * may have just been remapped and thus the cache could be out 570 * of sync. A re-clean after the switch will cure this. 571 * After booting there are no gross relocations of the kernel thus 572 * this problem will not occur after initarm(). 573 */ 574 cpu_idcache_wbinv_all(); 575 576 /* Set stack for exception handlers */ 577 data_abort_handler_address = (u_int)data_abort_handler; 578 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 579 undefined_handler_address = (u_int)undefinedinstruction_bounce; 580 undefined_init(); 581 582 proc_linkup0(&proc0, &thread0); 583 thread0.td_kstack = kernelstack.pv_va; 584 thread0.td_kstack_pages = KSTACK_PAGES; 585 thread0.td_pcb = (struct pcb *) 586 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 587 thread0.td_pcb->pcb_flags = 0; 588 thread0.td_frame = &proc0_tf; 589 pcpup->pc_curpcb = thread0.td_pcb; 590 591 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 592 593 dump_avail[0] = 0; 594 dump_avail[1] = memsize; 595 dump_avail[2] = 0; 596 dump_avail[3] = 0; 597 598 pmap_bootstrap(freemempos, pmap_bootstrap_lastaddr, &kernel_l1pt); 599 msgbufp = (void *)msgbufpv.pv_va; 600 msgbufinit(msgbufp, MSGBUF_SIZE); 601 mutex_init(); 602 603 /* 604 * Prepare map of physical memory regions available to vm subsystem. 605 * If metadata pointer doesn't point to a valid address, use hardcoded 606 * values. 607 */ 608 physmap_init((mdp != NULL) ? 0 : 1); 609 610 /* Do basic tuning, hz etc */ 611 init_param1(); 612 init_param2(physmem); 613 kdb_init(); 614 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 615 sizeof(struct pcb))); 616} 617 618#define MPP_PIN_MAX 50 619#define MPP_PIN_CELLS 2 620#define MPP_PINS_PER_REG 8 621#define MPP_SEL(pin,func) (((func) & 0xf) << \ 622 (((pin) % MPP_PINS_PER_REG) * 4)) 623 624static int 625platform_mpp_init(void) 626{ 627 pcell_t pinmap[MPP_PIN_MAX * MPP_PIN_CELLS]; 628 int mpp[MPP_PIN_MAX]; 629 uint32_t ctrl_val, ctrl_offset; 630 pcell_t reg[4]; 631 u_long start, size; 632 phandle_t node; 633 pcell_t pin_cells, *pinmap_ptr, pin_count; 634 ssize_t len; 635 int par_addr_cells, par_size_cells; 636 int tuple_size, tuples, rv, pins, i, j; 637 int mpp_pin, mpp_function; 638 639 /* 640 * Try to access the MPP node directly i.e. through /aliases/mpp. 641 */ 642 if ((node = OF_finddevice("mpp")) != 0) 643 if (fdt_is_compatible(node, "mrvl,mpp")) 644 goto moveon; 645 /* 646 * Find the node the long way. 647 */ 648 if ((node = OF_finddevice("/")) == 0) 649 return (ENXIO); 650 651 if ((node = fdt_find_compatible(node, "simple-bus", 0)) == 0) 652 return (ENXIO); 653 654 if ((node = fdt_find_compatible(node, "mrvl,mpp", 0)) == 0) 655 return (ENXIO); 656moveon: 657 /* 658 * Process 'reg' prop. 659 */ 660 if ((rv = fdt_addrsize_cells(OF_parent(node), &par_addr_cells, 661 &par_size_cells)) != 0) 662 return(ENXIO); 663 664 tuple_size = sizeof(pcell_t) * (par_addr_cells + par_size_cells); 665 len = OF_getprop(node, "reg", reg, sizeof(reg)); 666 tuples = len / tuple_size; 667 if (tuple_size <= 0) 668 return (EINVAL); 669 670 /* 671 * Get address/size. XXX we assume only the first 'reg' tuple is used. 672 */ 673 rv = fdt_data_to_res(reg, par_addr_cells, par_size_cells, 674 &start, &size); 675 if (rv != 0) 676 return (rv); 677 start += fdt_immr_va; 678 679 /* 680 * Process 'pin-count' and 'pin-map' props. 681 */ 682 if (OF_getprop(node, "pin-count", &pin_count, sizeof(pin_count)) <= 0) 683 return (ENXIO); 684 pin_count = fdt32_to_cpu(pin_count); 685 if (pin_count > MPP_PIN_MAX) 686 return (ERANGE); 687 688 if (OF_getprop(node, "#pin-cells", &pin_cells, sizeof(pin_cells)) <= 0) 689 pin_cells = MPP_PIN_CELLS; 690 pin_cells = fdt32_to_cpu(pin_cells); 691 if (pin_cells > MPP_PIN_CELLS) 692 return (ERANGE); 693 tuple_size = sizeof(pcell_t) * pin_cells; 694 695 bzero(pinmap, sizeof(pinmap)); 696 len = OF_getprop(node, "pin-map", pinmap, sizeof(pinmap)); 697 if (len <= 0) 698 return (ERANGE); 699 if (len % tuple_size) 700 return (ERANGE); 701 pins = len / tuple_size; 702 if (pins > pin_count) 703 return (ERANGE); 704 /* 705 * Fill out a "mpp[pin] => function" table. All pins unspecified in 706 * the 'pin-map' property are defaulted to 0 function i.e. GPIO. 707 */ 708 bzero(mpp, sizeof(mpp)); 709 pinmap_ptr = pinmap; 710 for (i = 0; i < pins; i++) { 711 mpp_pin = fdt32_to_cpu(*pinmap_ptr); 712 mpp_function = fdt32_to_cpu(*(pinmap_ptr + 1)); 713 mpp[mpp_pin] = mpp_function; 714 pinmap_ptr += pin_cells; 715 } 716 717 /* 718 * Prepare and program MPP control register values. 719 */ 720 ctrl_offset = 0; 721 for (i = 0; i < pin_count;) { 722 ctrl_val = 0; 723 724 for (j = 0; j < MPP_PINS_PER_REG; j++) { 725 if (i + j == pin_count - 1) 726 break; 727 ctrl_val |= MPP_SEL(i + j, mpp[i + j]); 728 } 729 i += MPP_PINS_PER_REG; 730 bus_space_write_4(fdtbus_bs_tag, start, ctrl_offset, 731 ctrl_val); 732 733#if defined(SOC_MV_ORION) 734 /* 735 * Third MPP reg on Orion SoC is placed 736 * non-linearly (with different offset). 737 */ 738 if (i == (2 * MPP_PINS_PER_REG)) 739 ctrl_offset = 0x50; 740 else 741#endif 742 ctrl_offset += 4; 743 } 744 745 return (0); 746} 747 748#define FDT_DEVMAP_MAX (1 + 2 + 1 + 1) 749static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = { 750 { 0, 0, 0, 0, 0, } 751}; 752 753/* 754 * Construct pmap_devmap[] with DT-derived config data. 755 */ 756static int 757platform_devmap_init(void) 758{ 759 phandle_t root, child; 760 u_long base, size; 761 int i; 762 763 /* 764 * IMMR range. 765 */ 766 i = 0; 767 fdt_devmap[i].pd_va = fdt_immr_va; 768 fdt_devmap[i].pd_pa = fdt_immr_pa; 769 fdt_devmap[i].pd_size = fdt_immr_size; 770 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 771 fdt_devmap[i].pd_cache = PTE_NOCACHE; 772 i++; 773 774 /* 775 * PCI range(s). 776 */ 777 if ((root = OF_finddevice("/")) == 0) 778 return (ENXIO); 779 780 for (child = OF_child(root); child != 0; child = OF_peer(child)) 781 if (fdt_is_type(child, "pci")) { 782 /* 783 * Check space: each PCI node will consume 2 devmap 784 * entries. 785 */ 786 if (i + 1 >= FDT_DEVMAP_MAX) { 787 return (ENOMEM); 788 break; 789 } 790 791 /* 792 * XXX this should account for PCI and multiple ranges 793 * of a given kind. 794 */ 795 if (fdt_pci_devmap(child, &fdt_devmap[i], 796 MV_PCIE_IO_BASE, MV_PCIE_MEM_BASE) != 0) 797 return (ENXIO); 798 i += 2; 799 } 800 801 /* 802 * CESA SRAM range. 803 */ 804 if ((child = OF_finddevice("sram")) != 0) 805 if (fdt_is_compatible(child, "mrvl,cesa-sram")) 806 goto moveon; 807 808 if ((child = fdt_find_compatible(root, "mrvl,cesa-sram", 0)) == 0) 809 /* No CESA SRAM node. */ 810 goto out; 811moveon: 812 if (i >= FDT_DEVMAP_MAX) 813 return (ENOMEM); 814 815 if (fdt_regsize(child, &base, &size) != 0) 816 return (EINVAL); 817 818 fdt_devmap[i].pd_va = MV_CESA_SRAM_BASE; /* XXX */ 819 fdt_devmap[i].pd_pa = base; 820 fdt_devmap[i].pd_size = size; 821 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 822 fdt_devmap[i].pd_cache = PTE_NOCACHE; 823 824out: 825 pmap_devmap_bootstrap_table = &fdt_devmap[0]; 826 return (0); 827} 828 829struct arm32_dma_range * 830bus_dma_get_range(void) 831{ 832 833 return (NULL); 834} 835 836int 837bus_dma_get_range_nb(void) 838{ 839 840 return (0); 841} 842