lpc_ohci.c revision 239278
1/*- 2 * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/arm/lpc/lpc_ohci.c 239278 2012-08-15 05:37:10Z gonzo $"); 29 30#include <sys/stdint.h> 31#include <sys/stddef.h> 32#include <sys/param.h> 33#include <sys/queue.h> 34#include <sys/types.h> 35#include <sys/systm.h> 36#include <sys/kernel.h> 37#include <sys/bus.h> 38#include <sys/module.h> 39#include <sys/lock.h> 40#include <sys/mutex.h> 41#include <sys/condvar.h> 42#include <sys/sysctl.h> 43#include <sys/rman.h> 44#include <sys/sx.h> 45#include <sys/unistd.h> 46#include <sys/callout.h> 47#include <sys/malloc.h> 48#include <sys/priv.h> 49 50#include <sys/kdb.h> 51 52#include <dev/ofw/ofw_bus.h> 53#include <dev/ofw/ofw_bus_subr.h> 54 55#include <dev/usb/usb.h> 56#include <dev/usb/usbdi.h> 57 58#include <dev/usb/usb_core.h> 59#include <dev/usb/usb_busdma.h> 60#include <dev/usb/usb_process.h> 61#include <dev/usb/usb_util.h> 62 63#include <dev/usb/usb_controller.h> 64#include <dev/usb/usb_bus.h> 65#include <dev/usb/controller/ohci.h> 66#include <dev/usb/controller/ohcireg.h> 67 68#include <arm/lpc/lpcreg.h> 69#include <arm/lpc/lpcvar.h> 70 71#define I2C_START_BIT (1 << 8) 72#define I2C_STOP_BIT (1 << 9) 73#define I2C_READ 0x01 74#define I2C_WRITE 0x00 75#define DUMMY_BYTE 0x55 76 77#define lpc_otg_read_4(_sc, _reg) \ 78 bus_space_read_4(_sc->sc_io_tag, _sc->sc_io_hdl, _reg) 79#define lpc_otg_write_4(_sc, _reg, _value) \ 80 bus_space_write_4(_sc->sc_io_tag, _sc->sc_io_hdl, _reg, _value) 81#define lpc_otg_wait_write_4(_sc, _wreg, _sreg, _value) \ 82 do { \ 83 lpc_otg_write_4(_sc, _wreg, _value); \ 84 while ((lpc_otg_read_4(_sc, _sreg) & _value) != _value); \ 85 } while (0); 86 87static int lpc_ohci_probe(device_t dev); 88static int lpc_ohci_attach(device_t dev); 89static int lpc_ohci_detach(device_t dev); 90 91static void lpc_otg_i2c_reset(struct ohci_softc *); 92 93static int lpc_isp3101_read(struct ohci_softc *, int); 94static void lpc_isp3101_write(struct ohci_softc *, int, int); 95static void lpc_isp3101_clear(struct ohci_softc *, int, int); 96static void lpc_isp3101_configure(device_t dev, struct ohci_softc *); 97 98static int 99lpc_ohci_probe(device_t dev) 100{ 101 if (!ofw_bus_is_compatible(dev, "lpc,usb-ohci")) 102 return (ENXIO); 103 104 device_set_desc(dev, "LPC32x0 USB OHCI controller"); 105 return (BUS_PROBE_DEFAULT); 106} 107 108static int 109lpc_ohci_attach(device_t dev) 110{ 111 struct ohci_softc *sc = device_get_softc(dev); 112 int err; 113 int rid; 114 int i = 0; 115 uint32_t usbctrl; 116 uint32_t otgstatus; 117 118 sc->sc_bus.parent = dev; 119 sc->sc_bus.devices = sc->sc_devices; 120 sc->sc_bus.devices_max = OHCI_MAX_DEVICES; 121 122 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev), 123 &ohci_iterate_hw_softc)) 124 return (ENOMEM); 125 126 rid = 0; 127 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 128 if (!sc->sc_io_res) { 129 device_printf(dev, "cannot map OHCI register space\n"); 130 goto fail; 131 } 132 133 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 134 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 135 sc->sc_io_size = rman_get_size(sc->sc_io_res); 136 137 rid = 0; 138 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 139 if (sc->sc_irq_res == NULL) { 140 device_printf(dev, "cannot allocate interrupt\n"); 141 goto fail; 142 } 143 144 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); 145 if (!(sc->sc_bus.bdev)) 146 goto fail; 147 148 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 149 strlcpy(sc->sc_vendor, "NXP", sizeof(sc->sc_vendor)); 150 151 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 152 NULL, (void *)ohci_interrupt, sc, &sc->sc_intr_hdl); 153 if (err) { 154 sc->sc_intr_hdl = NULL; 155 goto fail; 156 } 157 158 usbctrl = lpc_pwr_read(dev, LPC_CLKPWR_USB_CTRL); 159 usbctrl |= LPC_CLKPWR_USB_CTRL_SLAVE_HCLK | LPC_CLKPWR_USB_CTRL_BUSKEEPER; 160 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl); 161 162 /* Enable OTG I2C clock */ 163 lpc_otg_wait_write_4(sc, LPC_OTG_CLOCK_CTRL, 164 LPC_OTG_CLOCK_STATUS, LPC_OTG_CLOCK_CTRL_I2C_EN); 165 166 /* Reset OTG I2C bus */ 167 lpc_otg_i2c_reset(sc); 168 169 lpc_isp3101_configure(dev, sc); 170 171 /* Configure PLL */ 172 usbctrl &= ~(LPC_CLKPWR_USB_CTRL_CLK_EN1 | LPC_CLKPWR_USB_CTRL_CLK_EN2); 173 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl); 174 175 usbctrl |= LPC_CLKPWR_USB_CTRL_CLK_EN1; 176 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl); 177 178 usbctrl |= LPC_CLKPWR_USB_CTRL_FDBKDIV(192-1); 179 usbctrl |= LPC_CLKPWR_USB_CTRL_POSTDIV(1); 180 usbctrl |= LPC_CLKPWR_USB_CTRL_PLL_PDOWN; 181 182 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl); 183 do { 184 usbctrl = lpc_pwr_read(dev, LPC_CLKPWR_USB_CTRL); 185 if (i++ > 100000) { 186 device_printf(dev, "USB OTG PLL doesn't lock!\n"); 187 goto fail; 188 } 189 } while ((usbctrl & LPC_CLKPWR_USB_CTRL_PLL_LOCK) == 0); 190 191 usbctrl |= LPC_CLKPWR_USB_CTRL_CLK_EN2; 192 usbctrl |= LPC_CLKPWR_USB_CTRL_HOST_NEED_CLK_EN; 193 lpc_pwr_write(dev, LPC_CLKPWR_USB_CTRL, usbctrl); 194 lpc_otg_wait_write_4(sc, LPC_OTG_CLOCK_CTRL, LPC_OTG_CLOCK_STATUS, 195 (LPC_OTG_CLOCK_CTRL_AHB_EN | LPC_OTG_CLOCK_CTRL_OTG_EN | 196 LPC_OTG_CLOCK_CTRL_I2C_EN | LPC_OTG_CLOCK_CTRL_HOST_EN)); 197 198 otgstatus = lpc_otg_read_4(sc, LPC_OTG_STATUS); 199 lpc_otg_write_4(sc, LPC_OTG_STATUS, otgstatus | 200 LPC_OTG_STATUS_HOST_EN); 201 202 lpc_isp3101_write(sc, LPC_ISP3101_OTG_CONTROL_1, 203 LPC_ISP3101_OTG1_VBUS_DRV); 204 205 err = ohci_init(sc); 206 if (err) 207 goto fail; 208 209 err = device_probe_and_attach(sc->sc_bus.bdev); 210 if (err) 211 goto fail; 212 213 return (0); 214 215fail: 216 if (sc->sc_intr_hdl) 217 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl); 218 if (sc->sc_irq_res) 219 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); 220 if (sc->sc_io_res) 221 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_io_res); 222 223 return (ENXIO); 224} 225 226static int 227lpc_isp3101_read(struct ohci_softc *sc, int reg) 228{ 229 int status; 230 int i = 0; 231 232 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, 233 (LPC_ISP3101_I2C_ADDR << 1) | I2C_START_BIT); 234 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, reg); 235 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, (LPC_ISP3101_I2C_ADDR << 1) | 236 I2C_START_BIT | I2C_READ); 237 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, I2C_STOP_BIT | DUMMY_BYTE); 238 239 do { 240 status = lpc_otg_read_4(sc, LPC_OTG_I2C_STATUS); 241 i++; 242 } while ((status & LPC_OTG_I2C_STATUS_TDI) == 0 || i < 100000); 243 244 lpc_otg_write_4(sc, LPC_OTG_I2C_STATUS, LPC_OTG_I2C_STATUS_TDI); 245 246 return (lpc_otg_read_4(sc, LPC_OTG_I2C_TXRX) & 0xff); 247} 248 249static void 250lpc_otg_i2c_reset(struct ohci_softc *sc) 251{ 252 int ctrl; 253 int i = 0; 254 255 lpc_otg_write_4(sc, LPC_OTG_I2C_CLKHI, 0x3f); 256 lpc_otg_write_4(sc, LPC_OTG_I2C_CLKLO, 0x3f); 257 258 ctrl = lpc_otg_read_4(sc, LPC_OTG_I2C_CTRL); 259 lpc_otg_write_4(sc, LPC_OTG_I2C_CTRL, ctrl | LPC_OTG_I2C_CTRL_SRST); 260 261 do { 262 ctrl = lpc_otg_read_4(sc, LPC_OTG_I2C_CTRL); 263 i++; 264 } while (ctrl & LPC_OTG_I2C_CTRL_SRST); 265} 266 267static void 268lpc_isp3101_write(struct ohci_softc *sc, int reg, int value) 269{ 270 int status; 271 int i = 0; 272 273 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX, 274 (LPC_ISP3101_I2C_ADDR << 1) | I2C_START_BIT); 275 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX, 276 (reg | I2C_WRITE)); 277 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX, 278 (value | I2C_STOP_BIT)); 279 280 do { 281 status = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 282 LPC_OTG_I2C_STATUS); 283 i++; 284 } while ((status & LPC_OTG_I2C_STATUS_TDI) == 0 || i < 100000); 285 286 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_STATUS, 287 LPC_OTG_I2C_STATUS_TDI); 288} 289 290static __inline void 291lpc_isp3101_clear(struct ohci_softc *sc, int reg, int value) 292{ 293 lpc_isp3101_write(sc, (reg | LPC_ISP3101_REG_CLEAR_ADDR), value); 294} 295 296static void 297lpc_isp3101_configure(device_t dev, struct ohci_softc *sc) 298{ 299 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_UART_EN); 300 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_1, ~LPC_ISP3101_MC1_SPEED_REG); 301 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_SPEED_REG); 302 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_2, ~0); 303 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_2, 304 (LPC_ISP3101_MC2_BI_DI | LPC_ISP3101_MC2_PSW_EN 305 | LPC_ISP3101_MC2_SPD_SUSP_CTRL)); 306 307 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_CONTROL_1, ~0); 308 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_DAT_SE0); 309 lpc_isp3101_write(sc, LPC_ISP3101_OTG_CONTROL_1, 310 (LPC_ISP3101_OTG1_DM_PULLDOWN | LPC_ISP3101_OTG1_DP_PULLDOWN)); 311 312 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_CONTROL_1, 313 (LPC_ISP3101_OTG1_DM_PULLUP | LPC_ISP3101_OTG1_DP_PULLUP)); 314 315 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_LATCH, ~0); 316 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_FALLING, ~0); 317 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_RISING, ~0); 318 319 device_printf(dev, 320 "ISP3101 PHY <vendor:0x%04x, product:0x%04x, version:0x%04x>\n", 321 (lpc_isp3101_read(sc, 0x00) | (lpc_isp3101_read(sc, 0x01) << 8)), 322 (lpc_isp3101_read(sc, 0x03) | (lpc_isp3101_read(sc, 0x04) << 8)), 323 (lpc_isp3101_read(sc, 0x14) | (lpc_isp3101_read(sc, 0x15) << 8))); 324} 325 326static int 327lpc_ohci_detach(device_t dev) 328{ 329 return (0); 330} 331 332 333static device_method_t lpc_ohci_methods[] = { 334 /* Device interface */ 335 DEVMETHOD(device_probe, lpc_ohci_probe), 336 DEVMETHOD(device_attach, lpc_ohci_attach), 337 DEVMETHOD(device_detach, lpc_ohci_detach), 338 DEVMETHOD(device_shutdown, bus_generic_shutdown), 339 340 /* Bus interface */ 341 DEVMETHOD(bus_print_child, bus_generic_print_child), 342 { 0, 0 } 343}; 344 345static driver_t lpc_ohci_driver = { 346 "ohci", 347 lpc_ohci_methods, 348 sizeof(struct ohci_softc), 349}; 350 351static devclass_t lpc_ohci_devclass; 352 353DRIVER_MODULE(ohci, simplebus, lpc_ohci_driver, lpc_ohci_devclass, 0, 0); 354MODULE_DEPEND(ohci, usb, 1, 1, 1); 355