1257062Sloos/*-
2257062Sloos * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
3257062Sloos * Copyright (c) 2013 Luiz Otavio O Souza <loos@freebsd.org>
4257062Sloos * All rights reserved.
5257062Sloos *
6257062Sloos * Redistribution and use in source and binary forms, with or without
7257062Sloos * modification, are permitted provided that the following conditions
8257062Sloos * are met:
9257062Sloos * 1. Redistributions of source code must retain the above copyright
10257062Sloos *    notice, this list of conditions and the following disclaimer.
11257062Sloos * 2. Redistributions in binary form must reproduce the above copyright
12257062Sloos *    notice, this list of conditions and the following disclaimer in the
13257062Sloos *    documentation and/or other materials provided with the distribution.
14257062Sloos *
15257062Sloos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16257062Sloos * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17257062Sloos * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18257062Sloos * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19257062Sloos * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20257062Sloos * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21257062Sloos * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22257062Sloos * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23257062Sloos * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24257062Sloos * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25257062Sloos * SUCH DAMAGE.
26257062Sloos *
27257062Sloos * $FreeBSD: releng/11.0/sys/arm/broadcom/bcm2835/bcm2835_spireg.h 257062 2013-10-24 16:27:33Z loos $
28257062Sloos */
29257062Sloos
30257062Sloos#ifndef	_BCM2835_SPIREG_H_
31257062Sloos#define	_BCM2835_SPIREG_H_
32257062Sloos
33257062Sloos#define	SPI_CORE_CLK	250000000U
34257062Sloos#define	SPI_CS		0x00
35257062Sloos#define	SPI_CS_LEN_LONG		(1 << 25)
36257062Sloos#define	SPI_CS_DMA_LEN		(1 << 24)
37257062Sloos#define	SPI_CS_CSPOL2		(1 << 23)
38257062Sloos#define	SPI_CS_CSPOL1		(1 << 22)
39257062Sloos#define	SPI_CS_CSPOL0		(1 << 21)
40257062Sloos#define	SPI_CS_RXF		(1 << 20)
41257062Sloos#define	SPI_CS_RXR		(1 << 19)
42257062Sloos#define	SPI_CS_TXD		(1 << 18)
43257062Sloos#define	SPI_CS_RXD		(1 << 17)
44257062Sloos#define	SPI_CS_DONE		(1 << 16)
45257062Sloos#define	SPI_CS_LEN		(1 << 13)
46257062Sloos#define	SPI_CS_REN		(1 << 12)
47257062Sloos#define	SPI_CS_ADCS		(1 << 11)
48257062Sloos#define	SPI_CS_INTR		(1 << 10)
49257062Sloos#define	SPI_CS_INTD		(1 << 9)
50257062Sloos#define	SPI_CS_DMAEN		(1 << 8)
51257062Sloos#define	SPI_CS_TA		(1 << 7)
52257062Sloos#define	SPI_CS_CSPOL		(1 << 6)
53257062Sloos#define	SPI_CS_CLEAR_RXFIFO	(1 << 5)
54257062Sloos#define	SPI_CS_CLEAR_TXFIFO	(1 << 4)
55257062Sloos#define	SPI_CS_CPOL		(1 << 3)
56257062Sloos#define	SPI_CS_CPHA		(1 << 2)
57257062Sloos#define	SPI_CS_MASK		0x3
58257062Sloos#define	SPI_FIFO	0x04
59257062Sloos#define	SPI_CLK		0x08
60257062Sloos#define	SPI_CLK_MASK		0xffff
61257062Sloos#define	SPI_DLEN	0x0c
62257062Sloos#define	SPI_DLEN_MASK		0xffff
63257062Sloos#define	SPI_LTOH	0x10
64257062Sloos#define	SPI_LTOH_MASK		0xf
65257062Sloos#define	SPI_DC		0x14
66257062Sloos#define	SPI_DC_RPANIC_SHIFT	24
67257062Sloos#define	SPI_DC_RPANIC_MASK	(0xff << SPI_DC_RPANIC_SHIFT)
68257062Sloos#define	SPI_DC_RDREQ_SHIFT	16
69257062Sloos#define	SPI_DC_RDREQ_MASK	(0xff << SPI_DC_RDREQ_SHIFT)
70257062Sloos#define	SPI_DC_TPANIC_SHIFT	8
71257062Sloos#define	SPI_DC_TPANIC_MASK	(0xff << SPI_DC_TPANIC_SHIFT)
72257062Sloos#define	SPI_DC_TDREQ_SHIFT	0
73257062Sloos#define	SPI_DC_TDREQ_MASK	0xff
74257062Sloos
75257062Sloos#endif	/* _BCM2835_SPIREG_H_ */
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