1262709Sganbold/*- 2263711Sganbold * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org> 3262709Sganbold * All rights reserved. 4262709Sganbold * 5262709Sganbold * Redistribution and use in source and binary forms, with or without 6262709Sganbold * modification, are permitted provided that the following conditions 7262709Sganbold * are met: 8262709Sganbold * 1. Redistributions of source code must retain the above copyright 9262709Sganbold * notice, this list of conditions and the following disclaimer. 10262709Sganbold * 2. Redistributions in binary form must reproduce the above copyright 11262709Sganbold * notice, this list of conditions and the following disclaimer in the 12262709Sganbold * documentation and/or other materials provided with the distribution. 13262709Sganbold * 14262709Sganbold * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15262709Sganbold * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16262709Sganbold * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17262709Sganbold * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18262709Sganbold * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19262709Sganbold * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20262709Sganbold * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION 21262709Sganbold * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22262709Sganbold * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY 23262709Sganbold * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24262709Sganbold * SUCH DAMAGE. 25262709Sganbold * 26262709Sganbold * $FreeBSD: releng/11.0/sys/arm/allwinner/a10_sramc.c 297703 2016-04-08 10:54:59Z jmcneill $ 27262709Sganbold */ 28262709Sganbold 29262709Sganbold#include <sys/cdefs.h> 30262709Sganbold__FBSDID("$FreeBSD: releng/11.0/sys/arm/allwinner/a10_sramc.c 297703 2016-04-08 10:54:59Z jmcneill $"); 31262709Sganbold 32262709Sganbold#include <sys/param.h> 33262709Sganbold#include <sys/systm.h> 34262709Sganbold#include <sys/bus.h> 35262709Sganbold#include <sys/kernel.h> 36262709Sganbold#include <sys/module.h> 37262709Sganbold#include <sys/malloc.h> 38262709Sganbold#include <sys/rman.h> 39262709Sganbold#include <sys/timeet.h> 40262709Sganbold#include <sys/timetc.h> 41262709Sganbold#include <sys/watchdog.h> 42262709Sganbold#include <machine/bus.h> 43262709Sganbold#include <machine/cpu.h> 44262709Sganbold#include <machine/frame.h> 45262709Sganbold#include <machine/intr.h> 46262709Sganbold 47262709Sganbold#include <dev/fdt/fdt_common.h> 48262709Sganbold#include <dev/ofw/openfirm.h> 49262709Sganbold#include <dev/ofw/ofw_bus.h> 50262709Sganbold#include <dev/ofw/ofw_bus_subr.h> 51262709Sganbold 52262709Sganbold#include "a10_sramc.h" 53262709Sganbold 54262709Sganbold#define SRAM_CTL1_CFG 0x04 55297703Sjmcneill#define CTL1_CFG_SRAMD_MAP_USB0 (1 << 0) 56262709Sganbold 57262709Sganboldstruct a10_sramc_softc { 58262709Sganbold struct resource *res; 59262709Sganbold bus_space_tag_t bst; 60262709Sganbold bus_space_handle_t bsh; 61262709Sganbold}; 62262709Sganbold 63262709Sganboldstatic struct a10_sramc_softc *a10_sramc_sc; 64262709Sganbold 65262709Sganbold#define sramc_read_4(sc, reg) \ 66262709Sganbold bus_space_read_4((sc)->bst, (sc)->bsh, (reg)) 67262709Sganbold#define sramc_write_4(sc, reg, val) \ 68262709Sganbold bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val)) 69262709Sganbold 70262709Sganbold 71262709Sganboldstatic int 72262709Sganbolda10_sramc_probe(device_t dev) 73262709Sganbold{ 74262709Sganbold 75297689Sjmcneill if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-sram-controller")) { 76262709Sganbold device_set_desc(dev, "Allwinner sramc module"); 77262709Sganbold return (BUS_PROBE_DEFAULT); 78262709Sganbold } 79262709Sganbold 80262709Sganbold return (ENXIO); 81262709Sganbold} 82262709Sganbold 83262709Sganboldstatic int 84262709Sganbolda10_sramc_attach(device_t dev) 85262709Sganbold{ 86262709Sganbold struct a10_sramc_softc *sc = device_get_softc(dev); 87262709Sganbold int rid = 0; 88262709Sganbold 89262709Sganbold sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 90262709Sganbold if (!sc->res) { 91262709Sganbold device_printf(dev, "could not allocate resource\n"); 92262709Sganbold return (ENXIO); 93262709Sganbold } 94262709Sganbold 95262709Sganbold sc->bst = rman_get_bustag(sc->res); 96262709Sganbold sc->bsh = rman_get_bushandle(sc->res); 97262709Sganbold 98262709Sganbold a10_sramc_sc = sc; 99262709Sganbold 100262709Sganbold return (0); 101262709Sganbold} 102262709Sganbold 103262709Sganboldstatic device_method_t a10_sramc_methods[] = { 104262709Sganbold DEVMETHOD(device_probe, a10_sramc_probe), 105262709Sganbold DEVMETHOD(device_attach, a10_sramc_attach), 106262709Sganbold { 0, 0 } 107262709Sganbold}; 108262709Sganbold 109262709Sganboldstatic driver_t a10_sramc_driver = { 110262709Sganbold "a10_sramc", 111262709Sganbold a10_sramc_methods, 112262709Sganbold sizeof(struct a10_sramc_softc), 113262709Sganbold}; 114262709Sganbold 115262709Sganboldstatic devclass_t a10_sramc_devclass; 116262709Sganbold 117297703SjmcneillEARLY_DRIVER_MODULE(a10_sramc, simplebus, a10_sramc_driver, a10_sramc_devclass, 118297703Sjmcneill 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_EARLY); 119262709Sganbold 120262709Sganboldint 121262709Sganbolda10_map_to_emac(void) 122262709Sganbold{ 123262709Sganbold struct a10_sramc_softc *sc = a10_sramc_sc; 124262709Sganbold uint32_t reg_value; 125262709Sganbold 126262709Sganbold if (sc == NULL) 127262709Sganbold return (ENXIO); 128262709Sganbold 129262709Sganbold /* Map SRAM to EMAC, set bit 2 and 4. */ 130262709Sganbold reg_value = sramc_read_4(sc, SRAM_CTL1_CFG); 131262709Sganbold reg_value |= 0x5 << 2; 132262709Sganbold sramc_write_4(sc, SRAM_CTL1_CFG, reg_value); 133262709Sganbold 134262709Sganbold return (0); 135262709Sganbold} 136297703Sjmcneill 137297703Sjmcneillint 138297703Sjmcneilla10_map_to_otg(void) 139297703Sjmcneill{ 140297703Sjmcneill struct a10_sramc_softc *sc = a10_sramc_sc; 141297703Sjmcneill uint32_t reg_value; 142297703Sjmcneill 143297703Sjmcneill if (sc == NULL) 144297703Sjmcneill return (ENXIO); 145297703Sjmcneill 146297703Sjmcneill /* Map SRAM to OTG */ 147297703Sjmcneill reg_value = sramc_read_4(sc, SRAM_CTL1_CFG); 148297703Sjmcneill reg_value |= CTL1_CFG_SRAMD_MAP_USB0; 149297703Sjmcneill sramc_write_4(sc, SRAM_CTL1_CFG, reg_value); 150297703Sjmcneill 151297703Sjmcneill return (0); 152297703Sjmcneill} 153