machdep.c revision 93273
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 93273 2002-03-27 09:23:41Z jeff $ 39 */ 40 41#include "opt_atalk.h" 42#include "opt_compat.h" 43#include "opt_cpu.h" 44#include "opt_ddb.h" 45#include "opt_inet.h" 46#include "opt_ipx.h" 47#include "opt_isa.h" 48#include "opt_maxmem.h" 49#include "opt_msgbuf.h" 50#include "opt_npx.h" 51#include "opt_perfmon.h" 52#include "opt_kstack_pages.h" 53/* #include "opt_userconfig.h" */ 54 55#include <sys/param.h> 56#include <sys/systm.h> 57#include <sys/sysproto.h> 58#include <sys/signalvar.h> 59#include <sys/kernel.h> 60#include <sys/ktr.h> 61#include <sys/linker.h> 62#include <sys/lock.h> 63#include <sys/malloc.h> 64#include <sys/mutex.h> 65#include <sys/pcpu.h> 66#include <sys/proc.h> 67#include <sys/bio.h> 68#include <sys/buf.h> 69#include <sys/reboot.h> 70#include <sys/callout.h> 71#include <sys/msgbuf.h> 72#include <sys/sysent.h> 73#include <sys/sysctl.h> 74#include <sys/ucontext.h> 75#include <sys/vmmeter.h> 76#include <sys/bus.h> 77#include <sys/eventhandler.h> 78 79#include <vm/vm.h> 80#include <vm/vm_param.h> 81#include <sys/lock.h> 82#include <vm/vm_kern.h> 83#include <vm/vm_object.h> 84#include <vm/vm_page.h> 85#include <vm/vm_map.h> 86#include <vm/vm_pager.h> 87#include <vm/vm_extern.h> 88 89#include <sys/user.h> 90#include <sys/exec.h> 91#include <sys/cons.h> 92 93#include <ddb/ddb.h> 94 95#include <net/netisr.h> 96 97#include <machine/cpu.h> 98#include <machine/cputypes.h> 99#include <machine/reg.h> 100#include <machine/clock.h> 101#include <machine/specialreg.h> 102#include <machine/bootinfo.h> 103#include <machine/md_var.h> 104#include <machine/pc/bios.h> 105#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 106#include <machine/proc.h> 107#ifdef PERFMON 108#include <machine/perfmon.h> 109#endif 110#ifdef SMP 111#include <machine/privatespace.h> 112#include <machine/smp.h> 113#endif 114 115#include <i386/isa/icu.h> 116#include <i386/isa/intr_machdep.h> 117#include <isa/rtc.h> 118#include <machine/vm86.h> 119#include <sys/ptrace.h> 120#include <machine/sigframe.h> 121 122extern void init386(int first); 123extern void dblfault_handler(void); 124 125extern void printcpuinfo(void); /* XXX header file */ 126extern void earlysetcpuclass(void); /* same header file */ 127extern void finishidentcpu(void); 128extern void panicifcpuunsupported(void); 129extern void initializecpu(void); 130 131#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 132#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 133 134static void cpu_startup(void *); 135#ifdef CPU_ENABLE_SSE 136static void set_fpregs_xmm(struct save87 *, struct savexmm *); 137static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 138#endif /* CPU_ENABLE_SSE */ 139SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 140 141int _udatasel, _ucodesel; 142u_int atdevbase; 143 144#if defined(SWTCH_OPTIM_STATS) 145extern int swtch_optim_stats; 146SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 147 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 148SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 149 CTLFLAG_RD, &tlb_flush_count, 0, ""); 150#endif 151 152#ifdef PC98 153static int ispc98 = 1; 154#else 155static int ispc98 = 0; 156#endif 157SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 158 159int physmem = 0; 160int cold = 1; 161 162#ifdef COMPAT_43 163static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code); 164#endif 165 166static int 167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 168{ 169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 170 return (error); 171} 172 173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 174 0, 0, sysctl_hw_physmem, "IU", ""); 175 176static int 177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 178{ 179 int error = sysctl_handle_int(oidp, 0, 180 ctob(physmem - cnt.v_wire_count), req); 181 return (error); 182} 183 184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 185 0, 0, sysctl_hw_usermem, "IU", ""); 186 187static int 188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS) 189{ 190 int error = sysctl_handle_int(oidp, 0, 191 i386_btop(avail_end - avail_start), req); 192 return (error); 193} 194 195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 196 0, 0, sysctl_hw_availpages, "I", ""); 197 198int Maxmem = 0; 199long dumplo; 200 201vm_offset_t phys_avail[10]; 202 203/* must be 2 less so 0 0 can signal end of chunks */ 204#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 205 206struct kva_md_info kmi; 207 208static struct trapframe proc0_tf; 209#ifndef SMP 210static struct pcpu __pcpu; 211#endif 212 213struct mtx sched_lock; 214struct mtx Giant; 215struct mtx icu_lock; 216 217static void 218cpu_startup(dummy) 219 void *dummy; 220{ 221 /* 222 * Good {morning,afternoon,evening,night}. 223 */ 224 earlysetcpuclass(); 225 startrtclock(); 226 printcpuinfo(); 227 panicifcpuunsupported(); 228#ifdef PERFMON 229 perfmon_init(); 230#endif 231 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), 232 ptoa(Maxmem) / 1024); 233 /* 234 * Display any holes after the first chunk of extended memory. 235 */ 236 if (bootverbose) { 237 int indx; 238 239 printf("Physical memory chunk(s):\n"); 240 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 241 unsigned int size1; 242 243 size1 = phys_avail[indx + 1] - phys_avail[indx]; 244 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n", 245 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 246 size1 / PAGE_SIZE); 247 } 248 } 249 250 vm_ksubmap_init(&kmi); 251 252#if defined(USERCONFIG) 253 userconfig(); 254 cninit(); /* the preferred console may have changed */ 255#endif 256 257 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count), 258 ptoa(cnt.v_free_count) / 1024); 259 260 /* 261 * Set up buffers, so they can be used to read disk labels. 262 */ 263 bufinit(); 264 vm_pager_bufferinit(); 265 266#ifndef SMP 267 /* For SMP, we delay the cpu_setregs() until after SMP startup. */ 268 cpu_setregs(); 269#endif 270} 271 272/* 273 * Send an interrupt to process. 274 * 275 * Stack is set up to allow sigcode stored 276 * at top to call routine, followed by kcall 277 * to sigreturn routine below. After sigreturn 278 * resets the signal mask, the stack, and the 279 * frame pointer, it returns to the user 280 * specified pc, psl. 281 */ 282#ifdef COMPAT_43 283static void 284osendsig(catcher, sig, mask, code) 285 sig_t catcher; 286 int sig; 287 sigset_t *mask; 288 u_long code; 289{ 290 struct osigframe sf; 291 struct osigframe *fp; 292 struct proc *p; 293 struct thread *td; 294 struct sigacts *psp; 295 struct trapframe *regs; 296 int oonstack; 297 298 td = curthread; 299 p = td->td_proc; 300 PROC_LOCK_ASSERT(p, MA_OWNED); 301 psp = p->p_sigacts; 302 regs = td->td_frame; 303 oonstack = sigonstack(regs->tf_esp); 304 305 /* Allocate space for the signal handler context. */ 306 if ((p->p_flag & P_ALTSTACK) && !oonstack && 307 SIGISMEMBER(psp->ps_sigonstack, sig)) { 308 fp = (struct osigframe *)(p->p_sigstk.ss_sp + 309 p->p_sigstk.ss_size - sizeof(struct osigframe)); 310#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 311 p->p_sigstk.ss_flags |= SS_ONSTACK; 312#endif 313 } else 314 fp = (struct osigframe *)regs->tf_esp - 1; 315 PROC_UNLOCK(p); 316 317 /* Translate the signal if appropriate. */ 318 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 319 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 320 321 /* Build the argument list for the signal handler. */ 322 sf.sf_signum = sig; 323 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 324 PROC_LOCK(p); 325 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { 326 /* Signal handler installed with SA_SIGINFO. */ 327 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 328 sf.sf_siginfo.si_signo = sig; 329 sf.sf_siginfo.si_code = code; 330 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 331 } else { 332 /* Old FreeBSD-style arguments. */ 333 sf.sf_arg2 = code; 334 sf.sf_addr = regs->tf_err; 335 sf.sf_ahu.sf_handler = catcher; 336 } 337 PROC_UNLOCK(p); 338 339 /* Save most if not all of trap frame. */ 340 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 341 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 342 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 343 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 344 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 345 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 346 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 347 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 348 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 349 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 350 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 351 sf.sf_siginfo.si_sc.sc_gs = rgs(); 352 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 353 354 /* Build the signal context to be used by osigreturn(). */ 355 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 356 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 357 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 358 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 359 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 360 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 361 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 362 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 363 364 /* 365 * If we're a vm86 process, we want to save the segment registers. 366 * We also change eflags to be our emulated eflags, not the actual 367 * eflags. 368 */ 369 if (regs->tf_eflags & PSL_VM) { 370 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 371 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 372 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 373 374 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 375 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 376 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 377 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 378 379 if (vm86->vm86_has_vme == 0) 380 sf.sf_siginfo.si_sc.sc_ps = 381 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 382 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 383 384 /* See sendsig() for comments. */ 385 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 386 } 387 388 /* 389 * Copy the sigframe out to the user's stack. 390 */ 391 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 392#ifdef DEBUG 393 printf("process %ld has trashed its stack\n", (long)p->p_pid); 394#endif 395 PROC_LOCK(p); 396 sigexit(td, SIGILL); 397 } 398 399 regs->tf_esp = (int)fp; 400 regs->tf_eip = PS_STRINGS - szosigcode; 401 regs->tf_eflags &= ~PSL_T; 402 regs->tf_cs = _ucodesel; 403 regs->tf_ds = _udatasel; 404 regs->tf_es = _udatasel; 405 regs->tf_fs = _udatasel; 406 load_gs(_udatasel); 407 regs->tf_ss = _udatasel; 408 PROC_LOCK(p); 409} 410#endif /* COMPAT_43 */ 411 412void 413sendsig(catcher, sig, mask, code) 414 sig_t catcher; 415 int sig; 416 sigset_t *mask; 417 u_long code; 418{ 419 struct sigframe sf; 420 struct proc *p; 421 struct thread *td; 422 struct sigacts *psp; 423 struct trapframe *regs; 424 struct sigframe *sfp; 425 int oonstack; 426 427 td = curthread; 428 p = td->td_proc; 429 PROC_LOCK_ASSERT(p, MA_OWNED); 430 psp = p->p_sigacts; 431#ifdef COMPAT_43 432 if (SIGISMEMBER(psp->ps_osigset, sig)) { 433 osendsig(catcher, sig, mask, code); 434 return; 435 } 436#endif 437 regs = td->td_frame; 438 oonstack = sigonstack(regs->tf_esp); 439 440 /* Save user context. */ 441 bzero(&sf, sizeof(sf)); 442 sf.sf_uc.uc_sigmask = *mask; 443 sf.sf_uc.uc_stack = p->p_sigstk; 444 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 445 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 446 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 447 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 448 sf.sf_uc.uc_mcontext.mc_flags = __UC_MC_VALID; /* no FP regs */ 449 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 450 451 /* Allocate space for the signal handler context. */ 452 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 453 SIGISMEMBER(psp->ps_sigonstack, sig)) { 454 sfp = (struct sigframe *)(p->p_sigstk.ss_sp + 455 p->p_sigstk.ss_size - sizeof(struct sigframe)); 456#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 457 p->p_sigstk.ss_flags |= SS_ONSTACK; 458#endif 459 } else 460 sfp = (struct sigframe *)regs->tf_esp - 1; 461 PROC_UNLOCK(p); 462 463 /* Translate the signal if appropriate. */ 464 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 465 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 466 467 /* Build the argument list for the signal handler. */ 468 sf.sf_signum = sig; 469 sf.sf_ucontext = (register_t)&sfp->sf_uc; 470 PROC_LOCK(p); 471 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { 472 /* Signal handler installed with SA_SIGINFO. */ 473 sf.sf_siginfo = (register_t)&sfp->sf_si; 474 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 475 476 /* Fill siginfo structure. */ 477 sf.sf_si.si_signo = sig; 478 sf.sf_si.si_code = code; 479 sf.sf_si.si_addr = (void *)regs->tf_err; 480 } else { 481 /* Old FreeBSD-style arguments. */ 482 sf.sf_siginfo = code; 483 sf.sf_addr = regs->tf_err; 484 sf.sf_ahu.sf_handler = catcher; 485 } 486 PROC_UNLOCK(p); 487 488 /* 489 * If we're a vm86 process, we want to save the segment registers. 490 * We also change eflags to be our emulated eflags, not the actual 491 * eflags. 492 */ 493 if (regs->tf_eflags & PSL_VM) { 494 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 495 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 496 497 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 498 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 499 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 500 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 501 502 if (vm86->vm86_has_vme == 0) 503 sf.sf_uc.uc_mcontext.mc_eflags = 504 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 505 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 506 507 /* 508 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 509 * syscalls made by the signal handler. This just avoids 510 * wasting time for our lazy fixup of such faults. PSL_NT 511 * does nothing in vm86 mode, but vm86 programs can set it 512 * almost legitimately in probes for old cpu types. 513 */ 514 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 515 } 516 517 /* 518 * Copy the sigframe out to the user's stack. 519 */ 520 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 521#ifdef DEBUG 522 printf("process %ld has trashed its stack\n", (long)p->p_pid); 523#endif 524 PROC_LOCK(p); 525 sigexit(td, SIGILL); 526 } 527 528 regs->tf_esp = (int)sfp; 529 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 530 regs->tf_eflags &= ~PSL_T; 531 regs->tf_cs = _ucodesel; 532 regs->tf_ds = _udatasel; 533 regs->tf_es = _udatasel; 534 regs->tf_fs = _udatasel; 535 regs->tf_ss = _udatasel; 536 PROC_LOCK(p); 537} 538 539/* 540 * System call to cleanup state after a signal 541 * has been taken. Reset signal mask and 542 * stack state from context left by sendsig (above). 543 * Return to previous pc and psl as specified by 544 * context left by sendsig. Check carefully to 545 * make sure that the user has not modified the 546 * state to gain improper privileges. 547 */ 548int 549osigreturn(td, uap) 550 struct thread *td; 551 struct osigreturn_args /* { 552 struct osigcontext *sigcntxp; 553 } */ *uap; 554{ 555#ifdef COMPAT_43 556 struct trapframe *regs; 557 struct osigcontext *scp; 558 struct proc *p = td->td_proc; 559 int eflags; 560 561 regs = td->td_frame; 562 scp = uap->sigcntxp; 563 if (!useracc((caddr_t)scp, sizeof(*scp), VM_PROT_READ)) 564 return (EFAULT); 565 eflags = scp->sc_ps; 566 if (eflags & PSL_VM) { 567 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 568 struct vm86_kernel *vm86; 569 570 /* 571 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 572 * set up the vm86 area, and we can't enter vm86 mode. 573 */ 574 if (td->td_pcb->pcb_ext == 0) 575 return (EINVAL); 576 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 577 if (vm86->vm86_inited == 0) 578 return (EINVAL); 579 580 /* Go back to user mode if both flags are set. */ 581 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 582 trapsignal(p, SIGBUS, 0); 583 584 if (vm86->vm86_has_vme) { 585 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 586 (eflags & VME_USERCHANGE) | PSL_VM; 587 } else { 588 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 589 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 590 (eflags & VM_USERCHANGE) | PSL_VM; 591 } 592 tf->tf_vm86_ds = scp->sc_ds; 593 tf->tf_vm86_es = scp->sc_es; 594 tf->tf_vm86_fs = scp->sc_fs; 595 tf->tf_vm86_gs = scp->sc_gs; 596 tf->tf_ds = _udatasel; 597 tf->tf_es = _udatasel; 598 tf->tf_fs = _udatasel; 599 } else { 600 /* 601 * Don't allow users to change privileged or reserved flags. 602 */ 603 /* 604 * XXX do allow users to change the privileged flag PSL_RF. 605 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 606 * should sometimes set it there too. tf_eflags is kept in 607 * the signal context during signal handling and there is no 608 * other place to remember it, so the PSL_RF bit may be 609 * corrupted by the signal handler without us knowing. 610 * Corruption of the PSL_RF bit at worst causes one more or 611 * one less debugger trap, so allowing it is fairly harmless. 612 */ 613 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 614 return (EINVAL); 615 } 616 617 /* 618 * Don't allow users to load a valid privileged %cs. Let the 619 * hardware check for invalid selectors, excess privilege in 620 * other selectors, invalid %eip's and invalid %esp's. 621 */ 622 if (!CS_SECURE(scp->sc_cs)) { 623 trapsignal(p, SIGBUS, T_PROTFLT); 624 return (EINVAL); 625 } 626 regs->tf_ds = scp->sc_ds; 627 regs->tf_es = scp->sc_es; 628 regs->tf_fs = scp->sc_fs; 629 } 630 631 /* Restore remaining registers. */ 632 regs->tf_eax = scp->sc_eax; 633 regs->tf_ebx = scp->sc_ebx; 634 regs->tf_ecx = scp->sc_ecx; 635 regs->tf_edx = scp->sc_edx; 636 regs->tf_esi = scp->sc_esi; 637 regs->tf_edi = scp->sc_edi; 638 regs->tf_cs = scp->sc_cs; 639 regs->tf_ss = scp->sc_ss; 640 regs->tf_isp = scp->sc_isp; 641 642 PROC_LOCK(p); 643#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 644 if (scp->sc_onstack & 1) 645 p->p_sigstk.ss_flags |= SS_ONSTACK; 646 else 647 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 648#endif 649 650 SIGSETOLD(p->p_sigmask, scp->sc_mask); 651 SIG_CANTMASK(p->p_sigmask); 652 PROC_UNLOCK(p); 653 regs->tf_ebp = scp->sc_fp; 654 regs->tf_esp = scp->sc_sp; 655 regs->tf_eip = scp->sc_pc; 656 regs->tf_eflags = eflags; 657 return (EJUSTRETURN); 658#else /* !COMPAT_43 */ 659 return (ENOSYS); 660#endif /* COMPAT_43 */ 661} 662 663int 664sigreturn(td, uap) 665 struct thread *td; 666 struct sigreturn_args /* { 667 const __ucontext *sigcntxp; 668 } */ *uap; 669{ 670 struct proc *p = td->td_proc; 671 struct trapframe *regs; 672 const ucontext_t *ucp; 673 int cs, eflags; 674 675 ucp = uap->sigcntxp; 676 if (!useracc((caddr_t)(uintptr_t)ucp, sizeof(*ucp), VM_PROT_READ)) 677 return (EFAULT); 678 regs = td->td_frame; 679 eflags = ucp->uc_mcontext.mc_eflags; 680 if (eflags & PSL_VM) { 681 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 682 struct vm86_kernel *vm86; 683 684 /* 685 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 686 * set up the vm86 area, and we can't enter vm86 mode. 687 */ 688 if (td->td_pcb->pcb_ext == 0) 689 return (EINVAL); 690 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 691 if (vm86->vm86_inited == 0) 692 return (EINVAL); 693 694 /* Go back to user mode if both flags are set. */ 695 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 696 trapsignal(p, SIGBUS, 0); 697 698 if (vm86->vm86_has_vme) { 699 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 700 (eflags & VME_USERCHANGE) | PSL_VM; 701 } else { 702 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 703 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 704 (eflags & VM_USERCHANGE) | PSL_VM; 705 } 706 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 707 tf->tf_eflags = eflags; 708 tf->tf_vm86_ds = tf->tf_ds; 709 tf->tf_vm86_es = tf->tf_es; 710 tf->tf_vm86_fs = tf->tf_fs; 711 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 712 tf->tf_ds = _udatasel; 713 tf->tf_es = _udatasel; 714 tf->tf_fs = _udatasel; 715 } else { 716 /* 717 * Don't allow users to change privileged or reserved flags. 718 */ 719 /* 720 * XXX do allow users to change the privileged flag PSL_RF. 721 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 722 * should sometimes set it there too. tf_eflags is kept in 723 * the signal context during signal handling and there is no 724 * other place to remember it, so the PSL_RF bit may be 725 * corrupted by the signal handler without us knowing. 726 * Corruption of the PSL_RF bit at worst causes one more or 727 * one less debugger trap, so allowing it is fairly harmless. 728 */ 729 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 730 printf("sigreturn: eflags = 0x%x\n", eflags); 731 return (EINVAL); 732 } 733 734 /* 735 * Don't allow users to load a valid privileged %cs. Let the 736 * hardware check for invalid selectors, excess privilege in 737 * other selectors, invalid %eip's and invalid %esp's. 738 */ 739 cs = ucp->uc_mcontext.mc_cs; 740 if (!CS_SECURE(cs)) { 741 printf("sigreturn: cs = 0x%x\n", cs); 742 trapsignal(p, SIGBUS, T_PROTFLT); 743 return (EINVAL); 744 } 745 746 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 747 } 748 749 PROC_LOCK(p); 750#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 751 if (ucp->uc_mcontext.mc_onstack & 1) 752 p->p_sigstk.ss_flags |= SS_ONSTACK; 753 else 754 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 755#endif 756 757 p->p_sigmask = ucp->uc_sigmask; 758 SIG_CANTMASK(p->p_sigmask); 759 PROC_UNLOCK(p); 760 return (EJUSTRETURN); 761} 762 763/* 764 * Machine dependent boot() routine 765 * 766 * I haven't seen anything to put here yet 767 * Possibly some stuff might be grafted back here from boot() 768 */ 769void 770cpu_boot(int howto) 771{ 772} 773 774/* 775 * Shutdown the CPU as much as possible 776 */ 777void 778cpu_halt(void) 779{ 780 for (;;) 781 __asm__ ("hlt"); 782} 783 784/* 785 * Hook to idle the CPU when possible. This currently only works in 786 * the !SMP case, as there is no clean way to ensure that a CPU will be 787 * woken when there is work available for it. 788 */ 789static int cpu_idle_hlt = 1; 790SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 791 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 792 793/* 794 * Note that we have to be careful here to avoid a race between checking 795 * procrunnable() and actually halting. If we don't do this, we may waste 796 * the time between calling hlt and the next interrupt even though there 797 * is a runnable process. 798 */ 799void 800cpu_idle(void) 801{ 802#ifndef SMP 803 if (cpu_idle_hlt) { 804 disable_intr(); 805 if (procrunnable()) { 806 enable_intr(); 807 } else { 808 /* 809 * we must absolutely guarentee that hlt is the 810 * absolute next instruction after sti or we 811 * introduce a timing window. 812 */ 813 __asm __volatile("sti; hlt"); 814 } 815 } 816#endif 817} 818 819/* 820 * Clear registers on exec 821 */ 822void 823setregs(td, entry, stack, ps_strings) 824 struct thread *td; 825 u_long entry; 826 u_long stack; 827 u_long ps_strings; 828{ 829 struct trapframe *regs = td->td_frame; 830 struct pcb *pcb = td->td_pcb; 831 832 if (td->td_proc->p_md.md_ldt) 833 user_ldt_free(td); 834 835 bzero((char *)regs, sizeof(struct trapframe)); 836 regs->tf_eip = entry; 837 regs->tf_esp = stack; 838 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 839 regs->tf_ss = _udatasel; 840 regs->tf_ds = _udatasel; 841 regs->tf_es = _udatasel; 842 regs->tf_fs = _udatasel; 843 regs->tf_cs = _ucodesel; 844 845 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 846 regs->tf_ebx = ps_strings; 847 848 /* reset %gs as well */ 849 if (pcb == PCPU_GET(curpcb)) 850 load_gs(_udatasel); 851 else 852 pcb->pcb_gs = _udatasel; 853 854 /* 855 * Reset the hardware debug registers if they were in use. 856 * They won't have any meaning for the newly exec'd process. 857 */ 858 if (pcb->pcb_flags & PCB_DBREGS) { 859 pcb->pcb_dr0 = 0; 860 pcb->pcb_dr1 = 0; 861 pcb->pcb_dr2 = 0; 862 pcb->pcb_dr3 = 0; 863 pcb->pcb_dr6 = 0; 864 pcb->pcb_dr7 = 0; 865 if (pcb == PCPU_GET(curpcb)) { 866 /* 867 * Clear the debug registers on the running 868 * CPU, otherwise they will end up affecting 869 * the next process we switch to. 870 */ 871 reset_dbregs(); 872 } 873 pcb->pcb_flags &= ~PCB_DBREGS; 874 } 875 876 /* 877 * Initialize the math emulator (if any) for the current process. 878 * Actually, just clear the bit that says that the emulator has 879 * been initialized. Initialization is delayed until the process 880 * traps to the emulator (if it is done at all) mainly because 881 * emulators don't provide an entry point for initialization. 882 */ 883 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 884 885 /* 886 * Arrange to trap the next npx or `fwait' instruction (see npx.c 887 * for why fwait must be trapped at least if there is an npx or an 888 * emulator). This is mainly to handle the case where npx0 is not 889 * configured, since the npx routines normally set up the trap 890 * otherwise. It should be done only at boot time, but doing it 891 * here allows modifying `npx_exists' for testing the emulator on 892 * systems with an npx. 893 */ 894 load_cr0(rcr0() | CR0_MP | CR0_TS); 895 896#ifdef DEV_NPX 897 /* Initialize the npx (if any) for the current process. */ 898 npxinit(__INITIAL_NPXCW__); 899#endif 900 901 /* 902 * XXX - Linux emulator 903 * Make sure sure edx is 0x0 on entry. Linux binaries depend 904 * on it. 905 */ 906 td->td_retval[1] = 0; 907} 908 909void 910cpu_setregs(void) 911{ 912 unsigned int cr0; 913 914 cr0 = rcr0(); 915#ifdef SMP 916 cr0 |= CR0_NE; /* Done by npxinit() */ 917#endif 918 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 919#ifndef I386_CPU 920 cr0 |= CR0_WP | CR0_AM; 921#endif 922 load_cr0(cr0); 923 load_gs(_udatasel); 924} 925 926static int 927sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 928{ 929 int error; 930 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 931 req); 932 if (!error && req->newptr) 933 resettodr(); 934 return (error); 935} 936 937SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 938 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 939 940SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 941 CTLFLAG_RW, &disable_rtc_set, 0, ""); 942 943SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 944 CTLFLAG_RD, &bootinfo, bootinfo, ""); 945 946SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 947 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 948 949u_long bootdev; /* not a dev_t - encoding is different */ 950SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 951 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in dev_t format)"); 952 953/* 954 * Initialize 386 and configure to run kernel 955 */ 956 957/* 958 * Initialize segments & interrupt table 959 */ 960 961int _default_ldt; 962union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 963static struct gate_descriptor idt0[NIDT]; 964struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 965union descriptor ldt[NLDT]; /* local descriptor table */ 966#ifdef SMP 967/* table descriptors - used to load tables by microp */ 968struct region_descriptor r_gdt, r_idt; 969#endif 970 971int private_tss; /* flag indicating private tss */ 972 973#if defined(I586_CPU) && !defined(NO_F00F_HACK) 974extern int has_f00f_bug; 975#endif 976 977static struct i386tss dblfault_tss; 978static char dblfault_stack[PAGE_SIZE]; 979 980extern struct user *proc0uarea; 981extern vm_offset_t proc0kstack; 982 983 984/* software prototypes -- in more palatable form */ 985struct soft_segment_descriptor gdt_segs[] = { 986/* GNULL_SEL 0 Null Descriptor */ 987{ 0x0, /* segment base address */ 988 0x0, /* length */ 989 0, /* segment type */ 990 0, /* segment descriptor priority level */ 991 0, /* segment descriptor present */ 992 0, 0, 993 0, /* default 32 vs 16 bit size */ 994 0 /* limit granularity (byte/page units)*/ }, 995/* GCODE_SEL 1 Code Descriptor for kernel */ 996{ 0x0, /* segment base address */ 997 0xfffff, /* length - all address space */ 998 SDT_MEMERA, /* segment type */ 999 0, /* segment descriptor priority level */ 1000 1, /* segment descriptor present */ 1001 0, 0, 1002 1, /* default 32 vs 16 bit size */ 1003 1 /* limit granularity (byte/page units)*/ }, 1004/* GDATA_SEL 2 Data Descriptor for kernel */ 1005{ 0x0, /* segment base address */ 1006 0xfffff, /* length - all address space */ 1007 SDT_MEMRWA, /* segment type */ 1008 0, /* segment descriptor priority level */ 1009 1, /* segment descriptor present */ 1010 0, 0, 1011 1, /* default 32 vs 16 bit size */ 1012 1 /* limit granularity (byte/page units)*/ }, 1013/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */ 1014{ 0x0, /* segment base address */ 1015 0xfffff, /* length - all address space */ 1016 SDT_MEMRWA, /* segment type */ 1017 0, /* segment descriptor priority level */ 1018 1, /* segment descriptor present */ 1019 0, 0, 1020 1, /* default 32 vs 16 bit size */ 1021 1 /* limit granularity (byte/page units)*/ }, 1022/* GPROC0_SEL 4 Proc 0 Tss Descriptor */ 1023{ 1024 0x0, /* segment base address */ 1025 sizeof(struct i386tss)-1,/* length - all address space */ 1026 SDT_SYS386TSS, /* segment type */ 1027 0, /* segment descriptor priority level */ 1028 1, /* segment descriptor present */ 1029 0, 0, 1030 0, /* unused - default 32 vs 16 bit size */ 1031 0 /* limit granularity (byte/page units)*/ }, 1032/* GLDT_SEL 5 LDT Descriptor */ 1033{ (int) ldt, /* segment base address */ 1034 sizeof(ldt)-1, /* length - all address space */ 1035 SDT_SYSLDT, /* segment type */ 1036 SEL_UPL, /* segment descriptor priority level */ 1037 1, /* segment descriptor present */ 1038 0, 0, 1039 0, /* unused - default 32 vs 16 bit size */ 1040 0 /* limit granularity (byte/page units)*/ }, 1041/* GUSERLDT_SEL 6 User LDT Descriptor per process */ 1042{ (int) ldt, /* segment base address */ 1043 (512 * sizeof(union descriptor)-1), /* length */ 1044 SDT_SYSLDT, /* segment type */ 1045 0, /* segment descriptor priority level */ 1046 1, /* segment descriptor present */ 1047 0, 0, 1048 0, /* unused - default 32 vs 16 bit size */ 1049 0 /* limit granularity (byte/page units)*/ }, 1050/* GTGATE_SEL 7 Null Descriptor - Placeholder */ 1051{ 0x0, /* segment base address */ 1052 0x0, /* length - all address space */ 1053 0, /* segment type */ 1054 0, /* segment descriptor priority level */ 1055 0, /* segment descriptor present */ 1056 0, 0, 1057 0, /* default 32 vs 16 bit size */ 1058 0 /* limit granularity (byte/page units)*/ }, 1059/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1060{ 0x400, /* segment base address */ 1061 0xfffff, /* length */ 1062 SDT_MEMRWA, /* segment type */ 1063 0, /* segment descriptor priority level */ 1064 1, /* segment descriptor present */ 1065 0, 0, 1066 1, /* default 32 vs 16 bit size */ 1067 1 /* limit granularity (byte/page units)*/ }, 1068/* GPANIC_SEL 9 Panic Tss Descriptor */ 1069{ (int) &dblfault_tss, /* segment base address */ 1070 sizeof(struct i386tss)-1,/* length - all address space */ 1071 SDT_SYS386TSS, /* segment type */ 1072 0, /* segment descriptor priority level */ 1073 1, /* segment descriptor present */ 1074 0, 0, 1075 0, /* unused - default 32 vs 16 bit size */ 1076 0 /* limit granularity (byte/page units)*/ }, 1077/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */ 1078{ 0, /* segment base address (overwritten) */ 1079 0xfffff, /* length */ 1080 SDT_MEMERA, /* segment type */ 1081 0, /* segment descriptor priority level */ 1082 1, /* segment descriptor present */ 1083 0, 0, 1084 0, /* default 32 vs 16 bit size */ 1085 1 /* limit granularity (byte/page units)*/ }, 1086/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */ 1087{ 0, /* segment base address (overwritten) */ 1088 0xfffff, /* length */ 1089 SDT_MEMERA, /* segment type */ 1090 0, /* segment descriptor priority level */ 1091 1, /* segment descriptor present */ 1092 0, 0, 1093 0, /* default 32 vs 16 bit size */ 1094 1 /* limit granularity (byte/page units)*/ }, 1095/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */ 1096{ 0, /* segment base address (overwritten) */ 1097 0xfffff, /* length */ 1098 SDT_MEMRWA, /* segment type */ 1099 0, /* segment descriptor priority level */ 1100 1, /* segment descriptor present */ 1101 0, 0, 1102 1, /* default 32 vs 16 bit size */ 1103 1 /* limit granularity (byte/page units)*/ }, 1104/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */ 1105{ 0, /* segment base address (overwritten) */ 1106 0xfffff, /* length */ 1107 SDT_MEMRWA, /* segment type */ 1108 0, /* segment descriptor priority level */ 1109 1, /* segment descriptor present */ 1110 0, 0, 1111 0, /* default 32 vs 16 bit size */ 1112 1 /* limit granularity (byte/page units)*/ }, 1113/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */ 1114{ 0, /* segment base address (overwritten) */ 1115 0xfffff, /* length */ 1116 SDT_MEMRWA, /* segment type */ 1117 0, /* segment descriptor priority level */ 1118 1, /* segment descriptor present */ 1119 0, 0, 1120 0, /* default 32 vs 16 bit size */ 1121 1 /* limit granularity (byte/page units)*/ }, 1122}; 1123 1124static struct soft_segment_descriptor ldt_segs[] = { 1125 /* Null Descriptor - overwritten by call gate */ 1126{ 0x0, /* segment base address */ 1127 0x0, /* length - all address space */ 1128 0, /* segment type */ 1129 0, /* segment descriptor priority level */ 1130 0, /* segment descriptor present */ 1131 0, 0, 1132 0, /* default 32 vs 16 bit size */ 1133 0 /* limit granularity (byte/page units)*/ }, 1134 /* Null Descriptor - overwritten by call gate */ 1135{ 0x0, /* segment base address */ 1136 0x0, /* length - all address space */ 1137 0, /* segment type */ 1138 0, /* segment descriptor priority level */ 1139 0, /* segment descriptor present */ 1140 0, 0, 1141 0, /* default 32 vs 16 bit size */ 1142 0 /* limit granularity (byte/page units)*/ }, 1143 /* Null Descriptor - overwritten by call gate */ 1144{ 0x0, /* segment base address */ 1145 0x0, /* length - all address space */ 1146 0, /* segment type */ 1147 0, /* segment descriptor priority level */ 1148 0, /* segment descriptor present */ 1149 0, 0, 1150 0, /* default 32 vs 16 bit size */ 1151 0 /* limit granularity (byte/page units)*/ }, 1152 /* Code Descriptor for user */ 1153{ 0x0, /* segment base address */ 1154 0xfffff, /* length - all address space */ 1155 SDT_MEMERA, /* segment type */ 1156 SEL_UPL, /* segment descriptor priority level */ 1157 1, /* segment descriptor present */ 1158 0, 0, 1159 1, /* default 32 vs 16 bit size */ 1160 1 /* limit granularity (byte/page units)*/ }, 1161 /* Null Descriptor - overwritten by call gate */ 1162{ 0x0, /* segment base address */ 1163 0x0, /* length - all address space */ 1164 0, /* segment type */ 1165 0, /* segment descriptor priority level */ 1166 0, /* segment descriptor present */ 1167 0, 0, 1168 0, /* default 32 vs 16 bit size */ 1169 0 /* limit granularity (byte/page units)*/ }, 1170 /* Data Descriptor for user */ 1171{ 0x0, /* segment base address */ 1172 0xfffff, /* length - all address space */ 1173 SDT_MEMRWA, /* segment type */ 1174 SEL_UPL, /* segment descriptor priority level */ 1175 1, /* segment descriptor present */ 1176 0, 0, 1177 1, /* default 32 vs 16 bit size */ 1178 1 /* limit granularity (byte/page units)*/ }, 1179}; 1180 1181void 1182setidt(idx, func, typ, dpl, selec) 1183 int idx; 1184 inthand_t *func; 1185 int typ; 1186 int dpl; 1187 int selec; 1188{ 1189 struct gate_descriptor *ip; 1190 1191 ip = idt + idx; 1192 ip->gd_looffset = (int)func; 1193 ip->gd_selector = selec; 1194 ip->gd_stkcpy = 0; 1195 ip->gd_xx = 0; 1196 ip->gd_type = typ; 1197 ip->gd_dpl = dpl; 1198 ip->gd_p = 1; 1199 ip->gd_hioffset = ((int)func)>>16 ; 1200} 1201 1202#define IDTVEC(name) __CONCAT(X,name) 1203 1204extern inthand_t 1205 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1206 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1207 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1208 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1209 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1210 1211void 1212sdtossd(sd, ssd) 1213 struct segment_descriptor *sd; 1214 struct soft_segment_descriptor *ssd; 1215{ 1216 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1217 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1218 ssd->ssd_type = sd->sd_type; 1219 ssd->ssd_dpl = sd->sd_dpl; 1220 ssd->ssd_p = sd->sd_p; 1221 ssd->ssd_def32 = sd->sd_def32; 1222 ssd->ssd_gran = sd->sd_gran; 1223} 1224 1225#define PHYSMAP_SIZE (2 * 8) 1226 1227/* 1228 * Populate the (physmap) array with base/bound pairs describing the 1229 * available physical memory in the system, then test this memory and 1230 * build the phys_avail array describing the actually-available memory. 1231 * 1232 * If we cannot accurately determine the physical memory map, then use 1233 * value from the 0xE801 call, and failing that, the RTC. 1234 * 1235 * Total memory size may be set by the kernel environment variable 1236 * hw.physmem or the compile-time define MAXMEM. 1237 */ 1238static void 1239getmemsize(int first) 1240{ 1241 int i, physmap_idx, pa_indx; 1242 u_int basemem, extmem; 1243 struct vm86frame vmf; 1244 struct vm86context vmc; 1245 vm_offset_t pa, physmap[PHYSMAP_SIZE]; 1246 pt_entry_t *pte; 1247 const char *cp; 1248 struct bios_smap *smap; 1249 1250 bzero(&vmf, sizeof(struct vm86frame)); 1251 bzero(physmap, sizeof(physmap)); 1252 1253 /* 1254 * Perform "base memory" related probes & setup 1255 */ 1256 vm86_intcall(0x12, &vmf); 1257 basemem = vmf.vmf_ax; 1258 if (basemem > 640) { 1259 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1260 basemem); 1261 basemem = 640; 1262 } 1263 1264 /* 1265 * XXX if biosbasemem is now < 640, there is a `hole' 1266 * between the end of base memory and the start of 1267 * ISA memory. The hole may be empty or it may 1268 * contain BIOS code or data. Map it read/write so 1269 * that the BIOS can write to it. (Memory from 0 to 1270 * the physical end of the kernel is mapped read-only 1271 * to begin with and then parts of it are remapped. 1272 * The parts that aren't remapped form holes that 1273 * remain read-only and are unused by the kernel. 1274 * The base memory area is below the physical end of 1275 * the kernel and right now forms a read-only hole. 1276 * The part of it from PAGE_SIZE to 1277 * (trunc_page(biosbasemem * 1024) - 1) will be 1278 * remapped and used by the kernel later.) 1279 * 1280 * This code is similar to the code used in 1281 * pmap_mapdev, but since no memory needs to be 1282 * allocated we simply change the mapping. 1283 */ 1284 for (pa = trunc_page(basemem * 1024); 1285 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1286 pte = vtopte(pa + KERNBASE); 1287 *pte = pa | PG_RW | PG_V; 1288 } 1289 1290 /* 1291 * if basemem != 640, map pages r/w into vm86 page table so 1292 * that the bios can scribble on it. 1293 */ 1294 pte = (pt_entry_t *)vm86paddr; 1295 for (i = basemem / 4; i < 160; i++) 1296 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1297 1298 /* 1299 * map page 1 R/W into the kernel page table so we can use it 1300 * as a buffer. The kernel will unmap this page later. 1301 */ 1302 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT)); 1303 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V; 1304 1305 /* 1306 * get memory map with INT 15:E820 1307 */ 1308 vmc.npages = 0; 1309 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1310 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1311 1312 physmap_idx = 0; 1313 vmf.vmf_ebx = 0; 1314 do { 1315 vmf.vmf_eax = 0xE820; 1316 vmf.vmf_edx = SMAP_SIG; 1317 vmf.vmf_ecx = sizeof(struct bios_smap); 1318 i = vm86_datacall(0x15, &vmf, &vmc); 1319 if (i || vmf.vmf_eax != SMAP_SIG) 1320 break; 1321 if (boothowto & RB_VERBOSE) 1322 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n", 1323 smap->type, 1324 *(u_int32_t *)((char *)&smap->base + 4), 1325 (u_int32_t)smap->base, 1326 *(u_int32_t *)((char *)&smap->length + 4), 1327 (u_int32_t)smap->length); 1328 1329 if (smap->type != 0x01) 1330 goto next_run; 1331 1332 if (smap->length == 0) 1333 goto next_run; 1334 1335 if (smap->base >= 0xffffffff) { 1336 printf("%uK of memory above 4GB ignored\n", 1337 (u_int)(smap->length / 1024)); 1338 goto next_run; 1339 } 1340 1341 for (i = 0; i <= physmap_idx; i += 2) { 1342 if (smap->base < physmap[i + 1]) { 1343 if (boothowto & RB_VERBOSE) 1344 printf( 1345 "Overlapping or non-montonic memory region, ignoring second region\n"); 1346 goto next_run; 1347 } 1348 } 1349 1350 if (smap->base == physmap[physmap_idx + 1]) { 1351 physmap[physmap_idx + 1] += smap->length; 1352 goto next_run; 1353 } 1354 1355 physmap_idx += 2; 1356 if (physmap_idx == PHYSMAP_SIZE) { 1357 printf( 1358 "Too many segments in the physical address map, giving up\n"); 1359 break; 1360 } 1361 physmap[physmap_idx] = smap->base; 1362 physmap[physmap_idx + 1] = smap->base + smap->length; 1363next_run: 1364 } while (vmf.vmf_ebx != 0); 1365 1366 if (physmap[1] != 0) 1367 goto physmap_done; 1368 1369 /* 1370 * If we failed above, try memory map with INT 15:E801 1371 */ 1372 vmf.vmf_ax = 0xE801; 1373 if (vm86_intcall(0x15, &vmf) == 0) { 1374 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1375 } else { 1376#if 0 1377 vmf.vmf_ah = 0x88; 1378 vm86_intcall(0x15, &vmf); 1379 extmem = vmf.vmf_ax; 1380#else 1381 /* 1382 * Prefer the RTC value for extended memory. 1383 */ 1384 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1385#endif 1386 } 1387 1388 /* 1389 * Special hack for chipsets that still remap the 384k hole when 1390 * there's 16MB of memory - this really confuses people that 1391 * are trying to use bus mastering ISA controllers with the 1392 * "16MB limit"; they only have 16MB, but the remapping puts 1393 * them beyond the limit. 1394 * 1395 * If extended memory is between 15-16MB (16-17MB phys address range), 1396 * chop it to 15MB. 1397 */ 1398 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1399 extmem = 15 * 1024; 1400 1401 physmap[0] = 0; 1402 physmap[1] = basemem * 1024; 1403 physmap_idx = 2; 1404 physmap[physmap_idx] = 0x100000; 1405 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1406 1407physmap_done: 1408 /* 1409 * Now, physmap contains a map of physical memory. 1410 */ 1411 1412#ifdef SMP 1413 /* make hole for AP bootstrap code */ 1414 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1415 1416 /* look for the MP hardware - needed for apic addresses */ 1417 i386_mp_probe(); 1418#endif 1419 1420 /* 1421 * Maxmem isn't the "maximum memory", it's one larger than the 1422 * highest page of the physical address space. It should be 1423 * called something like "Maxphyspage". We may adjust this 1424 * based on ``hw.physmem'' and the results of the memory test. 1425 */ 1426 Maxmem = atop(physmap[physmap_idx + 1]); 1427 1428#ifdef MAXMEM 1429 Maxmem = MAXMEM / 4; 1430#endif 1431 1432 /* 1433 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 1434 * for the appropriate modifiers. This overrides MAXMEM. 1435 */ 1436 if ((cp = getenv("hw.physmem")) != NULL) { 1437 u_int64_t AllowMem, sanity; 1438 char *ep; 1439 1440 sanity = AllowMem = strtouq(cp, &ep, 0); 1441 if ((ep != cp) && (*ep != 0)) { 1442 switch(*ep) { 1443 case 'g': 1444 case 'G': 1445 AllowMem <<= 10; 1446 case 'm': 1447 case 'M': 1448 AllowMem <<= 10; 1449 case 'k': 1450 case 'K': 1451 AllowMem <<= 10; 1452 break; 1453 default: 1454 AllowMem = sanity = 0; 1455 } 1456 if (AllowMem < sanity) 1457 AllowMem = 0; 1458 } 1459 if (AllowMem == 0) 1460 printf("Ignoring invalid memory size of '%s'\n", cp); 1461 else 1462 Maxmem = atop(AllowMem); 1463 } 1464 1465 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1466 (boothowto & RB_VERBOSE)) 1467 printf("Physical memory use set to %uK\n", Maxmem * 4); 1468 1469 /* 1470 * If Maxmem has been increased beyond what the system has detected, 1471 * extend the last memory segment to the new limit. 1472 */ 1473 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1474 physmap[physmap_idx + 1] = ptoa(Maxmem); 1475 1476 /* call pmap initialization to make new kernel address space */ 1477 pmap_bootstrap(first, 0); 1478 1479 /* 1480 * Size up each available chunk of physical memory. 1481 */ 1482 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1483 pa_indx = 0; 1484 phys_avail[pa_indx++] = physmap[0]; 1485 phys_avail[pa_indx] = physmap[0]; 1486#if 0 1487 pte = vtopte(KERNBASE); 1488#else 1489 pte = CMAP1; 1490#endif 1491 1492 /* 1493 * physmap is in bytes, so when converting to page boundaries, 1494 * round up the start address and round down the end address. 1495 */ 1496 for (i = 0; i <= physmap_idx; i += 2) { 1497 vm_offset_t end; 1498 1499 end = ptoa(Maxmem); 1500 if (physmap[i + 1] < end) 1501 end = trunc_page(physmap[i + 1]); 1502 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1503 int tmp, page_bad; 1504#if 0 1505 int *ptr = 0; 1506#else 1507 int *ptr = (int *)CADDR1; 1508#endif 1509 1510 /* 1511 * block out kernel memory as not available. 1512 */ 1513 if (pa >= 0x100000 && pa < first) 1514 continue; 1515 1516 page_bad = FALSE; 1517 1518 /* 1519 * map page into kernel: valid, read/write,non-cacheable 1520 */ 1521 *pte = pa | PG_V | PG_RW | PG_N; 1522 invltlb(); 1523 1524 tmp = *(int *)ptr; 1525 /* 1526 * Test for alternating 1's and 0's 1527 */ 1528 *(volatile int *)ptr = 0xaaaaaaaa; 1529 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1530 page_bad = TRUE; 1531 } 1532 /* 1533 * Test for alternating 0's and 1's 1534 */ 1535 *(volatile int *)ptr = 0x55555555; 1536 if (*(volatile int *)ptr != 0x55555555) { 1537 page_bad = TRUE; 1538 } 1539 /* 1540 * Test for all 1's 1541 */ 1542 *(volatile int *)ptr = 0xffffffff; 1543 if (*(volatile int *)ptr != 0xffffffff) { 1544 page_bad = TRUE; 1545 } 1546 /* 1547 * Test for all 0's 1548 */ 1549 *(volatile int *)ptr = 0x0; 1550 if (*(volatile int *)ptr != 0x0) { 1551 page_bad = TRUE; 1552 } 1553 /* 1554 * Restore original value. 1555 */ 1556 *(int *)ptr = tmp; 1557 1558 /* 1559 * Adjust array of valid/good pages. 1560 */ 1561 if (page_bad == TRUE) { 1562 continue; 1563 } 1564 /* 1565 * If this good page is a continuation of the 1566 * previous set of good pages, then just increase 1567 * the end pointer. Otherwise start a new chunk. 1568 * Note that "end" points one higher than end, 1569 * making the range >= start and < end. 1570 * If we're also doing a speculative memory 1571 * test and we at or past the end, bump up Maxmem 1572 * so that we keep going. The first bad page 1573 * will terminate the loop. 1574 */ 1575 if (phys_avail[pa_indx] == pa) { 1576 phys_avail[pa_indx] += PAGE_SIZE; 1577 } else { 1578 pa_indx++; 1579 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1580 printf( 1581 "Too many holes in the physical address space, giving up\n"); 1582 pa_indx--; 1583 break; 1584 } 1585 phys_avail[pa_indx++] = pa; /* start */ 1586 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1587 } 1588 physmem++; 1589 } 1590 } 1591 *pte = 0; 1592 invltlb(); 1593 1594 /* 1595 * XXX 1596 * The last chunk must contain at least one page plus the message 1597 * buffer to avoid complicating other code (message buffer address 1598 * calculation, etc.). 1599 */ 1600 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1601 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1602 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1603 phys_avail[pa_indx--] = 0; 1604 phys_avail[pa_indx--] = 0; 1605 } 1606 1607 Maxmem = atop(phys_avail[pa_indx]); 1608 1609 /* Trim off space for the message buffer. */ 1610 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1611 1612 avail_end = phys_avail[pa_indx]; 1613} 1614 1615void 1616init386(first) 1617 int first; 1618{ 1619 struct gate_descriptor *gdp; 1620 int gsel_tss, metadata_missing, off, x; 1621#ifndef SMP 1622 /* table descriptors - used to load tables by microp */ 1623 struct region_descriptor r_gdt, r_idt; 1624#endif 1625 struct pcpu *pc; 1626 1627 proc0.p_uarea = proc0uarea; 1628 thread0.td_kstack = proc0kstack; 1629 thread0.td_pcb = (struct pcb *) 1630 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1631 atdevbase = ISA_HOLE_START + KERNBASE; 1632 1633 /* 1634 * This may be done better later if it gets more high level 1635 * components in it. If so just link td->td_proc here. 1636 */ 1637 proc_linkup(&proc0, &proc0.p_ksegrp, &proc0.p_kse, &thread0); 1638 1639 metadata_missing = 0; 1640 if (bootinfo.bi_modulep) { 1641 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1642 preload_bootstrap_relocate(KERNBASE); 1643 } else { 1644 metadata_missing = 1; 1645 } 1646 if (envmode == 1) 1647 kern_envp = static_env; 1648 else if (bootinfo.bi_envp) 1649 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1650 1651 /* Init basic tunables, hz etc */ 1652 init_param1(); 1653 1654 /* 1655 * make gdt memory segments, the code segment goes up to end of the 1656 * page with etext in it, the data segment goes to the end of 1657 * the address space 1658 */ 1659 /* 1660 * XXX text protection is temporarily (?) disabled. The limit was 1661 * i386_btop(round_page(etext)) - 1. 1662 */ 1663 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1664 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1665#ifdef SMP 1666 pc = &SMP_prvspace[0].pcpu; 1667 gdt_segs[GPRIV_SEL].ssd_limit = 1668 atop(sizeof(struct privatespace) - 1); 1669#else 1670 pc = &__pcpu; 1671 gdt_segs[GPRIV_SEL].ssd_limit = 1672 atop(sizeof(struct pcpu) - 1); 1673#endif 1674 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1675 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1676 1677 for (x = 0; x < NGDT; x++) { 1678#ifdef BDE_DEBUGGER 1679 /* avoid overwriting db entries with APM ones */ 1680 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL) 1681 continue; 1682#endif 1683 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1684 } 1685 1686 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1687 r_gdt.rd_base = (int) gdt; 1688 lgdt(&r_gdt); 1689 1690 pcpu_init(pc, 0, sizeof(struct pcpu)); 1691 PCPU_SET(prvspace, pc); 1692 1693 /* setup curproc so that mutexes work */ 1694 PCPU_SET(curthread, &thread0); 1695 1696 LIST_INIT(&thread0.td_contested); 1697 1698 /* 1699 * Initialize mutexes. 1700 * 1701 * icu_lock: in order to allow an interrupt to occur in a critical 1702 * section, to set pcpu->ipending (etc...) properly, we 1703 * must be able to get the icu lock, so it can't be 1704 * under witness. 1705 */ 1706 mtx_init(&Giant, "Giant", MTX_DEF | MTX_RECURSE); 1707 mtx_init(&sched_lock, "sched lock", MTX_SPIN | MTX_RECURSE); 1708 mtx_init(&proc0.p_mtx, "process lock", MTX_DEF|MTX_DUPOK); 1709 mtx_init(&clock_lock, "clk", MTX_SPIN | MTX_RECURSE); 1710 mtx_init(&icu_lock, "icu", MTX_SPIN | MTX_NOWITNESS); 1711 mtx_lock(&Giant); 1712 1713 /* make ldt memory segments */ 1714 /* 1715 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1716 * should be spelled ...MAX_USER... 1717 */ 1718 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 1719 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 1720 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1721 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1722 1723 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1724 lldt(_default_ldt); 1725 PCPU_SET(currentldt, _default_ldt); 1726 1727 /* exceptions */ 1728 for (x = 0; x < NIDT; x++) 1729 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 1730 GSEL(GCODE_SEL, SEL_KPL)); 1731 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 1732 GSEL(GCODE_SEL, SEL_KPL)); 1733 setidt(1, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 1734 GSEL(GCODE_SEL, SEL_KPL)); 1735 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, 1736 GSEL(GCODE_SEL, SEL_KPL)); 1737 setidt(3, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 1738 GSEL(GCODE_SEL, SEL_KPL)); 1739 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 1740 GSEL(GCODE_SEL, SEL_KPL)); 1741 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 1742 GSEL(GCODE_SEL, SEL_KPL)); 1743 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 1744 GSEL(GCODE_SEL, SEL_KPL)); 1745 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 1746 , GSEL(GCODE_SEL, SEL_KPL)); 1747 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1748 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 1749 GSEL(GCODE_SEL, SEL_KPL)); 1750 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 1751 GSEL(GCODE_SEL, SEL_KPL)); 1752 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 1753 GSEL(GCODE_SEL, SEL_KPL)); 1754 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 1755 GSEL(GCODE_SEL, SEL_KPL)); 1756 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 1757 GSEL(GCODE_SEL, SEL_KPL)); 1758 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 1759 GSEL(GCODE_SEL, SEL_KPL)); 1760 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 1761 GSEL(GCODE_SEL, SEL_KPL)); 1762 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 1763 GSEL(GCODE_SEL, SEL_KPL)); 1764 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 1765 GSEL(GCODE_SEL, SEL_KPL)); 1766 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 1767 GSEL(GCODE_SEL, SEL_KPL)); 1768 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 1769 GSEL(GCODE_SEL, SEL_KPL)); 1770 setidt(0x80, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 1771 GSEL(GCODE_SEL, SEL_KPL)); 1772 1773 r_idt.rd_limit = sizeof(idt0) - 1; 1774 r_idt.rd_base = (int) idt; 1775 lidt(&r_idt); 1776 1777 /* 1778 * Initialize the console before we print anything out. 1779 */ 1780 cninit(); 1781 1782 if (metadata_missing) 1783 printf("WARNING: loader(8) metadata is missing!\n"); 1784 1785#ifdef DEV_ISA 1786 isa_defaultirq(); 1787#endif 1788 1789#ifdef DDB 1790 kdb_init(); 1791 if (boothowto & RB_KDB) 1792 Debugger("Boot flags requested debugger"); 1793#endif 1794 1795 finishidentcpu(); /* Final stage of CPU initialization */ 1796 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 1797 GSEL(GCODE_SEL, SEL_KPL)); 1798 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 1799 GSEL(GCODE_SEL, SEL_KPL)); 1800 initializecpu(); /* Initialize CPU registers */ 1801 1802 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1803 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 1804 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 1805 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 1806 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 1807 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1808 private_tss = 0; 1809 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 1810 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 1811 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 1812 ltr(gsel_tss); 1813 1814 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1815 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 1816 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1817 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1818 dblfault_tss.tss_cr3 = (int)IdlePTD; 1819 dblfault_tss.tss_eip = (int)dblfault_handler; 1820 dblfault_tss.tss_eflags = PSL_KERNEL; 1821 dblfault_tss.tss_ds = dblfault_tss.tss_es = 1822 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1823 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 1824 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1825 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1826 1827 vm86_initialize(); 1828 getmemsize(first); 1829 init_param2(physmem); 1830 1831 /* now running on new page tables, configured,and u/iom is accessible */ 1832 1833 /* Map the message buffer. */ 1834 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1835 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1836 1837 msgbufinit(msgbufp, MSGBUF_SIZE); 1838 1839 /* make a call gate to reenter kernel with */ 1840 gdp = &ldt[LSYS5CALLS_SEL].gd; 1841 1842 x = (int) &IDTVEC(lcall_syscall); 1843 gdp->gd_looffset = x; 1844 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1845 gdp->gd_stkcpy = 1; 1846 gdp->gd_type = SDT_SYS386CGT; 1847 gdp->gd_dpl = SEL_UPL; 1848 gdp->gd_p = 1; 1849 gdp->gd_hioffset = x >> 16; 1850 1851 /* XXX does this work? */ 1852 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1853 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1854 1855 /* transfer to user mode */ 1856 1857 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1858 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1859 1860 /* setup proc 0's pcb */ 1861 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1862 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 1863 thread0.td_pcb->pcb_ext = 0; 1864 thread0.td_frame = &proc0_tf; 1865} 1866 1867void 1868cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1869{ 1870} 1871 1872#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1873static void f00f_hack(void *unused); 1874SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1875 1876static void 1877f00f_hack(void *unused) { 1878 struct gate_descriptor *new_idt; 1879#ifndef SMP 1880 struct region_descriptor r_idt; 1881#endif 1882 vm_offset_t tmp; 1883 1884 if (!has_f00f_bug) 1885 return; 1886 1887 GIANT_REQUIRED; 1888 1889 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1890 1891 r_idt.rd_limit = sizeof(idt0) - 1; 1892 1893 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1894 if (tmp == 0) 1895 panic("kmem_alloc returned 0"); 1896 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1897 panic("kmem_alloc returned non-page-aligned memory"); 1898 /* Put the first seven entries in the lower page */ 1899 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1900 bcopy(idt, new_idt, sizeof(idt0)); 1901 r_idt.rd_base = (int)new_idt; 1902 lidt(&r_idt); 1903 idt = new_idt; 1904 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1905 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1906 panic("vm_map_protect failed"); 1907 return; 1908} 1909#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1910 1911int 1912ptrace_set_pc(struct thread *td, unsigned long addr) 1913{ 1914 td->td_frame->tf_eip = addr; 1915 return (0); 1916} 1917 1918int 1919ptrace_single_step(struct thread *td) 1920{ 1921 td->td_frame->tf_eflags |= PSL_T; 1922 return (0); 1923} 1924 1925int 1926fill_regs(struct thread *td, struct reg *regs) 1927{ 1928 struct pcb *pcb; 1929 struct trapframe *tp; 1930 1931 tp = td->td_frame; 1932 regs->r_fs = tp->tf_fs; 1933 regs->r_es = tp->tf_es; 1934 regs->r_ds = tp->tf_ds; 1935 regs->r_edi = tp->tf_edi; 1936 regs->r_esi = tp->tf_esi; 1937 regs->r_ebp = tp->tf_ebp; 1938 regs->r_ebx = tp->tf_ebx; 1939 regs->r_edx = tp->tf_edx; 1940 regs->r_ecx = tp->tf_ecx; 1941 regs->r_eax = tp->tf_eax; 1942 regs->r_eip = tp->tf_eip; 1943 regs->r_cs = tp->tf_cs; 1944 regs->r_eflags = tp->tf_eflags; 1945 regs->r_esp = tp->tf_esp; 1946 regs->r_ss = tp->tf_ss; 1947 pcb = td->td_pcb; 1948 regs->r_gs = pcb->pcb_gs; 1949 return (0); 1950} 1951 1952int 1953set_regs(struct thread *td, struct reg *regs) 1954{ 1955 struct pcb *pcb; 1956 struct trapframe *tp; 1957 1958 tp = td->td_frame; 1959 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 1960 !CS_SECURE(regs->r_cs)) 1961 return (EINVAL); 1962 tp->tf_fs = regs->r_fs; 1963 tp->tf_es = regs->r_es; 1964 tp->tf_ds = regs->r_ds; 1965 tp->tf_edi = regs->r_edi; 1966 tp->tf_esi = regs->r_esi; 1967 tp->tf_ebp = regs->r_ebp; 1968 tp->tf_ebx = regs->r_ebx; 1969 tp->tf_edx = regs->r_edx; 1970 tp->tf_ecx = regs->r_ecx; 1971 tp->tf_eax = regs->r_eax; 1972 tp->tf_eip = regs->r_eip; 1973 tp->tf_cs = regs->r_cs; 1974 tp->tf_eflags = regs->r_eflags; 1975 tp->tf_esp = regs->r_esp; 1976 tp->tf_ss = regs->r_ss; 1977 pcb = td->td_pcb; 1978 pcb->pcb_gs = regs->r_gs; 1979 return (0); 1980} 1981 1982#ifdef CPU_ENABLE_SSE 1983static void 1984fill_fpregs_xmm(sv_xmm, sv_87) 1985 struct savexmm *sv_xmm; 1986 struct save87 *sv_87; 1987{ 1988 register struct env87 *penv_87 = &sv_87->sv_env; 1989 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 1990 int i; 1991 1992 bzero(sv_87, sizeof(*sv_87)); 1993 1994 /* FPU control/status */ 1995 penv_87->en_cw = penv_xmm->en_cw; 1996 penv_87->en_sw = penv_xmm->en_sw; 1997 penv_87->en_tw = penv_xmm->en_tw; 1998 penv_87->en_fip = penv_xmm->en_fip; 1999 penv_87->en_fcs = penv_xmm->en_fcs; 2000 penv_87->en_opcode = penv_xmm->en_opcode; 2001 penv_87->en_foo = penv_xmm->en_foo; 2002 penv_87->en_fos = penv_xmm->en_fos; 2003 2004 /* FPU registers */ 2005 for (i = 0; i < 8; ++i) 2006 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2007 2008 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw; 2009} 2010 2011static void 2012set_fpregs_xmm(sv_87, sv_xmm) 2013 struct save87 *sv_87; 2014 struct savexmm *sv_xmm; 2015{ 2016 register struct env87 *penv_87 = &sv_87->sv_env; 2017 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2018 int i; 2019 2020 /* FPU control/status */ 2021 penv_xmm->en_cw = penv_87->en_cw; 2022 penv_xmm->en_sw = penv_87->en_sw; 2023 penv_xmm->en_tw = penv_87->en_tw; 2024 penv_xmm->en_fip = penv_87->en_fip; 2025 penv_xmm->en_fcs = penv_87->en_fcs; 2026 penv_xmm->en_opcode = penv_87->en_opcode; 2027 penv_xmm->en_foo = penv_87->en_foo; 2028 penv_xmm->en_fos = penv_87->en_fos; 2029 2030 /* FPU registers */ 2031 for (i = 0; i < 8; ++i) 2032 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2033 2034 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw; 2035} 2036#endif /* CPU_ENABLE_SSE */ 2037 2038int 2039fill_fpregs(struct thread *td, struct fpreg *fpregs) 2040{ 2041#ifdef CPU_ENABLE_SSE 2042 if (cpu_fxsr) { 2043 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2044 (struct save87 *)fpregs); 2045 return (0); 2046 } 2047#endif /* CPU_ENABLE_SSE */ 2048 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2049 return (0); 2050} 2051 2052int 2053set_fpregs(struct thread *td, struct fpreg *fpregs) 2054{ 2055#ifdef CPU_ENABLE_SSE 2056 if (cpu_fxsr) { 2057 set_fpregs_xmm((struct save87 *)fpregs, 2058 &td->td_pcb->pcb_save.sv_xmm); 2059 return (0); 2060 } 2061#endif /* CPU_ENABLE_SSE */ 2062 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2063 return (0); 2064} 2065 2066int 2067fill_dbregs(struct thread *td, struct dbreg *dbregs) 2068{ 2069 struct pcb *pcb; 2070 2071 if (td == NULL) { 2072 dbregs->dr0 = rdr0(); 2073 dbregs->dr1 = rdr1(); 2074 dbregs->dr2 = rdr2(); 2075 dbregs->dr3 = rdr3(); 2076 dbregs->dr4 = rdr4(); 2077 dbregs->dr5 = rdr5(); 2078 dbregs->dr6 = rdr6(); 2079 dbregs->dr7 = rdr7(); 2080 } else { 2081 pcb = td->td_pcb; 2082 dbregs->dr0 = pcb->pcb_dr0; 2083 dbregs->dr1 = pcb->pcb_dr1; 2084 dbregs->dr2 = pcb->pcb_dr2; 2085 dbregs->dr3 = pcb->pcb_dr3; 2086 dbregs->dr4 = 0; 2087 dbregs->dr5 = 0; 2088 dbregs->dr6 = pcb->pcb_dr6; 2089 dbregs->dr7 = pcb->pcb_dr7; 2090 } 2091 return (0); 2092} 2093 2094int 2095set_dbregs(struct thread *td, struct dbreg *dbregs) 2096{ 2097 struct pcb *pcb; 2098 int i; 2099 u_int32_t mask1, mask2; 2100 2101 if (td == NULL) { 2102 load_dr0(dbregs->dr0); 2103 load_dr1(dbregs->dr1); 2104 load_dr2(dbregs->dr2); 2105 load_dr3(dbregs->dr3); 2106 load_dr4(dbregs->dr4); 2107 load_dr5(dbregs->dr5); 2108 load_dr6(dbregs->dr6); 2109 load_dr7(dbregs->dr7); 2110 } else { 2111 /* 2112 * Don't let an illegal value for dr7 get set. Specifically, 2113 * check for undefined settings. Setting these bit patterns 2114 * result in undefined behaviour and can lead to an unexpected 2115 * TRCTRAP. 2116 */ 2117 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2118 i++, mask1 <<= 2, mask2 <<= 2) 2119 if ((dbregs->dr7 & mask1) == mask2) 2120 return (EINVAL); 2121 2122 pcb = td->td_pcb; 2123 2124 /* 2125 * Don't let a process set a breakpoint that is not within the 2126 * process's address space. If a process could do this, it 2127 * could halt the system by setting a breakpoint in the kernel 2128 * (if ddb was enabled). Thus, we need to check to make sure 2129 * that no breakpoints are being enabled for addresses outside 2130 * process's address space, unless, perhaps, we were called by 2131 * uid 0. 2132 * 2133 * XXX - what about when the watched area of the user's 2134 * address space is written into from within the kernel 2135 * ... wouldn't that still cause a breakpoint to be generated 2136 * from within kernel mode? 2137 */ 2138 2139 if (suser_td(td) != 0) { 2140 if (dbregs->dr7 & 0x3) { 2141 /* dr0 is enabled */ 2142 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS) 2143 return (EINVAL); 2144 } 2145 2146 if (dbregs->dr7 & (0x3<<2)) { 2147 /* dr1 is enabled */ 2148 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS) 2149 return (EINVAL); 2150 } 2151 2152 if (dbregs->dr7 & (0x3<<4)) { 2153 /* dr2 is enabled */ 2154 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS) 2155 return (EINVAL); 2156 } 2157 2158 if (dbregs->dr7 & (0x3<<6)) { 2159 /* dr3 is enabled */ 2160 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS) 2161 return (EINVAL); 2162 } 2163 } 2164 2165 pcb->pcb_dr0 = dbregs->dr0; 2166 pcb->pcb_dr1 = dbregs->dr1; 2167 pcb->pcb_dr2 = dbregs->dr2; 2168 pcb->pcb_dr3 = dbregs->dr3; 2169 pcb->pcb_dr6 = dbregs->dr6; 2170 pcb->pcb_dr7 = dbregs->dr7; 2171 2172 pcb->pcb_flags |= PCB_DBREGS; 2173 } 2174 2175 return (0); 2176} 2177 2178/* 2179 * Return > 0 if a hardware breakpoint has been hit, and the 2180 * breakpoint was in user space. Return 0, otherwise. 2181 */ 2182int 2183user_dbreg_trap(void) 2184{ 2185 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2186 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2187 int nbp; /* number of breakpoints that triggered */ 2188 caddr_t addr[4]; /* breakpoint addresses */ 2189 int i; 2190 2191 dr7 = rdr7(); 2192 if ((dr7 & 0x000000ff) == 0) { 2193 /* 2194 * all GE and LE bits in the dr7 register are zero, 2195 * thus the trap couldn't have been caused by the 2196 * hardware debug registers 2197 */ 2198 return 0; 2199 } 2200 2201 nbp = 0; 2202 dr6 = rdr6(); 2203 bp = dr6 & 0x0000000f; 2204 2205 if (!bp) { 2206 /* 2207 * None of the breakpoint bits are set meaning this 2208 * trap was not caused by any of the debug registers 2209 */ 2210 return 0; 2211 } 2212 2213 /* 2214 * at least one of the breakpoints were hit, check to see 2215 * which ones and if any of them are user space addresses 2216 */ 2217 2218 if (bp & 0x01) { 2219 addr[nbp++] = (caddr_t)rdr0(); 2220 } 2221 if (bp & 0x02) { 2222 addr[nbp++] = (caddr_t)rdr1(); 2223 } 2224 if (bp & 0x04) { 2225 addr[nbp++] = (caddr_t)rdr2(); 2226 } 2227 if (bp & 0x08) { 2228 addr[nbp++] = (caddr_t)rdr3(); 2229 } 2230 2231 for (i=0; i<nbp; i++) { 2232 if (addr[i] < 2233 (caddr_t)VM_MAXUSER_ADDRESS) { 2234 /* 2235 * addr[i] is in user space 2236 */ 2237 return nbp; 2238 } 2239 } 2240 2241 /* 2242 * None of the breakpoints are in user space. 2243 */ 2244 return 0; 2245} 2246 2247 2248#ifndef DDB 2249void 2250Debugger(const char *msg) 2251{ 2252 printf("Debugger(\"%s\") called.\n", msg); 2253} 2254#endif /* no DDB */ 2255 2256#include <sys/disklabel.h> 2257 2258/* 2259 * Determine the size of the transfer, and make sure it is 2260 * within the boundaries of the partition. Adjust transfer 2261 * if needed, and signal errors or early completion. 2262 */ 2263int 2264bounds_check_with_label(struct bio *bp, struct disklabel *lp, int wlabel) 2265{ 2266 struct partition *p = lp->d_partitions + dkpart(bp->bio_dev); 2267 int labelsect = lp->d_partitions[0].p_offset; 2268 int maxsz = p->p_size, 2269 sz = (bp->bio_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 2270 2271 /* overwriting disk label ? */ 2272 /* XXX should also protect bootstrap in first 8K */ 2273 if (bp->bio_blkno + p->p_offset <= LABELSECTOR + labelsect && 2274#if LABELSECTOR != 0 2275 bp->bio_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 2276#endif 2277 (bp->bio_cmd == BIO_WRITE) && wlabel == 0) { 2278 bp->bio_error = EROFS; 2279 goto bad; 2280 } 2281 2282#if defined(DOSBBSECTOR) && defined(notyet) 2283 /* overwriting master boot record? */ 2284 if (bp->bio_blkno + p->p_offset <= DOSBBSECTOR && 2285 (bp->bio_cmd == BIO_WRITE) && wlabel == 0) { 2286 bp->bio_error = EROFS; 2287 goto bad; 2288 } 2289#endif 2290 2291 /* beyond partition? */ 2292 if (bp->bio_blkno < 0 || bp->bio_blkno + sz > maxsz) { 2293 /* if exactly at end of disk, return an EOF */ 2294 if (bp->bio_blkno == maxsz) { 2295 bp->bio_resid = bp->bio_bcount; 2296 return(0); 2297 } 2298 /* or truncate if part of it fits */ 2299 sz = maxsz - bp->bio_blkno; 2300 if (sz <= 0) { 2301 bp->bio_error = EINVAL; 2302 goto bad; 2303 } 2304 bp->bio_bcount = sz << DEV_BSHIFT; 2305 } 2306 2307 bp->bio_pblkno = bp->bio_blkno + p->p_offset; 2308 return(1); 2309 2310bad: 2311 bp->bio_flags |= BIO_ERROR; 2312 return(-1); 2313} 2314 2315#ifdef DDB 2316 2317/* 2318 * Provide inb() and outb() as functions. They are normally only 2319 * available as macros calling inlined functions, thus cannot be 2320 * called inside DDB. 2321 * 2322 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2323 */ 2324 2325#undef inb 2326#undef outb 2327 2328/* silence compiler warnings */ 2329u_char inb(u_int); 2330void outb(u_int, u_char); 2331 2332u_char 2333inb(u_int port) 2334{ 2335 u_char data; 2336 /* 2337 * We use %%dx and not %1 here because i/o is done at %dx and not at 2338 * %edx, while gcc generates inferior code (movw instead of movl) 2339 * if we tell it to load (u_short) port. 2340 */ 2341 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2342 return (data); 2343} 2344 2345void 2346outb(u_int port, u_char data) 2347{ 2348 u_char al; 2349 /* 2350 * Use an unnecessary assignment to help gcc's register allocator. 2351 * This make a large difference for gcc-1.40 and a tiny difference 2352 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2353 * best results. gcc-2.6.0 can't handle this. 2354 */ 2355 al = data; 2356 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2357} 2358 2359#endif /* DDB */ 2360