machdep.c revision 49558
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.357 1999/07/29 01:49:18 msmith Exp $ 39 */ 40 41#include "apm.h" 42#include "ether.h" 43#include "npx.h" 44#include "opt_atalk.h" 45#include "opt_cpu.h" 46#include "opt_ddb.h" 47#include "opt_inet.h" 48#include "opt_ipx.h" 49#include "opt_maxmem.h" 50#include "opt_msgbuf.h" 51#include "opt_perfmon.h" 52#include "opt_smp.h" 53#include "opt_sysvipc.h" 54#include "opt_user_ldt.h" 55#include "opt_userconfig.h" 56 57#include <sys/param.h> 58#include <sys/systm.h> 59#include <sys/sysproto.h> 60#include <sys/signalvar.h> 61#include <sys/kernel.h> 62#include <sys/linker.h> 63#include <sys/proc.h> 64#include <sys/buf.h> 65#include <sys/reboot.h> 66#include <sys/callout.h> 67#include <sys/malloc.h> 68#include <sys/mbuf.h> 69#include <sys/msgbuf.h> 70#include <sys/sysent.h> 71#include <sys/sysctl.h> 72#include <sys/vmmeter.h> 73#include <sys/bus.h> 74 75#ifdef SYSVSHM 76#include <sys/shm.h> 77#endif 78 79#ifdef SYSVMSG 80#include <sys/msg.h> 81#endif 82 83#ifdef SYSVSEM 84#include <sys/sem.h> 85#endif 86 87#include <vm/vm.h> 88#include <vm/vm_param.h> 89#include <vm/vm_prot.h> 90#include <sys/lock.h> 91#include <vm/vm_kern.h> 92#include <vm/vm_object.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_pager.h> 96#include <vm/vm_extern.h> 97 98#include <sys/user.h> 99#include <sys/exec.h> 100#include <sys/cons.h> 101 102#include <ddb/ddb.h> 103 104#include <net/netisr.h> 105 106#include <machine/cpu.h> 107#include <machine/reg.h> 108#include <machine/clock.h> 109#include <machine/specialreg.h> 110#include <machine/bootinfo.h> 111#include <machine/ipl.h> 112#include <machine/md_var.h> 113#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 114#ifdef SMP 115#include <machine/smp.h> 116#include <machine/globaldata.h> 117#endif 118#ifdef PERFMON 119#include <machine/perfmon.h> 120#endif 121 122#ifdef OLD_BUS_ARCH 123#include <i386/isa/isa_device.h> 124#endif 125#include <i386/isa/intr_machdep.h> 126#include <isa/rtc.h> 127#include <machine/vm86.h> 128#include <machine/random.h> 129#include <sys/ptrace.h> 130 131extern void init386 __P((int first)); 132extern void dblfault_handler __P((void)); 133 134extern void printcpuinfo(void); /* XXX header file */ 135extern void earlysetcpuclass(void); /* same header file */ 136extern void finishidentcpu(void); 137extern void panicifcpuunsupported(void); 138extern void initializecpu(void); 139 140static void cpu_startup __P((void *)); 141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 142 143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf"); 144 145int _udatasel, _ucodesel; 146u_int atdevbase; 147 148#if defined(SWTCH_OPTIM_STATS) 149extern int swtch_optim_stats; 150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 151 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 153 CTLFLAG_RD, &tlb_flush_count, 0, ""); 154#endif 155 156#ifdef PC98 157static int ispc98 = 1; 158#else 159static int ispc98 = 0; 160#endif 161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 162 163int physmem = 0; 164int cold = 1; 165 166static int 167sysctl_hw_physmem SYSCTL_HANDLER_ARGS 168{ 169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 170 return (error); 171} 172 173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 174 0, 0, sysctl_hw_physmem, "I", ""); 175 176static int 177sysctl_hw_usermem SYSCTL_HANDLER_ARGS 178{ 179 int error = sysctl_handle_int(oidp, 0, 180 ctob(physmem - cnt.v_wire_count), req); 181 return (error); 182} 183 184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 185 0, 0, sysctl_hw_usermem, "I", ""); 186 187static int 188sysctl_hw_availpages SYSCTL_HANDLER_ARGS 189{ 190 int error = sysctl_handle_int(oidp, 0, 191 i386_btop(avail_end - avail_start), req); 192 return (error); 193} 194 195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD, 196 0, 0, sysctl_hw_availpages, "I", ""); 197 198static int 199sysctl_machdep_msgbuf SYSCTL_HANDLER_ARGS 200{ 201 int error; 202 203 /* Unwind the buffer, so that it's linear (possibly starting with 204 * some initial nulls). 205 */ 206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr, 207 msgbufp->msg_size-msgbufp->msg_bufr,req); 208 if(error) return(error); 209 if(msgbufp->msg_bufr>0) { 210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr, 211 msgbufp->msg_bufr,req); 212 } 213 return(error); 214} 215 216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD, 217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer"); 218 219static int msgbuf_clear; 220 221static int 222sysctl_machdep_msgbuf_clear SYSCTL_HANDLER_ARGS 223{ 224 int error; 225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 226 req); 227 if (!error && req->newptr) { 228 /* Clear the buffer and reset write pointer */ 229 bzero(msgbufp->msg_ptr,msgbufp->msg_size); 230 msgbufp->msg_bufr=msgbufp->msg_bufx=0; 231 msgbuf_clear=0; 232 } 233 return (error); 234} 235 236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW, 237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I", 238 "Clear kernel message buffer"); 239 240int bootverbose = 0, Maxmem = 0; 241long dumplo; 242 243vm_offset_t phys_avail[10]; 244 245/* must be 2 less so 0 0 can signal end of chunks */ 246#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 247 248static vm_offset_t buffer_sva, buffer_eva; 249vm_offset_t clean_sva, clean_eva; 250static vm_offset_t pager_sva, pager_eva; 251 252#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 253 254static void 255cpu_startup(dummy) 256 void *dummy; 257{ 258 register unsigned i; 259 register caddr_t v; 260 vm_offset_t maxaddr; 261 vm_size_t size = 0; 262 int firstaddr; 263 vm_offset_t minaddr; 264 265 if (boothowto & RB_VERBOSE) 266 bootverbose++; 267 268 /* 269 * Good {morning,afternoon,evening,night}. 270 */ 271 printf(version); 272 earlysetcpuclass(); 273 startrtclock(); 274 printcpuinfo(); 275 panicifcpuunsupported(); 276#ifdef PERFMON 277 perfmon_init(); 278#endif 279 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 280 /* 281 * Display any holes after the first chunk of extended memory. 282 */ 283 if (bootverbose) { 284 int indx; 285 286 printf("Physical memory chunk(s):\n"); 287 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 288 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 289 290 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n", 291 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 292 size1 / PAGE_SIZE); 293 } 294 } 295 296 /* 297 * Calculate callout wheel size 298 */ 299 for (callwheelsize = 1, callwheelbits = 0; 300 callwheelsize < ncallout; 301 callwheelsize <<= 1, ++callwheelbits) 302 ; 303 callwheelmask = callwheelsize - 1; 304 305 /* 306 * Allocate space for system data structures. 307 * The first available kernel virtual address is in "v". 308 * As pages of kernel virtual memory are allocated, "v" is incremented. 309 * As pages of memory are allocated and cleared, 310 * "firstaddr" is incremented. 311 * An index into the kernel page table corresponding to the 312 * virtual memory address maintained in "v" is kept in "mapaddr". 313 */ 314 315 /* 316 * Make two passes. The first pass calculates how much memory is 317 * needed and allocates it. The second pass assigns virtual 318 * addresses to the various data structures. 319 */ 320 firstaddr = 0; 321again: 322 v = (caddr_t)firstaddr; 323 324#define valloc(name, type, num) \ 325 (name) = (type *)v; v = (caddr_t)((name)+(num)) 326#define valloclim(name, type, num, lim) \ 327 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 328 329 valloc(callout, struct callout, ncallout); 330 valloc(callwheel, struct callout_tailq, callwheelsize); 331#ifdef SYSVSHM 332 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 333#endif 334#ifdef SYSVSEM 335 valloc(sema, struct semid_ds, seminfo.semmni); 336 valloc(sem, struct sem, seminfo.semmns); 337 /* This is pretty disgusting! */ 338 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 339#endif 340#ifdef SYSVMSG 341 valloc(msgpool, char, msginfo.msgmax); 342 valloc(msgmaps, struct msgmap, msginfo.msgseg); 343 valloc(msghdrs, struct msg, msginfo.msgtql); 344 valloc(msqids, struct msqid_ds, msginfo.msgmni); 345#endif 346 347 if (nbuf == 0) { 348 nbuf = 30; 349 if (physmem > 1024) 350 nbuf += min((physmem - 1024) / 8, 2048); 351 if (physmem > 16384) 352 nbuf += (physmem - 16384) / 20; 353 } 354 nswbuf = max(min(nbuf/4, 256), 16); 355 356 valloc(swbuf, struct buf, nswbuf); 357 valloc(buf, struct buf, nbuf); 358 v = bufhashinit(v); 359 360 /* 361 * End of first pass, size has been calculated so allocate memory 362 */ 363 if (firstaddr == 0) { 364 size = (vm_size_t)(v - firstaddr); 365 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 366 if (firstaddr == 0) 367 panic("startup: no room for tables"); 368 goto again; 369 } 370 371 /* 372 * End of second pass, addresses have been assigned 373 */ 374 if ((vm_size_t)(v - firstaddr) != size) 375 panic("startup: table size inconsistency"); 376 377 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 378 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size); 379 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 380 (nbuf*BKVASIZE)); 381 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 382 (nswbuf*MAXPHYS) + pager_map_size); 383 pager_map->system_map = 1; 384 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 385 (16*(ARG_MAX+(PAGE_SIZE*3)))); 386 387 /* 388 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 389 * we use the more space efficient malloc in place of kmem_alloc. 390 */ 391 { 392 vm_offset_t mb_map_size; 393 394 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 395 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 396 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 397 bzero(mclrefcnt, mb_map_size / MCLBYTES); 398 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 399 mb_map_size); 400 mb_map->system_map = 1; 401 } 402 403 /* 404 * Initialize callouts 405 */ 406 SLIST_INIT(&callfree); 407 for (i = 0; i < ncallout; i++) { 408 callout_init(&callout[i]); 409 callout[i].c_flags = CALLOUT_LOCAL_ALLOC; 410 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 411 } 412 413 for (i = 0; i < callwheelsize; i++) { 414 TAILQ_INIT(&callwheel[i]); 415 } 416 417#if defined(USERCONFIG) 418 userconfig(); 419 cninit(); /* the preferred console may have changed */ 420#endif 421 422 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count), 423 ptoa(cnt.v_free_count) / 1024); 424 425 /* 426 * Set up buffers, so they can be used to read disk labels. 427 */ 428 bufinit(); 429 vm_pager_bufferinit(); 430 431#ifdef SMP 432 /* 433 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 434 */ 435 mp_start(); /* fire up the APs and APICs */ 436 mp_announce(); 437#endif /* SMP */ 438} 439 440int 441register_netisr(num, handler) 442 int num; 443 netisr_t *handler; 444{ 445 446 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 447 printf("register_netisr: bad isr number: %d\n", num); 448 return (EINVAL); 449 } 450 netisrs[num] = handler; 451 return (0); 452} 453 454void 455netisr_sysinit(data) 456 void *data; 457{ 458 const struct netisrtab *nit; 459 460 nit = (const struct netisrtab *)data; 461 register_netisr(nit->nit_num, nit->nit_isr); 462} 463 464/* 465 * Send an interrupt to process. 466 * 467 * Stack is set up to allow sigcode stored 468 * at top to call routine, followed by kcall 469 * to sigreturn routine below. After sigreturn 470 * resets the signal mask, the stack, and the 471 * frame pointer, it returns to the user 472 * specified pc, psl. 473 */ 474void 475sendsig(catcher, sig, mask, code) 476 sig_t catcher; 477 int sig, mask; 478 u_long code; 479{ 480 register struct proc *p = curproc; 481 register struct trapframe *regs; 482 register struct sigframe *fp; 483 struct sigframe sf; 484 struct sigacts *psp = p->p_sigacts; 485 int oonstack; 486 487 regs = p->p_md.md_regs; 488 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 489 /* 490 * Allocate and validate space for the signal handler context. 491 */ 492 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 493 (psp->ps_sigonstack & sigmask(sig))) { 494 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 495 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 496 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 497 } else { 498 fp = (struct sigframe *)regs->tf_esp - 1; 499 } 500 501 /* 502 * grow() will return FALSE if the fp will not fit inside the stack 503 * and the stack can not be grown. useracc will return FALSE 504 * if access is denied. 505 */ 506 if ((grow_stack (p, (int)fp) == FALSE) || 507 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 508 /* 509 * Process has trashed its stack; give it an illegal 510 * instruction to halt it in its tracks. 511 */ 512#ifdef DEBUG 513 printf("process %d has trashed its stack\n", p->p_pid); 514#endif 515 SIGACTION(p, SIGILL) = SIG_DFL; 516 sig = sigmask(SIGILL); 517 p->p_sigignore &= ~sig; 518 p->p_sigcatch &= ~sig; 519 p->p_sigmask &= ~sig; 520 psignal(p, SIGILL); 521 return; 522 } 523 524 /* 525 * Build the argument list for the signal handler. 526 */ 527 if (p->p_sysent->sv_sigtbl) { 528 if (sig < p->p_sysent->sv_sigsize) 529 sig = p->p_sysent->sv_sigtbl[sig]; 530 else 531 sig = p->p_sysent->sv_sigsize + 1; 532 } 533 sf.sf_signum = sig; 534 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 535 if (p->p_sigacts->ps_siginfo & sigmask(sig)) { 536 /* 537 * Signal handler installed with SA_SIGINFO. 538 */ 539 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 540 sf.sf_siginfo.si_signo = sig; 541 sf.sf_siginfo.si_code = code; 542 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 543 } else { 544 /* 545 * Old FreeBSD-style arguments. 546 */ 547 sf.sf_arg2 = code; 548 sf.sf_ahu.sf_handler = catcher; 549 } 550 551 sf.sf_addr = (char *) regs->tf_err; 552 553 /* save scratch registers */ 554 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 555 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 556 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 557 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 558 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 559 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 560 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 561 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 562 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 563 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 564 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 565 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 566 567 /* 568 * Build the signal context to be used by sigreturn. 569 */ 570 sf.sf_siginfo.si_sc.sc_onstack = oonstack; 571 sf.sf_siginfo.si_sc.sc_mask = mask; 572 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 573 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 574 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 575 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 576 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 577 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 578 579 /* 580 * If we're a vm86 process, we want to save the segment registers. 581 * We also change eflags to be our emulated eflags, not the actual 582 * eflags. 583 */ 584 if (regs->tf_eflags & PSL_VM) { 585 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 586 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 587 588 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 589 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 590 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 591 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 592 593 if (vm86->vm86_has_vme == 0) 594 sf.sf_siginfo.si_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 595 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 596 597 /* 598 * We should never have PSL_T set when returning from vm86 599 * mode. It may be set here if we deliver a signal before 600 * getting to vm86 mode, so turn it off. 601 * 602 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 603 * syscalls made by the signal handler. This just avoids 604 * wasting time for our lazy fixup of such faults. PSL_NT 605 * does nothing in vm86 mode, but vm86 programs can set it 606 * almost legitimately in probes for old cpu types. 607 */ 608 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_T | PSL_VIF | PSL_VIP); 609 } 610 611 /* 612 * Copy the sigframe out to the user's stack. 613 */ 614 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 615 /* 616 * Something is wrong with the stack pointer. 617 * ...Kill the process. 618 */ 619 sigexit(p, SIGILL); 620 } 621 622 regs->tf_esp = (int)fp; 623 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 624 regs->tf_cs = _ucodesel; 625 regs->tf_ds = _udatasel; 626 regs->tf_es = _udatasel; 627 regs->tf_fs = _udatasel; 628 regs->tf_ss = _udatasel; 629} 630 631/* 632 * System call to cleanup state after a signal 633 * has been taken. Reset signal mask and 634 * stack state from context left by sendsig (above). 635 * Return to previous pc and psl as specified by 636 * context left by sendsig. Check carefully to 637 * make sure that the user has not modified the 638 * state to gain improper privileges. 639 */ 640int 641sigreturn(p, uap) 642 struct proc *p; 643 struct sigreturn_args /* { 644 struct sigcontext *sigcntxp; 645 } */ *uap; 646{ 647 register struct sigcontext *scp; 648 register struct sigframe *fp; 649 register struct trapframe *regs = p->p_md.md_regs; 650 int eflags; 651 652 /* 653 * (XXX old comment) regs->tf_esp points to the return address. 654 * The user scp pointer is above that. 655 * The return address is faked in the signal trampoline code 656 * for consistency. 657 */ 658 scp = uap->sigcntxp; 659 fp = (struct sigframe *) 660 ((caddr_t)scp - offsetof(struct sigframe, sf_siginfo.si_sc)); 661 662 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 663 return(EFAULT); 664 665 eflags = scp->sc_ps; 666 if (eflags & PSL_VM) { 667 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 668 struct vm86_kernel *vm86; 669 670 /* 671 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 672 * set up the vm86 area, and we can't enter vm86 mode. 673 */ 674 if (p->p_addr->u_pcb.pcb_ext == 0) 675 return (EINVAL); 676 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 677 if (vm86->vm86_inited == 0) 678 return (EINVAL); 679 680 /* go back to user mode if both flags are set */ 681 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 682 trapsignal(p, SIGBUS, 0); 683 684 if (vm86->vm86_has_vme) { 685 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 686 (eflags & VME_USERCHANGE) | PSL_VM; 687 } else { 688 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 689 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 690 } 691 tf->tf_vm86_ds = scp->sc_ds; 692 tf->tf_vm86_es = scp->sc_es; 693 tf->tf_vm86_fs = scp->sc_fs; 694 tf->tf_vm86_gs = scp->sc_gs; 695 tf->tf_ds = _udatasel; 696 tf->tf_es = _udatasel; 697 tf->tf_fs = _udatasel; 698 } else { 699 /* 700 * Don't allow users to change privileged or reserved flags. 701 */ 702#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 703 /* 704 * XXX do allow users to change the privileged flag PSL_RF. 705 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 706 * should sometimes set it there too. tf_eflags is kept in 707 * the signal context during signal handling and there is no 708 * other place to remember it, so the PSL_RF bit may be 709 * corrupted by the signal handler without us knowing. 710 * Corruption of the PSL_RF bit at worst causes one more or 711 * one less debugger trap, so allowing it is fairly harmless. 712 */ 713 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 714#ifdef DEBUG 715 printf("sigreturn: eflags = 0x%x\n", eflags); 716#endif 717 return(EINVAL); 718 } 719 720 /* 721 * Don't allow users to load a valid privileged %cs. Let the 722 * hardware check for invalid selectors, excess privilege in 723 * other selectors, invalid %eip's and invalid %esp's. 724 */ 725#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 726 if (!CS_SECURE(scp->sc_cs)) { 727#ifdef DEBUG 728 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 729#endif 730 trapsignal(p, SIGBUS, T_PROTFLT); 731 return(EINVAL); 732 } 733 regs->tf_ds = scp->sc_ds; 734 regs->tf_es = scp->sc_es; 735 regs->tf_fs = scp->sc_fs; 736 } 737 738 /* restore scratch registers */ 739 regs->tf_eax = scp->sc_eax; 740 regs->tf_ebx = scp->sc_ebx; 741 regs->tf_ecx = scp->sc_ecx; 742 regs->tf_edx = scp->sc_edx; 743 regs->tf_esi = scp->sc_esi; 744 regs->tf_edi = scp->sc_edi; 745 regs->tf_cs = scp->sc_cs; 746 regs->tf_ss = scp->sc_ss; 747 regs->tf_isp = scp->sc_isp; 748 749 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 750 return(EINVAL); 751 752 if (scp->sc_onstack & 01) 753 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 754 else 755 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 756 p->p_sigmask = scp->sc_mask & ~sigcantmask; 757 regs->tf_ebp = scp->sc_fp; 758 regs->tf_esp = scp->sc_sp; 759 regs->tf_eip = scp->sc_pc; 760 regs->tf_eflags = eflags; 761 return(EJUSTRETURN); 762} 763 764/* 765 * Machine dependent boot() routine 766 * 767 * I haven't seen anything to put here yet 768 * Possibly some stuff might be grafted back here from boot() 769 */ 770void 771cpu_boot(int howto) 772{ 773} 774 775/* 776 * Shutdown the CPU as much as possible 777 */ 778void 779cpu_halt(void) 780{ 781 for (;;) 782 __asm__ ("hlt"); 783} 784 785/* 786 * Clear registers on exec 787 */ 788void 789setregs(p, entry, stack, ps_strings) 790 struct proc *p; 791 u_long entry; 792 u_long stack; 793 u_long ps_strings; 794{ 795 struct trapframe *regs = p->p_md.md_regs; 796 struct pcb *pcb = &p->p_addr->u_pcb; 797 798#ifdef USER_LDT 799 /* was i386_user_cleanup() in NetBSD */ 800 if (pcb->pcb_ldt) { 801 if (pcb == curpcb) { 802 lldt(_default_ldt); 803 currentldt = _default_ldt; 804 } 805 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 806 pcb->pcb_ldt_len * sizeof(union descriptor)); 807 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 808 } 809#endif 810 811 bzero((char *)regs, sizeof(struct trapframe)); 812 regs->tf_eip = entry; 813 regs->tf_esp = stack; 814 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 815 regs->tf_ss = _udatasel; 816 regs->tf_ds = _udatasel; 817 regs->tf_es = _udatasel; 818 regs->tf_fs = _udatasel; 819 regs->tf_cs = _ucodesel; 820 821 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 822 regs->tf_ebx = ps_strings; 823 824 /* reset %gs as well */ 825 pcb->pcb_gs = _udatasel; 826 if (pcb == curpcb) { 827 load_gs(_udatasel); 828 } 829 830 /* 831 * Initialize the math emulator (if any) for the current process. 832 * Actually, just clear the bit that says that the emulator has 833 * been initialized. Initialization is delayed until the process 834 * traps to the emulator (if it is done at all) mainly because 835 * emulators don't provide an entry point for initialization. 836 */ 837 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 838 839 /* 840 * Arrange to trap the next npx or `fwait' instruction (see npx.c 841 * for why fwait must be trapped at least if there is an npx or an 842 * emulator). This is mainly to handle the case where npx0 is not 843 * configured, since the npx routines normally set up the trap 844 * otherwise. It should be done only at boot time, but doing it 845 * here allows modifying `npx_exists' for testing the emulator on 846 * systems with an npx. 847 */ 848 load_cr0(rcr0() | CR0_MP | CR0_TS); 849 850#if NNPX > 0 851 /* Initialize the npx (if any) for the current process. */ 852 npxinit(__INITIAL_NPXCW__); 853#endif 854 855 /* 856 * XXX - Linux emulator 857 * Make sure sure edx is 0x0 on entry. Linux binaries depend 858 * on it. 859 */ 860 p->p_retval[1] = 0; 861} 862 863static int 864sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 865{ 866 int error; 867 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 868 req); 869 if (!error && req->newptr) 870 resettodr(); 871 return (error); 872} 873 874SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 875 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 876 877SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 878 CTLFLAG_RW, &disable_rtc_set, 0, ""); 879 880SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 881 CTLFLAG_RD, &bootinfo, bootinfo, ""); 882 883SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 884 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 885 886/* 887 * Initialize 386 and configure to run kernel 888 */ 889 890/* 891 * Initialize segments & interrupt table 892 */ 893 894int _default_ldt; 895#ifdef SMP 896union descriptor gdt[NGDT * NCPU]; /* global descriptor table */ 897#else 898union descriptor gdt[NGDT]; /* global descriptor table */ 899#endif 900static struct gate_descriptor idt0[NIDT]; 901struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 902union descriptor ldt[NLDT]; /* local descriptor table */ 903#ifdef SMP 904/* table descriptors - used to load tables by microp */ 905struct region_descriptor r_gdt, r_idt; 906#endif 907 908#ifndef SMP 909extern struct segment_descriptor common_tssd, *tss_gdt; 910#endif 911int private_tss; /* flag indicating private tss */ 912 913#if defined(I586_CPU) && !defined(NO_F00F_HACK) 914extern int has_f00f_bug; 915#endif 916 917static struct i386tss dblfault_tss; 918static char dblfault_stack[PAGE_SIZE]; 919 920extern struct user *proc0paddr; 921 922 923/* software prototypes -- in more palatable form */ 924struct soft_segment_descriptor gdt_segs[] = { 925/* GNULL_SEL 0 Null Descriptor */ 926{ 0x0, /* segment base address */ 927 0x0, /* length */ 928 0, /* segment type */ 929 0, /* segment descriptor priority level */ 930 0, /* segment descriptor present */ 931 0, 0, 932 0, /* default 32 vs 16 bit size */ 933 0 /* limit granularity (byte/page units)*/ }, 934/* GCODE_SEL 1 Code Descriptor for kernel */ 935{ 0x0, /* segment base address */ 936 0xfffff, /* length - all address space */ 937 SDT_MEMERA, /* segment type */ 938 0, /* segment descriptor priority level */ 939 1, /* segment descriptor present */ 940 0, 0, 941 1, /* default 32 vs 16 bit size */ 942 1 /* limit granularity (byte/page units)*/ }, 943/* GDATA_SEL 2 Data Descriptor for kernel */ 944{ 0x0, /* segment base address */ 945 0xfffff, /* length - all address space */ 946 SDT_MEMRWA, /* segment type */ 947 0, /* segment descriptor priority level */ 948 1, /* segment descriptor present */ 949 0, 0, 950 1, /* default 32 vs 16 bit size */ 951 1 /* limit granularity (byte/page units)*/ }, 952/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */ 953{ 0x0, /* segment base address */ 954 0xfffff, /* length - all address space */ 955 SDT_MEMRWA, /* segment type */ 956 0, /* segment descriptor priority level */ 957 1, /* segment descriptor present */ 958 0, 0, 959 1, /* default 32 vs 16 bit size */ 960 1 /* limit granularity (byte/page units)*/ }, 961/* GPROC0_SEL 4 Proc 0 Tss Descriptor */ 962{ 963 0x0, /* segment base address */ 964 sizeof(struct i386tss)-1,/* length - all address space */ 965 SDT_SYS386TSS, /* segment type */ 966 0, /* segment descriptor priority level */ 967 1, /* segment descriptor present */ 968 0, 0, 969 0, /* unused - default 32 vs 16 bit size */ 970 0 /* limit granularity (byte/page units)*/ }, 971/* GLDT_SEL 5 LDT Descriptor */ 972{ (int) ldt, /* segment base address */ 973 sizeof(ldt)-1, /* length - all address space */ 974 SDT_SYSLDT, /* segment type */ 975 SEL_UPL, /* segment descriptor priority level */ 976 1, /* segment descriptor present */ 977 0, 0, 978 0, /* unused - default 32 vs 16 bit size */ 979 0 /* limit granularity (byte/page units)*/ }, 980/* GUSERLDT_SEL 6 User LDT Descriptor per process */ 981{ (int) ldt, /* segment base address */ 982 (512 * sizeof(union descriptor)-1), /* length */ 983 SDT_SYSLDT, /* segment type */ 984 0, /* segment descriptor priority level */ 985 1, /* segment descriptor present */ 986 0, 0, 987 0, /* unused - default 32 vs 16 bit size */ 988 0 /* limit granularity (byte/page units)*/ }, 989/* GTGATE_SEL 7 Null Descriptor - Placeholder */ 990{ 0x0, /* segment base address */ 991 0x0, /* length - all address space */ 992 0, /* segment type */ 993 0, /* segment descriptor priority level */ 994 0, /* segment descriptor present */ 995 0, 0, 996 0, /* default 32 vs 16 bit size */ 997 0 /* limit granularity (byte/page units)*/ }, 998/* GPANIC_SEL 8 Panic Tss Descriptor */ 999{ (int) &dblfault_tss, /* segment base address */ 1000 sizeof(struct i386tss)-1,/* length - all address space */ 1001 SDT_SYS386TSS, /* segment type */ 1002 0, /* segment descriptor priority level */ 1003 1, /* segment descriptor present */ 1004 0, 0, 1005 0, /* unused - default 32 vs 16 bit size */ 1006 0 /* limit granularity (byte/page units)*/ }, 1007/* GBIOSCODE32_SEL 9 BIOS 32-bit interface (32bit Code) */ 1008{ 0, /* segment base address (overwritten) */ 1009 0xfffff, /* length */ 1010 SDT_MEMERA, /* segment type */ 1011 0, /* segment descriptor priority level */ 1012 1, /* segment descriptor present */ 1013 0, 0, 1014 1, /* default 32 vs 16 bit size */ 1015 1 /* limit granularity (byte/page units)*/ }, 1016/* GBIOSCODE16_SEL 10 BIOS 32-bit interface (16bit Code) */ 1017{ 0, /* segment base address (overwritten) */ 1018 0xfffff, /* length */ 1019 SDT_MEMERA, /* segment type */ 1020 0, /* segment descriptor priority level */ 1021 1, /* segment descriptor present */ 1022 0, 0, 1023 0, /* default 32 vs 16 bit size */ 1024 1 /* limit granularity (byte/page units)*/ }, 1025/* GBIOSDATA_SEL 11 BIOS 32-bit interface (Data) */ 1026{ 0, /* segment base address (overwritten) */ 1027 0xfffff, /* length */ 1028 SDT_MEMRWA, /* segment type */ 1029 0, /* segment descriptor priority level */ 1030 1, /* segment descriptor present */ 1031 0, 0, 1032 1, /* default 32 vs 16 bit size */ 1033 1 /* limit granularity (byte/page units)*/ }, 1034/* GBIOSUTIL_SEL 12 BIOS 16-bit interface (Utility) */ 1035{ 0, /* segment base address (overwritten) */ 1036 0xfffff, /* length */ 1037 SDT_MEMRWA, /* segment type */ 1038 0, /* segment descriptor priority level */ 1039 1, /* segment descriptor present */ 1040 0, 0, 1041 0, /* default 32 vs 16 bit size */ 1042 1 /* limit granularity (byte/page units)*/ }, 1043/* GBIOSARGS_SEL 13 BIOS 16-bit interface (Arguments) */ 1044{ 0, /* segment base address (overwritten) */ 1045 0xfffff, /* length */ 1046 SDT_MEMRWA, /* segment type */ 1047 0, /* segment descriptor priority level */ 1048 1, /* segment descriptor present */ 1049 0, 0, 1050 0, /* default 32 vs 16 bit size */ 1051 1 /* limit granularity (byte/page units)*/ }, 1052}; 1053 1054static struct soft_segment_descriptor ldt_segs[] = { 1055 /* Null Descriptor - overwritten by call gate */ 1056{ 0x0, /* segment base address */ 1057 0x0, /* length - all address space */ 1058 0, /* segment type */ 1059 0, /* segment descriptor priority level */ 1060 0, /* segment descriptor present */ 1061 0, 0, 1062 0, /* default 32 vs 16 bit size */ 1063 0 /* limit granularity (byte/page units)*/ }, 1064 /* Null Descriptor - overwritten by call gate */ 1065{ 0x0, /* segment base address */ 1066 0x0, /* length - all address space */ 1067 0, /* segment type */ 1068 0, /* segment descriptor priority level */ 1069 0, /* segment descriptor present */ 1070 0, 0, 1071 0, /* default 32 vs 16 bit size */ 1072 0 /* limit granularity (byte/page units)*/ }, 1073 /* Null Descriptor - overwritten by call gate */ 1074{ 0x0, /* segment base address */ 1075 0x0, /* length - all address space */ 1076 0, /* segment type */ 1077 0, /* segment descriptor priority level */ 1078 0, /* segment descriptor present */ 1079 0, 0, 1080 0, /* default 32 vs 16 bit size */ 1081 0 /* limit granularity (byte/page units)*/ }, 1082 /* Code Descriptor for user */ 1083{ 0x0, /* segment base address */ 1084 0xfffff, /* length - all address space */ 1085 SDT_MEMERA, /* segment type */ 1086 SEL_UPL, /* segment descriptor priority level */ 1087 1, /* segment descriptor present */ 1088 0, 0, 1089 1, /* default 32 vs 16 bit size */ 1090 1 /* limit granularity (byte/page units)*/ }, 1091 /* Null Descriptor - overwritten by call gate */ 1092{ 0x0, /* segment base address */ 1093 0x0, /* length - all address space */ 1094 0, /* segment type */ 1095 0, /* segment descriptor priority level */ 1096 0, /* segment descriptor present */ 1097 0, 0, 1098 0, /* default 32 vs 16 bit size */ 1099 0 /* limit granularity (byte/page units)*/ }, 1100 /* Data Descriptor for user */ 1101{ 0x0, /* segment base address */ 1102 0xfffff, /* length - all address space */ 1103 SDT_MEMRWA, /* segment type */ 1104 SEL_UPL, /* segment descriptor priority level */ 1105 1, /* segment descriptor present */ 1106 0, 0, 1107 1, /* default 32 vs 16 bit size */ 1108 1 /* limit granularity (byte/page units)*/ }, 1109}; 1110 1111void 1112setidt(idx, func, typ, dpl, selec) 1113 int idx; 1114 inthand_t *func; 1115 int typ; 1116 int dpl; 1117 int selec; 1118{ 1119 struct gate_descriptor *ip; 1120 1121 ip = idt + idx; 1122 ip->gd_looffset = (int)func; 1123 ip->gd_selector = selec; 1124 ip->gd_stkcpy = 0; 1125 ip->gd_xx = 0; 1126 ip->gd_type = typ; 1127 ip->gd_dpl = dpl; 1128 ip->gd_p = 1; 1129 ip->gd_hioffset = ((int)func)>>16 ; 1130} 1131 1132#define IDTVEC(name) __CONCAT(X,name) 1133 1134extern inthand_t 1135 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1136 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1137 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1138 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1139 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1140 1141void 1142sdtossd(sd, ssd) 1143 struct segment_descriptor *sd; 1144 struct soft_segment_descriptor *ssd; 1145{ 1146 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1147 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1148 ssd->ssd_type = sd->sd_type; 1149 ssd->ssd_dpl = sd->sd_dpl; 1150 ssd->ssd_p = sd->sd_p; 1151 ssd->ssd_def32 = sd->sd_def32; 1152 ssd->ssd_gran = sd->sd_gran; 1153} 1154 1155#define PHYSMAP_SIZE (2 * 8) 1156 1157/* 1158 * Populate the (physmap) array with base/bound pairs describing the 1159 * available physical memory in the system, then test this memory and 1160 * build the phys_avail array describing the actually-available memory. 1161 * 1162 * If we cannot accurately determine the physical memory map, then use 1163 * value from the 0xE801 call, and failing that, the RTC. 1164 * 1165 * Total memory size may be set by the kernel environment variable 1166 * hw.physmem or the compile-time define MAXMEM. 1167 */ 1168static void 1169getmemsize(int first) 1170{ 1171 int i, physmap_idx, pa_indx; 1172 u_int basemem, extmem; 1173 struct vm86frame vmf; 1174 struct vm86context vmc; 1175 vm_offset_t pa, physmap[PHYSMAP_SIZE]; 1176 pt_entry_t pte; 1177 const char *cp; 1178 struct { 1179 u_int64_t base; 1180 u_int64_t length; 1181 u_int32_t type; 1182 } *smap; 1183 1184 bzero(&vmf, sizeof(struct vm86frame)); 1185 bzero(physmap, sizeof(physmap)); 1186 1187 /* 1188 * Perform "base memory" related probes & setup 1189 */ 1190 vm86_intcall(0x12, &vmf); 1191 basemem = vmf.vmf_ax; 1192 if (basemem > 640) { 1193 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1194 basemem); 1195 basemem = 640; 1196 } 1197 1198 /* 1199 * XXX if biosbasemem is now < 640, there is a `hole' 1200 * between the end of base memory and the start of 1201 * ISA memory. The hole may be empty or it may 1202 * contain BIOS code or data. Map it read/write so 1203 * that the BIOS can write to it. (Memory from 0 to 1204 * the physical end of the kernel is mapped read-only 1205 * to begin with and then parts of it are remapped. 1206 * The parts that aren't remapped form holes that 1207 * remain read-only and are unused by the kernel. 1208 * The base memory area is below the physical end of 1209 * the kernel and right now forms a read-only hole. 1210 * The part of it from PAGE_SIZE to 1211 * (trunc_page(biosbasemem * 1024) - 1) will be 1212 * remapped and used by the kernel later.) 1213 * 1214 * This code is similar to the code used in 1215 * pmap_mapdev, but since no memory needs to be 1216 * allocated we simply change the mapping. 1217 */ 1218 for (pa = trunc_page(basemem * 1024); 1219 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1220 pte = (pt_entry_t)vtopte(pa + KERNBASE); 1221 *pte = pa | PG_RW | PG_V; 1222 } 1223 1224 /* 1225 * if basemem != 640, map pages r/w into vm86 page table so 1226 * that the bios can scribble on it. 1227 */ 1228 pte = (pt_entry_t)vm86paddr; 1229 for (i = basemem / 4; i < 160; i++) 1230 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1231 1232 /* 1233 * map page 1 R/W into the kernel page table so we can use it 1234 * as a buffer. The kernel will unmap this page later. 1235 */ 1236 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT)); 1237 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V; 1238 1239 /* 1240 * get memory map with INT 15:E820 1241 */ 1242#define SMAPSIZ sizeof(*smap) 1243#define SMAP_SIG 0x534D4150 /* 'SMAP' */ 1244 1245 vmc.npages = 0; 1246 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1247 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1248 1249 physmap_idx = 0; 1250 vmf.vmf_ebx = 0; 1251 do { 1252 vmf.vmf_eax = 0xE820; 1253 vmf.vmf_edx = SMAP_SIG; 1254 vmf.vmf_ecx = SMAPSIZ; 1255 i = vm86_datacall(0x15, &vmf, &vmc); 1256 if (i || vmf.vmf_eax != SMAP_SIG) 1257 break; 1258 if (boothowto & RB_VERBOSE) 1259 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n", 1260 smap->type, 1261 *(u_int32_t *)((char *)&smap->base + 4), 1262 (u_int32_t)smap->base, 1263 *(u_int32_t *)((char *)&smap->length + 4), 1264 (u_int32_t)smap->length); 1265 1266 if (smap->type != 0x01) 1267 goto next_run; 1268 1269 if (smap->length == 0) 1270 goto next_run; 1271 1272 if (smap->base >= 0xffffffff) { 1273 printf("%uK of memory above 4GB ignored\n", 1274 (u_int)(smap->length / 1024)); 1275 goto next_run; 1276 } 1277 1278 for (i = 0; i <= physmap_idx; i += 2) { 1279 if (smap->base < physmap[i + 1]) { 1280 if (boothowto & RB_VERBOSE) 1281 printf( 1282 "Overlapping or non-montonic memory region, ignoring second region\n"); 1283 goto next_run; 1284 } 1285 } 1286 1287 if (smap->base == physmap[physmap_idx + 1]) { 1288 physmap[physmap_idx + 1] += smap->length; 1289 goto next_run; 1290 } 1291 1292 physmap_idx += 2; 1293 if (physmap_idx == PHYSMAP_SIZE) { 1294 printf( 1295 "Too many segments in the physical address map, giving up\n"); 1296 break; 1297 } 1298 physmap[physmap_idx] = smap->base; 1299 physmap[physmap_idx + 1] = smap->base + smap->length; 1300next_run: 1301 } while (vmf.vmf_ebx != 0); 1302 1303 if (physmap[1] != 0) 1304 goto physmap_done; 1305 1306 /* 1307 * If we failed above, try memory map with INT 15:E801 1308 */ 1309 vmf.vmf_ax = 0xE801; 1310 if (vm86_intcall(0x15, &vmf) == 0) { 1311 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1312 } else { 1313#if 0 1314 vmf.vmf_ah = 0x88; 1315 vm86_intcall(0x15, &vmf); 1316 extmem = vmf.vmf_ax; 1317#else 1318 /* 1319 * Prefer the RTC value for extended memory. 1320 */ 1321 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1322#endif 1323 } 1324 1325 /* 1326 * Special hack for chipsets that still remap the 384k hole when 1327 * there's 16MB of memory - this really confuses people that 1328 * are trying to use bus mastering ISA controllers with the 1329 * "16MB limit"; they only have 16MB, but the remapping puts 1330 * them beyond the limit. 1331 * 1332 * If extended memory is between 15-16MB (16-17MB phys address range), 1333 * chop it to 15MB. 1334 */ 1335 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1336 extmem = 15 * 1024; 1337 1338 physmap[0] = 0; 1339 physmap[1] = basemem * 1024; 1340 physmap_idx = 2; 1341 physmap[physmap_idx] = 0x100000; 1342 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1343 1344physmap_done: 1345 /* 1346 * Now, physmap contains a map of physical memory. 1347 */ 1348 1349#ifdef SMP 1350 /* make hole for AP bootstrap code */ 1351 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1352 1353 /* look for the MP hardware - needed for apic addresses */ 1354 mp_probe(); 1355#endif 1356 1357 /* 1358 * Maxmem isn't the "maximum memory", it's one larger than the 1359 * highest page of the physical address space. It should be 1360 * called something like "Maxphyspage". We may adjust this 1361 * based on ``hw.physmem'' and the results of the memory test. 1362 */ 1363 Maxmem = atop(physmap[physmap_idx + 1]); 1364 1365#ifdef MAXMEM 1366 Maxmem = MAXMEM / 4; 1367#endif 1368 1369 /* 1370 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes 1371 * for the appropriate modifiers. This overrides MAXMEM. 1372 */ 1373 if ((cp = getenv("hw.physmem")) != NULL) { 1374 u_int64_t AllowMem, sanity; 1375 const char *ep; 1376 1377 sanity = AllowMem = strtouq(cp, &ep, 0); 1378 if ((ep != cp) && (*ep != 0)) { 1379 switch(*ep) { 1380 case 'g': 1381 case 'G': 1382 AllowMem <<= 10; 1383 case 'm': 1384 case 'M': 1385 AllowMem <<= 10; 1386 case 'k': 1387 case 'K': 1388 AllowMem <<= 10; 1389 break; 1390 default: 1391 AllowMem = sanity = 0; 1392 } 1393 if (AllowMem < sanity) 1394 AllowMem = 0; 1395 } 1396 if (AllowMem == 0) 1397 printf("Ignoring invalid memory size of '%s'\n", cp); 1398 else 1399 Maxmem = atop(AllowMem); 1400 } 1401 1402 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1403 (boothowto & RB_VERBOSE)) 1404 printf("Physical memory use set to %uK\n", Maxmem * 4); 1405 1406 /* 1407 * If Maxmem has been increased beyond what the system has detected, 1408 * extend the last memory segment to the new limit. 1409 */ 1410 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1411 physmap[physmap_idx + 1] = ptoa(Maxmem); 1412 1413 /* call pmap initialization to make new kernel address space */ 1414 pmap_bootstrap(first, 0); 1415 1416 /* 1417 * Size up each available chunk of physical memory. 1418 */ 1419 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1420 pa_indx = 0; 1421 phys_avail[pa_indx++] = physmap[0]; 1422 phys_avail[pa_indx] = physmap[0]; 1423#if 0 1424 pte = (pt_entry_t)vtopte(KERNBASE); 1425#else 1426 pte = (pt_entry_t)CMAP1; 1427#endif 1428 1429 /* 1430 * physmap is in bytes, so when converting to page boundaries, 1431 * round up the start address and round down the end address. 1432 */ 1433 for (i = 0; i <= physmap_idx; i += 2) { 1434 vm_offset_t end; 1435 1436 end = ptoa(Maxmem); 1437 if (physmap[i + 1] < end) 1438 end = trunc_page(physmap[i + 1]); 1439 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1440 int tmp, page_bad; 1441#if 0 1442 int *ptr = 0; 1443#else 1444 int *ptr = (int *)CADDR1; 1445#endif 1446 1447 /* 1448 * block out kernel memory as not available. 1449 */ 1450 if (pa >= 0x100000 && pa < first) 1451 continue; 1452 1453 page_bad = FALSE; 1454 1455 /* 1456 * map page into kernel: valid, read/write,non-cacheable 1457 */ 1458 *pte = pa | PG_V | PG_RW | PG_N; 1459 invltlb(); 1460 1461 tmp = *(int *)ptr; 1462 /* 1463 * Test for alternating 1's and 0's 1464 */ 1465 *(volatile int *)ptr = 0xaaaaaaaa; 1466 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1467 page_bad = TRUE; 1468 } 1469 /* 1470 * Test for alternating 0's and 1's 1471 */ 1472 *(volatile int *)ptr = 0x55555555; 1473 if (*(volatile int *)ptr != 0x55555555) { 1474 page_bad = TRUE; 1475 } 1476 /* 1477 * Test for all 1's 1478 */ 1479 *(volatile int *)ptr = 0xffffffff; 1480 if (*(volatile int *)ptr != 0xffffffff) { 1481 page_bad = TRUE; 1482 } 1483 /* 1484 * Test for all 0's 1485 */ 1486 *(volatile int *)ptr = 0x0; 1487 if (*(volatile int *)ptr != 0x0) { 1488 page_bad = TRUE; 1489 } 1490 /* 1491 * Restore original value. 1492 */ 1493 *(int *)ptr = tmp; 1494 1495 /* 1496 * Adjust array of valid/good pages. 1497 */ 1498 if (page_bad == TRUE) { 1499 continue; 1500 } 1501 /* 1502 * If this good page is a continuation of the 1503 * previous set of good pages, then just increase 1504 * the end pointer. Otherwise start a new chunk. 1505 * Note that "end" points one higher than end, 1506 * making the range >= start and < end. 1507 * If we're also doing a speculative memory 1508 * test and we at or past the end, bump up Maxmem 1509 * so that we keep going. The first bad page 1510 * will terminate the loop. 1511 */ 1512 if (phys_avail[pa_indx] == pa) { 1513 phys_avail[pa_indx] += PAGE_SIZE; 1514 } else { 1515 pa_indx++; 1516 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1517 printf("Too many holes in the physical address space, giving up\n"); 1518 pa_indx--; 1519 break; 1520 } 1521 phys_avail[pa_indx++] = pa; /* start */ 1522 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1523 } 1524 physmem++; 1525 } 1526 } 1527 *pte = 0; 1528 invltlb(); 1529 1530 /* 1531 * XXX 1532 * The last chunk must contain at least one page plus the message 1533 * buffer to avoid complicating other code (message buffer address 1534 * calculation, etc.). 1535 */ 1536 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1537 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1538 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1539 phys_avail[pa_indx--] = 0; 1540 phys_avail[pa_indx--] = 0; 1541 } 1542 1543 Maxmem = atop(phys_avail[pa_indx]); 1544 1545 /* Trim off space for the message buffer. */ 1546 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1547 1548 avail_end = phys_avail[pa_indx]; 1549} 1550 1551void 1552init386(first) 1553 int first; 1554{ 1555 int x; 1556 struct gate_descriptor *gdp; 1557 int gsel_tss; 1558#ifndef SMP 1559 /* table descriptors - used to load tables by microp */ 1560 struct region_descriptor r_gdt, r_idt; 1561#endif 1562 int off; 1563 1564 /* 1565 * Prevent lowering of the ipl if we call tsleep() early. 1566 */ 1567 safepri = cpl; 1568 1569 proc0.p_addr = proc0paddr; 1570 1571 atdevbase = ISA_HOLE_START + KERNBASE; 1572 1573 if (bootinfo.bi_modulep) { 1574 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1575 preload_bootstrap_relocate(KERNBASE); 1576 } 1577 if (bootinfo.bi_envp) 1578 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1579 1580 /* 1581 * make gdt memory segments, the code segment goes up to end of the 1582 * page with etext in it, the data segment goes to the end of 1583 * the address space 1584 */ 1585 /* 1586 * XXX text protection is temporarily (?) disabled. The limit was 1587 * i386_btop(round_page(etext)) - 1. 1588 */ 1589 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1590 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1591#ifdef SMP 1592 gdt_segs[GPRIV_SEL].ssd_limit = 1593 i386_btop(sizeof(struct privatespace)) - 1; 1594 gdt_segs[GPRIV_SEL].ssd_base = (int) &SMP_prvspace[0]; 1595 gdt_segs[GPROC0_SEL].ssd_base = 1596 (int) &SMP_prvspace[0].globaldata.gd_common_tss; 1597 SMP_prvspace[0].globaldata.gd_prvspace = &SMP_prvspace[0]; 1598#else 1599 gdt_segs[GPRIV_SEL].ssd_limit = i386_btop(0) - 1; 1600 gdt_segs[GPROC0_SEL].ssd_base = (int) &common_tss; 1601#endif 1602 1603 for (x = 0; x < NGDT; x++) { 1604#ifdef BDE_DEBUGGER 1605 /* avoid overwriting db entries with APM ones */ 1606 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL) 1607 continue; 1608#endif 1609 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1610 } 1611 1612 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1613 r_gdt.rd_base = (int) gdt; 1614 lgdt(&r_gdt); 1615 1616 /* make ldt memory segments */ 1617 /* 1618 * The data segment limit must not cover the user area because we 1619 * don't want the user area to be writable in copyout() etc. (page 1620 * level protection is lost in kernel mode on 386's). Also, we 1621 * don't want the user area to be writable directly (page level 1622 * protection of the user area is not available on 486's with 1623 * CR0_WP set, because there is no user-read/kernel-write mode). 1624 * 1625 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1626 * should be spelled ...MAX_USER... 1627 */ 1628#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1629 /* 1630 * The code segment limit has to cover the user area until we move 1631 * the signal trampoline out of the user area. This is safe because 1632 * the code segment cannot be written to directly. 1633 */ 1634#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1635 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1636 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1637 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1638 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1639 1640 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1641 lldt(_default_ldt); 1642#ifdef USER_LDT 1643 currentldt = _default_ldt; 1644#endif 1645 1646 /* exceptions */ 1647 for (x = 0; x < NIDT; x++) 1648 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1649 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1650 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1651 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1652 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1653 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1654 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1655 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1656 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1657 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1658 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1659 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1660 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1661 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1662 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1663 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1664 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1665 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1666 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1667 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1668 setidt(0x80, &IDTVEC(int0x80_syscall), 1669 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1670 1671 r_idt.rd_limit = sizeof(idt0) - 1; 1672 r_idt.rd_base = (int) idt; 1673 lidt(&r_idt); 1674 1675 /* 1676 * Initialize the console before we print anything out. 1677 */ 1678 cninit(); 1679 1680#include "isa.h" 1681#if NISA >0 1682 isa_defaultirq(); 1683#endif 1684 rand_initialize(); 1685 1686#ifdef DDB 1687 kdb_init(); 1688 if (boothowto & RB_KDB) 1689 Debugger("Boot flags requested debugger"); 1690#endif 1691 1692 finishidentcpu(); /* Final stage of CPU initialization */ 1693 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1694 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1695 initializecpu(); /* Initialize CPU registers */ 1696 1697 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1698 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1699 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1700 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1701 private_tss = 0; 1702 tss_gdt = &gdt[GPROC0_SEL].sd; 1703 common_tssd = *tss_gdt; 1704 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1705 ltr(gsel_tss); 1706 1707 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1708 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1709 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1710 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1711 dblfault_tss.tss_cr3 = (int)IdlePTD; 1712 dblfault_tss.tss_eip = (int) dblfault_handler; 1713 dblfault_tss.tss_eflags = PSL_KERNEL; 1714 dblfault_tss.tss_ds = dblfault_tss.tss_es = 1715 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1716 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 1717 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1718 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1719 1720 vm86_initialize(); 1721 getmemsize(first); 1722 1723 /* now running on new page tables, configured,and u/iom is accessible */ 1724 1725 /* Map the message buffer. */ 1726 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1727 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1728 1729 msgbufinit(msgbufp, MSGBUF_SIZE); 1730 1731 /* make a call gate to reenter kernel with */ 1732 gdp = &ldt[LSYS5CALLS_SEL].gd; 1733 1734 x = (int) &IDTVEC(syscall); 1735 gdp->gd_looffset = x++; 1736 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1737 gdp->gd_stkcpy = 1; 1738 gdp->gd_type = SDT_SYS386CGT; 1739 gdp->gd_dpl = SEL_UPL; 1740 gdp->gd_p = 1; 1741 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1742 1743 /* XXX does this work? */ 1744 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1745 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1746 1747 /* transfer to user mode */ 1748 1749 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1750 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1751 1752 /* setup proc 0's pcb */ 1753 proc0.p_addr->u_pcb.pcb_flags = 0; 1754 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1755#ifdef SMP 1756 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1757#endif 1758 proc0.p_addr->u_pcb.pcb_ext = 0; 1759} 1760 1761#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1762static void f00f_hack(void *unused); 1763SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1764 1765static void 1766f00f_hack(void *unused) { 1767 struct gate_descriptor *new_idt; 1768#ifndef SMP 1769 struct region_descriptor r_idt; 1770#endif 1771 vm_offset_t tmp; 1772 1773 if (!has_f00f_bug) 1774 return; 1775 1776 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1777 1778 r_idt.rd_limit = sizeof(idt0) - 1; 1779 1780 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1781 if (tmp == 0) 1782 panic("kmem_alloc returned 0"); 1783 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1784 panic("kmem_alloc returned non-page-aligned memory"); 1785 /* Put the first seven entries in the lower page */ 1786 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1787 bcopy(idt, new_idt, sizeof(idt0)); 1788 r_idt.rd_base = (int)new_idt; 1789 lidt(&r_idt); 1790 idt = new_idt; 1791 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1792 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1793 panic("vm_map_protect failed"); 1794 return; 1795} 1796#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1797 1798int 1799ptrace_set_pc(p, addr) 1800 struct proc *p; 1801 unsigned long addr; 1802{ 1803 p->p_md.md_regs->tf_eip = addr; 1804 return (0); 1805} 1806 1807int 1808ptrace_single_step(p) 1809 struct proc *p; 1810{ 1811 p->p_md.md_regs->tf_eflags |= PSL_T; 1812 return (0); 1813} 1814 1815int ptrace_read_u_check(p, addr, len) 1816 struct proc *p; 1817 vm_offset_t addr; 1818 size_t len; 1819{ 1820 vm_offset_t gap; 1821 1822 if ((vm_offset_t) (addr + len) < addr) 1823 return EPERM; 1824 if ((vm_offset_t) (addr + len) <= sizeof(struct user)) 1825 return 0; 1826 1827 gap = (char *) p->p_md.md_regs - (char *) p->p_addr; 1828 1829 if ((vm_offset_t) addr < gap) 1830 return EPERM; 1831 if ((vm_offset_t) (addr + len) <= 1832 (vm_offset_t) (gap + sizeof(struct trapframe))) 1833 return 0; 1834 return EPERM; 1835} 1836 1837int ptrace_write_u(p, off, data) 1838 struct proc *p; 1839 vm_offset_t off; 1840 long data; 1841{ 1842 struct trapframe frame_copy; 1843 vm_offset_t min; 1844 struct trapframe *tp; 1845 1846 /* 1847 * Privileged kernel state is scattered all over the user area. 1848 * Only allow write access to parts of regs and to fpregs. 1849 */ 1850 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1851 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1852 tp = p->p_md.md_regs; 1853 frame_copy = *tp; 1854 *(int *)((char *)&frame_copy + (off - min)) = data; 1855 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1856 !CS_SECURE(frame_copy.tf_cs)) 1857 return (EINVAL); 1858 *(int*)((char *)p->p_addr + off) = data; 1859 return (0); 1860 } 1861 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1862 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1863 *(int*)((char *)p->p_addr + off) = data; 1864 return (0); 1865 } 1866 return (EFAULT); 1867} 1868 1869int 1870fill_regs(p, regs) 1871 struct proc *p; 1872 struct reg *regs; 1873{ 1874 struct pcb *pcb; 1875 struct trapframe *tp; 1876 1877 tp = p->p_md.md_regs; 1878 regs->r_fs = tp->tf_fs; 1879 regs->r_es = tp->tf_es; 1880 regs->r_ds = tp->tf_ds; 1881 regs->r_edi = tp->tf_edi; 1882 regs->r_esi = tp->tf_esi; 1883 regs->r_ebp = tp->tf_ebp; 1884 regs->r_ebx = tp->tf_ebx; 1885 regs->r_edx = tp->tf_edx; 1886 regs->r_ecx = tp->tf_ecx; 1887 regs->r_eax = tp->tf_eax; 1888 regs->r_eip = tp->tf_eip; 1889 regs->r_cs = tp->tf_cs; 1890 regs->r_eflags = tp->tf_eflags; 1891 regs->r_esp = tp->tf_esp; 1892 regs->r_ss = tp->tf_ss; 1893 pcb = &p->p_addr->u_pcb; 1894 regs->r_gs = pcb->pcb_gs; 1895 return (0); 1896} 1897 1898int 1899set_regs(p, regs) 1900 struct proc *p; 1901 struct reg *regs; 1902{ 1903 struct pcb *pcb; 1904 struct trapframe *tp; 1905 1906 tp = p->p_md.md_regs; 1907 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1908 !CS_SECURE(regs->r_cs)) 1909 return (EINVAL); 1910 tp->tf_fs = regs->r_fs; 1911 tp->tf_es = regs->r_es; 1912 tp->tf_ds = regs->r_ds; 1913 tp->tf_edi = regs->r_edi; 1914 tp->tf_esi = regs->r_esi; 1915 tp->tf_ebp = regs->r_ebp; 1916 tp->tf_ebx = regs->r_ebx; 1917 tp->tf_edx = regs->r_edx; 1918 tp->tf_ecx = regs->r_ecx; 1919 tp->tf_eax = regs->r_eax; 1920 tp->tf_eip = regs->r_eip; 1921 tp->tf_cs = regs->r_cs; 1922 tp->tf_eflags = regs->r_eflags; 1923 tp->tf_esp = regs->r_esp; 1924 tp->tf_ss = regs->r_ss; 1925 pcb = &p->p_addr->u_pcb; 1926 pcb->pcb_gs = regs->r_gs; 1927 return (0); 1928} 1929 1930int 1931fill_fpregs(p, fpregs) 1932 struct proc *p; 1933 struct fpreg *fpregs; 1934{ 1935 bcopy(&p->p_addr->u_pcb.pcb_savefpu, fpregs, sizeof *fpregs); 1936 return (0); 1937} 1938 1939int 1940set_fpregs(p, fpregs) 1941 struct proc *p; 1942 struct fpreg *fpregs; 1943{ 1944 bcopy(fpregs, &p->p_addr->u_pcb.pcb_savefpu, sizeof *fpregs); 1945 return (0); 1946} 1947 1948int 1949fill_dbregs(p, dbregs) 1950 struct proc *p; 1951 struct dbreg *dbregs; 1952{ 1953 struct pcb *pcb; 1954 1955 pcb = &p->p_addr->u_pcb; 1956 dbregs->dr0 = pcb->pcb_dr0; 1957 dbregs->dr1 = pcb->pcb_dr1; 1958 dbregs->dr2 = pcb->pcb_dr2; 1959 dbregs->dr3 = pcb->pcb_dr3; 1960 dbregs->dr4 = 0; 1961 dbregs->dr5 = 0; 1962 dbregs->dr6 = pcb->pcb_dr6; 1963 dbregs->dr7 = pcb->pcb_dr7; 1964 return (0); 1965} 1966 1967int 1968set_dbregs(p, dbregs) 1969 struct proc *p; 1970 struct dbreg *dbregs; 1971{ 1972 struct pcb *pcb; 1973 1974 pcb = &p->p_addr->u_pcb; 1975 1976 /* 1977 * Don't let a process set a breakpoint that is not within the 1978 * process's address space. If a process could do this, it 1979 * could halt the system by setting a breakpoint in the kernel 1980 * (if ddb was enabled). Thus, we need to check to make sure 1981 * that no breakpoints are being enabled for addresses outside 1982 * process's address space, unless, perhaps, we were called by 1983 * uid 0. 1984 * 1985 * XXX - what about when the watched area of the user's 1986 * address space is written into from within the kernel 1987 * ... wouldn't that still cause a breakpoint to be generated 1988 * from within kernel mode? 1989 */ 1990 1991 if (p->p_cred->pc_ucred->cr_uid != 0) { 1992 if (dbregs->dr7 & 0x3) { 1993 /* dr0 is enabled */ 1994 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS) 1995 return (EINVAL); 1996 } 1997 1998 if (dbregs->dr7 & (0x3<<2)) { 1999 /* dr1 is enabled */ 2000 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS) 2001 return (EINVAL); 2002 } 2003 2004 if (dbregs->dr7 & (0x3<<4)) { 2005 /* dr2 is enabled */ 2006 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS) 2007 return (EINVAL); 2008 } 2009 2010 if (dbregs->dr7 & (0x3<<6)) { 2011 /* dr3 is enabled */ 2012 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS) 2013 return (EINVAL); 2014 } 2015 } 2016 2017 pcb->pcb_dr0 = dbregs->dr0; 2018 pcb->pcb_dr1 = dbregs->dr1; 2019 pcb->pcb_dr2 = dbregs->dr2; 2020 pcb->pcb_dr3 = dbregs->dr3; 2021 pcb->pcb_dr6 = dbregs->dr6; 2022 pcb->pcb_dr7 = dbregs->dr7; 2023 2024 pcb->pcb_flags |= PCB_DBREGS; 2025 2026 return (0); 2027} 2028 2029#ifndef DDB 2030void 2031Debugger(const char *msg) 2032{ 2033 printf("Debugger(\"%s\") called.\n", msg); 2034} 2035#endif /* no DDB */ 2036 2037#include <sys/disklabel.h> 2038 2039/* 2040 * Determine the size of the transfer, and make sure it is 2041 * within the boundaries of the partition. Adjust transfer 2042 * if needed, and signal errors or early completion. 2043 */ 2044int 2045bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 2046{ 2047 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 2048 int labelsect = lp->d_partitions[0].p_offset; 2049 int maxsz = p->p_size, 2050 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 2051 2052 /* overwriting disk label ? */ 2053 /* XXX should also protect bootstrap in first 8K */ 2054 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 2055#if LABELSECTOR != 0 2056 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 2057#endif 2058 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 2059 bp->b_error = EROFS; 2060 goto bad; 2061 } 2062 2063#if defined(DOSBBSECTOR) && defined(notyet) 2064 /* overwriting master boot record? */ 2065 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 2066 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 2067 bp->b_error = EROFS; 2068 goto bad; 2069 } 2070#endif 2071 2072 /* beyond partition? */ 2073 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 2074 /* if exactly at end of disk, return an EOF */ 2075 if (bp->b_blkno == maxsz) { 2076 bp->b_resid = bp->b_bcount; 2077 return(0); 2078 } 2079 /* or truncate if part of it fits */ 2080 sz = maxsz - bp->b_blkno; 2081 if (sz <= 0) { 2082 bp->b_error = EINVAL; 2083 goto bad; 2084 } 2085 bp->b_bcount = sz << DEV_BSHIFT; 2086 } 2087 2088 bp->b_pblkno = bp->b_blkno + p->p_offset; 2089 return(1); 2090 2091bad: 2092 bp->b_flags |= B_ERROR; 2093 return(-1); 2094} 2095 2096#ifdef DDB 2097 2098/* 2099 * Provide inb() and outb() as functions. They are normally only 2100 * available as macros calling inlined functions, thus cannot be 2101 * called inside DDB. 2102 * 2103 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2104 */ 2105 2106#undef inb 2107#undef outb 2108 2109/* silence compiler warnings */ 2110u_char inb(u_int); 2111void outb(u_int, u_char); 2112 2113u_char 2114inb(u_int port) 2115{ 2116 u_char data; 2117 /* 2118 * We use %%dx and not %1 here because i/o is done at %dx and not at 2119 * %edx, while gcc generates inferior code (movw instead of movl) 2120 * if we tell it to load (u_short) port. 2121 */ 2122 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2123 return (data); 2124} 2125 2126void 2127outb(u_int port, u_char data) 2128{ 2129 u_char al; 2130 /* 2131 * Use an unnecessary assignment to help gcc's register allocator. 2132 * This make a large difference for gcc-1.40 and a tiny difference 2133 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2134 * best results. gcc-2.6.0 can't handle this. 2135 */ 2136 al = data; 2137 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2138} 2139 2140#endif /* DDB */ 2141