machdep.c revision 36605
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.297 1998/05/28 09:29:57 phk Exp $ 39 */ 40 41#include "apm.h" 42#include "ether.h" 43#include "npx.h" 44#include "opt_atalk.h" 45#include "opt_bounce.h" 46#include "opt_cpu.h" 47#include "opt_ddb.h" 48#include "opt_inet.h" 49#include "opt_ipx.h" 50#include "opt_maxmem.h" 51#include "opt_msgbuf.h" 52#include "opt_perfmon.h" 53#include "opt_smp.h" 54#include "opt_sysvipc.h" 55#include "opt_user_ldt.h" 56#include "opt_userconfig.h" 57#include "opt_vm86.h" 58 59#include <sys/param.h> 60#include <sys/systm.h> 61#include <sys/sysproto.h> 62#include <sys/signalvar.h> 63#include <sys/kernel.h> 64#include <sys/proc.h> 65#include <sys/buf.h> 66#include <sys/reboot.h> 67#include <sys/conf.h> 68#include <sys/callout.h> 69#include <sys/malloc.h> 70#include <sys/mbuf.h> 71#include <sys/msgbuf.h> 72#include <sys/sysent.h> 73#include <sys/sysctl.h> 74#include <sys/vmmeter.h> 75 76#ifdef SYSVSHM 77#include <sys/shm.h> 78#endif 79 80#ifdef SYSVMSG 81#include <sys/msg.h> 82#endif 83 84#ifdef SYSVSEM 85#include <sys/sem.h> 86#endif 87 88#include <vm/vm.h> 89#include <vm/vm_param.h> 90#include <vm/vm_prot.h> 91#include <sys/lock.h> 92#include <vm/vm_kern.h> 93#include <vm/vm_object.h> 94#include <vm/vm_page.h> 95#include <vm/vm_map.h> 96#include <vm/vm_pager.h> 97#include <vm/vm_extern.h> 98 99#include <sys/user.h> 100#include <sys/exec.h> 101 102#include <ddb/ddb.h> 103 104#if defined(INET) || defined(IPX) || defined(NATM) || defined(NETATALK) \ 105 || NETHER > 0 || defined(NS) 106#define NETISR 107#endif 108 109#ifdef NETISR 110#include <net/netisr.h> 111#endif 112 113#if NAPM > 0 114#include <machine/apm_bios.h> 115#endif 116#include <machine/cpu.h> 117#include <machine/reg.h> 118#include <machine/clock.h> 119#include <machine/specialreg.h> 120#include <machine/cons.h> 121#include <machine/bootinfo.h> 122#include <machine/ipl.h> 123#include <machine/md_var.h> 124#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 125#ifdef SMP 126#include <machine/smp.h> 127#endif 128#ifdef PERFMON 129#include <machine/perfmon.h> 130#endif 131 132#include <i386/isa/isa_device.h> 133#include <i386/isa/intr_machdep.h> 134#include <i386/isa/rtc.h> 135#include <machine/random.h> 136#include <sys/ptrace.h> 137 138extern void init386 __P((int first)); 139extern void dblfault_handler __P((void)); 140 141extern void printcpuinfo(void); /* XXX header file */ 142extern void earlysetcpuclass(void); /* same header file */ 143extern void finishidentcpu(void); 144extern void panicifcpuunsupported(void); 145extern void initializecpu(void); 146 147static void cpu_startup __P((void *)); 148SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 149 150static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf"); 151 152#ifdef BOUNCE_BUFFERS 153#ifdef BOUNCEPAGES 154int bouncepages = BOUNCEPAGES; 155#else 156int bouncepages = 0; 157#endif 158#endif /* BOUNCE_BUFFERS */ 159 160int _udatasel, _ucodesel; 161u_int atdevbase; 162 163#if defined(SWTCH_OPTIM_STATS) 164extern int swtch_optim_stats; 165SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 166 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 167SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 168 CTLFLAG_RD, &tlb_flush_count, 0, ""); 169#endif 170 171 172int physmem = 0; 173int cold = 1; 174 175static int 176sysctl_hw_physmem SYSCTL_HANDLER_ARGS 177{ 178 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 179 return (error); 180} 181 182SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 183 0, 0, sysctl_hw_physmem, "I", ""); 184 185static int 186sysctl_hw_usermem SYSCTL_HANDLER_ARGS 187{ 188 int error = sysctl_handle_int(oidp, 0, 189 ctob(physmem - cnt.v_wire_count), req); 190 return (error); 191} 192 193SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 194 0, 0, sysctl_hw_usermem, "I", ""); 195 196int bootverbose = 0, Maxmem = 0; 197long dumplo; 198 199vm_offset_t phys_avail[10]; 200 201/* must be 2 less so 0 0 can signal end of chunks */ 202#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 203 204#ifdef NETISR 205static void setup_netisrs __P((struct linker_set *)); 206#endif 207 208static vm_offset_t buffer_sva, buffer_eva; 209vm_offset_t clean_sva, clean_eva; 210static vm_offset_t pager_sva, pager_eva; 211#ifdef NETISR 212extern struct linker_set netisr_set; 213#endif 214 215#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 216 217static void 218cpu_startup(dummy) 219 void *dummy; 220{ 221 register unsigned i; 222 register caddr_t v; 223 vm_offset_t maxaddr; 224 vm_size_t size = 0; 225 int firstaddr; 226 vm_offset_t minaddr; 227 228 if (boothowto & RB_VERBOSE) 229 bootverbose++; 230 231 /* 232 * Good {morning,afternoon,evening,night}. 233 */ 234 printf(version); 235 earlysetcpuclass(); 236 startrtclock(); 237 printcpuinfo(); 238 panicifcpuunsupported(); 239#ifdef PERFMON 240 perfmon_init(); 241#endif 242 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 243 /* 244 * Display any holes after the first chunk of extended memory. 245 */ 246 if (bootverbose) { 247 int indx; 248 249 printf("Physical memory chunk(s):\n"); 250 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 251 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 252 253 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 254 phys_avail[indx + 1] - 1, size1, size1 / PAGE_SIZE); 255 } 256 } 257 258#ifdef NETISR 259 /* 260 * Quickly wire in netisrs. 261 */ 262 setup_netisrs(&netisr_set); 263#endif 264 265 /* 266 * Calculate callout wheel size 267 */ 268 for (callwheelsize = 1, callwheelbits = 0; 269 callwheelsize < ncallout; 270 callwheelsize <<= 1, ++callwheelbits) 271 ; 272 callwheelmask = callwheelsize - 1; 273 274 /* 275 * Allocate space for system data structures. 276 * The first available kernel virtual address is in "v". 277 * As pages of kernel virtual memory are allocated, "v" is incremented. 278 * As pages of memory are allocated and cleared, 279 * "firstaddr" is incremented. 280 * An index into the kernel page table corresponding to the 281 * virtual memory address maintained in "v" is kept in "mapaddr". 282 */ 283 284 /* 285 * Make two passes. The first pass calculates how much memory is 286 * needed and allocates it. The second pass assigns virtual 287 * addresses to the various data structures. 288 */ 289 firstaddr = 0; 290again: 291 v = (caddr_t)firstaddr; 292 293#define valloc(name, type, num) \ 294 (name) = (type *)v; v = (caddr_t)((name)+(num)) 295#define valloclim(name, type, num, lim) \ 296 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 297 298#ifdef BOUNCE_BUFFERS 299 /* 300 * If there is more than 16MB of memory, allocate some bounce buffers 301 */ 302 if (Maxmem > 4096) { 303 if (bouncepages == 0) { 304 bouncepages = 64; 305 } 306 v = (caddr_t)((vm_offset_t)round_page(v)); 307 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 308 } 309#endif 310 311 valloc(callout, struct callout, ncallout); 312 valloc(callwheel, struct callout_tailq, callwheelsize); 313#ifdef SYSVSHM 314 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 315#endif 316#ifdef SYSVSEM 317 valloc(sema, struct semid_ds, seminfo.semmni); 318 valloc(sem, struct sem, seminfo.semmns); 319 /* This is pretty disgusting! */ 320 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 321#endif 322#ifdef SYSVMSG 323 valloc(msgpool, char, msginfo.msgmax); 324 valloc(msgmaps, struct msgmap, msginfo.msgseg); 325 valloc(msghdrs, struct msg, msginfo.msgtql); 326 valloc(msqids, struct msqid_ds, msginfo.msgmni); 327#endif 328 329 if (nbuf == 0) { 330 nbuf = 30; 331 if( physmem > 1024) 332 nbuf += min((physmem - 1024) / 8, 2048); 333 } 334 nswbuf = max(min(nbuf/4, 64), 16); 335 336 valloc(swbuf, struct buf, nswbuf); 337 valloc(buf, struct buf, nbuf); 338 339 340 /* 341 * End of first pass, size has been calculated so allocate memory 342 */ 343 if (firstaddr == 0) { 344 size = (vm_size_t)(v - firstaddr); 345 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 346 if (firstaddr == 0) 347 panic("startup: no room for tables"); 348 goto again; 349 } 350 351 /* 352 * End of second pass, addresses have been assigned 353 */ 354 if ((vm_size_t)(v - firstaddr) != size) 355 panic("startup: table size inconsistency"); 356 357#ifdef BOUNCE_BUFFERS 358 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 359 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 360 maxbkva + pager_map_size); 361 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva); 362#else 363 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 364 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size); 365#endif 366 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 367 (nbuf*BKVASIZE)); 368 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 369 (nswbuf*MAXPHYS) + pager_map_size); 370 pager_map->system_map = 1; 371 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 372 (16*(ARG_MAX+(PAGE_SIZE*3)))); 373 374 /* 375 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 376 * we use the more space efficient malloc in place of kmem_alloc. 377 */ 378 { 379 vm_offset_t mb_map_size; 380 381 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 382 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 383 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 384 bzero(mclrefcnt, mb_map_size / MCLBYTES); 385 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 386 mb_map_size); 387 mb_map->system_map = 1; 388 } 389 390 /* 391 * Initialize callouts 392 */ 393 SLIST_INIT(&callfree); 394 for (i = 0; i < ncallout; i++) { 395 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle); 396 } 397 398 for (i = 0; i < callwheelsize; i++) { 399 TAILQ_INIT(&callwheel[i]); 400 } 401 402#if defined(USERCONFIG) 403#if defined(USERCONFIG_BOOT) 404 if (1) { 405#else 406 if (boothowto & RB_CONFIG) { 407#endif 408 userconfig(); 409 cninit(); /* the preferred console may have changed */ 410 } 411#endif 412 413#ifdef BOUNCE_BUFFERS 414 /* 415 * init bounce buffers 416 */ 417 vm_bounce_init(); 418#endif 419 420 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 421 ptoa(cnt.v_free_count) / 1024); 422 423 /* 424 * Set up buffers, so they can be used to read disk labels. 425 */ 426 bufinit(); 427 vm_pager_bufferinit(); 428 429#ifdef SMP 430 /* 431 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 432 */ 433 mp_start(); /* fire up the APs and APICs */ 434 mp_announce(); 435#endif /* SMP */ 436} 437 438#ifdef NETISR 439int 440register_netisr(num, handler) 441 int num; 442 netisr_t *handler; 443{ 444 445 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 446 printf("register_netisr: bad isr number: %d\n", num); 447 return (EINVAL); 448 } 449 netisrs[num] = handler; 450 return (0); 451} 452 453static void 454setup_netisrs(ls) 455 struct linker_set *ls; 456{ 457 int i; 458 const struct netisrtab *nit; 459 460 for(i = 0; ls->ls_items[i]; i++) { 461 nit = (const struct netisrtab *)ls->ls_items[i]; 462 register_netisr(nit->nit_num, nit->nit_isr); 463 } 464} 465#endif /* NETISR */ 466 467/* 468 * Send an interrupt to process. 469 * 470 * Stack is set up to allow sigcode stored 471 * at top to call routine, followed by kcall 472 * to sigreturn routine below. After sigreturn 473 * resets the signal mask, the stack, and the 474 * frame pointer, it returns to the user 475 * specified pc, psl. 476 */ 477void 478sendsig(catcher, sig, mask, code) 479 sig_t catcher; 480 int sig, mask; 481 u_long code; 482{ 483 register struct proc *p = curproc; 484 register struct trapframe *regs; 485 register struct sigframe *fp; 486 struct sigframe sf; 487 struct sigacts *psp = p->p_sigacts; 488 int oonstack; 489 490 regs = p->p_md.md_regs; 491 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 492 /* 493 * Allocate and validate space for the signal handler context. 494 */ 495 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 496 (psp->ps_sigonstack & sigmask(sig))) { 497 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 498 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 499 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 500 } else { 501 fp = (struct sigframe *)regs->tf_esp - 1; 502 } 503 504 /* 505 * grow() will return FALSE if the fp will not fit inside the stack 506 * and the stack can not be grown. useracc will return FALSE 507 * if access is denied. 508 */ 509 if ((grow(p, (int)fp) == FALSE) || 510 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 511 /* 512 * Process has trashed its stack; give it an illegal 513 * instruction to halt it in its tracks. 514 */ 515 SIGACTION(p, SIGILL) = SIG_DFL; 516 sig = sigmask(SIGILL); 517 p->p_sigignore &= ~sig; 518 p->p_sigcatch &= ~sig; 519 p->p_sigmask &= ~sig; 520 psignal(p, SIGILL); 521 return; 522 } 523 524 /* 525 * Build the argument list for the signal handler. 526 */ 527 if (p->p_sysent->sv_sigtbl) { 528 if (sig < p->p_sysent->sv_sigsize) 529 sig = p->p_sysent->sv_sigtbl[sig]; 530 else 531 sig = p->p_sysent->sv_sigsize + 1; 532 } 533 sf.sf_signum = sig; 534 sf.sf_code = code; 535 sf.sf_scp = &fp->sf_sc; 536 sf.sf_addr = (char *) regs->tf_err; 537 sf.sf_handler = catcher; 538 539 /* save scratch registers */ 540 sf.sf_sc.sc_eax = regs->tf_eax; 541 sf.sf_sc.sc_ebx = regs->tf_ebx; 542 sf.sf_sc.sc_ecx = regs->tf_ecx; 543 sf.sf_sc.sc_edx = regs->tf_edx; 544 sf.sf_sc.sc_esi = regs->tf_esi; 545 sf.sf_sc.sc_edi = regs->tf_edi; 546 sf.sf_sc.sc_cs = regs->tf_cs; 547 sf.sf_sc.sc_ds = regs->tf_ds; 548 sf.sf_sc.sc_ss = regs->tf_ss; 549 sf.sf_sc.sc_es = regs->tf_es; 550 sf.sf_sc.sc_isp = regs->tf_isp; 551 552 /* 553 * Build the signal context to be used by sigreturn. 554 */ 555 sf.sf_sc.sc_onstack = oonstack; 556 sf.sf_sc.sc_mask = mask; 557 sf.sf_sc.sc_sp = regs->tf_esp; 558 sf.sf_sc.sc_fp = regs->tf_ebp; 559 sf.sf_sc.sc_pc = regs->tf_eip; 560 sf.sf_sc.sc_ps = regs->tf_eflags; 561 sf.sf_sc.sc_trapno = regs->tf_trapno; 562 sf.sf_sc.sc_err = regs->tf_err; 563 564#ifdef VM86 565 /* 566 * If we're a vm86 process, we want to save the segment registers. 567 * We also change eflags to be our emulated eflags, not the actual 568 * eflags. 569 */ 570 if (regs->tf_eflags & PSL_VM) { 571 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 572 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 573 574 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 575 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 576 sf.sf_sc.sc_es = tf->tf_vm86_es; 577 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 578 579 if (vm86->vm86_has_vme == 0) 580 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 581 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 582 583 /* 584 * We should never have PSL_T set when returning from vm86 585 * mode. It may be set here if we deliver a signal before 586 * getting to vm86 mode, so turn it off. 587 */ 588 tf->tf_eflags &= ~(PSL_VM | PSL_T | PSL_VIF | PSL_VIP); 589 } 590#endif /* VM86 */ 591 592 /* 593 * Copy the sigframe out to the user's stack. 594 */ 595 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 596 /* 597 * Something is wrong with the stack pointer. 598 * ...Kill the process. 599 */ 600 sigexit(p, SIGILL); 601 } 602 603 regs->tf_esp = (int)fp; 604 regs->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 605 regs->tf_cs = _ucodesel; 606 regs->tf_ds = _udatasel; 607 regs->tf_es = _udatasel; 608 regs->tf_ss = _udatasel; 609} 610 611/* 612 * System call to cleanup state after a signal 613 * has been taken. Reset signal mask and 614 * stack state from context left by sendsig (above). 615 * Return to previous pc and psl as specified by 616 * context left by sendsig. Check carefully to 617 * make sure that the user has not modified the 618 * state to gain improper privileges. 619 */ 620int 621sigreturn(p, uap) 622 struct proc *p; 623 struct sigreturn_args /* { 624 struct sigcontext *sigcntxp; 625 } */ *uap; 626{ 627 register struct sigcontext *scp; 628 register struct sigframe *fp; 629 register struct trapframe *regs = p->p_md.md_regs; 630 int eflags; 631 632 /* 633 * (XXX old comment) regs->tf_esp points to the return address. 634 * The user scp pointer is above that. 635 * The return address is faked in the signal trampoline code 636 * for consistency. 637 */ 638 scp = uap->sigcntxp; 639 fp = (struct sigframe *) 640 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 641 642 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 643 return(EFAULT); 644 645 eflags = scp->sc_ps; 646#ifdef VM86 647 if (eflags & PSL_VM) { 648 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 649 struct vm86_kernel *vm86; 650 651 /* 652 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 653 * set up the vm86 area, and we can't enter vm86 mode. 654 */ 655 if (p->p_addr->u_pcb.pcb_ext == 0) 656 return (EINVAL); 657 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 658 if (vm86->vm86_inited == 0) 659 return (EINVAL); 660 661 /* go back to user mode if both flags are set */ 662 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 663 trapsignal(p, SIGBUS, 0); 664 665 if (vm86->vm86_has_vme) { 666 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 667 (eflags & VME_USERCHANGE) | PSL_VM; 668 } else { 669 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 670 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 671 } 672 tf->tf_vm86_ds = scp->sc_ds; 673 tf->tf_vm86_es = scp->sc_es; 674 tf->tf_vm86_fs = scp->sc_fs; 675 tf->tf_vm86_gs = scp->sc_gs; 676 tf->tf_ds = _udatasel; 677 tf->tf_es = _udatasel; 678 } else { 679#endif /* VM86 */ 680 /* 681 * Don't allow users to change privileged or reserved flags. 682 */ 683#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 684 /* 685 * XXX do allow users to change the privileged flag PSL_RF. 686 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 687 * should sometimes set it there too. tf_eflags is kept in 688 * the signal context during signal handling and there is no 689 * other place to remember it, so the PSL_RF bit may be 690 * corrupted by the signal handler without us knowing. 691 * Corruption of the PSL_RF bit at worst causes one more or 692 * one less debugger trap, so allowing it is fairly harmless. 693 */ 694 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 695#ifdef DEBUG 696 printf("sigreturn: eflags = 0x%x\n", eflags); 697#endif 698 return(EINVAL); 699 } 700 701 /* 702 * Don't allow users to load a valid privileged %cs. Let the 703 * hardware check for invalid selectors, excess privilege in 704 * other selectors, invalid %eip's and invalid %esp's. 705 */ 706#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 707 if (!CS_SECURE(scp->sc_cs)) { 708#ifdef DEBUG 709 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 710#endif 711 trapsignal(p, SIGBUS, T_PROTFLT); 712 return(EINVAL); 713 } 714 regs->tf_ds = scp->sc_ds; 715 regs->tf_es = scp->sc_es; 716#ifdef VM86 717 } 718#endif 719 720 /* restore scratch registers */ 721 regs->tf_eax = scp->sc_eax; 722 regs->tf_ebx = scp->sc_ebx; 723 regs->tf_ecx = scp->sc_ecx; 724 regs->tf_edx = scp->sc_edx; 725 regs->tf_esi = scp->sc_esi; 726 regs->tf_edi = scp->sc_edi; 727 regs->tf_cs = scp->sc_cs; 728 regs->tf_ss = scp->sc_ss; 729 regs->tf_isp = scp->sc_isp; 730 731 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 732 return(EINVAL); 733 734 if (scp->sc_onstack & 01) 735 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 736 else 737 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 738 p->p_sigmask = scp->sc_mask & ~sigcantmask; 739 regs->tf_ebp = scp->sc_fp; 740 regs->tf_esp = scp->sc_sp; 741 regs->tf_eip = scp->sc_pc; 742 regs->tf_eflags = eflags; 743 return(EJUSTRETURN); 744} 745 746/* 747 * Machine dependent boot() routine 748 * 749 * I haven't seen anything to put here yet 750 * Possibly some stuff might be grafted back here from boot() 751 */ 752void 753cpu_boot(int howto) 754{ 755} 756 757/* 758 * Shutdown the CPU as much as possible 759 */ 760void 761cpu_halt(void) 762{ 763 for (;;) 764 __asm__ ("hlt"); 765} 766 767/* 768 * Turn the power off. 769 */ 770void 771cpu_power_down(void) 772{ 773#if NAPM > 0 774 apm_power_off(); 775#endif 776} 777 778/* 779 * Clear registers on exec 780 */ 781void 782setregs(p, entry, stack) 783 struct proc *p; 784 u_long entry; 785 u_long stack; 786{ 787 struct trapframe *regs = p->p_md.md_regs; 788 789#ifdef USER_LDT 790 struct pcb *pcb = &p->p_addr->u_pcb; 791 792 /* was i386_user_cleanup() in NetBSD */ 793 if (pcb->pcb_ldt) { 794 if (pcb == curpcb) 795 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 796 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 797 pcb->pcb_ldt_len * sizeof(union descriptor)); 798 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 799 } 800#endif 801 802 bzero((char *)regs, sizeof(struct trapframe)); 803 regs->tf_eip = entry; 804 regs->tf_esp = stack; 805 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 806 regs->tf_ss = _udatasel; 807 regs->tf_ds = _udatasel; 808 regs->tf_es = _udatasel; 809 regs->tf_cs = _ucodesel; 810 811 /* 812 * Initialize the math emulator (if any) for the current process. 813 * Actually, just clear the bit that says that the emulator has 814 * been initialized. Initialization is delayed until the process 815 * traps to the emulator (if it is done at all) mainly because 816 * emulators don't provide an entry point for initialization. 817 */ 818 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 819 820 /* 821 * Arrange to trap the next npx or `fwait' instruction (see npx.c 822 * for why fwait must be trapped at least if there is an npx or an 823 * emulator). This is mainly to handle the case where npx0 is not 824 * configured, since the npx routines normally set up the trap 825 * otherwise. It should be done only at boot time, but doing it 826 * here allows modifying `npx_exists' for testing the emulator on 827 * systems with an npx. 828 */ 829 load_cr0(rcr0() | CR0_MP | CR0_TS); 830 831#if NNPX > 0 832 /* Initialize the npx (if any) for the current process. */ 833 npxinit(__INITIAL_NPXCW__); 834#endif 835} 836 837static int 838sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 839{ 840 int error; 841 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 842 req); 843 if (!error && req->newptr) 844 resettodr(); 845 return (error); 846} 847 848SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 849 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 850 851SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 852 CTLFLAG_RW, &disable_rtc_set, 0, ""); 853 854SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 855 CTLFLAG_RD, &bootinfo, bootinfo, ""); 856 857SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 858 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 859 860/* 861 * Initialize 386 and configure to run kernel 862 */ 863 864/* 865 * Initialize segments & interrupt table 866 */ 867 868int currentldt; 869int _default_ldt; 870#ifdef SMP 871union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 872#else 873union descriptor gdt[NGDT]; /* global descriptor table */ 874#endif 875struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 876union descriptor ldt[NLDT]; /* local descriptor table */ 877#ifdef SMP 878/* table descriptors - used to load tables by microp */ 879struct region_descriptor r_gdt, r_idt; 880#endif 881 882extern struct i386tss common_tss; /* One tss per cpu */ 883#ifdef VM86 884extern struct segment_descriptor common_tssd; 885extern int private_tss; /* flag indicating private tss */ 886extern u_int my_tr; /* which task register setting */ 887#endif /* VM86 */ 888 889#if defined(I586_CPU) && !defined(NO_F00F_HACK) 890struct gate_descriptor *t_idt; 891extern int has_f00f_bug; 892#endif 893 894static struct i386tss dblfault_tss; 895static char dblfault_stack[PAGE_SIZE]; 896 897extern struct user *proc0paddr; 898 899 900/* software prototypes -- in more palatable form */ 901struct soft_segment_descriptor gdt_segs[ 902#ifdef SMP 903 NGDT + NCPU 904#endif 905 ] = { 906/* GNULL_SEL 0 Null Descriptor */ 907{ 0x0, /* segment base address */ 908 0x0, /* length */ 909 0, /* segment type */ 910 0, /* segment descriptor priority level */ 911 0, /* segment descriptor present */ 912 0, 0, 913 0, /* default 32 vs 16 bit size */ 914 0 /* limit granularity (byte/page units)*/ }, 915/* GCODE_SEL 1 Code Descriptor for kernel */ 916{ 0x0, /* segment base address */ 917 0xfffff, /* length - all address space */ 918 SDT_MEMERA, /* segment type */ 919 0, /* segment descriptor priority level */ 920 1, /* segment descriptor present */ 921 0, 0, 922 1, /* default 32 vs 16 bit size */ 923 1 /* limit granularity (byte/page units)*/ }, 924/* GDATA_SEL 2 Data Descriptor for kernel */ 925{ 0x0, /* segment base address */ 926 0xfffff, /* length - all address space */ 927 SDT_MEMRWA, /* segment type */ 928 0, /* segment descriptor priority level */ 929 1, /* segment descriptor present */ 930 0, 0, 931 1, /* default 32 vs 16 bit size */ 932 1 /* limit granularity (byte/page units)*/ }, 933/* GLDT_SEL 3 LDT Descriptor */ 934{ (int) ldt, /* segment base address */ 935 sizeof(ldt)-1, /* length - all address space */ 936 SDT_SYSLDT, /* segment type */ 937 SEL_UPL, /* segment descriptor priority level */ 938 1, /* segment descriptor present */ 939 0, 0, 940 0, /* unused - default 32 vs 16 bit size */ 941 0 /* limit granularity (byte/page units)*/ }, 942/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 943{ 0x0, /* segment base address */ 944 0x0, /* length - all address space */ 945 0, /* segment type */ 946 0, /* segment descriptor priority level */ 947 0, /* segment descriptor present */ 948 0, 0, 949 0, /* default 32 vs 16 bit size */ 950 0 /* limit granularity (byte/page units)*/ }, 951/* GPANIC_SEL 5 Panic Tss Descriptor */ 952{ (int) &dblfault_tss, /* segment base address */ 953 sizeof(struct i386tss)-1,/* length - all address space */ 954 SDT_SYS386TSS, /* segment type */ 955 0, /* segment descriptor priority level */ 956 1, /* segment descriptor present */ 957 0, 0, 958 0, /* unused - default 32 vs 16 bit size */ 959 0 /* limit granularity (byte/page units)*/ }, 960/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 961{ 962 (int) &common_tss, /* segment base address */ 963 sizeof(struct i386tss)-1,/* length - all address space */ 964 SDT_SYS386TSS, /* segment type */ 965 0, /* segment descriptor priority level */ 966 1, /* segment descriptor present */ 967 0, 0, 968 0, /* unused - default 32 vs 16 bit size */ 969 0 /* limit granularity (byte/page units)*/ }, 970/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 971{ (int) ldt, /* segment base address */ 972 (512 * sizeof(union descriptor)-1), /* length */ 973 SDT_SYSLDT, /* segment type */ 974 0, /* segment descriptor priority level */ 975 1, /* segment descriptor present */ 976 0, 0, 977 0, /* unused - default 32 vs 16 bit size */ 978 0 /* limit granularity (byte/page units)*/ }, 979/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 980{ 0, /* segment base address (overwritten by APM) */ 981 0xfffff, /* length */ 982 SDT_MEMERA, /* segment type */ 983 0, /* segment descriptor priority level */ 984 1, /* segment descriptor present */ 985 0, 0, 986 1, /* default 32 vs 16 bit size */ 987 1 /* limit granularity (byte/page units)*/ }, 988/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 989{ 0, /* segment base address (overwritten by APM) */ 990 0xfffff, /* length */ 991 SDT_MEMERA, /* segment type */ 992 0, /* segment descriptor priority level */ 993 1, /* segment descriptor present */ 994 0, 0, 995 0, /* default 32 vs 16 bit size */ 996 1 /* limit granularity (byte/page units)*/ }, 997/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 998{ 0, /* segment base address (overwritten by APM) */ 999 0xfffff, /* length */ 1000 SDT_MEMRWA, /* segment type */ 1001 0, /* segment descriptor priority level */ 1002 1, /* segment descriptor present */ 1003 0, 0, 1004 1, /* default 32 vs 16 bit size */ 1005 1 /* limit granularity (byte/page units)*/ }, 1006}; 1007 1008static struct soft_segment_descriptor ldt_segs[] = { 1009 /* Null Descriptor - overwritten by call gate */ 1010{ 0x0, /* segment base address */ 1011 0x0, /* length - all address space */ 1012 0, /* segment type */ 1013 0, /* segment descriptor priority level */ 1014 0, /* segment descriptor present */ 1015 0, 0, 1016 0, /* default 32 vs 16 bit size */ 1017 0 /* limit granularity (byte/page units)*/ }, 1018 /* Null Descriptor - overwritten by call gate */ 1019{ 0x0, /* segment base address */ 1020 0x0, /* length - all address space */ 1021 0, /* segment type */ 1022 0, /* segment descriptor priority level */ 1023 0, /* segment descriptor present */ 1024 0, 0, 1025 0, /* default 32 vs 16 bit size */ 1026 0 /* limit granularity (byte/page units)*/ }, 1027 /* Null Descriptor - overwritten by call gate */ 1028{ 0x0, /* segment base address */ 1029 0x0, /* length - all address space */ 1030 0, /* segment type */ 1031 0, /* segment descriptor priority level */ 1032 0, /* segment descriptor present */ 1033 0, 0, 1034 0, /* default 32 vs 16 bit size */ 1035 0 /* limit granularity (byte/page units)*/ }, 1036 /* Code Descriptor for user */ 1037{ 0x0, /* segment base address */ 1038 0xfffff, /* length - all address space */ 1039 SDT_MEMERA, /* segment type */ 1040 SEL_UPL, /* segment descriptor priority level */ 1041 1, /* segment descriptor present */ 1042 0, 0, 1043 1, /* default 32 vs 16 bit size */ 1044 1 /* limit granularity (byte/page units)*/ }, 1045 /* Data Descriptor for user */ 1046{ 0x0, /* segment base address */ 1047 0xfffff, /* length - all address space */ 1048 SDT_MEMRWA, /* segment type */ 1049 SEL_UPL, /* segment descriptor priority level */ 1050 1, /* segment descriptor present */ 1051 0, 0, 1052 1, /* default 32 vs 16 bit size */ 1053 1 /* limit granularity (byte/page units)*/ }, 1054}; 1055 1056void 1057setidt(idx, func, typ, dpl, selec) 1058 int idx; 1059 inthand_t *func; 1060 int typ; 1061 int dpl; 1062 int selec; 1063{ 1064 struct gate_descriptor *ip; 1065 1066#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1067 ip = (t_idt != NULL ? t_idt : idt) + idx; 1068#else 1069 ip = idt + idx; 1070#endif 1071 ip->gd_looffset = (int)func; 1072 ip->gd_selector = selec; 1073 ip->gd_stkcpy = 0; 1074 ip->gd_xx = 0; 1075 ip->gd_type = typ; 1076 ip->gd_dpl = dpl; 1077 ip->gd_p = 1; 1078 ip->gd_hioffset = ((int)func)>>16 ; 1079} 1080 1081#define IDTVEC(name) __CONCAT(X,name) 1082 1083extern inthand_t 1084 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1085 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1086 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1087 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1088 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1089 1090void 1091sdtossd(sd, ssd) 1092 struct segment_descriptor *sd; 1093 struct soft_segment_descriptor *ssd; 1094{ 1095 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1096 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1097 ssd->ssd_type = sd->sd_type; 1098 ssd->ssd_dpl = sd->sd_dpl; 1099 ssd->ssd_p = sd->sd_p; 1100 ssd->ssd_def32 = sd->sd_def32; 1101 ssd->ssd_gran = sd->sd_gran; 1102} 1103 1104void 1105init386(first) 1106 int first; 1107{ 1108 int x; 1109 unsigned biosbasemem, biosextmem; 1110 struct gate_descriptor *gdp; 1111 int gsel_tss; 1112 char *cp; 1113 1114 struct isa_device *idp; 1115#ifndef SMP 1116 /* table descriptors - used to load tables by microp */ 1117 struct region_descriptor r_gdt, r_idt; 1118#endif 1119 int pagesinbase, pagesinext; 1120 int target_page, pa_indx; 1121 int off; 1122 int speculative_mprobe; 1123 1124 /* 1125 * Prevent lowering of the ipl if we call tsleep() early. 1126 */ 1127 safepri = cpl; 1128 1129 proc0.p_addr = proc0paddr; 1130 1131 atdevbase = ISA_HOLE_START + KERNBASE; 1132 1133 /* 1134 * Initialize the console before we print anything out. 1135 */ 1136 cninit(); 1137 1138 /* 1139 * make gdt memory segments, the code segment goes up to end of the 1140 * page with etext in it, the data segment goes to the end of 1141 * the address space 1142 */ 1143 /* 1144 * XXX text protection is temporarily (?) disabled. The limit was 1145 * i386_btop(round_page(etext)) - 1. 1146 */ 1147 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1148 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1149#ifdef BDE_DEBUGGER 1150#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1151#else 1152#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1153#endif 1154 for (x = 0; x < NGDT1; x++) 1155 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1156#ifdef VM86 1157 common_tssd = gdt[GPROC0_SEL].sd; 1158#endif /* VM86 */ 1159 1160#ifdef SMP 1161 /* 1162 * Spin these up now. init_secondary() grabs them. We could use 1163 * #for(x,y,z) / #endfor cpp directives if they existed. 1164 */ 1165 for (x = 0; x < NCPU; x++) { 1166 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1167 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1168 } 1169#endif 1170 1171 /* make ldt memory segments */ 1172 /* 1173 * The data segment limit must not cover the user area because we 1174 * don't want the user area to be writable in copyout() etc. (page 1175 * level protection is lost in kernel mode on 386's). Also, we 1176 * don't want the user area to be writable directly (page level 1177 * protection of the user area is not available on 486's with 1178 * CR0_WP set, because there is no user-read/kernel-write mode). 1179 * 1180 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1181 * should be spelled ...MAX_USER... 1182 */ 1183#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1184 /* 1185 * The code segment limit has to cover the user area until we move 1186 * the signal trampoline out of the user area. This is safe because 1187 * the code segment cannot be written to directly. 1188 */ 1189#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1190 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1191 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1192 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1193 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1194 1195 /* exceptions */ 1196 for (x = 0; x < NIDT; x++) 1197 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1198 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1199 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1200 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1201 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1202 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1203 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1204 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1205 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1206 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1207 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1208 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1209 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1210 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1211 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1212 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1213 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1214 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1215 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1216 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1217 setidt(0x80, &IDTVEC(int0x80_syscall), 1218 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1219 1220#include "isa.h" 1221#if NISA >0 1222 isa_defaultirq(); 1223#endif 1224 rand_initialize(); 1225 1226 r_gdt.rd_limit = sizeof(gdt) - 1; 1227 r_gdt.rd_base = (int) gdt; 1228 lgdt(&r_gdt); 1229 1230 r_idt.rd_limit = sizeof(idt) - 1; 1231 r_idt.rd_base = (int) idt; 1232 lidt(&r_idt); 1233 1234 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1235 lldt(_default_ldt); 1236 currentldt = _default_ldt; 1237 1238#ifdef DDB 1239 kdb_init(); 1240 if (boothowto & RB_KDB) 1241 Debugger("Boot flags requested debugger"); 1242#endif 1243 1244 finishidentcpu(); /* Final stage of CPU initialization */ 1245 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1246 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1247 initializecpu(); /* Initialize CPU registers */ 1248 1249 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1250#ifdef VM86 1251 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1252#else 1253 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1254#endif /* VM86 */ 1255 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1256 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1257 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1258 ltr(gsel_tss); 1259#ifdef VM86 1260 private_tss = 0; 1261 my_tr = GPROC0_SEL; 1262#endif 1263 1264 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1265 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1266 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1267 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1268 dblfault_tss.tss_cr3 = (int)IdlePTD; 1269 dblfault_tss.tss_eip = (int) dblfault_handler; 1270 dblfault_tss.tss_eflags = PSL_KERNEL; 1271 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1272 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1273 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1274 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1275 1276#ifdef VM86 1277 initial_bioscalls(&biosbasemem, &biosextmem); 1278#else 1279 1280 /* Use BIOS values stored in RTC CMOS RAM, since probing 1281 * breaks certain 386 AT relics. 1282 */ 1283 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1284 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1285#endif 1286 1287 /* 1288 * If BIOS tells us that it has more than 640k in the basemem, 1289 * don't believe it - set it to 640k. 1290 */ 1291 if (biosbasemem > 640) { 1292 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1293 biosbasemem); 1294 biosbasemem = 640; 1295 } 1296 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1297 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1298 bootinfo.bi_basemem); 1299 bootinfo.bi_basemem = 640; 1300 } 1301 1302 /* 1303 * Warn if the official BIOS interface disagrees with the RTC 1304 * interface used above about the amount of base memory or the 1305 * amount of extended memory. Prefer the BIOS value for the base 1306 * memory. This is necessary for machines that `steal' base 1307 * memory for use as BIOS memory, at least if we are going to use 1308 * the BIOS for apm. Prefer the RTC value for extended memory. 1309 * Eventually the hackish interface shouldn't even be looked at. 1310 */ 1311 if (bootinfo.bi_memsizes_valid) { 1312 if (bootinfo.bi_basemem != biosbasemem) { 1313 vm_offset_t pa; 1314 1315 printf( 1316 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1317 bootinfo.bi_basemem, biosbasemem); 1318 biosbasemem = bootinfo.bi_basemem; 1319 1320 /* 1321 * XXX if biosbasemem is now < 640, there is `hole' 1322 * between the end of base memory and the start of 1323 * ISA memory. The hole may be empty or it may 1324 * contain BIOS code or data. Map it read/write so 1325 * that the BIOS can write to it. (Memory from 0 to 1326 * the physical end of the kernel is mapped read-only 1327 * to begin with and then parts of it are remapped. 1328 * The parts that aren't remapped form holes that 1329 * remain read-only and are unused by the kernel. 1330 * The base memory area is below the physical end of 1331 * the kernel and right now forms a read-only hole. 1332 * The part of it from PAGE_SIZE to 1333 * (trunc_page(biosbasemem * 1024) - 1) will be 1334 * remapped and used by the kernel later.) 1335 * 1336 * This code is similar to the code used in 1337 * pmap_mapdev, but since no memory needs to be 1338 * allocated we simply change the mapping. 1339 */ 1340 for (pa = trunc_page(biosbasemem * 1024); 1341 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1342 unsigned *pte; 1343 1344 pte = (unsigned *)vtopte(pa + KERNBASE); 1345 *pte = pa | PG_RW | PG_V; 1346 } 1347 } 1348 if (bootinfo.bi_extmem != biosextmem) 1349 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1350 bootinfo.bi_extmem, biosextmem); 1351 } 1352 1353#ifdef SMP 1354 /* make hole for AP bootstrap code */ 1355 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1356#else 1357 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1358#endif 1359 1360 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1361 1362 /* 1363 * Special hack for chipsets that still remap the 384k hole when 1364 * there's 16MB of memory - this really confuses people that 1365 * are trying to use bus mastering ISA controllers with the 1366 * "16MB limit"; they only have 16MB, but the remapping puts 1367 * them beyond the limit. 1368 */ 1369 /* 1370 * If extended memory is between 15-16MB (16-17MB phys address range), 1371 * chop it to 15MB. 1372 */ 1373 if ((pagesinext > 3840) && (pagesinext < 4096)) 1374 pagesinext = 3840; 1375 1376 /* 1377 * Maxmem isn't the "maximum memory", it's one larger than the 1378 * highest page of the physical address space. It should be 1379 * called something like "Maxphyspage". 1380 */ 1381 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1382 /* 1383 * Indicate that we wish to do a speculative search for memory beyond 1384 * the end of the reported size if the indicated amount is 64MB (0x4000 1385 * pages) - which is the largest amount that the BIOS/bootblocks can 1386 * currently report. If a specific amount of memory is indicated via 1387 * the MAXMEM option or the npx0 "msize", then don't do the speculative 1388 * memory probe. 1389 */ 1390 if (Maxmem >= 0x4000) 1391 speculative_mprobe = TRUE; 1392 else 1393 speculative_mprobe = FALSE; 1394 1395#ifdef MAXMEM 1396 Maxmem = MAXMEM/4; 1397 speculative_mprobe = FALSE; 1398#endif 1399 1400#if NNPX > 0 1401 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1402 if (idp != NULL && idp->id_msize != 0) { 1403 Maxmem = idp->id_msize / 4; 1404 speculative_mprobe = FALSE; 1405 } 1406#endif 1407 1408#ifdef SMP 1409 /* look for the MP hardware - needed for apic addresses */ 1410 mp_probe(); 1411#endif 1412 1413 /* call pmap initialization to make new kernel address space */ 1414 pmap_bootstrap (first, 0); 1415 1416 /* 1417 * Size up each available chunk of physical memory. 1418 */ 1419 1420 /* 1421 * We currently don't bother testing base memory. 1422 * XXX ...but we probably should. 1423 */ 1424 pa_indx = 0; 1425 if (pagesinbase > 1) { 1426 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1427 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1428 physmem = pagesinbase - 1; 1429 } else { 1430 /* point at first chunk end */ 1431 pa_indx++; 1432 } 1433 1434 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1435 int tmp, page_bad; 1436 1437 page_bad = FALSE; 1438 1439 /* 1440 * map page into kernel: valid, read/write, non-cacheable 1441 */ 1442 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1443 invltlb(); 1444 1445 tmp = *(int *)CADDR1; 1446 /* 1447 * Test for alternating 1's and 0's 1448 */ 1449 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1450 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1451 page_bad = TRUE; 1452 } 1453 /* 1454 * Test for alternating 0's and 1's 1455 */ 1456 *(volatile int *)CADDR1 = 0x55555555; 1457 if (*(volatile int *)CADDR1 != 0x55555555) { 1458 page_bad = TRUE; 1459 } 1460 /* 1461 * Test for all 1's 1462 */ 1463 *(volatile int *)CADDR1 = 0xffffffff; 1464 if (*(volatile int *)CADDR1 != 0xffffffff) { 1465 page_bad = TRUE; 1466 } 1467 /* 1468 * Test for all 0's 1469 */ 1470 *(volatile int *)CADDR1 = 0x0; 1471 if (*(volatile int *)CADDR1 != 0x0) { 1472 /* 1473 * test of page failed 1474 */ 1475 page_bad = TRUE; 1476 } 1477 /* 1478 * Restore original value. 1479 */ 1480 *(int *)CADDR1 = tmp; 1481 1482 /* 1483 * Adjust array of valid/good pages. 1484 */ 1485 if (page_bad == FALSE) { 1486 /* 1487 * If this good page is a continuation of the 1488 * previous set of good pages, then just increase 1489 * the end pointer. Otherwise start a new chunk. 1490 * Note that "end" points one higher than end, 1491 * making the range >= start and < end. 1492 * If we're also doing a speculative memory 1493 * test and we at or past the end, bump up Maxmem 1494 * so that we keep going. The first bad page 1495 * will terminate the loop. 1496 */ 1497 if (phys_avail[pa_indx] == target_page) { 1498 phys_avail[pa_indx] += PAGE_SIZE; 1499 if (speculative_mprobe == TRUE && 1500 phys_avail[pa_indx] >= (64*1024*1024)) 1501 Maxmem++; 1502 } else { 1503 pa_indx++; 1504 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1505 printf("Too many holes in the physical address space, giving up\n"); 1506 pa_indx--; 1507 break; 1508 } 1509 phys_avail[pa_indx++] = target_page; /* start */ 1510 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1511 } 1512 physmem++; 1513 } 1514 } 1515 1516 *(int *)CMAP1 = 0; 1517 invltlb(); 1518 1519 /* 1520 * XXX 1521 * The last chunk must contain at least one page plus the message 1522 * buffer to avoid complicating other code (message buffer address 1523 * calculation, etc.). 1524 */ 1525 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1526 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1527 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1528 phys_avail[pa_indx--] = 0; 1529 phys_avail[pa_indx--] = 0; 1530 } 1531 1532 Maxmem = atop(phys_avail[pa_indx]); 1533 1534 /* Trim off space for the message buffer. */ 1535 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1536 1537 avail_end = phys_avail[pa_indx]; 1538 1539 /* now running on new page tables, configured,and u/iom is accessible */ 1540 1541 /* Map the message buffer. */ 1542 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1543 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1544 avail_end + off, VM_PROT_ALL, TRUE); 1545 1546 msgbufinit(msgbufp, MSGBUF_SIZE); 1547 1548 /* make a call gate to reenter kernel with */ 1549 gdp = &ldt[LSYS5CALLS_SEL].gd; 1550 1551 x = (int) &IDTVEC(syscall); 1552 gdp->gd_looffset = x++; 1553 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1554 gdp->gd_stkcpy = 1; 1555 gdp->gd_type = SDT_SYS386CGT; 1556 gdp->gd_dpl = SEL_UPL; 1557 gdp->gd_p = 1; 1558 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1559 1560 /* XXX does this work? */ 1561 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1562 1563 /* transfer to user mode */ 1564 1565 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1566 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1567 1568 /* setup proc 0's pcb */ 1569 proc0.p_addr->u_pcb.pcb_flags = 0; 1570 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1571#ifdef SMP 1572 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1573#endif 1574#ifdef VM86 1575 proc0.p_addr->u_pcb.pcb_ext = 0; 1576#endif 1577} 1578 1579#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1580static void f00f_hack(void *unused); 1581SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1582 1583static void 1584f00f_hack(void *unused) { 1585#ifndef SMP 1586 struct region_descriptor r_idt; 1587#endif 1588 vm_offset_t tmp; 1589 1590 if (!has_f00f_bug) 1591 return; 1592 1593 printf("Intel Pentium F00F detected, installing workaround\n"); 1594 1595 r_idt.rd_limit = sizeof(idt) - 1; 1596 1597 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1598 if (tmp == 0) 1599 panic("kmem_alloc returned 0"); 1600 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1601 panic("kmem_alloc returned non-page-aligned memory"); 1602 /* Put the first seven entries in the lower page */ 1603 t_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1604 bcopy(idt, t_idt, sizeof(idt)); 1605 r_idt.rd_base = (int)t_idt; 1606 lidt(&r_idt); 1607 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1608 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1609 panic("vm_map_protect failed"); 1610 return; 1611} 1612#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1613 1614int 1615ptrace_set_pc(p, addr) 1616 struct proc *p; 1617 unsigned int addr; 1618{ 1619 p->p_md.md_regs->tf_eip = addr; 1620 return (0); 1621} 1622 1623int 1624ptrace_single_step(p) 1625 struct proc *p; 1626{ 1627 p->p_md.md_regs->tf_eflags |= PSL_T; 1628 return (0); 1629} 1630 1631int ptrace_read_u_check(p, addr, len) 1632 struct proc *p; 1633 vm_offset_t addr; 1634 size_t len; 1635{ 1636 vm_offset_t gap; 1637 1638 if ((vm_offset_t) (addr + len) < addr) 1639 return EPERM; 1640 if ((vm_offset_t) (addr + len) <= sizeof(struct user)) 1641 return 0; 1642 1643 gap = (char *) p->p_md.md_regs - (char *) p->p_addr; 1644 1645 if ((vm_offset_t) addr < gap) 1646 return EPERM; 1647 if ((vm_offset_t) (addr + len) <= 1648 (vm_offset_t) (gap + sizeof(struct trapframe))) 1649 return 0; 1650 return EPERM; 1651} 1652 1653int ptrace_write_u(p, off, data) 1654 struct proc *p; 1655 vm_offset_t off; 1656 int data; 1657{ 1658 struct trapframe frame_copy; 1659 vm_offset_t min; 1660 struct trapframe *tp; 1661 1662 /* 1663 * Privileged kernel state is scattered all over the user area. 1664 * Only allow write access to parts of regs and to fpregs. 1665 */ 1666 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1667 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1668 tp = p->p_md.md_regs; 1669 frame_copy = *tp; 1670 *(int *)((char *)&frame_copy + (off - min)) = data; 1671 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1672 !CS_SECURE(frame_copy.tf_cs)) 1673 return (EINVAL); 1674 *(int*)((char *)p->p_addr + off) = data; 1675 return (0); 1676 } 1677 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1678 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1679 *(int*)((char *)p->p_addr + off) = data; 1680 return (0); 1681 } 1682 return (EFAULT); 1683} 1684 1685int 1686fill_regs(p, regs) 1687 struct proc *p; 1688 struct reg *regs; 1689{ 1690 struct pcb *pcb; 1691 struct trapframe *tp; 1692 1693 tp = p->p_md.md_regs; 1694 regs->r_es = tp->tf_es; 1695 regs->r_ds = tp->tf_ds; 1696 regs->r_edi = tp->tf_edi; 1697 regs->r_esi = tp->tf_esi; 1698 regs->r_ebp = tp->tf_ebp; 1699 regs->r_ebx = tp->tf_ebx; 1700 regs->r_edx = tp->tf_edx; 1701 regs->r_ecx = tp->tf_ecx; 1702 regs->r_eax = tp->tf_eax; 1703 regs->r_eip = tp->tf_eip; 1704 regs->r_cs = tp->tf_cs; 1705 regs->r_eflags = tp->tf_eflags; 1706 regs->r_esp = tp->tf_esp; 1707 regs->r_ss = tp->tf_ss; 1708 pcb = &p->p_addr->u_pcb; 1709 regs->r_fs = pcb->pcb_fs; 1710 regs->r_gs = pcb->pcb_gs; 1711 return (0); 1712} 1713 1714int 1715set_regs(p, regs) 1716 struct proc *p; 1717 struct reg *regs; 1718{ 1719 struct pcb *pcb; 1720 struct trapframe *tp; 1721 1722 tp = p->p_md.md_regs; 1723 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1724 !CS_SECURE(regs->r_cs)) 1725 return (EINVAL); 1726 tp->tf_es = regs->r_es; 1727 tp->tf_ds = regs->r_ds; 1728 tp->tf_edi = regs->r_edi; 1729 tp->tf_esi = regs->r_esi; 1730 tp->tf_ebp = regs->r_ebp; 1731 tp->tf_ebx = regs->r_ebx; 1732 tp->tf_edx = regs->r_edx; 1733 tp->tf_ecx = regs->r_ecx; 1734 tp->tf_eax = regs->r_eax; 1735 tp->tf_eip = regs->r_eip; 1736 tp->tf_cs = regs->r_cs; 1737 tp->tf_eflags = regs->r_eflags; 1738 tp->tf_esp = regs->r_esp; 1739 tp->tf_ss = regs->r_ss; 1740 pcb = &p->p_addr->u_pcb; 1741 pcb->pcb_fs = regs->r_fs; 1742 pcb->pcb_gs = regs->r_gs; 1743 return (0); 1744} 1745 1746#ifndef DDB 1747void 1748Debugger(const char *msg) 1749{ 1750 printf("Debugger(\"%s\") called.\n", msg); 1751} 1752#endif /* no DDB */ 1753 1754#include <sys/disklabel.h> 1755 1756/* 1757 * Determine the size of the transfer, and make sure it is 1758 * within the boundaries of the partition. Adjust transfer 1759 * if needed, and signal errors or early completion. 1760 */ 1761int 1762bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1763{ 1764 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1765 int labelsect = lp->d_partitions[0].p_offset; 1766 int maxsz = p->p_size, 1767 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1768 1769 /* overwriting disk label ? */ 1770 /* XXX should also protect bootstrap in first 8K */ 1771 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1772#if LABELSECTOR != 0 1773 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1774#endif 1775 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1776 bp->b_error = EROFS; 1777 goto bad; 1778 } 1779 1780#if defined(DOSBBSECTOR) && defined(notyet) 1781 /* overwriting master boot record? */ 1782 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1783 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1784 bp->b_error = EROFS; 1785 goto bad; 1786 } 1787#endif 1788 1789 /* beyond partition? */ 1790 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1791 /* if exactly at end of disk, return an EOF */ 1792 if (bp->b_blkno == maxsz) { 1793 bp->b_resid = bp->b_bcount; 1794 return(0); 1795 } 1796 /* or truncate if part of it fits */ 1797 sz = maxsz - bp->b_blkno; 1798 if (sz <= 0) { 1799 bp->b_error = EINVAL; 1800 goto bad; 1801 } 1802 bp->b_bcount = sz << DEV_BSHIFT; 1803 } 1804 1805 bp->b_pblkno = bp->b_blkno + p->p_offset; 1806 return(1); 1807 1808bad: 1809 bp->b_flags |= B_ERROR; 1810 return(-1); 1811} 1812 1813#ifdef DDB 1814 1815/* 1816 * Provide inb() and outb() as functions. They are normally only 1817 * available as macros calling inlined functions, thus cannot be 1818 * called inside DDB. 1819 * 1820 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1821 */ 1822 1823#undef inb 1824#undef outb 1825 1826/* silence compiler warnings */ 1827u_char inb(u_int); 1828void outb(u_int, u_char); 1829 1830u_char 1831inb(u_int port) 1832{ 1833 u_char data; 1834 /* 1835 * We use %%dx and not %1 here because i/o is done at %dx and not at 1836 * %edx, while gcc generates inferior code (movw instead of movl) 1837 * if we tell it to load (u_short) port. 1838 */ 1839 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1840 return (data); 1841} 1842 1843void 1844outb(u_int port, u_char data) 1845{ 1846 u_char al; 1847 /* 1848 * Use an unnecessary assignment to help gcc's register allocator. 1849 * This make a large difference for gcc-1.40 and a tiny difference 1850 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1851 * best results. gcc-2.6.0 can't handle this. 1852 */ 1853 al = data; 1854 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1855} 1856 1857#endif /* DDB */ 1858