machdep.c revision 29041
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.260 1997/09/01 01:54:50 bde Exp $ 39 */ 40 41#include "apm.h" 42#include "npx.h" 43#include "opt_sysvipc.h" 44#include "opt_ddb.h" 45#include "opt_bounce.h" 46#include "opt_maxmem.h" 47#include "opt_perfmon.h" 48#include "opt_smp.h" 49#include "opt_userconfig.h" 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/sysproto.h> 54#include <sys/signalvar.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> 57#include <sys/buf.h> 58#include <sys/reboot.h> 59#include <sys/conf.h> 60#include <sys/callout.h> 61#include <sys/malloc.h> 62#include <sys/mbuf.h> 63#include <sys/msgbuf.h> 64#include <sys/sysent.h> 65#include <sys/sysctl.h> 66#include <sys/vmmeter.h> 67 68#ifdef SYSVSHM 69#include <sys/shm.h> 70#endif 71 72#ifdef SYSVMSG 73#include <sys/msg.h> 74#endif 75 76#ifdef SYSVSEM 77#include <sys/sem.h> 78#endif 79 80#include <vm/vm.h> 81#include <vm/vm_param.h> 82#include <vm/vm_prot.h> 83#include <sys/lock.h> 84#include <vm/vm_kern.h> 85#include <vm/vm_object.h> 86#include <vm/vm_page.h> 87#include <vm/vm_map.h> 88#include <vm/vm_pager.h> 89#include <vm/vm_extern.h> 90 91#include <sys/user.h> 92#include <sys/exec.h> 93 94#include <ddb/ddb.h> 95 96#include <net/netisr.h> 97 98#if NAPM > 0 99#include <machine/apm_bios.h> 100#endif 101#include <machine/cpu.h> 102#include <machine/reg.h> 103#include <machine/clock.h> 104#include <machine/specialreg.h> 105#include <machine/cons.h> 106#include <machine/bootinfo.h> 107#include <machine/md_var.h> 108#ifdef SMP 109#include <machine/smp.h> 110#endif 111#ifdef PERFMON 112#include <machine/perfmon.h> 113#endif 114 115#include <i386/isa/isa_device.h> 116#include <i386/isa/intr_machdep.h> 117#include <i386/isa/rtc.h> 118#include <machine/random.h> 119 120extern void init386 __P((int first)); 121extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 122extern int ptrace_single_step __P((struct proc *p)); 123extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 124extern void dblfault_handler __P((void)); 125 126extern void printcpuinfo(void); /* XXX header file */ 127extern void earlysetcpuclass(void); /* same header file */ 128extern void finishidentcpu(void); 129extern void panicifcpuunsupported(void); 130extern void initializecpu(void); 131 132static void cpu_startup __P((void *)); 133SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 134 135 136#ifdef BOUNCE_BUFFERS 137extern char *bouncememory; 138extern int maxbkva; 139#ifdef BOUNCEPAGES 140int bouncepages = BOUNCEPAGES; 141#else 142int bouncepages = 0; 143#endif 144#endif /* BOUNCE_BUFFERS */ 145 146extern int freebufspace; 147int msgbufmapped = 0; /* set when safe to use msgbuf */ 148int _udatasel, _ucodesel; 149u_int atdevbase; 150 151 152int physmem = 0; 153int cold = 1; 154 155static int 156sysctl_hw_physmem SYSCTL_HANDLER_ARGS 157{ 158 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 159 return (error); 160} 161 162SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 163 0, 0, sysctl_hw_physmem, "I", ""); 164 165static int 166sysctl_hw_usermem SYSCTL_HANDLER_ARGS 167{ 168 int error = sysctl_handle_int(oidp, 0, 169 ctob(physmem - cnt.v_wire_count), req); 170 return (error); 171} 172 173SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 174 0, 0, sysctl_hw_usermem, "I", ""); 175 176int boothowto = 0, bootverbose = 0, Maxmem = 0; 177static int badpages = 0; 178long dumplo; 179extern int bootdev; 180 181vm_offset_t phys_avail[10]; 182 183/* must be 2 less so 0 0 can signal end of chunks */ 184#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 185 186static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 187 188static vm_offset_t buffer_sva, buffer_eva; 189vm_offset_t clean_sva, clean_eva; 190static vm_offset_t pager_sva, pager_eva; 191extern struct linker_set netisr_set; 192 193#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 194 195static void 196cpu_startup(dummy) 197 void *dummy; 198{ 199 register unsigned i; 200 register caddr_t v; 201 vm_offset_t maxaddr; 202 vm_size_t size = 0; 203 int firstaddr; 204 vm_offset_t minaddr; 205 206 if (boothowto & RB_VERBOSE) 207 bootverbose++; 208 209 /* 210 * Good {morning,afternoon,evening,night}. 211 */ 212 printf(version); 213 earlysetcpuclass(); 214 startrtclock(); 215 printcpuinfo(); 216 panicifcpuunsupported(); 217#ifdef PERFMON 218 perfmon_init(); 219#endif 220 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 221 /* 222 * Display any holes after the first chunk of extended memory. 223 */ 224 if (badpages != 0) { 225 int indx = 1; 226 227 /* 228 * XXX skip reporting ISA hole & unmanaged kernel memory 229 */ 230 if (phys_avail[0] == PAGE_SIZE) 231 indx += 2; 232 233 printf("Physical memory hole(s):\n"); 234 for (; phys_avail[indx + 1] != 0; indx += 2) { 235 int size = phys_avail[indx + 1] - phys_avail[indx]; 236 237 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 238 phys_avail[indx + 1] - 1, size, size / PAGE_SIZE); 239 } 240 } 241 242 /* 243 * Quickly wire in netisrs. 244 */ 245 setup_netisrs(&netisr_set); 246 247 /* 248 * Allocate space for system data structures. 249 * The first available kernel virtual address is in "v". 250 * As pages of kernel virtual memory are allocated, "v" is incremented. 251 * As pages of memory are allocated and cleared, 252 * "firstaddr" is incremented. 253 * An index into the kernel page table corresponding to the 254 * virtual memory address maintained in "v" is kept in "mapaddr". 255 */ 256 257 /* 258 * Make two passes. The first pass calculates how much memory is 259 * needed and allocates it. The second pass assigns virtual 260 * addresses to the various data structures. 261 */ 262 firstaddr = 0; 263again: 264 v = (caddr_t)firstaddr; 265 266#define valloc(name, type, num) \ 267 (name) = (type *)v; v = (caddr_t)((name)+(num)) 268#define valloclim(name, type, num, lim) \ 269 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 270 valloc(callout, struct callout, ncallout); 271#ifdef SYSVSHM 272 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 273#endif 274#ifdef SYSVSEM 275 valloc(sema, struct semid_ds, seminfo.semmni); 276 valloc(sem, struct sem, seminfo.semmns); 277 /* This is pretty disgusting! */ 278 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 279#endif 280#ifdef SYSVMSG 281 valloc(msgpool, char, msginfo.msgmax); 282 valloc(msgmaps, struct msgmap, msginfo.msgseg); 283 valloc(msghdrs, struct msg, msginfo.msgtql); 284 valloc(msqids, struct msqid_ds, msginfo.msgmni); 285#endif 286 287 if (nbuf == 0) { 288 nbuf = 30; 289 if( physmem > 1024) 290 nbuf += min((physmem - 1024) / 8, 2048); 291 } 292 nswbuf = max(min(nbuf/4, 128), 16); 293 294 valloc(swbuf, struct buf, nswbuf); 295 valloc(buf, struct buf, nbuf); 296 297#ifdef BOUNCE_BUFFERS 298 /* 299 * If there is more than 16MB of memory, allocate some bounce buffers 300 */ 301 if (Maxmem > 4096) { 302 if (bouncepages == 0) { 303 bouncepages = 64; 304 bouncepages += ((Maxmem - 4096) / 2048) * 32; 305 if (bouncepages > 128) 306 bouncepages = 128; 307 } 308 v = (caddr_t)((vm_offset_t)round_page(v)); 309 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 310 } 311#endif 312 313 /* 314 * End of first pass, size has been calculated so allocate memory 315 */ 316 if (firstaddr == 0) { 317 size = (vm_size_t)(v - firstaddr); 318 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 319 if (firstaddr == 0) 320 panic("startup: no room for tables"); 321 goto again; 322 } 323 324 /* 325 * End of second pass, addresses have been assigned 326 */ 327 if ((vm_size_t)(v - firstaddr) != size) 328 panic("startup: table size inconsistency"); 329 330#ifdef BOUNCE_BUFFERS 331 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 332 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 333 maxbkva + pager_map_size, TRUE); 334 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 335#else 336 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 337 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 338#endif 339 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 340 (nbuf*BKVASIZE), TRUE); 341 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 342 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 343 pager_map->system_map = 1; 344 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 345 (16*ARG_MAX), TRUE); 346 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 347 (maxproc*UPAGES*PAGE_SIZE), FALSE); 348 349 /* 350 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 351 * we use the more space efficient malloc in place of kmem_alloc. 352 */ 353 { 354 vm_offset_t mb_map_size; 355 356 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 357 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 358 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 359 bzero(mclrefcnt, mb_map_size / MCLBYTES); 360 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 361 mb_map_size, FALSE); 362 mb_map->system_map = 1; 363 } 364 365 /* 366 * Initialize callouts 367 */ 368 callfree = callout; 369 for (i = 1; i < ncallout; i++) 370 callout[i-1].c_next = &callout[i]; 371 372#if defined(USERCONFIG) 373#if defined(USERCONFIG_BOOT) 374 if (1) { 375#else 376 if (boothowto & RB_CONFIG) { 377#endif 378 userconfig(); 379 cninit(); /* the preferred console may have changed */ 380 } 381#endif 382 383#ifdef BOUNCE_BUFFERS 384 /* 385 * init bounce buffers 386 */ 387 vm_bounce_init(); 388#endif 389 390 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 391 ptoa(cnt.v_free_count) / 1024); 392 393 /* 394 * Set up buffers, so they can be used to read disk labels. 395 */ 396 bufinit(); 397 vm_pager_bufferinit(); 398 399#ifdef SMP 400 /* 401 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 402 */ 403 mp_start(); /* fire up the APs and APICs */ 404 mp_announce(); 405#endif /* SMP */ 406} 407 408int 409register_netisr(num, handler) 410 int num; 411 netisr_t *handler; 412{ 413 414 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 415 printf("register_netisr: bad isr number: %d\n", num); 416 return (EINVAL); 417 } 418 netisrs[num] = handler; 419 return (0); 420} 421 422static void 423setup_netisrs(ls) 424 struct linker_set *ls; 425{ 426 int i; 427 const struct netisrtab *nit; 428 429 for(i = 0; ls->ls_items[i]; i++) { 430 nit = (const struct netisrtab *)ls->ls_items[i]; 431 register_netisr(nit->nit_num, nit->nit_isr); 432 } 433} 434 435/* 436 * Send an interrupt to process. 437 * 438 * Stack is set up to allow sigcode stored 439 * at top to call routine, followed by kcall 440 * to sigreturn routine below. After sigreturn 441 * resets the signal mask, the stack, and the 442 * frame pointer, it returns to the user 443 * specified pc, psl. 444 */ 445void 446sendsig(catcher, sig, mask, code) 447 sig_t catcher; 448 int sig, mask; 449 u_long code; 450{ 451 register struct proc *p = curproc; 452 register struct trapframe *regs; 453 register struct sigframe *fp; 454 struct sigframe sf; 455 struct sigacts *psp = p->p_sigacts; 456 int oonstack; 457 458 regs = p->p_md.md_regs; 459 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 460 /* 461 * Allocate and validate space for the signal handler context. 462 */ 463 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 464 (psp->ps_sigonstack & sigmask(sig))) { 465 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 466 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 467 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 468 } else { 469 fp = (struct sigframe *)regs->tf_esp - 1; 470 } 471 472 /* 473 * grow() will return FALSE if the fp will not fit inside the stack 474 * and the stack can not be grown. useracc will return FALSE 475 * if access is denied. 476 */ 477 if ((grow(p, (int)fp) == FALSE) || 478 (useracc((caddr_t)fp, sizeof(struct sigframe), B_WRITE) == FALSE)) { 479 /* 480 * Process has trashed its stack; give it an illegal 481 * instruction to halt it in its tracks. 482 */ 483 SIGACTION(p, SIGILL) = SIG_DFL; 484 sig = sigmask(SIGILL); 485 p->p_sigignore &= ~sig; 486 p->p_sigcatch &= ~sig; 487 p->p_sigmask &= ~sig; 488 psignal(p, SIGILL); 489 return; 490 } 491 492 /* 493 * Build the argument list for the signal handler. 494 */ 495 if (p->p_sysent->sv_sigtbl) { 496 if (sig < p->p_sysent->sv_sigsize) 497 sig = p->p_sysent->sv_sigtbl[sig]; 498 else 499 sig = p->p_sysent->sv_sigsize + 1; 500 } 501 sf.sf_signum = sig; 502 sf.sf_code = code; 503 sf.sf_scp = &fp->sf_sc; 504 sf.sf_addr = (char *) regs->tf_err; 505 sf.sf_handler = catcher; 506 507 /* save scratch registers */ 508 sf.sf_sc.sc_eax = regs->tf_eax; 509 sf.sf_sc.sc_ebx = regs->tf_ebx; 510 sf.sf_sc.sc_ecx = regs->tf_ecx; 511 sf.sf_sc.sc_edx = regs->tf_edx; 512 sf.sf_sc.sc_esi = regs->tf_esi; 513 sf.sf_sc.sc_edi = regs->tf_edi; 514 sf.sf_sc.sc_cs = regs->tf_cs; 515 sf.sf_sc.sc_ds = regs->tf_ds; 516 sf.sf_sc.sc_ss = regs->tf_ss; 517 sf.sf_sc.sc_es = regs->tf_es; 518 sf.sf_sc.sc_isp = regs->tf_isp; 519 520 /* 521 * Build the signal context to be used by sigreturn. 522 */ 523 sf.sf_sc.sc_onstack = oonstack; 524 sf.sf_sc.sc_mask = mask; 525 sf.sf_sc.sc_sp = regs->tf_esp; 526 sf.sf_sc.sc_fp = regs->tf_ebp; 527 sf.sf_sc.sc_pc = regs->tf_eip; 528 sf.sf_sc.sc_ps = regs->tf_eflags; 529 sf.sf_sc.sc_trapno = regs->tf_trapno; 530 sf.sf_sc.sc_err = regs->tf_err; 531 532 /* 533 * If we're a vm86 process, we want to save the segment registers. 534 * We also change eflags to be our emulated eflags, not the actual 535 * eflags. 536 */ 537 if (regs->tf_eflags & PSL_VM) { 538 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 539 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 540 541 sf.sf_sc.sc_gs = tf->tf_vm86_gs; 542 sf.sf_sc.sc_fs = tf->tf_vm86_fs; 543 sf.sf_sc.sc_es = tf->tf_vm86_es; 544 sf.sf_sc.sc_ds = tf->tf_vm86_ds; 545 546 if (vm86->vm86_has_vme == 0) 547 sf.sf_sc.sc_ps = (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) 548 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 549 550 /* 551 * We should never have PSL_T set when returning from vm86 552 * mode. It may be set here if we deliver a signal before 553 * getting to vm86 mode, so turn it off. 554 */ 555 tf->tf_eflags &= ~(PSL_VM | PSL_T | PSL_VIF | PSL_VIP); 556 } 557 558 /* 559 * Copy the sigframe out to the user's stack. 560 */ 561 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 562 /* 563 * Something is wrong with the stack pointer. 564 * ...Kill the process. 565 */ 566 sigexit(p, SIGILL); 567 } 568 569 regs->tf_esp = (int)fp; 570 regs->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 571 regs->tf_cs = _ucodesel; 572 regs->tf_ds = _udatasel; 573 regs->tf_es = _udatasel; 574 regs->tf_ss = _udatasel; 575} 576 577/* 578 * System call to cleanup state after a signal 579 * has been taken. Reset signal mask and 580 * stack state from context left by sendsig (above). 581 * Return to previous pc and psl as specified by 582 * context left by sendsig. Check carefully to 583 * make sure that the user has not modified the 584 * state to gain improper privileges. 585 */ 586int 587sigreturn(p, uap, retval) 588 struct proc *p; 589 struct sigreturn_args /* { 590 struct sigcontext *sigcntxp; 591 } */ *uap; 592 int *retval; 593{ 594 register struct sigcontext *scp; 595 register struct sigframe *fp; 596 register struct trapframe *regs = p->p_md.md_regs; 597 int eflags; 598 599 /* 600 * (XXX old comment) regs->tf_esp points to the return address. 601 * The user scp pointer is above that. 602 * The return address is faked in the signal trampoline code 603 * for consistency. 604 */ 605 scp = uap->sigcntxp; 606 fp = (struct sigframe *) 607 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 608 609 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 610 return(EFAULT); 611 612 eflags = scp->sc_ps; 613 if (eflags & PSL_VM) { 614 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 615 struct vm86_kernel *vm86; 616 617 /* 618 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 619 * set up the vm86 area, and we can't enter vm86 mode. 620 */ 621 if (p->p_addr->u_pcb.pcb_ext == 0) 622 return (EINVAL); 623 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86; 624 if (vm86->vm86_inited == 0) 625 return (EINVAL); 626 627 /* go back to user mode if both flags are set */ 628 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 629 trapsignal(p, SIGBUS, 0); 630 631#define VM_USERCHANGE (PSL_USERCHANGE | PSL_RF) 632#define VME_USERCHANGE (VM_USERCHANGE | PSL_VIP | PSL_VIF) 633 if (vm86->vm86_has_vme) { 634 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 635 (eflags & VME_USERCHANGE) | PSL_VM; 636 } else { 637 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 638 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM; 639 } 640 tf->tf_vm86_ds = scp->sc_ds; 641 tf->tf_vm86_es = scp->sc_es; 642 tf->tf_vm86_fs = scp->sc_fs; 643 tf->tf_vm86_gs = scp->sc_gs; 644 tf->tf_ds = _udatasel; 645 tf->tf_es = _udatasel; 646 } else { 647 /* 648 * Don't allow users to change privileged or reserved flags. 649 */ 650#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 651 /* 652 * XXX do allow users to change the privileged flag PSL_RF. 653 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 654 * should sometimes set it there too. tf_eflags is kept in 655 * the signal context during signal handling and there is no 656 * other place to remember it, so the PSL_RF bit may be 657 * corrupted by the signal handler without us knowing. 658 * Corruption of the PSL_RF bit at worst causes one more or 659 * one less debugger trap, so allowing it is fairly harmless. 660 */ 661 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 662#ifdef DEBUG 663 printf("sigreturn: eflags = 0x%x\n", eflags); 664#endif 665 return(EINVAL); 666 } 667 668 /* 669 * Don't allow users to load a valid privileged %cs. Let the 670 * hardware check for invalid selectors, excess privilege in 671 * other selectors, invalid %eip's and invalid %esp's. 672 */ 673#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 674 if (!CS_SECURE(scp->sc_cs)) { 675#ifdef DEBUG 676 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 677#endif 678 trapsignal(p, SIGBUS, T_PROTFLT); 679 return(EINVAL); 680 } 681 regs->tf_ds = scp->sc_ds; 682 regs->tf_es = scp->sc_es; 683 } 684 /* restore scratch registers */ 685 regs->tf_eax = scp->sc_eax; 686 regs->tf_ebx = scp->sc_ebx; 687 regs->tf_ecx = scp->sc_ecx; 688 regs->tf_edx = scp->sc_edx; 689 regs->tf_esi = scp->sc_esi; 690 regs->tf_edi = scp->sc_edi; 691 regs->tf_cs = scp->sc_cs; 692 regs->tf_ss = scp->sc_ss; 693 regs->tf_isp = scp->sc_isp; 694 695 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 696 return(EINVAL); 697 698 if (scp->sc_onstack & 01) 699 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 700 else 701 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 702 p->p_sigmask = scp->sc_mask & ~sigcantmask; 703 regs->tf_ebp = scp->sc_fp; 704 regs->tf_esp = scp->sc_sp; 705 regs->tf_eip = scp->sc_pc; 706 regs->tf_eflags = eflags; 707 return(EJUSTRETURN); 708} 709 710/* 711 * Machine dependent boot() routine 712 * 713 * I haven't seen anything to put here yet 714 * Possibly some stuff might be grafted back here from boot() 715 */ 716void 717cpu_boot(int howto) 718{ 719} 720 721/* 722 * Shutdown the CPU as much as possible 723 */ 724void 725cpu_halt(void) 726{ 727 for (;;) 728 __asm__ ("hlt"); 729} 730 731/* 732 * Turn the power off. 733 */ 734void 735cpu_power_down(void) 736{ 737#if NAPM > 0 738 apm_power_off(); 739#endif 740} 741 742/* 743 * Clear registers on exec 744 */ 745void 746setregs(p, entry, stack) 747 struct proc *p; 748 u_long entry; 749 u_long stack; 750{ 751 struct trapframe *regs = p->p_md.md_regs; 752 753#ifdef USER_LDT 754 struct pcb *pcb = &p->p_addr->u_pcb; 755 756 /* was i386_user_cleanup() in NetBSD */ 757 if (pcb->pcb_ldt) { 758 if (pcb == curpcb) 759 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 760 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 761 pcb->pcb_ldt_len * sizeof(union descriptor)); 762 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 763 } 764#endif 765 766 bzero((char *)regs, sizeof(struct trapframe)); 767 regs->tf_eip = entry; 768 regs->tf_esp = stack; 769 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 770 regs->tf_ss = _udatasel; 771 regs->tf_ds = _udatasel; 772 regs->tf_es = _udatasel; 773 regs->tf_cs = _ucodesel; 774 775 /* 776 * Initialize the math emulator (if any) for the current process. 777 * Actually, just clear the bit that says that the emulator has 778 * been initialized. Initialization is delayed until the process 779 * traps to the emulator (if it is done at all) mainly because 780 * emulators don't provide an entry point for initialization. 781 */ 782 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 783 784 /* 785 * Arrange to trap the next npx or `fwait' instruction (see npx.c 786 * for why fwait must be trapped at least if there is an npx or an 787 * emulator). This is mainly to handle the case where npx0 is not 788 * configured, since the npx routines normally set up the trap 789 * otherwise. It should be done only at boot time, but doing it 790 * here allows modifying `npx_exists' for testing the emulator on 791 * systems with an npx. 792 */ 793 load_cr0(rcr0() | CR0_MP | CR0_TS); 794 795#if NNPX > 0 796 /* Initialize the npx (if any) for the current process. */ 797 npxinit(__INITIAL_NPXCW__); 798#endif 799} 800 801static int 802sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 803{ 804 int error; 805 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 806 req); 807 if (!error && req->newptr) 808 resettodr(); 809 return (error); 810} 811 812SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 813 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 814 815SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 816 CTLFLAG_RW, &disable_rtc_set, 0, ""); 817 818SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 819 CTLFLAG_RD, &bootinfo, bootinfo, ""); 820 821SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 822 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 823 824/* 825 * Initialize 386 and configure to run kernel 826 */ 827 828/* 829 * Initialize segments & interrupt table 830 */ 831 832int currentldt; 833int _default_ldt; 834#ifdef SMP 835union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 836#else 837union descriptor gdt[NGDT]; /* global descriptor table */ 838#endif 839struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 840union descriptor ldt[NLDT]; /* local descriptor table */ 841#ifdef SMP 842/* table descriptors - used to load tables by microp */ 843struct region_descriptor r_gdt, r_idt; 844#endif 845 846#ifdef SMP 847extern struct i386tss common_tss; /* One tss per cpu */ 848#ifdef VM86 849extern struct segment_descriptor common_tssd; 850#endif /* VM86 */ 851#else 852struct i386tss common_tss; 853#ifdef VM86 854struct segment_descriptor common_tssd; 855u_int private_tss = 0; /* flag indicating private tss */ 856#endif /* VM86 */ 857#endif 858 859static struct i386tss dblfault_tss; 860static char dblfault_stack[PAGE_SIZE]; 861 862extern struct user *proc0paddr; 863 864 865/* software prototypes -- in more palatable form */ 866struct soft_segment_descriptor gdt_segs[ 867#ifdef SMP 868 NGDT + NCPU 869#endif 870 ] = { 871/* GNULL_SEL 0 Null Descriptor */ 872{ 0x0, /* segment base address */ 873 0x0, /* length */ 874 0, /* segment type */ 875 0, /* segment descriptor priority level */ 876 0, /* segment descriptor present */ 877 0, 0, 878 0, /* default 32 vs 16 bit size */ 879 0 /* limit granularity (byte/page units)*/ }, 880/* GCODE_SEL 1 Code Descriptor for kernel */ 881{ 0x0, /* segment base address */ 882 0xfffff, /* length - all address space */ 883 SDT_MEMERA, /* segment type */ 884 0, /* segment descriptor priority level */ 885 1, /* segment descriptor present */ 886 0, 0, 887 1, /* default 32 vs 16 bit size */ 888 1 /* limit granularity (byte/page units)*/ }, 889/* GDATA_SEL 2 Data Descriptor for kernel */ 890{ 0x0, /* segment base address */ 891 0xfffff, /* length - all address space */ 892 SDT_MEMRWA, /* segment type */ 893 0, /* segment descriptor priority level */ 894 1, /* segment descriptor present */ 895 0, 0, 896 1, /* default 32 vs 16 bit size */ 897 1 /* limit granularity (byte/page units)*/ }, 898/* GLDT_SEL 3 LDT Descriptor */ 899{ (int) ldt, /* segment base address */ 900 sizeof(ldt)-1, /* length - all address space */ 901 SDT_SYSLDT, /* segment type */ 902 SEL_UPL, /* segment descriptor priority level */ 903 1, /* segment descriptor present */ 904 0, 0, 905 0, /* unused - default 32 vs 16 bit size */ 906 0 /* limit granularity (byte/page units)*/ }, 907/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 908{ 0x0, /* segment base address */ 909 0x0, /* length - all address space */ 910 0, /* segment type */ 911 0, /* segment descriptor priority level */ 912 0, /* segment descriptor present */ 913 0, 0, 914 0, /* default 32 vs 16 bit size */ 915 0 /* limit granularity (byte/page units)*/ }, 916/* GPANIC_SEL 5 Panic Tss Descriptor */ 917{ (int) &dblfault_tss, /* segment base address */ 918 sizeof(struct i386tss)-1,/* length - all address space */ 919 SDT_SYS386TSS, /* segment type */ 920 0, /* segment descriptor priority level */ 921 1, /* segment descriptor present */ 922 0, 0, 923 0, /* unused - default 32 vs 16 bit size */ 924 0 /* limit granularity (byte/page units)*/ }, 925/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 926{ 927 (int) &common_tss, /* segment base address */ 928 sizeof(struct i386tss)-1,/* length - all address space */ 929 SDT_SYS386TSS, /* segment type */ 930 0, /* segment descriptor priority level */ 931 1, /* segment descriptor present */ 932 0, 0, 933 0, /* unused - default 32 vs 16 bit size */ 934 0 /* limit granularity (byte/page units)*/ }, 935/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 936{ (int) ldt, /* segment base address */ 937 (512 * sizeof(union descriptor)-1), /* length */ 938 SDT_SYSLDT, /* segment type */ 939 0, /* segment descriptor priority level */ 940 1, /* segment descriptor present */ 941 0, 0, 942 0, /* unused - default 32 vs 16 bit size */ 943 0 /* limit granularity (byte/page units)*/ }, 944/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 945{ 0, /* segment base address (overwritten by APM) */ 946 0xfffff, /* length */ 947 SDT_MEMERA, /* segment type */ 948 0, /* segment descriptor priority level */ 949 1, /* segment descriptor present */ 950 0, 0, 951 1, /* default 32 vs 16 bit size */ 952 1 /* limit granularity (byte/page units)*/ }, 953/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 954{ 0, /* segment base address (overwritten by APM) */ 955 0xfffff, /* length */ 956 SDT_MEMERA, /* segment type */ 957 0, /* segment descriptor priority level */ 958 1, /* segment descriptor present */ 959 0, 0, 960 0, /* default 32 vs 16 bit size */ 961 1 /* limit granularity (byte/page units)*/ }, 962/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 963{ 0, /* segment base address (overwritten by APM) */ 964 0xfffff, /* length */ 965 SDT_MEMRWA, /* segment type */ 966 0, /* segment descriptor priority level */ 967 1, /* segment descriptor present */ 968 0, 0, 969 1, /* default 32 vs 16 bit size */ 970 1 /* limit granularity (byte/page units)*/ }, 971}; 972 973static struct soft_segment_descriptor ldt_segs[] = { 974 /* Null Descriptor - overwritten by call gate */ 975{ 0x0, /* segment base address */ 976 0x0, /* length - all address space */ 977 0, /* segment type */ 978 0, /* segment descriptor priority level */ 979 0, /* segment descriptor present */ 980 0, 0, 981 0, /* default 32 vs 16 bit size */ 982 0 /* limit granularity (byte/page units)*/ }, 983 /* Null Descriptor - overwritten by call gate */ 984{ 0x0, /* segment base address */ 985 0x0, /* length - all address space */ 986 0, /* segment type */ 987 0, /* segment descriptor priority level */ 988 0, /* segment descriptor present */ 989 0, 0, 990 0, /* default 32 vs 16 bit size */ 991 0 /* limit granularity (byte/page units)*/ }, 992 /* Null Descriptor - overwritten by call gate */ 993{ 0x0, /* segment base address */ 994 0x0, /* length - all address space */ 995 0, /* segment type */ 996 0, /* segment descriptor priority level */ 997 0, /* segment descriptor present */ 998 0, 0, 999 0, /* default 32 vs 16 bit size */ 1000 0 /* limit granularity (byte/page units)*/ }, 1001 /* Code Descriptor for user */ 1002{ 0x0, /* segment base address */ 1003 0xfffff, /* length - all address space */ 1004 SDT_MEMERA, /* segment type */ 1005 SEL_UPL, /* segment descriptor priority level */ 1006 1, /* segment descriptor present */ 1007 0, 0, 1008 1, /* default 32 vs 16 bit size */ 1009 1 /* limit granularity (byte/page units)*/ }, 1010 /* Data Descriptor for user */ 1011{ 0x0, /* segment base address */ 1012 0xfffff, /* length - all address space */ 1013 SDT_MEMRWA, /* segment type */ 1014 SEL_UPL, /* segment descriptor priority level */ 1015 1, /* segment descriptor present */ 1016 0, 0, 1017 1, /* default 32 vs 16 bit size */ 1018 1 /* limit granularity (byte/page units)*/ }, 1019}; 1020 1021void 1022setidt(idx, func, typ, dpl, selec) 1023 int idx; 1024 inthand_t *func; 1025 int typ; 1026 int dpl; 1027 int selec; 1028{ 1029 struct gate_descriptor *ip = idt + idx; 1030 1031 ip->gd_looffset = (int)func; 1032 ip->gd_selector = selec; 1033 ip->gd_stkcpy = 0; 1034 ip->gd_xx = 0; 1035 ip->gd_type = typ; 1036 ip->gd_dpl = dpl; 1037 ip->gd_p = 1; 1038 ip->gd_hioffset = ((int)func)>>16 ; 1039} 1040 1041#define IDTVEC(name) __CONCAT(X,name) 1042 1043extern inthand_t 1044 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1045 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1046 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1047 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1048 IDTVEC(syscall), IDTVEC(int0x80_syscall); 1049 1050void 1051sdtossd(sd, ssd) 1052 struct segment_descriptor *sd; 1053 struct soft_segment_descriptor *ssd; 1054{ 1055 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1056 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1057 ssd->ssd_type = sd->sd_type; 1058 ssd->ssd_dpl = sd->sd_dpl; 1059 ssd->ssd_p = sd->sd_p; 1060 ssd->ssd_def32 = sd->sd_def32; 1061 ssd->ssd_gran = sd->sd_gran; 1062} 1063 1064void 1065init386(first) 1066 int first; 1067{ 1068 int x; 1069 unsigned biosbasemem, biosextmem; 1070 struct gate_descriptor *gdp; 1071 int gsel_tss; 1072 1073 struct isa_device *idp; 1074#ifndef SMP 1075 /* table descriptors - used to load tables by microp */ 1076 struct region_descriptor r_gdt, r_idt; 1077#endif 1078 int pagesinbase, pagesinext; 1079 int target_page, pa_indx; 1080 int off; 1081 1082 proc0.p_addr = proc0paddr; 1083 1084 atdevbase = ISA_HOLE_START + KERNBASE; 1085 1086 /* 1087 * Initialize the console before we print anything out. 1088 */ 1089 cninit(); 1090 1091 /* 1092 * make gdt memory segments, the code segment goes up to end of the 1093 * page with etext in it, the data segment goes to the end of 1094 * the address space 1095 */ 1096 /* 1097 * XXX text protection is temporarily (?) disabled. The limit was 1098 * i386_btop(round_page(etext)) - 1. 1099 */ 1100 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1101 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1102#ifdef BDE_DEBUGGER 1103#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1104#else 1105#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1106#endif 1107 for (x = 0; x < NGDT1; x++) 1108 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1109#ifdef VM86 1110 common_tssd = gdt[GPROC0_SEL].sd; 1111#endif /* VM86 */ 1112 1113#ifdef SMP 1114 /* 1115 * Spin these up now. init_secondary() grabs them. We could use 1116 * #for(x,y,z) / #endfor cpp directives if they existed. 1117 */ 1118 for (x = 0; x < NCPU; x++) { 1119 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1120 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1121 } 1122#endif 1123 1124 /* make ldt memory segments */ 1125 /* 1126 * The data segment limit must not cover the user area because we 1127 * don't want the user area to be writable in copyout() etc. (page 1128 * level protection is lost in kernel mode on 386's). Also, we 1129 * don't want the user area to be writable directly (page level 1130 * protection of the user area is not available on 486's with 1131 * CR0_WP set, because there is no user-read/kernel-write mode). 1132 * 1133 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1134 * should be spelled ...MAX_USER... 1135 */ 1136#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1137 /* 1138 * The code segment limit has to cover the user area until we move 1139 * the signal trampoline out of the user area. This is safe because 1140 * the code segment cannot be written to directly. 1141 */ 1142#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1143 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1144 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1145 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1146 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1147 1148 /* exceptions */ 1149 for (x = 0; x < NIDT; x++) 1150 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1151 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1152 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1153 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1154 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1155 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1156 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1157 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1158 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1159 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1160 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1161 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1162 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1163 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1164 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1165 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1166 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1167 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1168 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1169 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1170 setidt(0x80, &IDTVEC(int0x80_syscall), 1171 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1172 1173#include "isa.h" 1174#if NISA >0 1175 isa_defaultirq(); 1176#endif 1177 rand_initialize(); 1178 1179 r_gdt.rd_limit = sizeof(gdt) - 1; 1180 r_gdt.rd_base = (int) gdt; 1181 lgdt(&r_gdt); 1182 1183 r_idt.rd_limit = sizeof(idt) - 1; 1184 r_idt.rd_base = (int) idt; 1185 lidt(&r_idt); 1186 1187 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1188 lldt(_default_ldt); 1189 currentldt = _default_ldt; 1190 1191#ifdef DDB 1192 kdb_init(); 1193 if (boothowto & RB_KDB) 1194 Debugger("Boot flags requested debugger"); 1195#endif 1196 1197 finishidentcpu(); /* Final stage of CPU initialization */ 1198 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1199 initializecpu(); /* Initialize CPU registers */ 1200 1201 /* Use BIOS values stored in RTC CMOS RAM, since probing 1202 * breaks certain 386 AT relics. 1203 */ 1204 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1205 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1206 1207 /* 1208 * If BIOS tells us that it has more than 640k in the basemem, 1209 * don't believe it - set it to 640k. 1210 */ 1211 if (biosbasemem > 640) { 1212 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1213 biosbasemem); 1214 biosbasemem = 640; 1215 } 1216 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1217 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1218 bootinfo.bi_basemem); 1219 bootinfo.bi_basemem = 640; 1220 } 1221 1222 /* 1223 * Warn if the official BIOS interface disagrees with the RTC 1224 * interface used above about the amount of base memory or the 1225 * amount of extended memory. Prefer the BIOS value for the base 1226 * memory. This is necessary for machines that `steal' base 1227 * memory for use as BIOS memory, at least if we are going to use 1228 * the BIOS for apm. Prefer the RTC value for extended memory. 1229 * Eventually the hackish interface shouldn't even be looked at. 1230 */ 1231 if (bootinfo.bi_memsizes_valid) { 1232 if (bootinfo.bi_basemem != biosbasemem) { 1233 vm_offset_t pa; 1234 1235 printf( 1236 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1237 bootinfo.bi_basemem, biosbasemem); 1238 biosbasemem = bootinfo.bi_basemem; 1239 1240 /* 1241 * XXX if biosbasemem is now < 640, there is `hole' 1242 * between the end of base memory and the start of 1243 * ISA memory. The hole may be empty or it may 1244 * contain BIOS code or data. Map it read/write so 1245 * that the BIOS can write to it. (Memory from 0 to 1246 * the physical end of the kernel is mapped read-only 1247 * to begin with and then parts of it are remapped. 1248 * The parts that aren't remapped form holes that 1249 * remain read-only and are unused by the kernel. 1250 * The base memory area is below the physical end of 1251 * the kernel and right now forms a read-only hole. 1252 * The part of it from 0 to 1253 * (trunc_page(biosbasemem * 1024) - 1) will be 1254 * remapped and used by the kernel later.) 1255 * 1256 * This code is similar to the code used in 1257 * pmap_mapdev, but since no memory needs to be 1258 * allocated we simply change the mapping. 1259 */ 1260 for (pa = trunc_page(biosbasemem * 1024); 1261 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1262 unsigned *pte; 1263 1264 pte = (unsigned *)vtopte(pa + KERNBASE); 1265 *pte = pa | PG_RW | PG_V; 1266 } 1267 } 1268 if (bootinfo.bi_extmem != biosextmem) 1269 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1270 bootinfo.bi_extmem, biosextmem); 1271 } 1272 1273#ifdef SMP 1274 /* make hole for AP bootstrap code */ 1275 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1276#else 1277 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1278#endif 1279 1280 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1281 1282 /* 1283 * Special hack for chipsets that still remap the 384k hole when 1284 * there's 16MB of memory - this really confuses people that 1285 * are trying to use bus mastering ISA controllers with the 1286 * "16MB limit"; they only have 16MB, but the remapping puts 1287 * them beyond the limit. 1288 */ 1289 /* 1290 * If extended memory is between 15-16MB (16-17MB phys address range), 1291 * chop it to 15MB. 1292 */ 1293 if ((pagesinext > 3840) && (pagesinext < 4096)) 1294 pagesinext = 3840; 1295 1296 /* 1297 * Maxmem isn't the "maximum memory", it's one larger than the 1298 * highest page of the physical address space. It should be 1299 * called something like "Maxphyspage". 1300 */ 1301 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1302 1303#ifdef MAXMEM 1304 Maxmem = MAXMEM/4; 1305#endif 1306 1307#if NNPX > 0 1308 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1309 if (idp != NULL && idp->id_msize != 0) 1310 Maxmem = idp->id_msize / 4; 1311#endif 1312 1313#ifdef SMP 1314 /* look for the MP hardware - needed for apic addresses */ 1315 mp_probe(); 1316#endif 1317 1318 /* call pmap initialization to make new kernel address space */ 1319 pmap_bootstrap (first, 0); 1320 1321 /* 1322 * Size up each available chunk of physical memory. 1323 */ 1324 1325 /* 1326 * We currently don't bother testing base memory. 1327 * XXX ...but we probably should. 1328 */ 1329 pa_indx = 0; 1330 badpages = 0; 1331 if (pagesinbase > 1) { 1332 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1333 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1334 physmem = pagesinbase - 1; 1335 } else { 1336 /* point at first chunk end */ 1337 pa_indx++; 1338 } 1339 1340 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1341 int tmp, page_bad = FALSE; 1342 1343 /* 1344 * map page into kernel: valid, read/write, non-cacheable 1345 */ 1346 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1347 invltlb(); 1348 1349 tmp = *(int *)CADDR1; 1350 /* 1351 * Test for alternating 1's and 0's 1352 */ 1353 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1354 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1355 page_bad = TRUE; 1356 } 1357 /* 1358 * Test for alternating 0's and 1's 1359 */ 1360 *(volatile int *)CADDR1 = 0x55555555; 1361 if (*(volatile int *)CADDR1 != 0x55555555) { 1362 page_bad = TRUE; 1363 } 1364 /* 1365 * Test for all 1's 1366 */ 1367 *(volatile int *)CADDR1 = 0xffffffff; 1368 if (*(volatile int *)CADDR1 != 0xffffffff) { 1369 page_bad = TRUE; 1370 } 1371 /* 1372 * Test for all 0's 1373 */ 1374 *(volatile int *)CADDR1 = 0x0; 1375 if (*(volatile int *)CADDR1 != 0x0) { 1376 /* 1377 * test of page failed 1378 */ 1379 page_bad = TRUE; 1380 } 1381 /* 1382 * Restore original value. 1383 */ 1384 *(int *)CADDR1 = tmp; 1385 1386 /* 1387 * Adjust array of valid/good pages. 1388 */ 1389 if (page_bad == FALSE) { 1390 /* 1391 * If this good page is a continuation of the 1392 * previous set of good pages, then just increase 1393 * the end pointer. Otherwise start a new chunk. 1394 * Note that "end" points one higher than end, 1395 * making the range >= start and < end. 1396 */ 1397 if (phys_avail[pa_indx] == target_page) { 1398 phys_avail[pa_indx] += PAGE_SIZE; 1399 } else { 1400 pa_indx++; 1401 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1402 printf("Too many holes in the physical address space, giving up\n"); 1403 pa_indx--; 1404 break; 1405 } 1406 phys_avail[pa_indx++] = target_page; /* start */ 1407 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1408 } 1409 physmem++; 1410 } else { 1411 badpages++; 1412 page_bad = FALSE; 1413 } 1414 } 1415 1416 *(int *)CMAP1 = 0; 1417 invltlb(); 1418 1419 /* 1420 * XXX 1421 * The last chunk must contain at least one page plus the message 1422 * buffer to avoid complicating other code (message buffer address 1423 * calculation, etc.). 1424 */ 1425 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1426 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1427 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1428 phys_avail[pa_indx--] = 0; 1429 phys_avail[pa_indx--] = 0; 1430 } 1431 1432 Maxmem = atop(phys_avail[pa_indx]); 1433 1434 /* Trim off space for the message buffer. */ 1435 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1436 1437 avail_end = phys_avail[pa_indx]; 1438 1439 /* now running on new page tables, configured,and u/iom is accessible */ 1440 1441 /* Map the message buffer. */ 1442 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1443 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1444 avail_end + off, VM_PROT_ALL, TRUE); 1445 msgbufmapped = 1; 1446 1447 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1448#ifdef VM86 1449 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16; 1450#else 1451 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1452#endif /* VM86 */ 1453 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1454 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1455 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1456 ltr(gsel_tss); 1457 1458 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1459 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1460 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1461 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1462 dblfault_tss.tss_cr3 = (int)IdlePTD; 1463 dblfault_tss.tss_eip = (int) dblfault_handler; 1464 dblfault_tss.tss_eflags = PSL_KERNEL; 1465 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1466 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1467 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1468 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1469 1470 /* make a call gate to reenter kernel with */ 1471 gdp = &ldt[LSYS5CALLS_SEL].gd; 1472 1473 x = (int) &IDTVEC(syscall); 1474 gdp->gd_looffset = x++; 1475 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1476 gdp->gd_stkcpy = 1; 1477 gdp->gd_type = SDT_SYS386CGT; 1478 gdp->gd_dpl = SEL_UPL; 1479 gdp->gd_p = 1; 1480 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1481 1482 /* XXX does this work? */ 1483 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1484 1485 /* transfer to user mode */ 1486 1487 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1488 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1489 1490 /* setup proc 0's pcb */ 1491 proc0.p_addr->u_pcb.pcb_flags = 0; 1492 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1493 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1494 proc0.p_addr->u_pcb.pcb_ext = 0; 1495} 1496 1497int 1498ptrace_set_pc(p, addr) 1499 struct proc *p; 1500 unsigned int addr; 1501{ 1502 p->p_md.md_regs->tf_eip = addr; 1503 return (0); 1504} 1505 1506int 1507ptrace_single_step(p) 1508 struct proc *p; 1509{ 1510 p->p_md.md_regs->tf_eflags |= PSL_T; 1511 return (0); 1512} 1513 1514int ptrace_write_u(p, off, data) 1515 struct proc *p; 1516 vm_offset_t off; 1517 int data; 1518{ 1519 struct trapframe frame_copy; 1520 vm_offset_t min; 1521 struct trapframe *tp; 1522 1523 /* 1524 * Privileged kernel state is scattered all over the user area. 1525 * Only allow write access to parts of regs and to fpregs. 1526 */ 1527 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1528 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1529 tp = p->p_md.md_regs; 1530 frame_copy = *tp; 1531 *(int *)((char *)&frame_copy + (off - min)) = data; 1532 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1533 !CS_SECURE(frame_copy.tf_cs)) 1534 return (EINVAL); 1535 *(int*)((char *)p->p_addr + off) = data; 1536 return (0); 1537 } 1538 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1539 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1540 *(int*)((char *)p->p_addr + off) = data; 1541 return (0); 1542 } 1543 return (EFAULT); 1544} 1545 1546int 1547fill_regs(p, regs) 1548 struct proc *p; 1549 struct reg *regs; 1550{ 1551 struct pcb *pcb; 1552 struct trapframe *tp; 1553 1554 tp = p->p_md.md_regs; 1555 regs->r_es = tp->tf_es; 1556 regs->r_ds = tp->tf_ds; 1557 regs->r_edi = tp->tf_edi; 1558 regs->r_esi = tp->tf_esi; 1559 regs->r_ebp = tp->tf_ebp; 1560 regs->r_ebx = tp->tf_ebx; 1561 regs->r_edx = tp->tf_edx; 1562 regs->r_ecx = tp->tf_ecx; 1563 regs->r_eax = tp->tf_eax; 1564 regs->r_eip = tp->tf_eip; 1565 regs->r_cs = tp->tf_cs; 1566 regs->r_eflags = tp->tf_eflags; 1567 regs->r_esp = tp->tf_esp; 1568 regs->r_ss = tp->tf_ss; 1569 pcb = &p->p_addr->u_pcb; 1570 regs->r_fs = pcb->pcb_fs; 1571 regs->r_gs = pcb->pcb_gs; 1572 return (0); 1573} 1574 1575int 1576set_regs(p, regs) 1577 struct proc *p; 1578 struct reg *regs; 1579{ 1580 struct pcb *pcb; 1581 struct trapframe *tp; 1582 1583 tp = p->p_md.md_regs; 1584 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1585 !CS_SECURE(regs->r_cs)) 1586 return (EINVAL); 1587 tp->tf_es = regs->r_es; 1588 tp->tf_ds = regs->r_ds; 1589 tp->tf_edi = regs->r_edi; 1590 tp->tf_esi = regs->r_esi; 1591 tp->tf_ebp = regs->r_ebp; 1592 tp->tf_ebx = regs->r_ebx; 1593 tp->tf_edx = regs->r_edx; 1594 tp->tf_ecx = regs->r_ecx; 1595 tp->tf_eax = regs->r_eax; 1596 tp->tf_eip = regs->r_eip; 1597 tp->tf_cs = regs->r_cs; 1598 tp->tf_eflags = regs->r_eflags; 1599 tp->tf_esp = regs->r_esp; 1600 tp->tf_ss = regs->r_ss; 1601 pcb = &p->p_addr->u_pcb; 1602 pcb->pcb_fs = regs->r_fs; 1603 pcb->pcb_gs = regs->r_gs; 1604 return (0); 1605} 1606 1607#ifndef DDB 1608void 1609Debugger(const char *msg) 1610{ 1611 printf("Debugger(\"%s\") called.\n", msg); 1612} 1613#endif /* no DDB */ 1614 1615#include <sys/disklabel.h> 1616 1617/* 1618 * Determine the size of the transfer, and make sure it is 1619 * within the boundaries of the partition. Adjust transfer 1620 * if needed, and signal errors or early completion. 1621 */ 1622int 1623bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1624{ 1625 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1626 int labelsect = lp->d_partitions[0].p_offset; 1627 int maxsz = p->p_size, 1628 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1629 1630 /* overwriting disk label ? */ 1631 /* XXX should also protect bootstrap in first 8K */ 1632 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1633#if LABELSECTOR != 0 1634 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1635#endif 1636 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1637 bp->b_error = EROFS; 1638 goto bad; 1639 } 1640 1641#if defined(DOSBBSECTOR) && defined(notyet) 1642 /* overwriting master boot record? */ 1643 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1644 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1645 bp->b_error = EROFS; 1646 goto bad; 1647 } 1648#endif 1649 1650 /* beyond partition? */ 1651 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1652 /* if exactly at end of disk, return an EOF */ 1653 if (bp->b_blkno == maxsz) { 1654 bp->b_resid = bp->b_bcount; 1655 return(0); 1656 } 1657 /* or truncate if part of it fits */ 1658 sz = maxsz - bp->b_blkno; 1659 if (sz <= 0) { 1660 bp->b_error = EINVAL; 1661 goto bad; 1662 } 1663 bp->b_bcount = sz << DEV_BSHIFT; 1664 } 1665 1666 bp->b_pblkno = bp->b_blkno + p->p_offset; 1667 return(1); 1668 1669bad: 1670 bp->b_flags |= B_ERROR; 1671 return(-1); 1672} 1673 1674#ifdef DDB 1675 1676/* 1677 * Provide inb() and outb() as functions. They are normally only 1678 * available as macros calling inlined functions, thus cannot be 1679 * called inside DDB. 1680 * 1681 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1682 */ 1683 1684#undef inb 1685#undef outb 1686 1687/* silence compiler warnings */ 1688u_char inb(u_int); 1689void outb(u_int, u_char); 1690 1691u_char 1692inb(u_int port) 1693{ 1694 u_char data; 1695 /* 1696 * We use %%dx and not %1 here because i/o is done at %dx and not at 1697 * %edx, while gcc generates inferior code (movw instead of movl) 1698 * if we tell it to load (u_short) port. 1699 */ 1700 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1701 return (data); 1702} 1703 1704void 1705outb(u_int port, u_char data) 1706{ 1707 u_char al; 1708 /* 1709 * Use an unnecessary assignment to help gcc's register allocator. 1710 * This make a large difference for gcc-1.40 and a tiny difference 1711 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1712 * best results. gcc-2.6.0 can't handle this. 1713 */ 1714 al = data; 1715 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1716} 1717 1718#endif /* DDB */ 1719