machdep.c revision 27899
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.253 1997/07/20 08:37:19 bde Exp $ 39 */ 40 41#include "apm.h" 42#include "npx.h" 43#include "opt_sysvipc.h" 44#include "opt_ddb.h" 45#include "opt_bounce.h" 46#include "opt_machdep.h" 47#include "opt_perfmon.h" 48#include "opt_smp.h" 49#include "opt_userconfig.h" 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/sysproto.h> 54#include <sys/signalvar.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> 57#include <sys/buf.h> 58#include <sys/reboot.h> 59#include <sys/conf.h> 60#include <sys/callout.h> 61#include <sys/malloc.h> 62#include <sys/mbuf.h> 63#include <sys/msgbuf.h> 64#include <sys/sysent.h> 65#include <sys/sysctl.h> 66#include <sys/vmmeter.h> 67 68#ifdef SYSVSHM 69#include <sys/shm.h> 70#endif 71 72#ifdef SYSVMSG 73#include <sys/msg.h> 74#endif 75 76#ifdef SYSVSEM 77#include <sys/sem.h> 78#endif 79 80#include <vm/vm.h> 81#include <vm/vm_param.h> 82#include <vm/vm_prot.h> 83#include <sys/lock.h> 84#include <vm/vm_kern.h> 85#include <vm/vm_object.h> 86#include <vm/vm_page.h> 87#include <vm/vm_map.h> 88#include <vm/vm_pager.h> 89#include <vm/vm_extern.h> 90 91#include <sys/user.h> 92#include <sys/exec.h> 93 94#include <ddb/ddb.h> 95 96#include <net/netisr.h> 97 98#if NAPM > 0 99#include <machine/apm_bios.h> 100#endif 101#include <machine/cpu.h> 102#include <machine/reg.h> 103#include <machine/psl.h> 104#include <machine/clock.h> 105#include <machine/specialreg.h> 106#include <machine/cons.h> 107#include <machine/bootinfo.h> 108#include <machine/md_var.h> 109#ifdef SMP 110#include <machine/smp.h> 111#endif 112#ifdef PERFMON 113#include <machine/perfmon.h> 114#endif 115 116#include <i386/isa/isa_device.h> 117#include <i386/isa/intr_machdep.h> 118#include <i386/isa/rtc.h> 119#include <machine/random.h> 120 121extern void init386 __P((int first)); 122extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 123extern int ptrace_single_step __P((struct proc *p)); 124extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 125extern void dblfault_handler __P((void)); 126 127extern void printcpuinfo(void); /* XXX header file */ 128extern void earlysetcpuclass(void); /* same header file */ 129extern void finishidentcpu(void); 130extern void panicifcpuunsupported(void); 131extern void initializecpu(void); 132 133static void cpu_startup __P((void *)); 134SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 135 136 137#ifdef BOUNCE_BUFFERS 138extern char *bouncememory; 139extern int maxbkva; 140#ifdef BOUNCEPAGES 141int bouncepages = BOUNCEPAGES; 142#else 143int bouncepages = 0; 144#endif 145#endif /* BOUNCE_BUFFERS */ 146 147extern int freebufspace; 148int msgbufmapped = 0; /* set when safe to use msgbuf */ 149int _udatasel, _ucodesel; 150u_int atdevbase; 151 152 153int physmem = 0; 154int cold = 1; 155 156static int 157sysctl_hw_physmem SYSCTL_HANDLER_ARGS 158{ 159 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 160 return (error); 161} 162 163SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 164 0, 0, sysctl_hw_physmem, "I", ""); 165 166static int 167sysctl_hw_usermem SYSCTL_HANDLER_ARGS 168{ 169 int error = sysctl_handle_int(oidp, 0, 170 ctob(physmem - cnt.v_wire_count), req); 171 return (error); 172} 173 174SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 175 0, 0, sysctl_hw_usermem, "I", ""); 176 177int boothowto = 0, bootverbose = 0, Maxmem = 0; 178static int badpages = 0; 179long dumplo; 180extern int bootdev; 181 182vm_offset_t phys_avail[10]; 183 184/* must be 2 less so 0 0 can signal end of chunks */ 185#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 186 187static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 188 189static vm_offset_t buffer_sva, buffer_eva; 190vm_offset_t clean_sva, clean_eva; 191static vm_offset_t pager_sva, pager_eva; 192extern struct linker_set netisr_set; 193 194#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 195 196static void 197cpu_startup(dummy) 198 void *dummy; 199{ 200 register unsigned i; 201 register caddr_t v; 202 vm_offset_t maxaddr; 203 vm_size_t size = 0; 204 int firstaddr; 205 vm_offset_t minaddr; 206 207 if (boothowto & RB_VERBOSE) 208 bootverbose++; 209 210 /* 211 * Good {morning,afternoon,evening,night}. 212 */ 213 printf(version); 214 earlysetcpuclass(); 215 startrtclock(); 216 printcpuinfo(); 217 panicifcpuunsupported(); 218#ifdef PERFMON 219 perfmon_init(); 220#endif 221 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 222 /* 223 * Display any holes after the first chunk of extended memory. 224 */ 225 if (badpages != 0) { 226 int indx = 1; 227 228 /* 229 * XXX skip reporting ISA hole & unmanaged kernel memory 230 */ 231 if (phys_avail[0] == PAGE_SIZE) 232 indx += 2; 233 234 printf("Physical memory hole(s):\n"); 235 for (; phys_avail[indx + 1] != 0; indx += 2) { 236 int size = phys_avail[indx + 1] - phys_avail[indx]; 237 238 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 239 phys_avail[indx + 1] - 1, size, size / PAGE_SIZE); 240 } 241 } 242 243 /* 244 * Quickly wire in netisrs. 245 */ 246 setup_netisrs(&netisr_set); 247 248 /* 249 * Allocate space for system data structures. 250 * The first available kernel virtual address is in "v". 251 * As pages of kernel virtual memory are allocated, "v" is incremented. 252 * As pages of memory are allocated and cleared, 253 * "firstaddr" is incremented. 254 * An index into the kernel page table corresponding to the 255 * virtual memory address maintained in "v" is kept in "mapaddr". 256 */ 257 258 /* 259 * Make two passes. The first pass calculates how much memory is 260 * needed and allocates it. The second pass assigns virtual 261 * addresses to the various data structures. 262 */ 263 firstaddr = 0; 264again: 265 v = (caddr_t)firstaddr; 266 267#define valloc(name, type, num) \ 268 (name) = (type *)v; v = (caddr_t)((name)+(num)) 269#define valloclim(name, type, num, lim) \ 270 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 271 valloc(callout, struct callout, ncallout); 272#ifdef SYSVSHM 273 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 274#endif 275#ifdef SYSVSEM 276 valloc(sema, struct semid_ds, seminfo.semmni); 277 valloc(sem, struct sem, seminfo.semmns); 278 /* This is pretty disgusting! */ 279 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 280#endif 281#ifdef SYSVMSG 282 valloc(msgpool, char, msginfo.msgmax); 283 valloc(msgmaps, struct msgmap, msginfo.msgseg); 284 valloc(msghdrs, struct msg, msginfo.msgtql); 285 valloc(msqids, struct msqid_ds, msginfo.msgmni); 286#endif 287 288 if (nbuf == 0) { 289 nbuf = 30; 290 if( physmem > 1024) 291 nbuf += min((physmem - 1024) / 8, 2048); 292 } 293 nswbuf = max(min(nbuf/4, 128), 16); 294 295 valloc(swbuf, struct buf, nswbuf); 296 valloc(buf, struct buf, nbuf); 297 298#ifdef BOUNCE_BUFFERS 299 /* 300 * If there is more than 16MB of memory, allocate some bounce buffers 301 */ 302 if (Maxmem > 4096) { 303 if (bouncepages == 0) { 304 bouncepages = 64; 305 bouncepages += ((Maxmem - 4096) / 2048) * 32; 306 if (bouncepages > 128) 307 bouncepages = 128; 308 } 309 v = (caddr_t)((vm_offset_t)round_page(v)); 310 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 311 } 312#endif 313 314 /* 315 * End of first pass, size has been calculated so allocate memory 316 */ 317 if (firstaddr == 0) { 318 size = (vm_size_t)(v - firstaddr); 319 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 320 if (firstaddr == 0) 321 panic("startup: no room for tables"); 322 goto again; 323 } 324 325 /* 326 * End of second pass, addresses have been assigned 327 */ 328 if ((vm_size_t)(v - firstaddr) != size) 329 panic("startup: table size inconsistency"); 330 331#ifdef BOUNCE_BUFFERS 332 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 333 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 334 maxbkva + pager_map_size, TRUE); 335 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 336#else 337 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 338 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 339#endif 340 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 341 (nbuf*BKVASIZE), TRUE); 342 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 343 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 344 pager_map->system_map = 1; 345 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 346 (16*ARG_MAX), TRUE); 347 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 348 (maxproc*UPAGES*PAGE_SIZE), FALSE); 349 350 /* 351 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 352 * we use the more space efficient malloc in place of kmem_alloc. 353 */ 354 { 355 vm_offset_t mb_map_size; 356 357 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 358 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 359 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 360 bzero(mclrefcnt, mb_map_size / MCLBYTES); 361 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 362 mb_map_size, FALSE); 363 mb_map->system_map = 1; 364 } 365 366 /* 367 * Initialize callouts 368 */ 369 callfree = callout; 370 for (i = 1; i < ncallout; i++) 371 callout[i-1].c_next = &callout[i]; 372 373#if defined(USERCONFIG) 374#if defined(USERCONFIG_BOOT) 375 if (1) { 376#else 377 if (boothowto & RB_CONFIG) { 378#endif 379 userconfig(); 380 cninit(); /* the preferred console may have changed */ 381 } 382#endif 383 384#ifdef BOUNCE_BUFFERS 385 /* 386 * init bounce buffers 387 */ 388 vm_bounce_init(); 389#endif 390 391 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 392 ptoa(cnt.v_free_count) / 1024); 393 394#ifdef SMP 395 /* 396 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 397 */ 398 mp_start(); /* fire up the APs and APICs */ 399 mp_announce(); 400#endif /* SMP */ 401 402 /* 403 * Set up buffers, so they can be used to read disk labels. 404 */ 405 bufinit(); 406 vm_pager_bufferinit(); 407} 408 409int 410register_netisr(num, handler) 411 int num; 412 netisr_t *handler; 413{ 414 415 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 416 printf("register_netisr: bad isr number: %d\n", num); 417 return (EINVAL); 418 } 419 netisrs[num] = handler; 420 return (0); 421} 422 423static void 424setup_netisrs(ls) 425 struct linker_set *ls; 426{ 427 int i; 428 const struct netisrtab *nit; 429 430 for(i = 0; ls->ls_items[i]; i++) { 431 nit = (const struct netisrtab *)ls->ls_items[i]; 432 register_netisr(nit->nit_num, nit->nit_isr); 433 } 434} 435 436/* 437 * Send an interrupt to process. 438 * 439 * Stack is set up to allow sigcode stored 440 * at top to call routine, followed by kcall 441 * to sigreturn routine below. After sigreturn 442 * resets the signal mask, the stack, and the 443 * frame pointer, it returns to the user 444 * specified pc, psl. 445 */ 446void 447sendsig(catcher, sig, mask, code) 448 sig_t catcher; 449 int sig, mask; 450 u_long code; 451{ 452 register struct proc *p = curproc; 453 register struct trapframe *regs; 454 register struct sigframe *fp; 455 struct sigframe sf; 456 struct sigacts *psp = p->p_sigacts; 457 int oonstack; 458 459 regs = p->p_md.md_regs; 460 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 461 /* 462 * Allocate and validate space for the signal handler context. 463 */ 464 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 465 (psp->ps_sigonstack & sigmask(sig))) { 466 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 467 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 468 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 469 } else { 470 fp = (struct sigframe *)regs->tf_esp - 1; 471 } 472 473 /* 474 * grow() will return FALSE if the fp will not fit inside the stack 475 * and the stack can not be grown. useracc will return FALSE 476 * if access is denied. 477 */ 478 if ((grow(p, (int)fp) == FALSE) || 479 (useracc((caddr_t)fp, sizeof (struct sigframe), B_WRITE) == FALSE)) { 480 /* 481 * Process has trashed its stack; give it an illegal 482 * instruction to halt it in its tracks. 483 */ 484 SIGACTION(p, SIGILL) = SIG_DFL; 485 sig = sigmask(SIGILL); 486 p->p_sigignore &= ~sig; 487 p->p_sigcatch &= ~sig; 488 p->p_sigmask &= ~sig; 489 psignal(p, SIGILL); 490 return; 491 } 492 493 /* 494 * Build the argument list for the signal handler. 495 */ 496 if (p->p_sysent->sv_sigtbl) { 497 if (sig < p->p_sysent->sv_sigsize) 498 sig = p->p_sysent->sv_sigtbl[sig]; 499 else 500 sig = p->p_sysent->sv_sigsize + 1; 501 } 502 sf.sf_signum = sig; 503 sf.sf_code = code; 504 sf.sf_scp = &fp->sf_sc; 505 sf.sf_addr = (char *) regs->tf_err; 506 sf.sf_handler = catcher; 507 508 /* save scratch registers */ 509 sf.sf_sc.sc_eax = regs->tf_eax; 510 sf.sf_sc.sc_ebx = regs->tf_ebx; 511 sf.sf_sc.sc_ecx = regs->tf_ecx; 512 sf.sf_sc.sc_edx = regs->tf_edx; 513 sf.sf_sc.sc_esi = regs->tf_esi; 514 sf.sf_sc.sc_edi = regs->tf_edi; 515 sf.sf_sc.sc_cs = regs->tf_cs; 516 sf.sf_sc.sc_ds = regs->tf_ds; 517 sf.sf_sc.sc_ss = regs->tf_ss; 518 sf.sf_sc.sc_es = regs->tf_es; 519 sf.sf_sc.sc_isp = regs->tf_isp; 520 521 /* 522 * Build the signal context to be used by sigreturn. 523 */ 524 sf.sf_sc.sc_onstack = oonstack; 525 sf.sf_sc.sc_mask = mask; 526 sf.sf_sc.sc_sp = regs->tf_esp; 527 sf.sf_sc.sc_fp = regs->tf_ebp; 528 sf.sf_sc.sc_pc = regs->tf_eip; 529 sf.sf_sc.sc_ps = regs->tf_eflags; 530 531 /* 532 * Copy the sigframe out to the user's stack. 533 */ 534 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 535 /* 536 * Something is wrong with the stack pointer. 537 * ...Kill the process. 538 */ 539 sigexit(p, SIGILL); 540 }; 541 542 regs->tf_esp = (int)fp; 543 regs->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 544 regs->tf_eflags &= ~PSL_VM; 545 regs->tf_cs = _ucodesel; 546 regs->tf_ds = _udatasel; 547 regs->tf_es = _udatasel; 548 regs->tf_ss = _udatasel; 549} 550 551/* 552 * System call to cleanup state after a signal 553 * has been taken. Reset signal mask and 554 * stack state from context left by sendsig (above). 555 * Return to previous pc and psl as specified by 556 * context left by sendsig. Check carefully to 557 * make sure that the user has not modified the 558 * state to gain improper privileges. 559 */ 560int 561sigreturn(p, uap, retval) 562 struct proc *p; 563 struct sigreturn_args /* { 564 struct sigcontext *sigcntxp; 565 } */ *uap; 566 int *retval; 567{ 568 register struct sigcontext *scp; 569 register struct sigframe *fp; 570 register struct trapframe *regs = p->p_md.md_regs; 571 int eflags; 572 573 /* 574 * (XXX old comment) regs->tf_esp points to the return address. 575 * The user scp pointer is above that. 576 * The return address is faked in the signal trampoline code 577 * for consistency. 578 */ 579 scp = uap->sigcntxp; 580 fp = (struct sigframe *) 581 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 582 583 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 584 return(EFAULT); 585 586 /* 587 * Don't allow users to change privileged or reserved flags. 588 */ 589#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 590 eflags = scp->sc_ps; 591 /* 592 * XXX do allow users to change the privileged flag PSL_RF. The 593 * cpu sets PSL_RF in tf_eflags for faults. Debuggers should 594 * sometimes set it there too. tf_eflags is kept in the signal 595 * context during signal handling and there is no other place 596 * to remember it, so the PSL_RF bit may be corrupted by the 597 * signal handler without us knowing. Corruption of the PSL_RF 598 * bit at worst causes one more or one less debugger trap, so 599 * allowing it is fairly harmless. 600 */ 601 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 602#ifdef DEBUG 603 printf("sigreturn: eflags = 0x%x\n", eflags); 604#endif 605 return(EINVAL); 606 } 607 608 /* 609 * Don't allow users to load a valid privileged %cs. Let the 610 * hardware check for invalid selectors, excess privilege in 611 * other selectors, invalid %eip's and invalid %esp's. 612 */ 613#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 614 if (!CS_SECURE(scp->sc_cs)) { 615#ifdef DEBUG 616 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 617#endif 618 trapsignal(p, SIGBUS, T_PROTFLT); 619 return(EINVAL); 620 } 621 622 /* restore scratch registers */ 623 regs->tf_eax = scp->sc_eax; 624 regs->tf_ebx = scp->sc_ebx; 625 regs->tf_ecx = scp->sc_ecx; 626 regs->tf_edx = scp->sc_edx; 627 regs->tf_esi = scp->sc_esi; 628 regs->tf_edi = scp->sc_edi; 629 regs->tf_cs = scp->sc_cs; 630 regs->tf_ds = scp->sc_ds; 631 regs->tf_es = scp->sc_es; 632 regs->tf_ss = scp->sc_ss; 633 regs->tf_isp = scp->sc_isp; 634 635 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 636 return(EINVAL); 637 638 if (scp->sc_onstack & 01) 639 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 640 else 641 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 642 p->p_sigmask = scp->sc_mask & ~sigcantmask; 643 regs->tf_ebp = scp->sc_fp; 644 regs->tf_esp = scp->sc_sp; 645 regs->tf_eip = scp->sc_pc; 646 regs->tf_eflags = eflags; 647 return(EJUSTRETURN); 648} 649 650/* 651 * Machine dependent boot() routine 652 * 653 * I haven't seen anything to put here yet 654 * Possibly some stuff might be grafted back here from boot() 655 */ 656void 657cpu_boot(int howto) 658{ 659} 660 661/* 662 * Shutdown the CPU as much as possible 663 */ 664void 665cpu_halt(void) 666{ 667 for (;;) 668 __asm__ ("hlt"); 669} 670 671/* 672 * Turn the power off. 673 */ 674void 675cpu_power_down(void) 676{ 677#if NAPM > 0 678 apm_power_off(); 679#endif 680} 681 682/* 683 * Clear registers on exec 684 */ 685void 686setregs(p, entry, stack) 687 struct proc *p; 688 u_long entry; 689 u_long stack; 690{ 691 struct trapframe *regs = p->p_md.md_regs; 692 693#ifdef USER_LDT 694 struct pcb *pcb = &p->p_addr->u_pcb; 695 696 /* was i386_user_cleanup() in NetBSD */ 697 if (pcb->pcb_ldt) { 698 if (pcb == curpcb) 699 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 700 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 701 pcb->pcb_ldt_len * sizeof(union descriptor)); 702 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 703 } 704#endif 705 706 bzero((char *)regs, sizeof(struct trapframe)); 707 regs->tf_eip = entry; 708 regs->tf_esp = stack; 709 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 710 regs->tf_ss = _udatasel; 711 regs->tf_ds = _udatasel; 712 regs->tf_es = _udatasel; 713 regs->tf_cs = _ucodesel; 714 715 /* 716 * Initialize the math emulator (if any) for the current process. 717 * Actually, just clear the bit that says that the emulator has 718 * been initialized. Initialization is delayed until the process 719 * traps to the emulator (if it is done at all) mainly because 720 * emulators don't provide an entry point for initialization. 721 */ 722 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 723 724 /* 725 * Arrange to trap the next npx or `fwait' instruction (see npx.c 726 * for why fwait must be trapped at least if there is an npx or an 727 * emulator). This is mainly to handle the case where npx0 is not 728 * configured, since the npx routines normally set up the trap 729 * otherwise. It should be done only at boot time, but doing it 730 * here allows modifying `npx_exists' for testing the emulator on 731 * systems with an npx. 732 */ 733 load_cr0(rcr0() | CR0_MP | CR0_TS); 734 735#if NNPX > 0 736 /* Initialize the npx (if any) for the current process. */ 737 npxinit(__INITIAL_NPXCW__); 738#endif 739} 740 741static int 742sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 743{ 744 int error; 745 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 746 req); 747 if (!error && req->newptr) 748 resettodr(); 749 return (error); 750} 751 752SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 753 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 754 755SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 756 CTLFLAG_RW, &disable_rtc_set, 0, ""); 757 758SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 759 CTLFLAG_RD, &bootinfo, bootinfo, ""); 760 761SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 762 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 763 764/* 765 * Initialize 386 and configure to run kernel 766 */ 767 768/* 769 * Initialize segments & interrupt table 770 */ 771 772int currentldt; 773int _default_ldt; 774#ifdef SMP 775union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 776#else 777union descriptor gdt[NGDT]; /* global descriptor table */ 778#endif 779struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 780union descriptor ldt[NLDT]; /* local descriptor table */ 781#ifdef SMP 782/* table descriptors - used to load tables by microp */ 783struct region_descriptor r_gdt, r_idt; 784#endif 785 786#ifdef SMP 787extern struct i386tss common_tss; /* One tss per cpu */ 788#else 789struct i386tss common_tss; 790#endif 791 792static struct i386tss dblfault_tss; 793static char dblfault_stack[PAGE_SIZE]; 794 795extern struct user *proc0paddr; 796 797#ifdef TSS_IS_CACHED /* cpu_switch helper */ 798struct segment_descriptor *tssptr; 799int gsel_tss; 800#endif 801 802/* software prototypes -- in more palatable form */ 803struct soft_segment_descriptor gdt_segs[ 804#ifdef SMP 805 NGDT + NCPU 806#endif 807 ] = { 808/* GNULL_SEL 0 Null Descriptor */ 809{ 0x0, /* segment base address */ 810 0x0, /* length */ 811 0, /* segment type */ 812 0, /* segment descriptor priority level */ 813 0, /* segment descriptor present */ 814 0, 0, 815 0, /* default 32 vs 16 bit size */ 816 0 /* limit granularity (byte/page units)*/ }, 817/* GCODE_SEL 1 Code Descriptor for kernel */ 818{ 0x0, /* segment base address */ 819 0xfffff, /* length - all address space */ 820 SDT_MEMERA, /* segment type */ 821 0, /* segment descriptor priority level */ 822 1, /* segment descriptor present */ 823 0, 0, 824 1, /* default 32 vs 16 bit size */ 825 1 /* limit granularity (byte/page units)*/ }, 826/* GDATA_SEL 2 Data Descriptor for kernel */ 827{ 0x0, /* segment base address */ 828 0xfffff, /* length - all address space */ 829 SDT_MEMRWA, /* segment type */ 830 0, /* segment descriptor priority level */ 831 1, /* segment descriptor present */ 832 0, 0, 833 1, /* default 32 vs 16 bit size */ 834 1 /* limit granularity (byte/page units)*/ }, 835/* GLDT_SEL 3 LDT Descriptor */ 836{ (int) ldt, /* segment base address */ 837 sizeof(ldt)-1, /* length - all address space */ 838 SDT_SYSLDT, /* segment type */ 839 SEL_UPL, /* segment descriptor priority level */ 840 1, /* segment descriptor present */ 841 0, 0, 842 0, /* unused - default 32 vs 16 bit size */ 843 0 /* limit granularity (byte/page units)*/ }, 844/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 845{ 0x0, /* segment base address */ 846 0x0, /* length - all address space */ 847 0, /* segment type */ 848 0, /* segment descriptor priority level */ 849 0, /* segment descriptor present */ 850 0, 0, 851 0, /* default 32 vs 16 bit size */ 852 0 /* limit granularity (byte/page units)*/ }, 853/* GPANIC_SEL 5 Panic Tss Descriptor */ 854{ (int) &dblfault_tss, /* segment base address */ 855 sizeof(struct i386tss)-1,/* length - all address space */ 856 SDT_SYS386TSS, /* segment type */ 857 0, /* segment descriptor priority level */ 858 1, /* segment descriptor present */ 859 0, 0, 860 0, /* unused - default 32 vs 16 bit size */ 861 0 /* limit granularity (byte/page units)*/ }, 862/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 863{ 864 (int) &common_tss, /* segment base address */ 865 sizeof(struct i386tss)-1,/* length - all address space */ 866 SDT_SYS386TSS, /* segment type */ 867 0, /* segment descriptor priority level */ 868 1, /* segment descriptor present */ 869 0, 0, 870 0, /* unused - default 32 vs 16 bit size */ 871 0 /* limit granularity (byte/page units)*/ }, 872/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 873{ (int) ldt, /* segment base address */ 874 (512 * sizeof(union descriptor)-1), /* length */ 875 SDT_SYSLDT, /* segment type */ 876 0, /* segment descriptor priority level */ 877 1, /* segment descriptor present */ 878 0, 0, 879 0, /* unused - default 32 vs 16 bit size */ 880 0 /* limit granularity (byte/page units)*/ }, 881/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 882{ 0, /* segment base address (overwritten by APM) */ 883 0xfffff, /* length */ 884 SDT_MEMERA, /* segment type */ 885 0, /* segment descriptor priority level */ 886 1, /* segment descriptor present */ 887 0, 0, 888 1, /* default 32 vs 16 bit size */ 889 1 /* limit granularity (byte/page units)*/ }, 890/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 891{ 0, /* segment base address (overwritten by APM) */ 892 0xfffff, /* length */ 893 SDT_MEMERA, /* segment type */ 894 0, /* segment descriptor priority level */ 895 1, /* segment descriptor present */ 896 0, 0, 897 0, /* default 32 vs 16 bit size */ 898 1 /* limit granularity (byte/page units)*/ }, 899/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 900{ 0, /* segment base address (overwritten by APM) */ 901 0xfffff, /* length */ 902 SDT_MEMRWA, /* segment type */ 903 0, /* segment descriptor priority level */ 904 1, /* segment descriptor present */ 905 0, 0, 906 1, /* default 32 vs 16 bit size */ 907 1 /* limit granularity (byte/page units)*/ }, 908}; 909 910static struct soft_segment_descriptor ldt_segs[] = { 911 /* Null Descriptor - overwritten by call gate */ 912{ 0x0, /* segment base address */ 913 0x0, /* length - all address space */ 914 0, /* segment type */ 915 0, /* segment descriptor priority level */ 916 0, /* segment descriptor present */ 917 0, 0, 918 0, /* default 32 vs 16 bit size */ 919 0 /* limit granularity (byte/page units)*/ }, 920 /* Null Descriptor - overwritten by call gate */ 921{ 0x0, /* segment base address */ 922 0x0, /* length - all address space */ 923 0, /* segment type */ 924 0, /* segment descriptor priority level */ 925 0, /* segment descriptor present */ 926 0, 0, 927 0, /* default 32 vs 16 bit size */ 928 0 /* limit granularity (byte/page units)*/ }, 929 /* Null Descriptor - overwritten by call gate */ 930{ 0x0, /* segment base address */ 931 0x0, /* length - all address space */ 932 0, /* segment type */ 933 0, /* segment descriptor priority level */ 934 0, /* segment descriptor present */ 935 0, 0, 936 0, /* default 32 vs 16 bit size */ 937 0 /* limit granularity (byte/page units)*/ }, 938 /* Code Descriptor for user */ 939{ 0x0, /* segment base address */ 940 0xfffff, /* length - all address space */ 941 SDT_MEMERA, /* segment type */ 942 SEL_UPL, /* segment descriptor priority level */ 943 1, /* segment descriptor present */ 944 0, 0, 945 1, /* default 32 vs 16 bit size */ 946 1 /* limit granularity (byte/page units)*/ }, 947 /* Data Descriptor for user */ 948{ 0x0, /* segment base address */ 949 0xfffff, /* length - all address space */ 950 SDT_MEMRWA, /* segment type */ 951 SEL_UPL, /* segment descriptor priority level */ 952 1, /* segment descriptor present */ 953 0, 0, 954 1, /* default 32 vs 16 bit size */ 955 1 /* limit granularity (byte/page units)*/ }, 956}; 957 958void 959setidt(idx, func, typ, dpl, selec) 960 int idx; 961 inthand_t *func; 962 int typ; 963 int dpl; 964 int selec; 965{ 966 struct gate_descriptor *ip = idt + idx; 967 968 ip->gd_looffset = (int)func; 969 ip->gd_selector = selec; 970 ip->gd_stkcpy = 0; 971 ip->gd_xx = 0; 972 ip->gd_type = typ; 973 ip->gd_dpl = dpl; 974 ip->gd_p = 1; 975 ip->gd_hioffset = ((int)func)>>16 ; 976} 977 978#define IDTVEC(name) __CONCAT(X,name) 979 980extern inthand_t 981 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 982 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 983 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 984 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 985 IDTVEC(syscall), IDTVEC(int0x80_syscall); 986 987void 988sdtossd(sd, ssd) 989 struct segment_descriptor *sd; 990 struct soft_segment_descriptor *ssd; 991{ 992 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 993 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 994 ssd->ssd_type = sd->sd_type; 995 ssd->ssd_dpl = sd->sd_dpl; 996 ssd->ssd_p = sd->sd_p; 997 ssd->ssd_def32 = sd->sd_def32; 998 ssd->ssd_gran = sd->sd_gran; 999} 1000 1001void 1002init386(first) 1003 int first; 1004{ 1005 int x; 1006 unsigned biosbasemem, biosextmem; 1007 struct gate_descriptor *gdp; 1008#ifndef TSS_IS_CACHED 1009 int gsel_tss; 1010#endif 1011 struct isa_device *idp; 1012#ifndef SMP 1013 /* table descriptors - used to load tables by microp */ 1014 struct region_descriptor r_gdt, r_idt; 1015#endif 1016 int pagesinbase, pagesinext; 1017 int target_page, pa_indx; 1018 int off; 1019 1020 proc0.p_addr = proc0paddr; 1021 1022 atdevbase = ISA_HOLE_START + KERNBASE; 1023 1024 /* 1025 * Initialize the console before we print anything out. 1026 */ 1027 cninit(); 1028 1029 /* 1030 * make gdt memory segments, the code segment goes up to end of the 1031 * page with etext in it, the data segment goes to the end of 1032 * the address space 1033 */ 1034 /* 1035 * XXX text protection is temporarily (?) disabled. The limit was 1036 * i386_btop(round_page(etext)) - 1. 1037 */ 1038 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1039 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1040#ifdef BDE_DEBUGGER 1041#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1042#else 1043#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1044#endif 1045 for (x = 0; x < NGDT1; x++) 1046 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1047 1048#ifdef SMP 1049 /* 1050 * Spin these up now. init_secondary() grabs them. We could use 1051 * #for(x,y,z) / #endfor cpp directives if they existed. 1052 */ 1053 for (x = 0; x < NCPU; x++) { 1054 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1055 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1056 } 1057#endif 1058 1059 /* make ldt memory segments */ 1060 /* 1061 * The data segment limit must not cover the user area because we 1062 * don't want the user area to be writable in copyout() etc. (page 1063 * level protection is lost in kernel mode on 386's). Also, we 1064 * don't want the user area to be writable directly (page level 1065 * protection of the user area is not available on 486's with 1066 * CR0_WP set, because there is no user-read/kernel-write mode). 1067 * 1068 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1069 * should be spelled ...MAX_USER... 1070 */ 1071#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1072 /* 1073 * The code segment limit has to cover the user area until we move 1074 * the signal trampoline out of the user area. This is safe because 1075 * the code segment cannot be written to directly. 1076 */ 1077#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1078 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1079 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1080 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1081 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1082 1083 /* exceptions */ 1084 for (x = 0; x < NIDT; x++) 1085 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1086 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1087 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1088 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1089 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1090 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1091 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1092 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1093 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1094 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1095 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1096 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1097 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1098 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1099 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1100 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1101 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1102 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1103 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1104 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1105 setidt(0x80, &IDTVEC(int0x80_syscall), 1106 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1107 1108#include "isa.h" 1109#if NISA >0 1110 isa_defaultirq(); 1111#endif 1112 rand_initialize(); 1113 1114 r_gdt.rd_limit = sizeof(gdt) - 1; 1115 r_gdt.rd_base = (int) gdt; 1116 lgdt(&r_gdt); 1117 1118 r_idt.rd_limit = sizeof(idt) - 1; 1119 r_idt.rd_base = (int) idt; 1120 lidt(&r_idt); 1121 1122 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1123 lldt(_default_ldt); 1124 currentldt = _default_ldt; 1125 1126#ifdef DDB 1127 kdb_init(); 1128 if (boothowto & RB_KDB) 1129 Debugger("Boot flags requested debugger"); 1130#endif 1131 1132 finishidentcpu(); /* Final stage of CPU initialization */ 1133 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1134 initializecpu(); /* Initialize CPU registers */ 1135 1136 /* Use BIOS values stored in RTC CMOS RAM, since probing 1137 * breaks certain 386 AT relics. 1138 */ 1139 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1140 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1141 1142 /* 1143 * If BIOS tells us that it has more than 640k in the basemem, 1144 * don't believe it - set it to 640k. 1145 */ 1146 if (biosbasemem > 640) { 1147 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1148 biosbasemem); 1149 biosbasemem = 640; 1150 } 1151 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1152 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1153 bootinfo.bi_basemem); 1154 bootinfo.bi_basemem = 640; 1155 } 1156 1157 /* 1158 * Warn if the official BIOS interface disagrees with the RTC 1159 * interface used above about the amount of base memory or the 1160 * amount of extended memory. Prefer the BIOS value for the base 1161 * memory. This is necessary for machines that `steal' base 1162 * memory for use as BIOS memory, at least if we are going to use 1163 * the BIOS for apm. Prefer the RTC value for extended memory. 1164 * Eventually the hackish interface shouldn't even be looked at. 1165 */ 1166 if (bootinfo.bi_memsizes_valid) { 1167 if (bootinfo.bi_basemem != biosbasemem) { 1168 vm_offset_t pa; 1169 1170 printf( 1171 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1172 bootinfo.bi_basemem, biosbasemem); 1173 biosbasemem = bootinfo.bi_basemem; 1174 1175 /* 1176 * XXX if biosbasemem is now < 640, there is `hole' 1177 * between the end of base memory and the start of 1178 * ISA memory. The hole may be empty or it may 1179 * contain BIOS code or data. Map it read/write so 1180 * that the BIOS can write to it. (Memory from 0 to 1181 * the physical end of the kernel is mapped read-only 1182 * to begin with and then parts of it are remapped. 1183 * The parts that aren't remapped form holes that 1184 * remain read-only and are unused by the kernel. 1185 * The base memory area is below the physical end of 1186 * the kernel and right now forms a read-only hole. 1187 * The part of it from 0 to 1188 * (trunc_page(biosbasemem * 1024) - 1) will be 1189 * remapped and used by the kernel later.) 1190 * 1191 * This code is similar to the code used in 1192 * pmap_mapdev, but since no memory needs to be 1193 * allocated we simply change the mapping. 1194 */ 1195 for (pa = trunc_page(biosbasemem * 1024); 1196 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1197 unsigned *pte; 1198 1199 pte = (unsigned *)vtopte(pa + KERNBASE); 1200 *pte = pa | PG_RW | PG_V; 1201 } 1202 } 1203 if (bootinfo.bi_extmem != biosextmem) 1204 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1205 bootinfo.bi_extmem, biosextmem); 1206 } 1207 1208#ifdef SMP 1209 /* make hole for AP bootstrap code */ 1210 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1211#else 1212 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1213#endif 1214 1215 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1216 1217 /* 1218 * Special hack for chipsets that still remap the 384k hole when 1219 * there's 16MB of memory - this really confuses people that 1220 * are trying to use bus mastering ISA controllers with the 1221 * "16MB limit"; they only have 16MB, but the remapping puts 1222 * them beyond the limit. 1223 */ 1224 /* 1225 * If extended memory is between 15-16MB (16-17MB phys address range), 1226 * chop it to 15MB. 1227 */ 1228 if ((pagesinext > 3840) && (pagesinext < 4096)) 1229 pagesinext = 3840; 1230 1231 /* 1232 * Maxmem isn't the "maximum memory", it's one larger than the 1233 * highest page of the physical address space. It should be 1234 * called something like "Maxphyspage". 1235 */ 1236 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1237 1238#ifdef MAXMEM 1239 Maxmem = MAXMEM/4; 1240#endif 1241 1242#if NNPX > 0 1243 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1244 if (idp != NULL && idp->id_msize != 0) 1245 Maxmem = idp->id_msize / 4; 1246#endif 1247 1248#ifdef SMP 1249 /* look for the MP hardware - needed for apic addresses */ 1250 mp_probe(); 1251#endif 1252 1253 /* call pmap initialization to make new kernel address space */ 1254 pmap_bootstrap (first, 0); 1255 1256 /* 1257 * Size up each available chunk of physical memory. 1258 */ 1259 1260 /* 1261 * We currently don't bother testing base memory. 1262 * XXX ...but we probably should. 1263 */ 1264 pa_indx = 0; 1265 badpages = 0; 1266 if (pagesinbase > 1) { 1267 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1268 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1269 physmem = pagesinbase - 1; 1270 } else { 1271 /* point at first chunk end */ 1272 pa_indx++; 1273 } 1274 1275 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1276 int tmp, page_bad = FALSE; 1277 1278 /* 1279 * map page into kernel: valid, read/write, non-cacheable 1280 */ 1281 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1282 invltlb(); 1283 1284 tmp = *(int *)CADDR1; 1285 /* 1286 * Test for alternating 1's and 0's 1287 */ 1288 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1289 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1290 page_bad = TRUE; 1291 } 1292 /* 1293 * Test for alternating 0's and 1's 1294 */ 1295 *(volatile int *)CADDR1 = 0x55555555; 1296 if (*(volatile int *)CADDR1 != 0x55555555) { 1297 page_bad = TRUE; 1298 } 1299 /* 1300 * Test for all 1's 1301 */ 1302 *(volatile int *)CADDR1 = 0xffffffff; 1303 if (*(volatile int *)CADDR1 != 0xffffffff) { 1304 page_bad = TRUE; 1305 } 1306 /* 1307 * Test for all 0's 1308 */ 1309 *(volatile int *)CADDR1 = 0x0; 1310 if (*(volatile int *)CADDR1 != 0x0) { 1311 /* 1312 * test of page failed 1313 */ 1314 page_bad = TRUE; 1315 } 1316 /* 1317 * Restore original value. 1318 */ 1319 *(int *)CADDR1 = tmp; 1320 1321 /* 1322 * Adjust array of valid/good pages. 1323 */ 1324 if (page_bad == FALSE) { 1325 /* 1326 * If this good page is a continuation of the 1327 * previous set of good pages, then just increase 1328 * the end pointer. Otherwise start a new chunk. 1329 * Note that "end" points one higher than end, 1330 * making the range >= start and < end. 1331 */ 1332 if (phys_avail[pa_indx] == target_page) { 1333 phys_avail[pa_indx] += PAGE_SIZE; 1334 } else { 1335 pa_indx++; 1336 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1337 printf("Too many holes in the physical address space, giving up\n"); 1338 pa_indx--; 1339 break; 1340 } 1341 phys_avail[pa_indx++] = target_page; /* start */ 1342 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1343 } 1344 physmem++; 1345 } else { 1346 badpages++; 1347 page_bad = FALSE; 1348 } 1349 } 1350 1351 *(int *)CMAP1 = 0; 1352 invltlb(); 1353 1354 /* 1355 * XXX 1356 * The last chunk must contain at least one page plus the message 1357 * buffer to avoid complicating other code (message buffer address 1358 * calculation, etc.). 1359 */ 1360 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1361 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1362 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1363 phys_avail[pa_indx--] = 0; 1364 phys_avail[pa_indx--] = 0; 1365 } 1366 1367 Maxmem = atop(phys_avail[pa_indx]); 1368 1369 /* Trim off space for the message buffer. */ 1370 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1371 1372 avail_end = phys_avail[pa_indx]; 1373 1374 /* now running on new page tables, configured,and u/iom is accessible */ 1375 1376 /* Map the message buffer. */ 1377 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1378 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1379 avail_end + off, VM_PROT_ALL, TRUE); 1380 msgbufmapped = 1; 1381 1382 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1383 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1384 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1385 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1386 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1387 ltr(gsel_tss); 1388 1389 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1390 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1391 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1392 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1393 dblfault_tss.tss_cr3 = (int)IdlePTD; 1394 dblfault_tss.tss_eip = (int) dblfault_handler; 1395 dblfault_tss.tss_eflags = PSL_KERNEL; 1396 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1397 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1398 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1399 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1400 1401#ifdef TSS_IS_CACHED /* cpu_switch helper */ 1402 tssptr = &gdt[GPROC0_SEL].sd; 1403#endif 1404 1405 /* make a call gate to reenter kernel with */ 1406 gdp = &ldt[LSYS5CALLS_SEL].gd; 1407 1408 x = (int) &IDTVEC(syscall); 1409 gdp->gd_looffset = x++; 1410 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1411 gdp->gd_stkcpy = 1; 1412 gdp->gd_type = SDT_SYS386CGT; 1413 gdp->gd_dpl = SEL_UPL; 1414 gdp->gd_p = 1; 1415 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1416 1417 /* XXX does this work? */ 1418 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1419 1420 /* transfer to user mode */ 1421 1422 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1423 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1424 1425 /* setup proc 0's pcb */ 1426 proc0.p_addr->u_pcb.pcb_flags = 0; 1427 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1428 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1429} 1430 1431int 1432ptrace_set_pc(p, addr) 1433 struct proc *p; 1434 unsigned int addr; 1435{ 1436 p->p_md.md_regs->tf_eip = addr; 1437 return (0); 1438} 1439 1440int 1441ptrace_single_step(p) 1442 struct proc *p; 1443{ 1444 p->p_md.md_regs->tf_eflags |= PSL_T; 1445 return (0); 1446} 1447 1448int ptrace_write_u(p, off, data) 1449 struct proc *p; 1450 vm_offset_t off; 1451 int data; 1452{ 1453 struct trapframe frame_copy; 1454 vm_offset_t min; 1455 struct trapframe *tp; 1456 1457 /* 1458 * Privileged kernel state is scattered all over the user area. 1459 * Only allow write access to parts of regs and to fpregs. 1460 */ 1461 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1462 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1463 tp = p->p_md.md_regs; 1464 frame_copy = *tp; 1465 *(int *)((char *)&frame_copy + (off - min)) = data; 1466 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1467 !CS_SECURE(frame_copy.tf_cs)) 1468 return (EINVAL); 1469 *(int*)((char *)p->p_addr + off) = data; 1470 return (0); 1471 } 1472 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1473 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1474 *(int*)((char *)p->p_addr + off) = data; 1475 return (0); 1476 } 1477 return (EFAULT); 1478} 1479 1480int 1481fill_regs(p, regs) 1482 struct proc *p; 1483 struct reg *regs; 1484{ 1485 struct pcb *pcb; 1486 struct trapframe *tp; 1487 1488 tp = p->p_md.md_regs; 1489 regs->r_es = tp->tf_es; 1490 regs->r_ds = tp->tf_ds; 1491 regs->r_edi = tp->tf_edi; 1492 regs->r_esi = tp->tf_esi; 1493 regs->r_ebp = tp->tf_ebp; 1494 regs->r_ebx = tp->tf_ebx; 1495 regs->r_edx = tp->tf_edx; 1496 regs->r_ecx = tp->tf_ecx; 1497 regs->r_eax = tp->tf_eax; 1498 regs->r_eip = tp->tf_eip; 1499 regs->r_cs = tp->tf_cs; 1500 regs->r_eflags = tp->tf_eflags; 1501 regs->r_esp = tp->tf_esp; 1502 regs->r_ss = tp->tf_ss; 1503 pcb = &p->p_addr->u_pcb; 1504 regs->r_fs = pcb->pcb_fs; 1505 regs->r_gs = pcb->pcb_gs; 1506 return (0); 1507} 1508 1509int 1510set_regs(p, regs) 1511 struct proc *p; 1512 struct reg *regs; 1513{ 1514 struct pcb *pcb; 1515 struct trapframe *tp; 1516 1517 tp = p->p_md.md_regs; 1518 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1519 !CS_SECURE(regs->r_cs)) 1520 return (EINVAL); 1521 tp->tf_es = regs->r_es; 1522 tp->tf_ds = regs->r_ds; 1523 tp->tf_edi = regs->r_edi; 1524 tp->tf_esi = regs->r_esi; 1525 tp->tf_ebp = regs->r_ebp; 1526 tp->tf_ebx = regs->r_ebx; 1527 tp->tf_edx = regs->r_edx; 1528 tp->tf_ecx = regs->r_ecx; 1529 tp->tf_eax = regs->r_eax; 1530 tp->tf_eip = regs->r_eip; 1531 tp->tf_cs = regs->r_cs; 1532 tp->tf_eflags = regs->r_eflags; 1533 tp->tf_esp = regs->r_esp; 1534 tp->tf_ss = regs->r_ss; 1535 pcb = &p->p_addr->u_pcb; 1536 pcb->pcb_fs = regs->r_fs; 1537 pcb->pcb_gs = regs->r_gs; 1538 return (0); 1539} 1540 1541#ifndef DDB 1542void 1543Debugger(const char *msg) 1544{ 1545 printf("Debugger(\"%s\") called.\n", msg); 1546} 1547#endif /* no DDB */ 1548 1549#include <sys/disklabel.h> 1550 1551/* 1552 * Determine the size of the transfer, and make sure it is 1553 * within the boundaries of the partition. Adjust transfer 1554 * if needed, and signal errors or early completion. 1555 */ 1556int 1557bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1558{ 1559 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1560 int labelsect = lp->d_partitions[0].p_offset; 1561 int maxsz = p->p_size, 1562 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1563 1564 /* overwriting disk label ? */ 1565 /* XXX should also protect bootstrap in first 8K */ 1566 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1567#if LABELSECTOR != 0 1568 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1569#endif 1570 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1571 bp->b_error = EROFS; 1572 goto bad; 1573 } 1574 1575#if defined(DOSBBSECTOR) && defined(notyet) 1576 /* overwriting master boot record? */ 1577 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1578 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1579 bp->b_error = EROFS; 1580 goto bad; 1581 } 1582#endif 1583 1584 /* beyond partition? */ 1585 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1586 /* if exactly at end of disk, return an EOF */ 1587 if (bp->b_blkno == maxsz) { 1588 bp->b_resid = bp->b_bcount; 1589 return(0); 1590 } 1591 /* or truncate if part of it fits */ 1592 sz = maxsz - bp->b_blkno; 1593 if (sz <= 0) { 1594 bp->b_error = EINVAL; 1595 goto bad; 1596 } 1597 bp->b_bcount = sz << DEV_BSHIFT; 1598 } 1599 1600 bp->b_pblkno = bp->b_blkno + p->p_offset; 1601 return(1); 1602 1603bad: 1604 bp->b_flags |= B_ERROR; 1605 return(-1); 1606} 1607 1608#ifdef DDB 1609 1610/* 1611 * Provide inb() and outb() as functions. They are normally only 1612 * available as macros calling inlined functions, thus cannot be 1613 * called inside DDB. 1614 * 1615 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1616 */ 1617 1618#undef inb 1619#undef outb 1620 1621/* silence compiler warnings */ 1622u_char inb(u_int); 1623void outb(u_int, u_char); 1624 1625u_char 1626inb(u_int port) 1627{ 1628 u_char data; 1629 /* 1630 * We use %%dx and not %1 here because i/o is done at %dx and not at 1631 * %edx, while gcc generates inferior code (movw instead of movl) 1632 * if we tell it to load (u_short) port. 1633 */ 1634 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1635 return (data); 1636} 1637 1638void 1639outb(u_int port, u_char data) 1640{ 1641 u_char al; 1642 /* 1643 * Use an unnecessary assignment to help gcc's register allocator. 1644 * This make a large difference for gcc-1.40 and a tiny difference 1645 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1646 * best results. gcc-2.6.0 can't handle this. 1647 */ 1648 al = data; 1649 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1650} 1651 1652#endif /* DDB */ 1653