machdep.c revision 27535
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $Id: machdep.c,v 1.252 1997/06/27 18:29:55 fsmp Exp $ 39 */ 40 41#include "apm.h" 42#include "npx.h" 43#include "opt_sysvipc.h" 44#include "opt_ddb.h" 45#include "opt_bounce.h" 46#include "opt_machdep.h" 47#include "opt_perfmon.h" 48#include "opt_smp.h" 49#include "opt_userconfig.h" 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/sysproto.h> 54#include <sys/signalvar.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> 57#include <sys/buf.h> 58#include <sys/reboot.h> 59#include <sys/conf.h> 60#include <sys/callout.h> 61#include <sys/malloc.h> 62#include <sys/mbuf.h> 63#include <sys/msgbuf.h> 64#include <sys/sysent.h> 65#include <sys/sysctl.h> 66#include <sys/vmmeter.h> 67 68#ifdef SYSVSHM 69#include <sys/shm.h> 70#endif 71 72#ifdef SYSVMSG 73#include <sys/msg.h> 74#endif 75 76#ifdef SYSVSEM 77#include <sys/sem.h> 78#endif 79 80#include <vm/vm.h> 81#include <vm/vm_param.h> 82#include <vm/vm_prot.h> 83#include <sys/lock.h> 84#include <vm/vm_kern.h> 85#include <vm/vm_object.h> 86#include <vm/vm_page.h> 87#include <vm/vm_map.h> 88#include <vm/vm_pager.h> 89#include <vm/vm_extern.h> 90 91#include <sys/user.h> 92#include <sys/exec.h> 93 94#include <ddb/ddb.h> 95 96#include <net/netisr.h> 97 98#if NAPM > 0 99#include <machine/apm_bios.h> 100#endif 101#include <machine/cpu.h> 102#include <machine/reg.h> 103#include <machine/psl.h> 104#include <machine/clock.h> 105#include <machine/specialreg.h> 106#include <machine/cons.h> 107#include <machine/bootinfo.h> 108#include <machine/md_var.h> 109#ifdef SMP 110#include <machine/smp.h> 111#endif 112#ifdef PERFMON 113#include <machine/perfmon.h> 114#endif 115 116#include <i386/isa/isa_device.h> 117#include <i386/isa/intr_machdep.h> 118#include <i386/isa/rtc.h> 119#include <machine/random.h> 120 121extern void init386 __P((int first)); 122extern int ptrace_set_pc __P((struct proc *p, unsigned int addr)); 123extern int ptrace_single_step __P((struct proc *p)); 124extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data)); 125extern void dblfault_handler __P((void)); 126 127extern void printcpuinfo(void); /* XXX header file */ 128extern void earlysetcpuclass(void); /* same header file */ 129extern void finishidentcpu(void); 130extern void panicifcpuunsupported(void); 131extern void initializecpu(void); 132 133static void cpu_startup __P((void *)); 134SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 135 136 137#ifdef BOUNCE_BUFFERS 138extern char *bouncememory; 139extern int maxbkva; 140#ifdef BOUNCEPAGES 141int bouncepages = BOUNCEPAGES; 142#else 143int bouncepages = 0; 144#endif 145#endif /* BOUNCE_BUFFERS */ 146 147extern int freebufspace; 148int msgbufmapped = 0; /* set when safe to use msgbuf */ 149int _udatasel, _ucodesel; 150u_int atdevbase; 151 152 153int physmem = 0; 154int cold = 1; 155 156static int 157sysctl_hw_physmem SYSCTL_HANDLER_ARGS 158{ 159 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req); 160 return (error); 161} 162 163SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD, 164 0, 0, sysctl_hw_physmem, "I", ""); 165 166static int 167sysctl_hw_usermem SYSCTL_HANDLER_ARGS 168{ 169 int error = sysctl_handle_int(oidp, 0, 170 ctob(physmem - cnt.v_wire_count), req); 171 return (error); 172} 173 174SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD, 175 0, 0, sysctl_hw_usermem, "I", ""); 176 177int boothowto = 0, bootverbose = 0, Maxmem = 0; 178static int badpages = 0; 179long dumplo; 180extern int bootdev; 181 182vm_offset_t phys_avail[10]; 183 184/* must be 2 less so 0 0 can signal end of chunks */ 185#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 186 187static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */ 188 189static vm_offset_t buffer_sva, buffer_eva; 190vm_offset_t clean_sva, clean_eva; 191static vm_offset_t pager_sva, pager_eva; 192extern struct linker_set netisr_set; 193 194#define offsetof(type, member) ((size_t)(&((type *)0)->member)) 195 196static void 197cpu_startup(dummy) 198 void *dummy; 199{ 200 register unsigned i; 201 register caddr_t v; 202 vm_offset_t maxaddr; 203 vm_size_t size = 0; 204 int firstaddr; 205 vm_offset_t minaddr; 206 207 if (boothowto & RB_VERBOSE) 208 bootverbose++; 209 210 /* 211 * Good {morning,afternoon,evening,night}. 212 */ 213 printf(version); 214 earlysetcpuclass(); 215 startrtclock(); 216 printcpuinfo(); 217 panicifcpuunsupported(); 218#ifdef PERFMON 219 perfmon_init(); 220#endif 221 printf("real memory = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024); 222 /* 223 * Display any holes after the first chunk of extended memory. 224 */ 225 if (badpages != 0) { 226 int indx = 1; 227 228 /* 229 * XXX skip reporting ISA hole & unmanaged kernel memory 230 */ 231 if (phys_avail[0] == PAGE_SIZE) 232 indx += 2; 233 234 printf("Physical memory hole(s):\n"); 235 for (; phys_avail[indx + 1] != 0; indx += 2) { 236 int size = phys_avail[indx + 1] - phys_avail[indx]; 237 238 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 239 phys_avail[indx + 1] - 1, size, size / PAGE_SIZE); 240 } 241 } 242 243 /* 244 * Quickly wire in netisrs. 245 */ 246 setup_netisrs(&netisr_set); 247 248 /* 249 * Allocate space for system data structures. 250 * The first available kernel virtual address is in "v". 251 * As pages of kernel virtual memory are allocated, "v" is incremented. 252 * As pages of memory are allocated and cleared, 253 * "firstaddr" is incremented. 254 * An index into the kernel page table corresponding to the 255 * virtual memory address maintained in "v" is kept in "mapaddr". 256 */ 257 258 /* 259 * Make two passes. The first pass calculates how much memory is 260 * needed and allocates it. The second pass assigns virtual 261 * addresses to the various data structures. 262 */ 263 firstaddr = 0; 264again: 265 v = (caddr_t)firstaddr; 266 267#define valloc(name, type, num) \ 268 (name) = (type *)v; v = (caddr_t)((name)+(num)) 269#define valloclim(name, type, num, lim) \ 270 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num))) 271 valloc(callout, struct callout, ncallout); 272#ifdef SYSVSHM 273 valloc(shmsegs, struct shmid_ds, shminfo.shmmni); 274#endif 275#ifdef SYSVSEM 276 valloc(sema, struct semid_ds, seminfo.semmni); 277 valloc(sem, struct sem, seminfo.semmns); 278 /* This is pretty disgusting! */ 279 valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int)); 280#endif 281#ifdef SYSVMSG 282 valloc(msgpool, char, msginfo.msgmax); 283 valloc(msgmaps, struct msgmap, msginfo.msgseg); 284 valloc(msghdrs, struct msg, msginfo.msgtql); 285 valloc(msqids, struct msqid_ds, msginfo.msgmni); 286#endif 287 288 if (nbuf == 0) { 289 nbuf = 30; 290 if( physmem > 1024) 291 nbuf += min((physmem - 1024) / 8, 2048); 292 } 293 nswbuf = max(min(nbuf/4, 128), 16); 294 295 valloc(swbuf, struct buf, nswbuf); 296 valloc(buf, struct buf, nbuf); 297 298#ifdef BOUNCE_BUFFERS 299 /* 300 * If there is more than 16MB of memory, allocate some bounce buffers 301 */ 302 if (Maxmem > 4096) { 303 if (bouncepages == 0) { 304 bouncepages = 64; 305 bouncepages += ((Maxmem - 4096) / 2048) * 32; 306 if (bouncepages > 128) 307 bouncepages = 128; 308 } 309 v = (caddr_t)((vm_offset_t)round_page(v)); 310 valloc(bouncememory, char, bouncepages * PAGE_SIZE); 311 } 312#endif 313 314 /* 315 * End of first pass, size has been calculated so allocate memory 316 */ 317 if (firstaddr == 0) { 318 size = (vm_size_t)(v - firstaddr); 319 firstaddr = (int)kmem_alloc(kernel_map, round_page(size)); 320 if (firstaddr == 0) 321 panic("startup: no room for tables"); 322 goto again; 323 } 324 325 /* 326 * End of second pass, addresses have been assigned 327 */ 328 if ((vm_size_t)(v - firstaddr) != size) 329 panic("startup: table size inconsistency"); 330 331#ifdef BOUNCE_BUFFERS 332 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 333 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + 334 maxbkva + pager_map_size, TRUE); 335 io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE); 336#else 337 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva, 338 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE); 339#endif 340 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva, 341 (nbuf*BKVASIZE), TRUE); 342 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva, 343 (nswbuf*MAXPHYS) + pager_map_size, TRUE); 344 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 345 (16*ARG_MAX), TRUE); 346 u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, 347 (maxproc*UPAGES*PAGE_SIZE), FALSE); 348 349 /* 350 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size 351 * we use the more space efficient malloc in place of kmem_alloc. 352 */ 353 { 354 vm_offset_t mb_map_size; 355 356 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES; 357 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE)); 358 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT); 359 bzero(mclrefcnt, mb_map_size / MCLBYTES); 360 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr, 361 mb_map_size, FALSE); 362 } 363 364 /* 365 * Initialize callouts 366 */ 367 callfree = callout; 368 for (i = 1; i < ncallout; i++) 369 callout[i-1].c_next = &callout[i]; 370 371#if defined(USERCONFIG) 372#if defined(USERCONFIG_BOOT) 373 if (1) { 374#else 375 if (boothowto & RB_CONFIG) { 376#endif 377 userconfig(); 378 cninit(); /* the preferred console may have changed */ 379 } 380#endif 381 382#ifdef BOUNCE_BUFFERS 383 /* 384 * init bounce buffers 385 */ 386 vm_bounce_init(); 387#endif 388 389 printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count), 390 ptoa(cnt.v_free_count) / 1024); 391 392#ifdef SMP 393 /* 394 * OK, enough kmem_alloc/malloc state should be up, lets get on with it! 395 */ 396 mp_start(); /* fire up the APs and APICs */ 397 mp_announce(); 398#endif /* SMP */ 399 400 /* 401 * Set up buffers, so they can be used to read disk labels. 402 */ 403 bufinit(); 404 vm_pager_bufferinit(); 405} 406 407int 408register_netisr(num, handler) 409 int num; 410 netisr_t *handler; 411{ 412 413 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) { 414 printf("register_netisr: bad isr number: %d\n", num); 415 return (EINVAL); 416 } 417 netisrs[num] = handler; 418 return (0); 419} 420 421static void 422setup_netisrs(ls) 423 struct linker_set *ls; 424{ 425 int i; 426 const struct netisrtab *nit; 427 428 for(i = 0; ls->ls_items[i]; i++) { 429 nit = (const struct netisrtab *)ls->ls_items[i]; 430 register_netisr(nit->nit_num, nit->nit_isr); 431 } 432} 433 434/* 435 * Send an interrupt to process. 436 * 437 * Stack is set up to allow sigcode stored 438 * at top to call routine, followed by kcall 439 * to sigreturn routine below. After sigreturn 440 * resets the signal mask, the stack, and the 441 * frame pointer, it returns to the user 442 * specified pc, psl. 443 */ 444void 445sendsig(catcher, sig, mask, code) 446 sig_t catcher; 447 int sig, mask; 448 u_long code; 449{ 450 register struct proc *p = curproc; 451 register struct trapframe *regs; 452 register struct sigframe *fp; 453 struct sigframe sf; 454 struct sigacts *psp = p->p_sigacts; 455 int oonstack; 456 457 regs = p->p_md.md_regs; 458 oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK; 459 /* 460 * Allocate and validate space for the signal handler context. 461 */ 462 if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack && 463 (psp->ps_sigonstack & sigmask(sig))) { 464 fp = (struct sigframe *)(psp->ps_sigstk.ss_sp + 465 psp->ps_sigstk.ss_size - sizeof(struct sigframe)); 466 psp->ps_sigstk.ss_flags |= SS_ONSTACK; 467 } else { 468 fp = (struct sigframe *)regs->tf_esp - 1; 469 } 470 471 /* 472 * grow() will return FALSE if the fp will not fit inside the stack 473 * and the stack can not be grown. useracc will return FALSE 474 * if access is denied. 475 */ 476 if ((grow(p, (int)fp) == FALSE) || 477 (useracc((caddr_t)fp, sizeof (struct sigframe), B_WRITE) == FALSE)) { 478 /* 479 * Process has trashed its stack; give it an illegal 480 * instruction to halt it in its tracks. 481 */ 482 SIGACTION(p, SIGILL) = SIG_DFL; 483 sig = sigmask(SIGILL); 484 p->p_sigignore &= ~sig; 485 p->p_sigcatch &= ~sig; 486 p->p_sigmask &= ~sig; 487 psignal(p, SIGILL); 488 return; 489 } 490 491 /* 492 * Build the argument list for the signal handler. 493 */ 494 if (p->p_sysent->sv_sigtbl) { 495 if (sig < p->p_sysent->sv_sigsize) 496 sig = p->p_sysent->sv_sigtbl[sig]; 497 else 498 sig = p->p_sysent->sv_sigsize + 1; 499 } 500 sf.sf_signum = sig; 501 sf.sf_code = code; 502 sf.sf_scp = &fp->sf_sc; 503 sf.sf_addr = (char *) regs->tf_err; 504 sf.sf_handler = catcher; 505 506 /* save scratch registers */ 507 sf.sf_sc.sc_eax = regs->tf_eax; 508 sf.sf_sc.sc_ebx = regs->tf_ebx; 509 sf.sf_sc.sc_ecx = regs->tf_ecx; 510 sf.sf_sc.sc_edx = regs->tf_edx; 511 sf.sf_sc.sc_esi = regs->tf_esi; 512 sf.sf_sc.sc_edi = regs->tf_edi; 513 sf.sf_sc.sc_cs = regs->tf_cs; 514 sf.sf_sc.sc_ds = regs->tf_ds; 515 sf.sf_sc.sc_ss = regs->tf_ss; 516 sf.sf_sc.sc_es = regs->tf_es; 517 sf.sf_sc.sc_isp = regs->tf_isp; 518 519 /* 520 * Build the signal context to be used by sigreturn. 521 */ 522 sf.sf_sc.sc_onstack = oonstack; 523 sf.sf_sc.sc_mask = mask; 524 sf.sf_sc.sc_sp = regs->tf_esp; 525 sf.sf_sc.sc_fp = regs->tf_ebp; 526 sf.sf_sc.sc_pc = regs->tf_eip; 527 sf.sf_sc.sc_ps = regs->tf_eflags; 528 529 /* 530 * Copy the sigframe out to the user's stack. 531 */ 532 if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) { 533 /* 534 * Something is wrong with the stack pointer. 535 * ...Kill the process. 536 */ 537 sigexit(p, SIGILL); 538 }; 539 540 regs->tf_esp = (int)fp; 541 regs->tf_eip = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode)); 542 regs->tf_eflags &= ~PSL_VM; 543 regs->tf_cs = _ucodesel; 544 regs->tf_ds = _udatasel; 545 regs->tf_es = _udatasel; 546 regs->tf_ss = _udatasel; 547} 548 549/* 550 * System call to cleanup state after a signal 551 * has been taken. Reset signal mask and 552 * stack state from context left by sendsig (above). 553 * Return to previous pc and psl as specified by 554 * context left by sendsig. Check carefully to 555 * make sure that the user has not modified the 556 * state to gain improper privileges. 557 */ 558int 559sigreturn(p, uap, retval) 560 struct proc *p; 561 struct sigreturn_args /* { 562 struct sigcontext *sigcntxp; 563 } */ *uap; 564 int *retval; 565{ 566 register struct sigcontext *scp; 567 register struct sigframe *fp; 568 register struct trapframe *regs = p->p_md.md_regs; 569 int eflags; 570 571 /* 572 * (XXX old comment) regs->tf_esp points to the return address. 573 * The user scp pointer is above that. 574 * The return address is faked in the signal trampoline code 575 * for consistency. 576 */ 577 scp = uap->sigcntxp; 578 fp = (struct sigframe *) 579 ((caddr_t)scp - offsetof(struct sigframe, sf_sc)); 580 581 if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0) 582 return(EFAULT); 583 584 /* 585 * Don't allow users to change privileged or reserved flags. 586 */ 587#define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 588 eflags = scp->sc_ps; 589 /* 590 * XXX do allow users to change the privileged flag PSL_RF. The 591 * cpu sets PSL_RF in tf_eflags for faults. Debuggers should 592 * sometimes set it there too. tf_eflags is kept in the signal 593 * context during signal handling and there is no other place 594 * to remember it, so the PSL_RF bit may be corrupted by the 595 * signal handler without us knowing. Corruption of the PSL_RF 596 * bit at worst causes one more or one less debugger trap, so 597 * allowing it is fairly harmless. 598 */ 599 if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 600#ifdef DEBUG 601 printf("sigreturn: eflags = 0x%x\n", eflags); 602#endif 603 return(EINVAL); 604 } 605 606 /* 607 * Don't allow users to load a valid privileged %cs. Let the 608 * hardware check for invalid selectors, excess privilege in 609 * other selectors, invalid %eip's and invalid %esp's. 610 */ 611#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 612 if (!CS_SECURE(scp->sc_cs)) { 613#ifdef DEBUG 614 printf("sigreturn: cs = 0x%x\n", scp->sc_cs); 615#endif 616 trapsignal(p, SIGBUS, T_PROTFLT); 617 return(EINVAL); 618 } 619 620 /* restore scratch registers */ 621 regs->tf_eax = scp->sc_eax; 622 regs->tf_ebx = scp->sc_ebx; 623 regs->tf_ecx = scp->sc_ecx; 624 regs->tf_edx = scp->sc_edx; 625 regs->tf_esi = scp->sc_esi; 626 regs->tf_edi = scp->sc_edi; 627 regs->tf_cs = scp->sc_cs; 628 regs->tf_ds = scp->sc_ds; 629 regs->tf_es = scp->sc_es; 630 regs->tf_ss = scp->sc_ss; 631 regs->tf_isp = scp->sc_isp; 632 633 if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0) 634 return(EINVAL); 635 636 if (scp->sc_onstack & 01) 637 p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK; 638 else 639 p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK; 640 p->p_sigmask = scp->sc_mask & ~sigcantmask; 641 regs->tf_ebp = scp->sc_fp; 642 regs->tf_esp = scp->sc_sp; 643 regs->tf_eip = scp->sc_pc; 644 regs->tf_eflags = eflags; 645 return(EJUSTRETURN); 646} 647 648/* 649 * Machine dependent boot() routine 650 * 651 * I haven't seen anything to put here yet 652 * Possibly some stuff might be grafted back here from boot() 653 */ 654void 655cpu_boot(int howto) 656{ 657} 658 659/* 660 * Shutdown the CPU as much as possible 661 */ 662void 663cpu_halt(void) 664{ 665 for (;;) 666 __asm__ ("hlt"); 667} 668 669/* 670 * Turn the power off. 671 */ 672void 673cpu_power_down(void) 674{ 675#if NAPM > 0 676 apm_power_off(); 677#endif 678} 679 680/* 681 * Clear registers on exec 682 */ 683void 684setregs(p, entry, stack) 685 struct proc *p; 686 u_long entry; 687 u_long stack; 688{ 689 struct trapframe *regs = p->p_md.md_regs; 690 691#ifdef USER_LDT 692 struct pcb *pcb = &p->p_addr->u_pcb; 693 694 /* was i386_user_cleanup() in NetBSD */ 695 if (pcb->pcb_ldt) { 696 if (pcb == curpcb) 697 lldt(GSEL(GUSERLDT_SEL, SEL_KPL)); 698 kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt, 699 pcb->pcb_ldt_len * sizeof(union descriptor)); 700 pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0; 701 } 702#endif 703 704 bzero((char *)regs, sizeof(struct trapframe)); 705 regs->tf_eip = entry; 706 regs->tf_esp = stack; 707 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 708 regs->tf_ss = _udatasel; 709 regs->tf_ds = _udatasel; 710 regs->tf_es = _udatasel; 711 regs->tf_cs = _ucodesel; 712 713 /* 714 * Initialize the math emulator (if any) for the current process. 715 * Actually, just clear the bit that says that the emulator has 716 * been initialized. Initialization is delayed until the process 717 * traps to the emulator (if it is done at all) mainly because 718 * emulators don't provide an entry point for initialization. 719 */ 720 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP; 721 722 /* 723 * Arrange to trap the next npx or `fwait' instruction (see npx.c 724 * for why fwait must be trapped at least if there is an npx or an 725 * emulator). This is mainly to handle the case where npx0 is not 726 * configured, since the npx routines normally set up the trap 727 * otherwise. It should be done only at boot time, but doing it 728 * here allows modifying `npx_exists' for testing the emulator on 729 * systems with an npx. 730 */ 731 load_cr0(rcr0() | CR0_MP | CR0_TS); 732 733#if NNPX > 0 734 /* Initialize the npx (if any) for the current process. */ 735 npxinit(__INITIAL_NPXCW__); 736#endif 737} 738 739static int 740sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS 741{ 742 int error; 743 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 744 req); 745 if (!error && req->newptr) 746 resettodr(); 747 return (error); 748} 749 750SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 751 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 752 753SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 754 CTLFLAG_RW, &disable_rtc_set, 0, ""); 755 756SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 757 CTLFLAG_RD, &bootinfo, bootinfo, ""); 758 759SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 760 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 761 762/* 763 * Initialize 386 and configure to run kernel 764 */ 765 766/* 767 * Initialize segments & interrupt table 768 */ 769 770int currentldt; 771int _default_ldt; 772#ifdef SMP 773union descriptor gdt[NGDT + NCPU]; /* global descriptor table */ 774#else 775union descriptor gdt[NGDT]; /* global descriptor table */ 776#endif 777struct gate_descriptor idt[NIDT]; /* interrupt descriptor table */ 778union descriptor ldt[NLDT]; /* local descriptor table */ 779#ifdef SMP 780/* table descriptors - used to load tables by microp */ 781struct region_descriptor r_gdt, r_idt; 782#endif 783 784#ifdef SMP 785extern struct i386tss common_tss; /* One tss per cpu */ 786#else 787struct i386tss common_tss; 788#endif 789 790static struct i386tss dblfault_tss; 791static char dblfault_stack[PAGE_SIZE]; 792 793extern struct user *proc0paddr; 794 795#ifdef TSS_IS_CACHED /* cpu_switch helper */ 796struct segment_descriptor *tssptr; 797int gsel_tss; 798#endif 799 800/* software prototypes -- in more palatable form */ 801struct soft_segment_descriptor gdt_segs[ 802#ifdef SMP 803 NGDT + NCPU 804#endif 805 ] = { 806/* GNULL_SEL 0 Null Descriptor */ 807{ 0x0, /* segment base address */ 808 0x0, /* length */ 809 0, /* segment type */ 810 0, /* segment descriptor priority level */ 811 0, /* segment descriptor present */ 812 0, 0, 813 0, /* default 32 vs 16 bit size */ 814 0 /* limit granularity (byte/page units)*/ }, 815/* GCODE_SEL 1 Code Descriptor for kernel */ 816{ 0x0, /* segment base address */ 817 0xfffff, /* length - all address space */ 818 SDT_MEMERA, /* segment type */ 819 0, /* segment descriptor priority level */ 820 1, /* segment descriptor present */ 821 0, 0, 822 1, /* default 32 vs 16 bit size */ 823 1 /* limit granularity (byte/page units)*/ }, 824/* GDATA_SEL 2 Data Descriptor for kernel */ 825{ 0x0, /* segment base address */ 826 0xfffff, /* length - all address space */ 827 SDT_MEMRWA, /* segment type */ 828 0, /* segment descriptor priority level */ 829 1, /* segment descriptor present */ 830 0, 0, 831 1, /* default 32 vs 16 bit size */ 832 1 /* limit granularity (byte/page units)*/ }, 833/* GLDT_SEL 3 LDT Descriptor */ 834{ (int) ldt, /* segment base address */ 835 sizeof(ldt)-1, /* length - all address space */ 836 SDT_SYSLDT, /* segment type */ 837 SEL_UPL, /* segment descriptor priority level */ 838 1, /* segment descriptor present */ 839 0, 0, 840 0, /* unused - default 32 vs 16 bit size */ 841 0 /* limit granularity (byte/page units)*/ }, 842/* GTGATE_SEL 4 Null Descriptor - Placeholder */ 843{ 0x0, /* segment base address */ 844 0x0, /* length - all address space */ 845 0, /* segment type */ 846 0, /* segment descriptor priority level */ 847 0, /* segment descriptor present */ 848 0, 0, 849 0, /* default 32 vs 16 bit size */ 850 0 /* limit granularity (byte/page units)*/ }, 851/* GPANIC_SEL 5 Panic Tss Descriptor */ 852{ (int) &dblfault_tss, /* segment base address */ 853 sizeof(struct i386tss)-1,/* length - all address space */ 854 SDT_SYS386TSS, /* segment type */ 855 0, /* segment descriptor priority level */ 856 1, /* segment descriptor present */ 857 0, 0, 858 0, /* unused - default 32 vs 16 bit size */ 859 0 /* limit granularity (byte/page units)*/ }, 860/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 861{ 862 (int) &common_tss, /* segment base address */ 863 sizeof(struct i386tss)-1,/* length - all address space */ 864 SDT_SYS386TSS, /* segment type */ 865 0, /* segment descriptor priority level */ 866 1, /* segment descriptor present */ 867 0, 0, 868 0, /* unused - default 32 vs 16 bit size */ 869 0 /* limit granularity (byte/page units)*/ }, 870/* GUSERLDT_SEL 7 User LDT Descriptor per process */ 871{ (int) ldt, /* segment base address */ 872 (512 * sizeof(union descriptor)-1), /* length */ 873 SDT_SYSLDT, /* segment type */ 874 0, /* segment descriptor priority level */ 875 1, /* segment descriptor present */ 876 0, 0, 877 0, /* unused - default 32 vs 16 bit size */ 878 0 /* limit granularity (byte/page units)*/ }, 879/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */ 880{ 0, /* segment base address (overwritten by APM) */ 881 0xfffff, /* length */ 882 SDT_MEMERA, /* segment type */ 883 0, /* segment descriptor priority level */ 884 1, /* segment descriptor present */ 885 0, 0, 886 1, /* default 32 vs 16 bit size */ 887 1 /* limit granularity (byte/page units)*/ }, 888/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */ 889{ 0, /* segment base address (overwritten by APM) */ 890 0xfffff, /* length */ 891 SDT_MEMERA, /* segment type */ 892 0, /* segment descriptor priority level */ 893 1, /* segment descriptor present */ 894 0, 0, 895 0, /* default 32 vs 16 bit size */ 896 1 /* limit granularity (byte/page units)*/ }, 897/* GAPMDATA_SEL 10 APM BIOS 32-bit interface (Data) */ 898{ 0, /* segment base address (overwritten by APM) */ 899 0xfffff, /* length */ 900 SDT_MEMRWA, /* segment type */ 901 0, /* segment descriptor priority level */ 902 1, /* segment descriptor present */ 903 0, 0, 904 1, /* default 32 vs 16 bit size */ 905 1 /* limit granularity (byte/page units)*/ }, 906}; 907 908static struct soft_segment_descriptor ldt_segs[] = { 909 /* Null Descriptor - overwritten by call gate */ 910{ 0x0, /* segment base address */ 911 0x0, /* length - all address space */ 912 0, /* segment type */ 913 0, /* segment descriptor priority level */ 914 0, /* segment descriptor present */ 915 0, 0, 916 0, /* default 32 vs 16 bit size */ 917 0 /* limit granularity (byte/page units)*/ }, 918 /* Null Descriptor - overwritten by call gate */ 919{ 0x0, /* segment base address */ 920 0x0, /* length - all address space */ 921 0, /* segment type */ 922 0, /* segment descriptor priority level */ 923 0, /* segment descriptor present */ 924 0, 0, 925 0, /* default 32 vs 16 bit size */ 926 0 /* limit granularity (byte/page units)*/ }, 927 /* Null Descriptor - overwritten by call gate */ 928{ 0x0, /* segment base address */ 929 0x0, /* length - all address space */ 930 0, /* segment type */ 931 0, /* segment descriptor priority level */ 932 0, /* segment descriptor present */ 933 0, 0, 934 0, /* default 32 vs 16 bit size */ 935 0 /* limit granularity (byte/page units)*/ }, 936 /* Code Descriptor for user */ 937{ 0x0, /* segment base address */ 938 0xfffff, /* length - all address space */ 939 SDT_MEMERA, /* segment type */ 940 SEL_UPL, /* segment descriptor priority level */ 941 1, /* segment descriptor present */ 942 0, 0, 943 1, /* default 32 vs 16 bit size */ 944 1 /* limit granularity (byte/page units)*/ }, 945 /* Data Descriptor for user */ 946{ 0x0, /* segment base address */ 947 0xfffff, /* length - all address space */ 948 SDT_MEMRWA, /* segment type */ 949 SEL_UPL, /* segment descriptor priority level */ 950 1, /* segment descriptor present */ 951 0, 0, 952 1, /* default 32 vs 16 bit size */ 953 1 /* limit granularity (byte/page units)*/ }, 954}; 955 956void 957setidt(idx, func, typ, dpl, selec) 958 int idx; 959 inthand_t *func; 960 int typ; 961 int dpl; 962 int selec; 963{ 964 struct gate_descriptor *ip = idt + idx; 965 966 ip->gd_looffset = (int)func; 967 ip->gd_selector = selec; 968 ip->gd_stkcpy = 0; 969 ip->gd_xx = 0; 970 ip->gd_type = typ; 971 ip->gd_dpl = dpl; 972 ip->gd_p = 1; 973 ip->gd_hioffset = ((int)func)>>16 ; 974} 975 976#define IDTVEC(name) __CONCAT(X,name) 977 978extern inthand_t 979 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 980 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 981 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 982 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 983 IDTVEC(syscall), IDTVEC(int0x80_syscall); 984 985void 986sdtossd(sd, ssd) 987 struct segment_descriptor *sd; 988 struct soft_segment_descriptor *ssd; 989{ 990 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 991 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 992 ssd->ssd_type = sd->sd_type; 993 ssd->ssd_dpl = sd->sd_dpl; 994 ssd->ssd_p = sd->sd_p; 995 ssd->ssd_def32 = sd->sd_def32; 996 ssd->ssd_gran = sd->sd_gran; 997} 998 999void 1000init386(first) 1001 int first; 1002{ 1003 int x; 1004 unsigned biosbasemem, biosextmem; 1005 struct gate_descriptor *gdp; 1006#ifndef TSS_IS_CACHED 1007 int gsel_tss; 1008#endif 1009 struct isa_device *idp; 1010#ifndef SMP 1011 /* table descriptors - used to load tables by microp */ 1012 struct region_descriptor r_gdt, r_idt; 1013#endif 1014 int pagesinbase, pagesinext; 1015 int target_page, pa_indx; 1016 int off; 1017 1018 proc0.p_addr = proc0paddr; 1019 1020 atdevbase = ISA_HOLE_START + KERNBASE; 1021 1022 /* 1023 * Initialize the console before we print anything out. 1024 */ 1025 cninit(); 1026 1027 /* 1028 * make gdt memory segments, the code segment goes up to end of the 1029 * page with etext in it, the data segment goes to the end of 1030 * the address space 1031 */ 1032 /* 1033 * XXX text protection is temporarily (?) disabled. The limit was 1034 * i386_btop(round_page(etext)) - 1. 1035 */ 1036 gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1; 1037 gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1; 1038#ifdef BDE_DEBUGGER 1039#define NGDT1 8 /* avoid overwriting db entries with APM ones */ 1040#else 1041#define NGDT1 (sizeof gdt_segs / sizeof gdt_segs[0]) 1042#endif 1043 for (x = 0; x < NGDT1; x++) 1044 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1045 1046#ifdef SMP 1047 /* 1048 * Spin these up now. init_secondary() grabs them. We could use 1049 * #for(x,y,z) / #endfor cpp directives if they existed. 1050 */ 1051 for (x = 0; x < NCPU; x++) { 1052 gdt_segs[NGDT + x] = gdt_segs[GPROC0_SEL]; 1053 ssdtosd(&gdt_segs[NGDT + x], &gdt[NGDT + x].sd); 1054 } 1055#endif 1056 1057 /* make ldt memory segments */ 1058 /* 1059 * The data segment limit must not cover the user area because we 1060 * don't want the user area to be writable in copyout() etc. (page 1061 * level protection is lost in kernel mode on 386's). Also, we 1062 * don't want the user area to be writable directly (page level 1063 * protection of the user area is not available on 486's with 1064 * CR0_WP set, because there is no user-read/kernel-write mode). 1065 * 1066 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1067 * should be spelled ...MAX_USER... 1068 */ 1069#define VM_END_USER_RW_ADDRESS VM_MAXUSER_ADDRESS 1070 /* 1071 * The code segment limit has to cover the user area until we move 1072 * the signal trampoline out of the user area. This is safe because 1073 * the code segment cannot be written to directly. 1074 */ 1075#define VM_END_USER_R_ADDRESS (VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE) 1076 ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1; 1077 ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1; 1078 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1079 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1080 1081 /* exceptions */ 1082 for (x = 0; x < NIDT; x++) 1083 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1084 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1085 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1086 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1087 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1088 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1089 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1090 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1091 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1092 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1093 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1094 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1095 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1096 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1097 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1098 setidt(14, &IDTVEC(page), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1099 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1100 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1101 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1102 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1103 setidt(0x80, &IDTVEC(int0x80_syscall), 1104 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); 1105 1106#include "isa.h" 1107#if NISA >0 1108 isa_defaultirq(); 1109#endif 1110 rand_initialize(); 1111 1112 r_gdt.rd_limit = sizeof(gdt) - 1; 1113 r_gdt.rd_base = (int) gdt; 1114 lgdt(&r_gdt); 1115 1116 r_idt.rd_limit = sizeof(idt) - 1; 1117 r_idt.rd_base = (int) idt; 1118 lidt(&r_idt); 1119 1120 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1121 lldt(_default_ldt); 1122 currentldt = _default_ldt; 1123 1124#ifdef DDB 1125 kdb_init(); 1126 if (boothowto & RB_KDB) 1127 Debugger("Boot flags requested debugger"); 1128#endif 1129 1130 finishidentcpu(); /* Final stage of CPU initialization */ 1131 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 1132 initializecpu(); /* Initialize CPU registers */ 1133 1134 /* Use BIOS values stored in RTC CMOS RAM, since probing 1135 * breaks certain 386 AT relics. 1136 */ 1137 biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8); 1138 biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8); 1139 1140 /* 1141 * If BIOS tells us that it has more than 640k in the basemem, 1142 * don't believe it - set it to 640k. 1143 */ 1144 if (biosbasemem > 640) { 1145 printf("Preposterous RTC basemem of %dK, truncating to 640K\n", 1146 biosbasemem); 1147 biosbasemem = 640; 1148 } 1149 if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) { 1150 printf("Preposterous BIOS basemem of %dK, truncating to 640K\n", 1151 bootinfo.bi_basemem); 1152 bootinfo.bi_basemem = 640; 1153 } 1154 1155 /* 1156 * Warn if the official BIOS interface disagrees with the RTC 1157 * interface used above about the amount of base memory or the 1158 * amount of extended memory. Prefer the BIOS value for the base 1159 * memory. This is necessary for machines that `steal' base 1160 * memory for use as BIOS memory, at least if we are going to use 1161 * the BIOS for apm. Prefer the RTC value for extended memory. 1162 * Eventually the hackish interface shouldn't even be looked at. 1163 */ 1164 if (bootinfo.bi_memsizes_valid) { 1165 if (bootinfo.bi_basemem != biosbasemem) { 1166 vm_offset_t pa; 1167 1168 printf( 1169 "BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n", 1170 bootinfo.bi_basemem, biosbasemem); 1171 biosbasemem = bootinfo.bi_basemem; 1172 1173 /* 1174 * XXX if biosbasemem is now < 640, there is `hole' 1175 * between the end of base memory and the start of 1176 * ISA memory. The hole may be empty or it may 1177 * contain BIOS code or data. Map it read/write so 1178 * that the BIOS can write to it. (Memory from 0 to 1179 * the physical end of the kernel is mapped read-only 1180 * to begin with and then parts of it are remapped. 1181 * The parts that aren't remapped form holes that 1182 * remain read-only and are unused by the kernel. 1183 * The base memory area is below the physical end of 1184 * the kernel and right now forms a read-only hole. 1185 * The part of it from 0 to 1186 * (trunc_page(biosbasemem * 1024) - 1) will be 1187 * remapped and used by the kernel later.) 1188 * 1189 * This code is similar to the code used in 1190 * pmap_mapdev, but since no memory needs to be 1191 * allocated we simply change the mapping. 1192 */ 1193 for (pa = trunc_page(biosbasemem * 1024); 1194 pa < ISA_HOLE_START; pa += PAGE_SIZE) { 1195 unsigned *pte; 1196 1197 pte = (unsigned *)vtopte(pa + KERNBASE); 1198 *pte = pa | PG_RW | PG_V; 1199 } 1200 } 1201 if (bootinfo.bi_extmem != biosextmem) 1202 printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n", 1203 bootinfo.bi_extmem, biosextmem); 1204 } 1205 1206#ifdef SMP 1207 /* make hole for AP bootstrap code */ 1208 pagesinbase = mp_bootaddress(biosbasemem) / PAGE_SIZE; 1209#else 1210 pagesinbase = biosbasemem * 1024 / PAGE_SIZE; 1211#endif 1212 1213 pagesinext = biosextmem * 1024 / PAGE_SIZE; 1214 1215 /* 1216 * Special hack for chipsets that still remap the 384k hole when 1217 * there's 16MB of memory - this really confuses people that 1218 * are trying to use bus mastering ISA controllers with the 1219 * "16MB limit"; they only have 16MB, but the remapping puts 1220 * them beyond the limit. 1221 */ 1222 /* 1223 * If extended memory is between 15-16MB (16-17MB phys address range), 1224 * chop it to 15MB. 1225 */ 1226 if ((pagesinext > 3840) && (pagesinext < 4096)) 1227 pagesinext = 3840; 1228 1229 /* 1230 * Maxmem isn't the "maximum memory", it's one larger than the 1231 * highest page of the physical address space. It should be 1232 * called something like "Maxphyspage". 1233 */ 1234 Maxmem = pagesinext + 0x100000/PAGE_SIZE; 1235 1236#ifdef MAXMEM 1237 Maxmem = MAXMEM/4; 1238#endif 1239 1240#if NNPX > 0 1241 idp = find_isadev(isa_devtab_null, &npxdriver, 0); 1242 if (idp != NULL && idp->id_msize != 0) 1243 Maxmem = idp->id_msize / 4; 1244#endif 1245 1246#ifdef SMP 1247 /* look for the MP hardware - needed for apic addresses */ 1248 mp_probe(); 1249#endif 1250 1251 /* call pmap initialization to make new kernel address space */ 1252 pmap_bootstrap (first, 0); 1253 1254 /* 1255 * Size up each available chunk of physical memory. 1256 */ 1257 1258 /* 1259 * We currently don't bother testing base memory. 1260 * XXX ...but we probably should. 1261 */ 1262 pa_indx = 0; 1263 badpages = 0; 1264 if (pagesinbase > 1) { 1265 phys_avail[pa_indx++] = PAGE_SIZE; /* skip first page of memory */ 1266 phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */ 1267 physmem = pagesinbase - 1; 1268 } else { 1269 /* point at first chunk end */ 1270 pa_indx++; 1271 } 1272 1273 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) { 1274 int tmp, page_bad = FALSE; 1275 1276 /* 1277 * map page into kernel: valid, read/write, non-cacheable 1278 */ 1279 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page; 1280 invltlb(); 1281 1282 tmp = *(int *)CADDR1; 1283 /* 1284 * Test for alternating 1's and 0's 1285 */ 1286 *(volatile int *)CADDR1 = 0xaaaaaaaa; 1287 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) { 1288 page_bad = TRUE; 1289 } 1290 /* 1291 * Test for alternating 0's and 1's 1292 */ 1293 *(volatile int *)CADDR1 = 0x55555555; 1294 if (*(volatile int *)CADDR1 != 0x55555555) { 1295 page_bad = TRUE; 1296 } 1297 /* 1298 * Test for all 1's 1299 */ 1300 *(volatile int *)CADDR1 = 0xffffffff; 1301 if (*(volatile int *)CADDR1 != 0xffffffff) { 1302 page_bad = TRUE; 1303 } 1304 /* 1305 * Test for all 0's 1306 */ 1307 *(volatile int *)CADDR1 = 0x0; 1308 if (*(volatile int *)CADDR1 != 0x0) { 1309 /* 1310 * test of page failed 1311 */ 1312 page_bad = TRUE; 1313 } 1314 /* 1315 * Restore original value. 1316 */ 1317 *(int *)CADDR1 = tmp; 1318 1319 /* 1320 * Adjust array of valid/good pages. 1321 */ 1322 if (page_bad == FALSE) { 1323 /* 1324 * If this good page is a continuation of the 1325 * previous set of good pages, then just increase 1326 * the end pointer. Otherwise start a new chunk. 1327 * Note that "end" points one higher than end, 1328 * making the range >= start and < end. 1329 */ 1330 if (phys_avail[pa_indx] == target_page) { 1331 phys_avail[pa_indx] += PAGE_SIZE; 1332 } else { 1333 pa_indx++; 1334 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1335 printf("Too many holes in the physical address space, giving up\n"); 1336 pa_indx--; 1337 break; 1338 } 1339 phys_avail[pa_indx++] = target_page; /* start */ 1340 phys_avail[pa_indx] = target_page + PAGE_SIZE; /* end */ 1341 } 1342 physmem++; 1343 } else { 1344 badpages++; 1345 page_bad = FALSE; 1346 } 1347 } 1348 1349 *(int *)CMAP1 = 0; 1350 invltlb(); 1351 1352 /* 1353 * XXX 1354 * The last chunk must contain at least one page plus the message 1355 * buffer to avoid complicating other code (message buffer address 1356 * calculation, etc.). 1357 */ 1358 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1359 round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) { 1360 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1361 phys_avail[pa_indx--] = 0; 1362 phys_avail[pa_indx--] = 0; 1363 } 1364 1365 Maxmem = atop(phys_avail[pa_indx]); 1366 1367 /* Trim off space for the message buffer. */ 1368 phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf)); 1369 1370 avail_end = phys_avail[pa_indx]; 1371 1372 /* now running on new page tables, configured,and u/iom is accessible */ 1373 1374 /* Map the message buffer. */ 1375 for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE) 1376 pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off, 1377 avail_end + off, VM_PROT_ALL, TRUE); 1378 msgbufmapped = 1; 1379 1380 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1381 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE; 1382 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ; 1383 common_tss.tss_ioopt = (sizeof common_tss) << 16; 1384 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1385 ltr(gsel_tss); 1386 1387 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1388 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)]; 1389 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1390 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1391 dblfault_tss.tss_cr3 = (int)IdlePTD; 1392 dblfault_tss.tss_eip = (int) dblfault_handler; 1393 dblfault_tss.tss_eflags = PSL_KERNEL; 1394 dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs = 1395 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1396 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1397 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1398 1399#ifdef TSS_IS_CACHED /* cpu_switch helper */ 1400 tssptr = &gdt[GPROC0_SEL].sd; 1401#endif 1402 1403 /* make a call gate to reenter kernel with */ 1404 gdp = &ldt[LSYS5CALLS_SEL].gd; 1405 1406 x = (int) &IDTVEC(syscall); 1407 gdp->gd_looffset = x++; 1408 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1409 gdp->gd_stkcpy = 1; 1410 gdp->gd_type = SDT_SYS386CGT; 1411 gdp->gd_dpl = SEL_UPL; 1412 gdp->gd_p = 1; 1413 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16; 1414 1415 /* XXX does this work? */ 1416 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1417 1418 /* transfer to user mode */ 1419 1420 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1421 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1422 1423 /* setup proc 0's pcb */ 1424 proc0.p_addr->u_pcb.pcb_flags = 0; 1425 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD; 1426 proc0.p_addr->u_pcb.pcb_mpnest = 1; 1427} 1428 1429int 1430ptrace_set_pc(p, addr) 1431 struct proc *p; 1432 unsigned int addr; 1433{ 1434 p->p_md.md_regs->tf_eip = addr; 1435 return (0); 1436} 1437 1438int 1439ptrace_single_step(p) 1440 struct proc *p; 1441{ 1442 p->p_md.md_regs->tf_eflags |= PSL_T; 1443 return (0); 1444} 1445 1446int ptrace_write_u(p, off, data) 1447 struct proc *p; 1448 vm_offset_t off; 1449 int data; 1450{ 1451 struct trapframe frame_copy; 1452 vm_offset_t min; 1453 struct trapframe *tp; 1454 1455 /* 1456 * Privileged kernel state is scattered all over the user area. 1457 * Only allow write access to parts of regs and to fpregs. 1458 */ 1459 min = (char *)p->p_md.md_regs - (char *)p->p_addr; 1460 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) { 1461 tp = p->p_md.md_regs; 1462 frame_copy = *tp; 1463 *(int *)((char *)&frame_copy + (off - min)) = data; 1464 if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) || 1465 !CS_SECURE(frame_copy.tf_cs)) 1466 return (EINVAL); 1467 *(int*)((char *)p->p_addr + off) = data; 1468 return (0); 1469 } 1470 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu); 1471 if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) { 1472 *(int*)((char *)p->p_addr + off) = data; 1473 return (0); 1474 } 1475 return (EFAULT); 1476} 1477 1478int 1479fill_regs(p, regs) 1480 struct proc *p; 1481 struct reg *regs; 1482{ 1483 struct pcb *pcb; 1484 struct trapframe *tp; 1485 1486 tp = p->p_md.md_regs; 1487 regs->r_es = tp->tf_es; 1488 regs->r_ds = tp->tf_ds; 1489 regs->r_edi = tp->tf_edi; 1490 regs->r_esi = tp->tf_esi; 1491 regs->r_ebp = tp->tf_ebp; 1492 regs->r_ebx = tp->tf_ebx; 1493 regs->r_edx = tp->tf_edx; 1494 regs->r_ecx = tp->tf_ecx; 1495 regs->r_eax = tp->tf_eax; 1496 regs->r_eip = tp->tf_eip; 1497 regs->r_cs = tp->tf_cs; 1498 regs->r_eflags = tp->tf_eflags; 1499 regs->r_esp = tp->tf_esp; 1500 regs->r_ss = tp->tf_ss; 1501 pcb = &p->p_addr->u_pcb; 1502 regs->r_fs = pcb->pcb_fs; 1503 regs->r_gs = pcb->pcb_gs; 1504 return (0); 1505} 1506 1507int 1508set_regs(p, regs) 1509 struct proc *p; 1510 struct reg *regs; 1511{ 1512 struct pcb *pcb; 1513 struct trapframe *tp; 1514 1515 tp = p->p_md.md_regs; 1516 if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) || 1517 !CS_SECURE(regs->r_cs)) 1518 return (EINVAL); 1519 tp->tf_es = regs->r_es; 1520 tp->tf_ds = regs->r_ds; 1521 tp->tf_edi = regs->r_edi; 1522 tp->tf_esi = regs->r_esi; 1523 tp->tf_ebp = regs->r_ebp; 1524 tp->tf_ebx = regs->r_ebx; 1525 tp->tf_edx = regs->r_edx; 1526 tp->tf_ecx = regs->r_ecx; 1527 tp->tf_eax = regs->r_eax; 1528 tp->tf_eip = regs->r_eip; 1529 tp->tf_cs = regs->r_cs; 1530 tp->tf_eflags = regs->r_eflags; 1531 tp->tf_esp = regs->r_esp; 1532 tp->tf_ss = regs->r_ss; 1533 pcb = &p->p_addr->u_pcb; 1534 pcb->pcb_fs = regs->r_fs; 1535 pcb->pcb_gs = regs->r_gs; 1536 return (0); 1537} 1538 1539#ifndef DDB 1540void 1541Debugger(const char *msg) 1542{ 1543 printf("Debugger(\"%s\") called.\n", msg); 1544} 1545#endif /* no DDB */ 1546 1547#include <sys/disklabel.h> 1548 1549/* 1550 * Determine the size of the transfer, and make sure it is 1551 * within the boundaries of the partition. Adjust transfer 1552 * if needed, and signal errors or early completion. 1553 */ 1554int 1555bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel) 1556{ 1557 struct partition *p = lp->d_partitions + dkpart(bp->b_dev); 1558 int labelsect = lp->d_partitions[0].p_offset; 1559 int maxsz = p->p_size, 1560 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT; 1561 1562 /* overwriting disk label ? */ 1563 /* XXX should also protect bootstrap in first 8K */ 1564 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect && 1565#if LABELSECTOR != 0 1566 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect && 1567#endif 1568 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1569 bp->b_error = EROFS; 1570 goto bad; 1571 } 1572 1573#if defined(DOSBBSECTOR) && defined(notyet) 1574 /* overwriting master boot record? */ 1575 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR && 1576 (bp->b_flags & B_READ) == 0 && wlabel == 0) { 1577 bp->b_error = EROFS; 1578 goto bad; 1579 } 1580#endif 1581 1582 /* beyond partition? */ 1583 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) { 1584 /* if exactly at end of disk, return an EOF */ 1585 if (bp->b_blkno == maxsz) { 1586 bp->b_resid = bp->b_bcount; 1587 return(0); 1588 } 1589 /* or truncate if part of it fits */ 1590 sz = maxsz - bp->b_blkno; 1591 if (sz <= 0) { 1592 bp->b_error = EINVAL; 1593 goto bad; 1594 } 1595 bp->b_bcount = sz << DEV_BSHIFT; 1596 } 1597 1598 bp->b_pblkno = bp->b_blkno + p->p_offset; 1599 return(1); 1600 1601bad: 1602 bp->b_flags |= B_ERROR; 1603 return(-1); 1604} 1605 1606#ifdef DDB 1607 1608/* 1609 * Provide inb() and outb() as functions. They are normally only 1610 * available as macros calling inlined functions, thus cannot be 1611 * called inside DDB. 1612 * 1613 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1614 */ 1615 1616#undef inb 1617#undef outb 1618 1619/* silence compiler warnings */ 1620u_char inb(u_int); 1621void outb(u_int, u_char); 1622 1623u_char 1624inb(u_int port) 1625{ 1626 u_char data; 1627 /* 1628 * We use %%dx and not %1 here because i/o is done at %dx and not at 1629 * %edx, while gcc generates inferior code (movw instead of movl) 1630 * if we tell it to load (u_short) port. 1631 */ 1632 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1633 return (data); 1634} 1635 1636void 1637outb(u_int port, u_char data) 1638{ 1639 u_char al; 1640 /* 1641 * Use an unnecessary assignment to help gcc's register allocator. 1642 * This make a large difference for gcc-1.40 and a tiny difference 1643 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1644 * best results. gcc-2.6.0 can't handle this. 1645 */ 1646 al = data; 1647 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1648} 1649 1650#endif /* DDB */ 1651