machdep.c revision 24691
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by the University of
20 *	California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 *    may be used to endorse or promote products derived from this software
23 *    without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
38 *	$Id: machdep.c,v 1.235 1997/04/07 06:45:13 peter Exp $
39 */
40
41#include "npx.h"
42#include "opt_sysvipc.h"
43#include "opt_ddb.h"
44#include "opt_bounce.h"
45#include "opt_machdep.h"
46#include "opt_perfmon.h"
47#include "opt_userconfig.h"
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/sysproto.h>
52#include <sys/signalvar.h>
53#include <sys/kernel.h>
54#include <sys/proc.h>
55#include <sys/buf.h>
56#include <sys/reboot.h>
57#include <sys/conf.h>
58#include <sys/file.h>
59#include <sys/callout.h>
60#include <sys/malloc.h>
61#include <sys/mbuf.h>
62#include <sys/mount.h>
63#include <sys/msgbuf.h>
64#include <sys/sysent.h>
65#include <sys/tty.h>
66#include <sys/sysctl.h>
67#include <sys/vmmeter.h>
68
69#ifdef SYSVSHM
70#include <sys/shm.h>
71#endif
72
73#ifdef SYSVMSG
74#include <sys/msg.h>
75#endif
76
77#ifdef SYSVSEM
78#include <sys/sem.h>
79#endif
80
81#include <vm/vm.h>
82#include <vm/vm_param.h>
83#include <vm/vm_prot.h>
84#include <sys/lock.h>
85#include <vm/vm_kern.h>
86#include <vm/vm_object.h>
87#include <vm/vm_page.h>
88#include <vm/vm_map.h>
89#include <vm/vm_pager.h>
90#include <vm/vm_extern.h>
91
92#include <sys/user.h>
93#include <sys/exec.h>
94#include <sys/vnode.h>
95
96#include <ddb/ddb.h>
97
98#include <net/netisr.h>
99
100#include <machine/cpu.h>
101#include <machine/npx.h>
102#include <machine/reg.h>
103#include <machine/psl.h>
104#include <machine/clock.h>
105#include <machine/specialreg.h>
106#include <machine/sysarch.h>
107#include <machine/cons.h>
108#include <machine/bootinfo.h>
109#include <machine/md_var.h>
110#ifdef PERFMON
111#include <machine/perfmon.h>
112#endif
113
114#include <i386/isa/isa_device.h>
115#include <i386/isa/rtc.h>
116#include <machine/random.h>
117
118extern void init386 __P((int first));
119extern int ptrace_set_pc __P((struct proc *p, unsigned int addr));
120extern int ptrace_single_step __P((struct proc *p));
121extern int ptrace_write_u __P((struct proc *p, vm_offset_t off, int data));
122extern void dblfault_handler __P((void));
123
124extern void printcpuinfo(void);	/* XXX header file */
125extern void earlysetcpuclass(void);	/* same header file */
126extern void finishidentcpu(void);
127extern void panicifcpuunsupported(void);
128extern void initializecpu(void);
129
130static void cpu_startup __P((void *));
131SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
132
133
134#ifdef BOUNCE_BUFFERS
135extern char *bouncememory;
136extern int maxbkva;
137#ifdef BOUNCEPAGES
138int	bouncepages = BOUNCEPAGES;
139#else
140int	bouncepages = 0;
141#endif
142#endif	/* BOUNCE_BUFFERS */
143
144extern int freebufspace;
145int	msgbufmapped = 0;		/* set when safe to use msgbuf */
146int _udatasel, _ucodesel;
147u_int	atdevbase;
148
149
150int physmem = 0;
151int cold = 1;
152
153static int
154sysctl_hw_physmem SYSCTL_HANDLER_ARGS
155{
156	int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
157	return (error);
158}
159
160SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
161	0, 0, sysctl_hw_physmem, "I", "");
162
163static int
164sysctl_hw_usermem SYSCTL_HANDLER_ARGS
165{
166	int error = sysctl_handle_int(oidp, 0,
167		ctob(physmem - cnt.v_wire_count), req);
168	return (error);
169}
170
171SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
172	0, 0, sysctl_hw_usermem, "I", "");
173
174int boothowto = 0, bootverbose = 0, Maxmem = 0;
175static int	badpages = 0;
176long dumplo;
177extern int bootdev;
178
179vm_offset_t phys_avail[10];
180
181/* must be 2 less so 0 0 can signal end of chunks */
182#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
183
184static void setup_netisrs __P((struct linker_set *)); /* XXX declare elsewhere */
185
186static vm_offset_t buffer_sva, buffer_eva;
187vm_offset_t clean_sva, clean_eva;
188static vm_offset_t pager_sva, pager_eva;
189extern struct linker_set netisr_set;
190
191#define offsetof(type, member)	((size_t)(&((type *)0)->member))
192
193static void
194cpu_startup(dummy)
195	void *dummy;
196{
197	register unsigned i;
198	register caddr_t v;
199	vm_offset_t maxaddr;
200	vm_size_t size = 0;
201	int firstaddr;
202	vm_offset_t minaddr;
203
204	if (boothowto & RB_VERBOSE)
205		bootverbose++;
206
207	/*
208	 * Good {morning,afternoon,evening,night}.
209	 */
210	printf(version);
211	earlysetcpuclass();
212	startrtclock();
213	printcpuinfo();
214	panicifcpuunsupported();
215#ifdef PERFMON
216	perfmon_init();
217#endif
218	printf("real memory  = %d (%dK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
219	/*
220	 * Display any holes after the first chunk of extended memory.
221	 */
222	if (badpages != 0) {
223		int indx = 1;
224
225		/*
226		 * XXX skip reporting ISA hole & unmanaged kernel memory
227		 */
228		if (phys_avail[0] == PAGE_SIZE)
229			indx += 2;
230
231		printf("Physical memory hole(s):\n");
232		for (; phys_avail[indx + 1] != 0; indx += 2) {
233			int size = phys_avail[indx + 1] - phys_avail[indx];
234
235			printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx],
236			    phys_avail[indx + 1] - 1, size, size / PAGE_SIZE);
237		}
238	}
239
240	/*
241	 * Quickly wire in netisrs.
242	 */
243	setup_netisrs(&netisr_set);
244
245	/*
246	 * Allocate space for system data structures.
247	 * The first available kernel virtual address is in "v".
248	 * As pages of kernel virtual memory are allocated, "v" is incremented.
249	 * As pages of memory are allocated and cleared,
250	 * "firstaddr" is incremented.
251	 * An index into the kernel page table corresponding to the
252	 * virtual memory address maintained in "v" is kept in "mapaddr".
253	 */
254
255	/*
256	 * Make two passes.  The first pass calculates how much memory is
257	 * needed and allocates it.  The second pass assigns virtual
258	 * addresses to the various data structures.
259	 */
260	firstaddr = 0;
261again:
262	v = (caddr_t)firstaddr;
263
264#define	valloc(name, type, num) \
265	    (name) = (type *)v; v = (caddr_t)((name)+(num))
266#define	valloclim(name, type, num, lim) \
267	    (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
268	valloc(callout, struct callout, ncallout);
269#ifdef SYSVSHM
270	valloc(shmsegs, struct shmid_ds, shminfo.shmmni);
271#endif
272#ifdef SYSVSEM
273	valloc(sema, struct semid_ds, seminfo.semmni);
274	valloc(sem, struct sem, seminfo.semmns);
275	/* This is pretty disgusting! */
276	valloc(semu, int, (seminfo.semmnu * seminfo.semusz) / sizeof(int));
277#endif
278#ifdef SYSVMSG
279	valloc(msgpool, char, msginfo.msgmax);
280	valloc(msgmaps, struct msgmap, msginfo.msgseg);
281	valloc(msghdrs, struct msg, msginfo.msgtql);
282	valloc(msqids, struct msqid_ds, msginfo.msgmni);
283#endif
284
285	if (nbuf == 0) {
286		nbuf = 30;
287		if( physmem > 1024)
288			nbuf += min((physmem - 1024) / 8, 2048);
289	}
290	nswbuf = max(min(nbuf/4, 128), 16);
291
292	valloc(swbuf, struct buf, nswbuf);
293	valloc(buf, struct buf, nbuf);
294
295#ifdef BOUNCE_BUFFERS
296	/*
297	 * If there is more than 16MB of memory, allocate some bounce buffers
298	 */
299	if (Maxmem > 4096) {
300		if (bouncepages == 0) {
301			bouncepages = 64;
302			bouncepages += ((Maxmem - 4096) / 2048) * 32;
303		}
304		v = (caddr_t)((vm_offset_t)round_page(v));
305		valloc(bouncememory, char, bouncepages * PAGE_SIZE);
306	}
307#endif
308
309	/*
310	 * End of first pass, size has been calculated so allocate memory
311	 */
312	if (firstaddr == 0) {
313		size = (vm_size_t)(v - firstaddr);
314		firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
315		if (firstaddr == 0)
316			panic("startup: no room for tables");
317		goto again;
318	}
319
320	/*
321	 * End of second pass, addresses have been assigned
322	 */
323	if ((vm_size_t)(v - firstaddr) != size)
324		panic("startup: table size inconsistency");
325
326#ifdef BOUNCE_BUFFERS
327	clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
328			(nbuf*BKVASIZE) + (nswbuf*MAXPHYS) +
329				maxbkva + pager_map_size, TRUE);
330	io_map = kmem_suballoc(clean_map, &minaddr, &maxaddr, maxbkva, FALSE);
331#else
332	clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
333			(nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size, TRUE);
334#endif
335	buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
336				(nbuf*BKVASIZE), TRUE);
337	pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
338				(nswbuf*MAXPHYS) + pager_map_size, TRUE);
339	exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
340				(16*ARG_MAX), TRUE);
341	u_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
342				(maxproc*UPAGES*PAGE_SIZE), FALSE);
343
344	/*
345	 * Finally, allocate mbuf pool.  Since mclrefcnt is an off-size
346	 * we use the more space efficient malloc in place of kmem_alloc.
347	 */
348	{
349		vm_offset_t mb_map_size;
350
351		mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
352		mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
353		mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
354		bzero(mclrefcnt, mb_map_size / MCLBYTES);
355		mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
356			mb_map_size, FALSE);
357	}
358
359	/*
360	 * Initialize callouts
361	 */
362	callfree = callout;
363	for (i = 1; i < ncallout; i++)
364		callout[i-1].c_next = &callout[i];
365
366#if defined(USERCONFIG)
367#if defined(USERCONFIG_BOOT)
368	if (1) {
369#else
370        if (boothowto & RB_CONFIG) {
371#endif
372		userconfig();
373		cninit();	/* the preferred console may have changed */
374	}
375#endif
376
377#ifdef BOUNCE_BUFFERS
378	/*
379	 * init bounce buffers
380	 */
381	vm_bounce_init();
382#endif
383
384	printf("avail memory = %d (%dK bytes)\n", ptoa(cnt.v_free_count),
385	    ptoa(cnt.v_free_count) / 1024);
386
387	/*
388	 * Set up buffers, so they can be used to read disk labels.
389	 */
390	bufinit();
391	vm_pager_bufferinit();
392}
393
394int
395register_netisr(num, handler)
396	int num;
397	netisr_t *handler;
398{
399
400	if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
401		printf("register_netisr: bad isr number: %d\n", num);
402		return (EINVAL);
403	}
404	netisrs[num] = handler;
405	return (0);
406}
407
408static void
409setup_netisrs(ls)
410	struct linker_set *ls;
411{
412	int i;
413	const struct netisrtab *nit;
414
415	for(i = 0; ls->ls_items[i]; i++) {
416		nit = (const struct netisrtab *)ls->ls_items[i];
417		register_netisr(nit->nit_num, nit->nit_isr);
418	}
419}
420
421/*
422 * Send an interrupt to process.
423 *
424 * Stack is set up to allow sigcode stored
425 * at top to call routine, followed by kcall
426 * to sigreturn routine below.  After sigreturn
427 * resets the signal mask, the stack, and the
428 * frame pointer, it returns to the user
429 * specified pc, psl.
430 */
431void
432sendsig(catcher, sig, mask, code)
433	sig_t catcher;
434	int sig, mask;
435	u_long code;
436{
437	register struct proc *p = curproc;
438	register int *regs;
439	register struct sigframe *fp;
440	struct sigframe sf;
441	struct sigacts *psp = p->p_sigacts;
442	int oonstack;
443
444	regs = p->p_md.md_regs;
445        oonstack = psp->ps_sigstk.ss_flags & SS_ONSTACK;
446	/*
447	 * Allocate and validate space for the signal handler context.
448	 */
449        if ((psp->ps_flags & SAS_ALTSTACK) && !oonstack &&
450	    (psp->ps_sigonstack & sigmask(sig))) {
451		fp = (struct sigframe *)(psp->ps_sigstk.ss_sp +
452		    psp->ps_sigstk.ss_size - sizeof(struct sigframe));
453		psp->ps_sigstk.ss_flags |= SS_ONSTACK;
454	} else {
455		fp = (struct sigframe *)regs[tESP] - 1;
456	}
457
458	/*
459	 * grow() will return FALSE if the fp will not fit inside the stack
460	 *	and the stack can not be grown. useracc will return FALSE
461	 *	if access is denied.
462	 */
463	if ((grow(p, (int)fp) == FALSE) ||
464	    (useracc((caddr_t)fp, sizeof (struct sigframe), B_WRITE) == FALSE)) {
465		/*
466		 * Process has trashed its stack; give it an illegal
467		 * instruction to halt it in its tracks.
468		 */
469		SIGACTION(p, SIGILL) = SIG_DFL;
470		sig = sigmask(SIGILL);
471		p->p_sigignore &= ~sig;
472		p->p_sigcatch &= ~sig;
473		p->p_sigmask &= ~sig;
474		psignal(p, SIGILL);
475		return;
476	}
477
478	/*
479	 * Build the argument list for the signal handler.
480	 */
481	if (p->p_sysent->sv_sigtbl) {
482		if (sig < p->p_sysent->sv_sigsize)
483			sig = p->p_sysent->sv_sigtbl[sig];
484		else
485			sig = p->p_sysent->sv_sigsize + 1;
486	}
487	sf.sf_signum = sig;
488	sf.sf_code = code;
489	sf.sf_scp = &fp->sf_sc;
490	sf.sf_addr = (char *) regs[tERR];
491	sf.sf_handler = catcher;
492
493	/* save scratch registers */
494	sf.sf_sc.sc_eax = regs[tEAX];
495	sf.sf_sc.sc_ebx = regs[tEBX];
496	sf.sf_sc.sc_ecx = regs[tECX];
497	sf.sf_sc.sc_edx = regs[tEDX];
498	sf.sf_sc.sc_esi = regs[tESI];
499	sf.sf_sc.sc_edi = regs[tEDI];
500	sf.sf_sc.sc_cs = regs[tCS];
501	sf.sf_sc.sc_ds = regs[tDS];
502	sf.sf_sc.sc_ss = regs[tSS];
503	sf.sf_sc.sc_es = regs[tES];
504	sf.sf_sc.sc_isp = regs[tISP];
505
506	/*
507	 * Build the signal context to be used by sigreturn.
508	 */
509	sf.sf_sc.sc_onstack = oonstack;
510	sf.sf_sc.sc_mask = mask;
511	sf.sf_sc.sc_sp = regs[tESP];
512	sf.sf_sc.sc_fp = regs[tEBP];
513	sf.sf_sc.sc_pc = regs[tEIP];
514	sf.sf_sc.sc_ps = regs[tEFLAGS];
515
516	/*
517	 * Copy the sigframe out to the user's stack.
518	 */
519	if (copyout(&sf, fp, sizeof(struct sigframe)) != 0) {
520		/*
521		 * Something is wrong with the stack pointer.
522		 * ...Kill the process.
523		 */
524		sigexit(p, SIGILL);
525	};
526
527	regs[tESP] = (int)fp;
528	regs[tEIP] = (int)(((char *)PS_STRINGS) - *(p->p_sysent->sv_szsigcode));
529	regs[tEFLAGS] &= ~PSL_VM;
530	regs[tCS] = _ucodesel;
531	regs[tDS] = _udatasel;
532	regs[tES] = _udatasel;
533	regs[tSS] = _udatasel;
534}
535
536/*
537 * System call to cleanup state after a signal
538 * has been taken.  Reset signal mask and
539 * stack state from context left by sendsig (above).
540 * Return to previous pc and psl as specified by
541 * context left by sendsig. Check carefully to
542 * make sure that the user has not modified the
543 * state to gain improper privileges.
544 */
545int
546sigreturn(p, uap, retval)
547	struct proc *p;
548	struct sigreturn_args /* {
549		struct sigcontext *sigcntxp;
550	} */ *uap;
551	int *retval;
552{
553	register struct sigcontext *scp;
554	register struct sigframe *fp;
555	register int *regs = p->p_md.md_regs;
556	int eflags;
557
558	/*
559	 * (XXX old comment) regs[tESP] points to the return address.
560	 * The user scp pointer is above that.
561	 * The return address is faked in the signal trampoline code
562	 * for consistency.
563	 */
564	scp = uap->sigcntxp;
565	fp = (struct sigframe *)
566	     ((caddr_t)scp - offsetof(struct sigframe, sf_sc));
567
568	if (useracc((caddr_t)fp, sizeof (*fp), B_WRITE) == 0)
569		return(EFAULT);
570
571	/*
572	 * Don't allow users to change privileged or reserved flags.
573	 */
574#define	EFLAGS_SECURE(ef, oef)	((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
575	eflags = scp->sc_ps;
576	/*
577	 * XXX do allow users to change the privileged flag PSL_RF.  The
578	 * cpu sets PSL_RF in tf_eflags for faults.  Debuggers should
579	 * sometimes set it there too.  tf_eflags is kept in the signal
580	 * context during signal handling and there is no other place
581	 * to remember it, so the PSL_RF bit may be corrupted by the
582	 * signal handler without us knowing.  Corruption of the PSL_RF
583	 * bit at worst causes one more or one less debugger trap, so
584	 * allowing it is fairly harmless.
585	 */
586	if (!EFLAGS_SECURE(eflags & ~PSL_RF, regs[tEFLAGS] & ~PSL_RF)) {
587#ifdef DEBUG
588    		printf("sigreturn: eflags = 0x%x\n", eflags);
589#endif
590    		return(EINVAL);
591	}
592
593	/*
594	 * Don't allow users to load a valid privileged %cs.  Let the
595	 * hardware check for invalid selectors, excess privilege in
596	 * other selectors, invalid %eip's and invalid %esp's.
597	 */
598#define	CS_SECURE(cs)	(ISPL(cs) == SEL_UPL)
599	if (!CS_SECURE(scp->sc_cs)) {
600#ifdef DEBUG
601    		printf("sigreturn: cs = 0x%x\n", scp->sc_cs);
602#endif
603		trapsignal(p, SIGBUS, T_PROTFLT);
604		return(EINVAL);
605	}
606
607	/* restore scratch registers */
608	regs[tEAX] = scp->sc_eax;
609	regs[tEBX] = scp->sc_ebx;
610	regs[tECX] = scp->sc_ecx;
611	regs[tEDX] = scp->sc_edx;
612	regs[tESI] = scp->sc_esi;
613	regs[tEDI] = scp->sc_edi;
614	regs[tCS] = scp->sc_cs;
615	regs[tDS] = scp->sc_ds;
616	regs[tES] = scp->sc_es;
617	regs[tSS] = scp->sc_ss;
618	regs[tISP] = scp->sc_isp;
619
620	if (useracc((caddr_t)scp, sizeof (*scp), B_WRITE) == 0)
621		return(EINVAL);
622
623	if (scp->sc_onstack & 01)
624		p->p_sigacts->ps_sigstk.ss_flags |= SS_ONSTACK;
625	else
626		p->p_sigacts->ps_sigstk.ss_flags &= ~SS_ONSTACK;
627	p->p_sigmask = scp->sc_mask & ~sigcantmask;
628	regs[tEBP] = scp->sc_fp;
629	regs[tESP] = scp->sc_sp;
630	regs[tEIP] = scp->sc_pc;
631	regs[tEFLAGS] = eflags;
632	return(EJUSTRETURN);
633}
634
635/*
636 * Machine dependent boot() routine
637 *
638 * I haven't seen anything to put here yet
639 * Possibly some stuff might be grafted back here from boot()
640 */
641void
642cpu_boot(int howto)
643{
644}
645
646/*
647 * Shutdown the CPU as much as possible
648 */
649void
650cpu_halt(void)
651{
652	for (;;)
653		__asm__ ("hlt");
654}
655
656/*
657 * Clear registers on exec
658 */
659void
660setregs(p, entry, stack)
661	struct proc *p;
662	u_long entry;
663	u_long stack;
664{
665	int *regs = p->p_md.md_regs;
666
667#ifdef USER_LDT
668	struct pcb *pcb = &p->p_addr->u_pcb;
669
670	/* was i386_user_cleanup() in NetBSD */
671	if (pcb->pcb_ldt) {
672		if (pcb == curpcb)
673			lldt(GSEL(GUSERLDT_SEL, SEL_KPL));
674		kmem_free(kernel_map, (vm_offset_t)pcb->pcb_ldt,
675			pcb->pcb_ldt_len * sizeof(union descriptor));
676		pcb->pcb_ldt_len = (int)pcb->pcb_ldt = 0;
677 	}
678#endif
679
680	bzero(regs, sizeof(struct trapframe));
681	regs[tEIP] = entry;
682	regs[tESP] = stack;
683	regs[tEFLAGS] = PSL_USER | (regs[tEFLAGS] & PSL_T);
684	regs[tSS] = _udatasel;
685	regs[tDS] = _udatasel;
686	regs[tES] = _udatasel;
687	regs[tCS] = _ucodesel;
688
689	/*
690	 * Initialize the math emulator (if any) for the current process.
691	 * Actually, just clear the bit that says that the emulator has
692	 * been initialized.  Initialization is delayed until the process
693	 * traps to the emulator (if it is done at all) mainly because
694	 * emulators don't provide an entry point for initialization.
695	 */
696	p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP;
697
698	/*
699	 * Arrange to trap the next npx or `fwait' instruction (see npx.c
700	 * for why fwait must be trapped at least if there is an npx or an
701	 * emulator).  This is mainly to handle the case where npx0 is not
702	 * configured, since the npx routines normally set up the trap
703	 * otherwise.  It should be done only at boot time, but doing it
704	 * here allows modifying `npx_exists' for testing the emulator on
705	 * systems with an npx.
706	 */
707	load_cr0(rcr0() | CR0_MP | CR0_TS);
708
709#if NNPX > 0
710	/* Initialize the npx (if any) for the current process. */
711	npxinit(__INITIAL_NPXCW__);
712#endif
713}
714
715static int
716sysctl_machdep_adjkerntz SYSCTL_HANDLER_ARGS
717{
718	int error;
719	error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
720		req);
721	if (!error && req->newptr)
722		resettodr();
723	return (error);
724}
725
726SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
727	&adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
728
729SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
730	CTLFLAG_RW, &disable_rtc_set, 0, "");
731
732SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
733	CTLFLAG_RD, &bootinfo, bootinfo, "");
734
735SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
736	CTLFLAG_RW, &wall_cmos_clock, 0, "");
737
738/*
739 * Initialize 386 and configure to run kernel
740 */
741
742/*
743 * Initialize segments & interrupt table
744 */
745
746int currentldt;
747int _default_ldt;
748union descriptor gdt[NGDT];		/* global descriptor table */
749struct gate_descriptor idt[NIDT];	/* interrupt descriptor table */
750union descriptor ldt[NLDT];		/* local descriptor table */
751struct i386tss common_tss;
752
753static struct i386tss dblfault_tss;
754static char dblfault_stack[PAGE_SIZE];
755
756extern  struct user *proc0paddr;
757
758#ifdef TSS_IS_CACHED			/* cpu_switch helper */
759struct segment_descriptor *tssptr;
760int gsel_tss;
761#endif
762
763/* software prototypes -- in more palatable form */
764struct soft_segment_descriptor gdt_segs[] = {
765/* GNULL_SEL	0 Null Descriptor */
766{	0x0,			/* segment base address  */
767	0x0,			/* length */
768	0,			/* segment type */
769	0,			/* segment descriptor priority level */
770	0,			/* segment descriptor present */
771	0, 0,
772	0,			/* default 32 vs 16 bit size */
773	0  			/* limit granularity (byte/page units)*/ },
774/* GCODE_SEL	1 Code Descriptor for kernel */
775{	0x0,			/* segment base address  */
776	0xfffff,		/* length - all address space */
777	SDT_MEMERA,		/* segment type */
778	0,			/* segment descriptor priority level */
779	1,			/* segment descriptor present */
780	0, 0,
781	1,			/* default 32 vs 16 bit size */
782	1  			/* limit granularity (byte/page units)*/ },
783/* GDATA_SEL	2 Data Descriptor for kernel */
784{	0x0,			/* segment base address  */
785	0xfffff,		/* length - all address space */
786	SDT_MEMRWA,		/* segment type */
787	0,			/* segment descriptor priority level */
788	1,			/* segment descriptor present */
789	0, 0,
790	1,			/* default 32 vs 16 bit size */
791	1  			/* limit granularity (byte/page units)*/ },
792/* GLDT_SEL	3 LDT Descriptor */
793{	(int) ldt,		/* segment base address  */
794	sizeof(ldt)-1,		/* length - all address space */
795	SDT_SYSLDT,		/* segment type */
796	SEL_UPL,		/* segment descriptor priority level */
797	1,			/* segment descriptor present */
798	0, 0,
799	0,			/* unused - default 32 vs 16 bit size */
800	0  			/* limit granularity (byte/page units)*/ },
801/* GTGATE_SEL	4 Null Descriptor - Placeholder */
802{	0x0,			/* segment base address  */
803	0x0,			/* length - all address space */
804	0,			/* segment type */
805	0,			/* segment descriptor priority level */
806	0,			/* segment descriptor present */
807	0, 0,
808	0,			/* default 32 vs 16 bit size */
809	0  			/* limit granularity (byte/page units)*/ },
810/* GPANIC_SEL	5 Panic Tss Descriptor */
811{	(int) &dblfault_tss,	/* segment base address  */
812	sizeof(struct i386tss)-1,/* length - all address space */
813	SDT_SYS386TSS,		/* segment type */
814	0,			/* segment descriptor priority level */
815	1,			/* segment descriptor present */
816	0, 0,
817	0,			/* unused - default 32 vs 16 bit size */
818	0  			/* limit granularity (byte/page units)*/ },
819/* GPROC0_SEL	6 Proc 0 Tss Descriptor */
820{	(int) &common_tss,	/* segment base address */
821	sizeof(struct i386tss)-1,/* length - all address space */
822	SDT_SYS386TSS,		/* segment type */
823	0,			/* segment descriptor priority level */
824	1,			/* segment descriptor present */
825	0, 0,
826	0,			/* unused - default 32 vs 16 bit size */
827	0  			/* limit granularity (byte/page units)*/ },
828/* GUSERLDT_SEL	7 User LDT Descriptor per process */
829{	(int) ldt,		/* segment base address  */
830	(512 * sizeof(union descriptor)-1),		/* length */
831	SDT_SYSLDT,		/* segment type */
832	0,			/* segment descriptor priority level */
833	1,			/* segment descriptor present */
834	0, 0,
835	0,			/* unused - default 32 vs 16 bit size */
836	0  			/* limit granularity (byte/page units)*/ },
837/* GAPMCODE32_SEL 8 APM BIOS 32-bit interface (32bit Code) */
838{	0,			/* segment base address (overwritten by APM)  */
839	0xfffff,		/* length */
840	SDT_MEMERA,		/* segment type */
841	0,			/* segment descriptor priority level */
842	1,			/* segment descriptor present */
843	0, 0,
844	1,			/* default 32 vs 16 bit size */
845	1  			/* limit granularity (byte/page units)*/ },
846/* GAPMCODE16_SEL 9 APM BIOS 32-bit interface (16bit Code) */
847{	0,			/* segment base address (overwritten by APM)  */
848	0xfffff,		/* length */
849	SDT_MEMERA,		/* segment type */
850	0,			/* segment descriptor priority level */
851	1,			/* segment descriptor present */
852	0, 0,
853	0,			/* default 32 vs 16 bit size */
854	1  			/* limit granularity (byte/page units)*/ },
855/* GAPMDATA_SEL	10 APM BIOS 32-bit interface (Data) */
856{	0,			/* segment base address (overwritten by APM) */
857	0xfffff,		/* length */
858	SDT_MEMRWA,		/* segment type */
859	0,			/* segment descriptor priority level */
860	1,			/* segment descriptor present */
861	0, 0,
862	1,			/* default 32 vs 16 bit size */
863	1  			/* limit granularity (byte/page units)*/ },
864};
865
866static struct soft_segment_descriptor ldt_segs[] = {
867	/* Null Descriptor - overwritten by call gate */
868{	0x0,			/* segment base address  */
869	0x0,			/* length - all address space */
870	0,			/* segment type */
871	0,			/* segment descriptor priority level */
872	0,			/* segment descriptor present */
873	0, 0,
874	0,			/* default 32 vs 16 bit size */
875	0  			/* limit granularity (byte/page units)*/ },
876	/* Null Descriptor - overwritten by call gate */
877{	0x0,			/* segment base address  */
878	0x0,			/* length - all address space */
879	0,			/* segment type */
880	0,			/* segment descriptor priority level */
881	0,			/* segment descriptor present */
882	0, 0,
883	0,			/* default 32 vs 16 bit size */
884	0  			/* limit granularity (byte/page units)*/ },
885	/* Null Descriptor - overwritten by call gate */
886{	0x0,			/* segment base address  */
887	0x0,			/* length - all address space */
888	0,			/* segment type */
889	0,			/* segment descriptor priority level */
890	0,			/* segment descriptor present */
891	0, 0,
892	0,			/* default 32 vs 16 bit size */
893	0  			/* limit granularity (byte/page units)*/ },
894	/* Code Descriptor for user */
895{	0x0,			/* segment base address  */
896	0xfffff,		/* length - all address space */
897	SDT_MEMERA,		/* segment type */
898	SEL_UPL,		/* segment descriptor priority level */
899	1,			/* segment descriptor present */
900	0, 0,
901	1,			/* default 32 vs 16 bit size */
902	1  			/* limit granularity (byte/page units)*/ },
903	/* Data Descriptor for user */
904{	0x0,			/* segment base address  */
905	0xfffff,		/* length - all address space */
906	SDT_MEMRWA,		/* segment type */
907	SEL_UPL,		/* segment descriptor priority level */
908	1,			/* segment descriptor present */
909	0, 0,
910	1,			/* default 32 vs 16 bit size */
911	1  			/* limit granularity (byte/page units)*/ },
912};
913
914void
915setidt(idx, func, typ, dpl, selec)
916	int idx;
917	inthand_t *func;
918	int typ;
919	int dpl;
920	int selec;
921{
922	struct gate_descriptor *ip = idt + idx;
923
924	ip->gd_looffset = (int)func;
925	ip->gd_selector = selec;
926	ip->gd_stkcpy = 0;
927	ip->gd_xx = 0;
928	ip->gd_type = typ;
929	ip->gd_dpl = dpl;
930	ip->gd_p = 1;
931	ip->gd_hioffset = ((int)func)>>16 ;
932}
933
934#define	IDTVEC(name)	__CONCAT(X,name)
935
936extern inthand_t
937	IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
938	IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
939	IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
940	IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
941	IDTVEC(syscall), IDTVEC(int0x80_syscall);
942
943void
944sdtossd(sd, ssd)
945	struct segment_descriptor *sd;
946	struct soft_segment_descriptor *ssd;
947{
948	ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
949	ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
950	ssd->ssd_type  = sd->sd_type;
951	ssd->ssd_dpl   = sd->sd_dpl;
952	ssd->ssd_p     = sd->sd_p;
953	ssd->ssd_def32 = sd->sd_def32;
954	ssd->ssd_gran  = sd->sd_gran;
955}
956
957void
958init386(first)
959	int first;
960{
961	int x;
962	unsigned biosbasemem, biosextmem;
963	struct gate_descriptor *gdp;
964#ifndef TSS_IS_CACHED
965	int gsel_tss;
966#endif
967	struct isa_device *idp;
968	/* table descriptors - used to load tables by microp */
969	struct region_descriptor r_gdt, r_idt;
970	int	pagesinbase, pagesinext;
971	int	target_page, pa_indx;
972	int	off;
973
974	proc0.p_addr = proc0paddr;
975
976	atdevbase = ISA_HOLE_START + KERNBASE;
977
978	/*
979	 * Initialize the console before we print anything out.
980	 */
981	cninit();
982
983	/*
984	 * make gdt memory segments, the code segment goes up to end of the
985	 * page with etext in it, the data segment goes to the end of
986	 * the address space
987	 */
988	/*
989	 * XXX text protection is temporarily (?) disabled.  The limit was
990	 * i386_btop(round_page(etext)) - 1.
991	 */
992	gdt_segs[GCODE_SEL].ssd_limit = i386_btop(0) - 1;
993	gdt_segs[GDATA_SEL].ssd_limit = i386_btop(0) - 1;
994	for (x = 0; x < NGDT; x++)
995		ssdtosd(&gdt_segs[x], &gdt[x].sd);
996
997	/* make ldt memory segments */
998	/*
999	 * The data segment limit must not cover the user area because we
1000	 * don't want the user area to be writable in copyout() etc. (page
1001	 * level protection is lost in kernel mode on 386's).  Also, we
1002	 * don't want the user area to be writable directly (page level
1003	 * protection of the user area is not available on 486's with
1004	 * CR0_WP set, because there is no user-read/kernel-write mode).
1005	 *
1006	 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max.  And it
1007	 * should be spelled ...MAX_USER...
1008	 */
1009#define VM_END_USER_RW_ADDRESS	VM_MAXUSER_ADDRESS
1010	/*
1011	 * The code segment limit has to cover the user area until we move
1012	 * the signal trampoline out of the user area.  This is safe because
1013	 * the code segment cannot be written to directly.
1014	 */
1015#define VM_END_USER_R_ADDRESS	(VM_END_USER_RW_ADDRESS + UPAGES * PAGE_SIZE)
1016	ldt_segs[LUCODE_SEL].ssd_limit = i386_btop(VM_END_USER_R_ADDRESS) - 1;
1017	ldt_segs[LUDATA_SEL].ssd_limit = i386_btop(VM_END_USER_RW_ADDRESS) - 1;
1018	/* Note. eventually want private ldts per process */
1019	for (x = 0; x < NLDT; x++)
1020		ssdtosd(&ldt_segs[x], &ldt[x].sd);
1021
1022	/* exceptions */
1023	for (x = 0; x < NIDT; x++)
1024		setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1025	setidt(0, &IDTVEC(div),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1026	setidt(1, &IDTVEC(dbg),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1027	setidt(2, &IDTVEC(nmi),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1028 	setidt(3, &IDTVEC(bpt),  SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1029	setidt(4, &IDTVEC(ofl),  SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1030	setidt(5, &IDTVEC(bnd),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1031	setidt(6, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1032	setidt(7, &IDTVEC(dna),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1033	setidt(8, 0,  SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1034	setidt(9, &IDTVEC(fpusegm),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1035	setidt(10, &IDTVEC(tss),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1036	setidt(11, &IDTVEC(missing),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1037	setidt(12, &IDTVEC(stk),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1038	setidt(13, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1039	setidt(14, &IDTVEC(page),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1040	setidt(15, &IDTVEC(rsvd),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1041	setidt(16, &IDTVEC(fpu),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1042	setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1043	setidt(18, &IDTVEC(mchk),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1044 	setidt(0x80, &IDTVEC(int0x80_syscall),
1045			SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1046
1047#include	"isa.h"
1048#if	NISA >0
1049	isa_defaultirq();
1050#endif
1051	rand_initialize();
1052
1053	r_gdt.rd_limit = sizeof(gdt) - 1;
1054	r_gdt.rd_base =  (int) gdt;
1055	lgdt(&r_gdt);
1056
1057	r_idt.rd_limit = sizeof(idt) - 1;
1058	r_idt.rd_base = (int) idt;
1059	lidt(&r_idt);
1060
1061	_default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1062	lldt(_default_ldt);
1063	currentldt = _default_ldt;
1064
1065#ifdef DDB
1066	kdb_init();
1067	if (boothowto & RB_KDB)
1068		Debugger("Boot flags requested debugger");
1069#endif
1070
1071	finishidentcpu();	/* Final stage of CPU initialization */
1072	setidt(6, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1073	initializecpu();	/* Initialize CPU registers */
1074
1075	/* Use BIOS values stored in RTC CMOS RAM, since probing
1076	 * breaks certain 386 AT relics.
1077	 */
1078	biosbasemem = rtcin(RTC_BASELO)+ (rtcin(RTC_BASEHI)<<8);
1079	biosextmem = rtcin(RTC_EXTLO)+ (rtcin(RTC_EXTHI)<<8);
1080
1081	/*
1082	 * If BIOS tells us that it has more than 640k in the basemem,
1083	 *	don't believe it - set it to 640k.
1084	 */
1085	if (biosbasemem > 640) {
1086		printf("Preposterous RTC basemem of %dK, truncating to 640K\n",
1087		       biosbasemem);
1088		biosbasemem = 640;
1089	}
1090	if (bootinfo.bi_memsizes_valid && bootinfo.bi_basemem > 640) {
1091		printf("Preposterous BIOS basemem of %dK, truncating to 640K\n",
1092		       bootinfo.bi_basemem);
1093		bootinfo.bi_basemem = 640;
1094	}
1095
1096	/*
1097	 * Warn if the official BIOS interface disagrees with the RTC
1098	 * interface used above about the amount of base memory or the
1099	 * amount of extended memory.  Prefer the BIOS value for the base
1100	 * memory.  This is necessary for machines that `steal' base
1101	 * memory for use as BIOS memory, at least if we are going to use
1102	 * the BIOS for apm.  Prefer the RTC value for extended memory.
1103	 * Eventually the hackish interface shouldn't even be looked at.
1104	 */
1105	if (bootinfo.bi_memsizes_valid) {
1106		if (bootinfo.bi_basemem != biosbasemem) {
1107			vm_offset_t pa;
1108
1109			printf(
1110	"BIOS basemem (%ldK) != RTC basemem (%dK), setting to BIOS value\n",
1111			       bootinfo.bi_basemem, biosbasemem);
1112			biosbasemem = bootinfo.bi_basemem;
1113
1114			/*
1115			 * XXX if biosbasemem is now < 640, there is `hole'
1116			 * between the end of base memory and the start of
1117			 * ISA memory.  The hole may be empty or it may
1118			 * contain BIOS code or data.  Map it read/write so
1119			 * that the BIOS can write to it.  (Memory from 0 to
1120			 * the physical end of the kernel is mapped read-only
1121			 * to begin with and then parts of it are remapped.
1122			 * The parts that aren't remapped form holes that
1123			 * remain read-only and are unused by the kernel.
1124			 * The base memory area is below the physical end of
1125			 * the kernel and right now forms a read-only hole.
1126			 * The part of it from 0 to
1127			 * (trunc_page(biosbasemem * 1024) - 1) will be
1128			 * remapped and used by the kernel later.)
1129			 *
1130			 * This code is similar to the code used in
1131			 * pmap_mapdev, but since no memory needs to be
1132			 * allocated we simply change the mapping.
1133			 */
1134			for (pa = trunc_page(biosbasemem * 1024);
1135			     pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1136				unsigned *pte;
1137
1138				pte = (unsigned *)vtopte(pa + KERNBASE);
1139				*pte = pa | PG_RW | PG_V;
1140			}
1141		}
1142		if (bootinfo.bi_extmem != biosextmem)
1143			printf("BIOS extmem (%ldK) != RTC extmem (%dK)\n",
1144			       bootinfo.bi_extmem, biosextmem);
1145	}
1146
1147	pagesinbase = biosbasemem * 1024 / PAGE_SIZE;
1148	pagesinext = biosextmem * 1024 / PAGE_SIZE;
1149
1150	/*
1151	 * Special hack for chipsets that still remap the 384k hole when
1152	 *	there's 16MB of memory - this really confuses people that
1153	 *	are trying to use bus mastering ISA controllers with the
1154	 *	"16MB limit"; they only have 16MB, but the remapping puts
1155	 *	them beyond the limit.
1156	 */
1157	/*
1158	 * If extended memory is between 15-16MB (16-17MB phys address range),
1159	 *	chop it to 15MB.
1160	 */
1161	if ((pagesinext > 3840) && (pagesinext < 4096))
1162		pagesinext = 3840;
1163
1164	/*
1165	 * Maxmem isn't the "maximum memory", it's one larger than the
1166	 * highest page of the physical address space.  It should be
1167	 * called something like "Maxphyspage".
1168	 */
1169	Maxmem = pagesinext + 0x100000/PAGE_SIZE;
1170
1171#ifdef MAXMEM
1172	Maxmem = MAXMEM/4;
1173#endif
1174
1175#if NNPX > 0
1176	idp = find_isadev(isa_devtab_null, &npxdriver, 0);
1177	if (idp != NULL && idp->id_msize != 0)
1178		Maxmem = idp->id_msize / 4;
1179#endif
1180
1181	/* call pmap initialization to make new kernel address space */
1182	pmap_bootstrap (first, 0);
1183
1184	/*
1185	 * Size up each available chunk of physical memory.
1186	 */
1187
1188	/*
1189	 * We currently don't bother testing base memory.
1190	 * XXX  ...but we probably should.
1191	 */
1192	pa_indx = 0;
1193	badpages = 0;
1194	if (pagesinbase > 1) {
1195		phys_avail[pa_indx++] = PAGE_SIZE;	/* skip first page of memory */
1196		phys_avail[pa_indx] = ptoa(pagesinbase);/* memory up to the ISA hole */
1197		physmem = pagesinbase - 1;
1198	} else {
1199		/* point at first chunk end */
1200		pa_indx++;
1201	}
1202
1203	for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) {
1204		int tmp, page_bad = FALSE;
1205
1206		/*
1207		 * map page into kernel: valid, read/write, non-cacheable
1208		 */
1209		*(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page;
1210		invltlb();
1211
1212		tmp = *(int *)CADDR1;
1213		/*
1214		 * Test for alternating 1's and 0's
1215		 */
1216		*(volatile int *)CADDR1 = 0xaaaaaaaa;
1217		if (*(volatile int *)CADDR1 != 0xaaaaaaaa) {
1218			page_bad = TRUE;
1219		}
1220		/*
1221		 * Test for alternating 0's and 1's
1222		 */
1223		*(volatile int *)CADDR1 = 0x55555555;
1224		if (*(volatile int *)CADDR1 != 0x55555555) {
1225			page_bad = TRUE;
1226		}
1227		/*
1228		 * Test for all 1's
1229		 */
1230		*(volatile int *)CADDR1 = 0xffffffff;
1231		if (*(volatile int *)CADDR1 != 0xffffffff) {
1232			page_bad = TRUE;
1233		}
1234		/*
1235		 * Test for all 0's
1236		 */
1237		*(volatile int *)CADDR1 = 0x0;
1238		if (*(volatile int *)CADDR1 != 0x0) {
1239			/*
1240			 * test of page failed
1241			 */
1242			page_bad = TRUE;
1243		}
1244		/*
1245		 * Restore original value.
1246		 */
1247		*(int *)CADDR1 = tmp;
1248
1249		/*
1250		 * Adjust array of valid/good pages.
1251		 */
1252		if (page_bad == FALSE) {
1253			/*
1254			 * If this good page is a continuation of the
1255			 * previous set of good pages, then just increase
1256			 * the end pointer. Otherwise start a new chunk.
1257			 * Note that "end" points one higher than end,
1258			 * making the range >= start and < end.
1259			 */
1260			if (phys_avail[pa_indx] == target_page) {
1261				phys_avail[pa_indx] += PAGE_SIZE;
1262			} else {
1263				pa_indx++;
1264				if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1265					printf("Too many holes in the physical address space, giving up\n");
1266					pa_indx--;
1267					break;
1268				}
1269				phys_avail[pa_indx++] = target_page;	/* start */
1270				phys_avail[pa_indx] = target_page + PAGE_SIZE;	/* end */
1271			}
1272			physmem++;
1273		} else {
1274			badpages++;
1275			page_bad = FALSE;
1276		}
1277	}
1278
1279	*(int *)CMAP1 = 0;
1280	invltlb();
1281
1282	/*
1283	 * XXX
1284	 * The last chunk must contain at least one page plus the message
1285	 * buffer to avoid complicating other code (message buffer address
1286	 * calculation, etc.).
1287	 */
1288	while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1289	    round_page(sizeof(struct msgbuf)) >= phys_avail[pa_indx]) {
1290		physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1291		phys_avail[pa_indx--] = 0;
1292		phys_avail[pa_indx--] = 0;
1293	}
1294
1295	Maxmem = atop(phys_avail[pa_indx]);
1296
1297	/* Trim off space for the message buffer. */
1298	phys_avail[pa_indx] -= round_page(sizeof(struct msgbuf));
1299
1300	avail_end = phys_avail[pa_indx];
1301
1302	/* now running on new page tables, configured,and u/iom is accessible */
1303
1304	/* Map the message buffer. */
1305	for (off = 0; off < round_page(sizeof(struct msgbuf)); off += PAGE_SIZE)
1306		pmap_enter(kernel_pmap, (vm_offset_t)msgbufp + off,
1307			   avail_end + off, VM_PROT_ALL, TRUE);
1308	msgbufmapped = 1;
1309
1310	/* make an initial tss so cpu can get interrupt stack on syscall! */
1311	common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE;
1312	common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1313	common_tss.tss_ioopt = (sizeof common_tss) << 16;
1314	gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1315	ltr(gsel_tss);
1316
1317	dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1318	    dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1319	dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1320	    dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1321	dblfault_tss.tss_cr3 = IdlePTD;
1322	dblfault_tss.tss_eip = (int) dblfault_handler;
1323	dblfault_tss.tss_eflags = PSL_KERNEL;
1324	dblfault_tss.tss_ds = dblfault_tss.tss_es = dblfault_tss.tss_fs =
1325	    dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1326	dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1327	dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1328
1329#ifdef TSS_IS_CACHED			/* cpu_switch helper */
1330	tssptr = &gdt[GPROC0_SEL].sd;
1331#endif
1332
1333	/* make a call gate to reenter kernel with */
1334	gdp = &ldt[LSYS5CALLS_SEL].gd;
1335
1336	x = (int) &IDTVEC(syscall);
1337	gdp->gd_looffset = x++;
1338	gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1339	gdp->gd_stkcpy = 1;
1340	gdp->gd_type = SDT_SYS386CGT;
1341	gdp->gd_dpl = SEL_UPL;
1342	gdp->gd_p = 1;
1343	gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1344
1345	/* XXX does this work? */
1346	ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1347
1348	/* transfer to user mode */
1349
1350	_ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1351	_udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1352
1353	/* setup proc 0's pcb */
1354	proc0.p_addr->u_pcb.pcb_flags = 0;
1355	proc0.p_addr->u_pcb.pcb_cr3 = IdlePTD;
1356}
1357
1358/*
1359 * The registers are in the frame; the frame is in the user area of
1360 * the process in question; when the process is active, the registers
1361 * are in "the kernel stack"; when it's not, they're still there, but
1362 * things get flipped around.  So, since p->p_md.md_regs is the whole address
1363 * of the register set, take its offset from the kernel stack, and
1364 * index into the user block.  Don't you just *love* virtual memory?
1365 * (I'm starting to think seymour is right...)
1366 */
1367#define	TF_REGP(p)	((struct trapframe *)(p)->p_md.md_regs)
1368
1369int
1370ptrace_set_pc(p, addr)
1371	struct proc *p;
1372	unsigned int addr;
1373{
1374	TF_REGP(p)->tf_eip = addr;
1375	return (0);
1376}
1377
1378int
1379ptrace_single_step(p)
1380	struct proc *p;
1381{
1382	TF_REGP(p)->tf_eflags |= PSL_T;
1383	return (0);
1384}
1385
1386int ptrace_write_u(p, off, data)
1387	struct proc *p;
1388	vm_offset_t off;
1389	int data;
1390{
1391	struct trapframe frame_copy;
1392	vm_offset_t min;
1393	struct trapframe *tp;
1394
1395	/*
1396	 * Privileged kernel state is scattered all over the user area.
1397	 * Only allow write access to parts of regs and to fpregs.
1398	 */
1399	min = (char *)p->p_md.md_regs - (char *)p->p_addr;
1400	if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
1401		tp = TF_REGP(p);
1402		frame_copy = *tp;
1403		*(int *)((char *)&frame_copy + (off - min)) = data;
1404		if (!EFLAGS_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
1405		    !CS_SECURE(frame_copy.tf_cs))
1406			return (EINVAL);
1407		*(int*)((char *)p->p_addr + off) = data;
1408		return (0);
1409	}
1410	min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_savefpu);
1411	if (off >= min && off <= min + sizeof(struct save87) - sizeof(int)) {
1412		*(int*)((char *)p->p_addr + off) = data;
1413		return (0);
1414	}
1415	return (EFAULT);
1416}
1417
1418int
1419fill_regs(p, regs)
1420	struct proc *p;
1421	struct reg *regs;
1422{
1423	struct trapframe *tp;
1424
1425	tp = TF_REGP(p);
1426	regs->r_es = tp->tf_es;
1427	regs->r_ds = tp->tf_ds;
1428	regs->r_edi = tp->tf_edi;
1429	regs->r_esi = tp->tf_esi;
1430	regs->r_ebp = tp->tf_ebp;
1431	regs->r_ebx = tp->tf_ebx;
1432	regs->r_edx = tp->tf_edx;
1433	regs->r_ecx = tp->tf_ecx;
1434	regs->r_eax = tp->tf_eax;
1435	regs->r_eip = tp->tf_eip;
1436	regs->r_cs = tp->tf_cs;
1437	regs->r_eflags = tp->tf_eflags;
1438	regs->r_esp = tp->tf_esp;
1439	regs->r_ss = tp->tf_ss;
1440	return (0);
1441}
1442
1443int
1444set_regs(p, regs)
1445	struct proc *p;
1446	struct reg *regs;
1447{
1448	struct trapframe *tp;
1449
1450	tp = TF_REGP(p);
1451	if (!EFLAGS_SECURE(regs->r_eflags, tp->tf_eflags) ||
1452	    !CS_SECURE(regs->r_cs))
1453		return (EINVAL);
1454	tp->tf_es = regs->r_es;
1455	tp->tf_ds = regs->r_ds;
1456	tp->tf_edi = regs->r_edi;
1457	tp->tf_esi = regs->r_esi;
1458	tp->tf_ebp = regs->r_ebp;
1459	tp->tf_ebx = regs->r_ebx;
1460	tp->tf_edx = regs->r_edx;
1461	tp->tf_ecx = regs->r_ecx;
1462	tp->tf_eax = regs->r_eax;
1463	tp->tf_eip = regs->r_eip;
1464	tp->tf_cs = regs->r_cs;
1465	tp->tf_eflags = regs->r_eflags;
1466	tp->tf_esp = regs->r_esp;
1467	tp->tf_ss = regs->r_ss;
1468	return (0);
1469}
1470
1471#ifndef DDB
1472void
1473Debugger(const char *msg)
1474{
1475	printf("Debugger(\"%s\") called.\n", msg);
1476}
1477#endif /* no DDB */
1478
1479#include <sys/disklabel.h>
1480
1481/*
1482 * Determine the size of the transfer, and make sure it is
1483 * within the boundaries of the partition. Adjust transfer
1484 * if needed, and signal errors or early completion.
1485 */
1486int
1487bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
1488{
1489        struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
1490        int labelsect = lp->d_partitions[0].p_offset;
1491        int maxsz = p->p_size,
1492                sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
1493
1494        /* overwriting disk label ? */
1495        /* XXX should also protect bootstrap in first 8K */
1496        if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
1497#if LABELSECTOR != 0
1498            bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
1499#endif
1500            (bp->b_flags & B_READ) == 0 && wlabel == 0) {
1501                bp->b_error = EROFS;
1502                goto bad;
1503        }
1504
1505#if     defined(DOSBBSECTOR) && defined(notyet)
1506        /* overwriting master boot record? */
1507        if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
1508            (bp->b_flags & B_READ) == 0 && wlabel == 0) {
1509                bp->b_error = EROFS;
1510                goto bad;
1511        }
1512#endif
1513
1514        /* beyond partition? */
1515        if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
1516                /* if exactly at end of disk, return an EOF */
1517                if (bp->b_blkno == maxsz) {
1518                        bp->b_resid = bp->b_bcount;
1519                        return(0);
1520                }
1521                /* or truncate if part of it fits */
1522                sz = maxsz - bp->b_blkno;
1523                if (sz <= 0) {
1524                        bp->b_error = EINVAL;
1525                        goto bad;
1526                }
1527                bp->b_bcount = sz << DEV_BSHIFT;
1528        }
1529
1530        bp->b_pblkno = bp->b_blkno + p->p_offset;
1531        return(1);
1532
1533bad:
1534        bp->b_flags |= B_ERROR;
1535        return(-1);
1536}
1537
1538#ifdef DDB
1539
1540/*
1541 * Provide inb() and outb() as functions.  They are normally only
1542 * available as macros calling inlined functions, thus cannot be
1543 * called inside DDB.
1544 *
1545 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
1546 */
1547
1548#undef inb
1549#undef outb
1550
1551/* silence compiler warnings */
1552u_char inb(u_int);
1553void outb(u_int, u_char);
1554
1555u_char
1556inb(u_int port)
1557{
1558	u_char	data;
1559	/*
1560	 * We use %%dx and not %1 here because i/o is done at %dx and not at
1561	 * %edx, while gcc generates inferior code (movw instead of movl)
1562	 * if we tell it to load (u_short) port.
1563	 */
1564	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
1565	return (data);
1566}
1567
1568void
1569outb(u_int port, u_char data)
1570{
1571	u_char	al;
1572	/*
1573	 * Use an unnecessary assignment to help gcc's register allocator.
1574	 * This make a large difference for gcc-1.40 and a tiny difference
1575	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
1576	 * best results.  gcc-2.6.0 can't handle this.
1577	 */
1578	al = data;
1579	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
1580}
1581
1582#endif /* DDB */
1583