machdep.c revision 204309
1218887Sdim/*- 2218887Sdim * Copyright (c) 2003 Peter Wemm. 3218887Sdim * Copyright (c) 1992 Terrence R. Lambert. 4218887Sdim * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5218887Sdim * All rights reserved. 6218887Sdim * 7218887Sdim * This code is derived from software contributed to Berkeley by 8218887Sdim * William Jolitz. 9218887Sdim * 10218887Sdim * Redistribution and use in source and binary forms, with or without 11218887Sdim * modification, are permitted provided that the following conditions 12218887Sdim * are met: 13218887Sdim * 1. Redistributions of source code must retain the above copyright 14243830Sdim * notice, this list of conditions and the following disclaimer. 15276479Sdim * 2. Redistributions in binary form must reproduce the above copyright 16218887Sdim * notice, this list of conditions and the following disclaimer in the 17243830Sdim * documentation and/or other materials provided with the distribution. 18218887Sdim * 3. All advertising materials mentioning features or use of this software 19249423Sdim * must display the following acknowledgement: 20296417Sdim * This product includes software developed by the University of 21249423Sdim * California, Berkeley and its contributors. 22218887Sdim * 4. Neither the name of the University nor the names of its contributors 23218887Sdim * may be used to endorse or promote products derived from this software 24249423Sdim * without specific prior written permission. 25218887Sdim * 26218887Sdim * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27276479Sdim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28218887Sdim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29218887Sdim * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30226633Sdim * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31218887Sdim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32218887Sdim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33234353Sdim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34218887Sdim * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35249423Sdim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36249423Sdim * SUCH DAMAGE. 37249423Sdim * 38239462Sdim * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39218887Sdim */ 40288943Sdim 41218887Sdim#include <sys/cdefs.h> 42234353Sdim__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 204309 2010-02-25 14:13:39Z attilio $"); 43276479Sdim 44276479Sdim#include "opt_atalk.h" 45280031Sdim#include "opt_atpic.h" 46218887Sdim#include "opt_compat.h" 47218887Sdim#include "opt_cpu.h" 48218887Sdim#include "opt_ddb.h" 49276479Sdim#include "opt_inet.h" 50276479Sdim#include "opt_ipx.h" 51276479Sdim#include "opt_isa.h" 52276479Sdim#include "opt_kstack_pages.h" 53276479Sdim#include "opt_maxmem.h" 54234353Sdim#include "opt_msgbuf.h" 55234353Sdim#include "opt_perfmon.h" 56218887Sdim#include "opt_sched.h" 57218887Sdim 58218887Sdim#include <sys/param.h> 59249423Sdim#include <sys/proc.h> 60249423Sdim#include <sys/systm.h> 61218887Sdim#include <sys/bio.h> 62239462Sdim#include <sys/buf.h> 63249423Sdim#include <sys/bus.h> 64249423Sdim#include <sys/callout.h> 65234353Sdim#include <sys/cons.h> 66218887Sdim#include <sys/cpu.h> 67249423Sdim#include <sys/eventhandler.h> 68249423Sdim#include <sys/exec.h> 69239462Sdim#include <sys/imgact.h> 70239462Sdim#include <sys/kdb.h> 71249423Sdim#include <sys/kernel.h> 72249423Sdim#include <sys/ktr.h> 73218887Sdim#include <sys/linker.h> 74218887Sdim#include <sys/lock.h> 75249423Sdim#include <sys/malloc.h> 76249423Sdim#include <sys/memrange.h> 77239462Sdim#include <sys/msgbuf.h> 78239462Sdim#include <sys/mutex.h> 79249423Sdim#include <sys/pcpu.h> 80249423Sdim#include <sys/ptrace.h> 81234353Sdim#include <sys/reboot.h> 82234353Sdim#include <sys/sched.h> 83226633Sdim#include <sys/signalvar.h> 84218887Sdim#include <sys/sysctl.h> 85218887Sdim#include <sys/sysent.h> 86218887Sdim#include <sys/sysproto.h> 87218887Sdim#include <sys/ucontext.h> 88218887Sdim#include <sys/vmmeter.h> 89218887Sdim 90218887Sdim#include <vm/vm.h> 91218887Sdim#include <vm/vm_extern.h> 92218887Sdim#include <vm/vm_kern.h> 93218887Sdim#include <vm/vm_page.h> 94218887Sdim#include <vm/vm_map.h> 95218887Sdim#include <vm/vm_object.h> 96218887Sdim#include <vm/vm_pager.h> 97218887Sdim#include <vm/vm_param.h> 98218887Sdim 99218887Sdim#ifdef DDB 100218887Sdim#ifndef KDB 101218887Sdim#error KDB must be enabled in order for DDB to work! 102218887Sdim#endif 103218887Sdim#include <ddb/ddb.h> 104239462Sdim#include <ddb/db_sym.h> 105239462Sdim#endif 106239462Sdim 107239462Sdim#include <net/netisr.h> 108218887Sdim 109288943Sdim#include <machine/clock.h> 110288943Sdim#include <machine/cpu.h> 111288943Sdim#include <machine/cputypes.h> 112276479Sdim#include <machine/intr_machdep.h> 113239462Sdim#include <machine/mca.h> 114218887Sdim#include <machine/md_var.h> 115288943Sdim#include <machine/metadata.h> 116288943Sdim#include <machine/pc/bios.h> 117276479Sdim#include <machine/pcb.h> 118239462Sdim#include <machine/proc.h> 119218887Sdim#include <machine/reg.h> 120218887Sdim#include <machine/sigframe.h> 121218887Sdim#include <machine/specialreg.h> 122218887Sdim#ifdef PERFMON 123218887Sdim#include <machine/perfmon.h> 124218887Sdim#endif 125218887Sdim#include <machine/tss.h> 126218887Sdim#ifdef SMP 127309124Sdim#include <machine/smp.h> 128218887Sdim#endif 129218887Sdim 130218887Sdim#ifdef DEV_ATPIC 131218887Sdim#include <x86/isa/icu.h> 132218887Sdim#else 133218887Sdim#include <machine/apicvar.h> 134218887Sdim#endif 135218887Sdim 136218887Sdim#include <isa/isareg.h> 137226633Sdim#include <isa/rtc.h> 138218887Sdim 139218887Sdim/* Sanity check for __curthread() */ 140218887SdimCTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 141234353Sdim 142261991Sdimextern u_int64_t hammer_time(u_int64_t, u_int64_t); 143261991Sdim 144218887Sdimextern void printcpuinfo(void); /* XXX header file */ 145218887Sdimextern void identify_cpu(void); 146218887Sdimextern void panicifcpuunsupported(void); 147218887Sdim 148218887Sdim#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 149218887Sdim#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 150261991Sdim 151261991Sdimstatic void cpu_startup(void *); 152261991Sdimstatic void get_fpcontext(struct thread *td, mcontext_t *mcp); 153261991Sdimstatic int set_fpcontext(struct thread *td, const mcontext_t *mcp); 154218887SdimSYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 155218887Sdim 156218887Sdim#ifdef DDB 157218887Sdimextern vm_offset_t ksym_start, ksym_end; 158288943Sdim#endif 159218887Sdim 160218887Sdimstruct msgbuf *msgbufp; 161239462Sdim 162218887Sdim/* Intel ICH registers */ 163239462Sdim#define ICH_PMBASE 0x400 164218887Sdim#define ICH_SMI_EN ICH_PMBASE + 0x30 165218887Sdim 166218887Sdimint _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel; 167288943Sdim 168288943Sdimint cold = 1; 169288943Sdim 170288943Sdimlong Maxmem = 0; 171218887Sdimlong realmem = 0; 172218887Sdim 173218887Sdim/* 174296417Sdim * The number of PHYSMAP entries must be one less than the number of 175234353Sdim * PHYSSEG entries because the PHYSMAP entry that spans the largest 176276479Sdim * physical address that is accessible by ISA DMA is split into two 177276479Sdim * PHYSSEG entries. 178218887Sdim */ 179218887Sdim#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 180218887Sdim 181218887Sdimvm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 182218887Sdimvm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 183218887Sdim 184218887Sdim/* must be 2 less so 0 0 can signal end of chunks */ 185218887Sdim#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 186218887Sdim#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 187218887Sdim 188243830Sdimstruct kva_md_info kmi; 189218887Sdim 190296417Sdimstatic struct trapframe proc0_tf; 191218887Sdimstruct region_descriptor r_gdt, r_idt; 192218887Sdim 193218887Sdimstruct pcpu __pcpu[MAXCPU]; 194218887Sdim 195218887Sdimstruct mtx icu_lock; 196234353Sdim 197234353Sdimstruct mem_range_softc mem_range_softc; 198234353Sdim 199234353Sdimstruct mtx dt_lock; /* lock for GDT and LDT */ 200234353Sdim 201234353Sdimstatic void 202261991Sdimcpu_startup(dummy) 203261991Sdim void *dummy; 204234353Sdim{ 205234353Sdim uintmax_t memsize; 206234353Sdim char *sysenv; 207234353Sdim 208234353Sdim /* 209234353Sdim * On MacBooks, we need to disallow the legacy USB circuit to 210234353Sdim * generate an SMI# because this can cause several problems, 211296417Sdim * namely: incorrect CPU frequency detection and failure to 212234353Sdim * start the APs. 213296417Sdim * We do this by disabling a bit in the SMI_EN (SMI Control and 214234353Sdim * Enable register) of the Intel ICH LPC Interface Bridge. 215234353Sdim */ 216261991Sdim sysenv = getenv("smbios.system.product"); 217261991Sdim if (sysenv != NULL) { 218234353Sdim if (strncmp(sysenv, "MacBook1,1", 10) == 0 || 219234353Sdim strncmp(sysenv, "MacBook3,1", 10) == 0 || 220234353Sdim strncmp(sysenv, "MacBookPro1,1", 13) == 0 || 221296417Sdim strncmp(sysenv, "MacBookPro1,2", 13) == 0 || 222234353Sdim strncmp(sysenv, "MacBookPro3,1", 13) == 0 || 223296417Sdim strncmp(sysenv, "Macmini1,1", 10) == 0) { 224234353Sdim if (bootverbose) 225234353Sdim printf("Disabling LEGACY_USB_EN bit on " 226234353Sdim "Intel ICH.\n"); 227296417Sdim outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 228234353Sdim } 229234353Sdim freeenv(sysenv); 230251662Sdim } 231251662Sdim 232296417Sdim /* 233234353Sdim * Good {morning,afternoon,evening,night}. 234234353Sdim */ 235234353Sdim startrtclock(); 236234353Sdim printcpuinfo(); 237234353Sdim panicifcpuunsupported(); 238234353Sdim#ifdef PERFMON 239234353Sdim perfmon_init(); 240226633Sdim#endif 241218887Sdim realmem = Maxmem; 242218887Sdim 243218887Sdim /* 244234353Sdim * Display physical memory if SMBIOS reports reasonable amount. 245234353Sdim */ 246218887Sdim memsize = 0; 247234353Sdim sysenv = getenv("smbios.memory.enabled"); 248218887Sdim if (sysenv != NULL) { 249234353Sdim memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10; 250218887Sdim freeenv(sysenv); 251218887Sdim } 252218887Sdim if (memsize < ptoa((uintmax_t)cnt.v_free_count)) 253226633Sdim memsize = ptoa((uintmax_t)Maxmem); 254218887Sdim printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 255218887Sdim 256234353Sdim /* 257234353Sdim * Display any holes after the first chunk of extended memory. 258218887Sdim */ 259234353Sdim if (bootverbose) { 260234353Sdim int indx; 261234353Sdim 262234353Sdim printf("Physical memory chunk(s):\n"); 263234353Sdim for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 264234353Sdim vm_paddr_t size; 265261991Sdim 266261991Sdim size = phys_avail[indx + 1] - phys_avail[indx]; 267218887Sdim printf( 268234353Sdim "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 269234353Sdim (uintmax_t)phys_avail[indx], 270234353Sdim (uintmax_t)phys_avail[indx + 1] - 1, 271234353Sdim (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 272234353Sdim } 273234353Sdim } 274234353Sdim 275234353Sdim vm_ksubmap_init(&kmi); 276234353Sdim 277234353Sdim printf("avail memory = %ju (%ju MB)\n", 278234353Sdim ptoa((uintmax_t)cnt.v_free_count), 279261991Sdim ptoa((uintmax_t)cnt.v_free_count) / 1048576); 280234353Sdim 281234353Sdim /* 282234353Sdim * Set up buffers, so they can be used to read disk labels. 283234353Sdim */ 284234353Sdim bufinit(); 285218887Sdim vm_pager_bufferinit(); 286218887Sdim 287218887Sdim cpu_setregs(); 288234353Sdim mca_init(); 289234353Sdim} 290239462Sdim 291218887Sdim/* 292218887Sdim * Send an interrupt to process. 293218887Sdim * 294226633Sdim * Stack is set up to allow sigcode stored 295276479Sdim * at top to call routine, followed by call 296218887Sdim * to sigreturn routine below. After sigreturn 297234353Sdim * resets the signal mask, the stack, and the 298296417Sdim * frame pointer, it returns to the user 299218887Sdim * specified pc, psl. 300296417Sdim */ 301234353Sdimvoid 302234353Sdimsendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 303218887Sdim{ 304218887Sdim struct sigframe sf, *sfp; 305218887Sdim struct proc *p; 306249423Sdim struct thread *td; 307234353Sdim struct sigacts *psp; 308218887Sdim char *sp; 309234353Sdim struct trapframe *regs; 310261991Sdim int sig; 311261991Sdim int oonstack; 312261991Sdim 313261991Sdim td = curthread; 314276479Sdim p = td->td_proc; 315276479Sdim PROC_LOCK_ASSERT(p, MA_OWNED); 316239462Sdim sig = ksi->ksi_signo; 317239462Sdim psp = p->p_sigacts; 318239462Sdim mtx_assert(&psp->ps_mtx, MA_OWNED); 319276479Sdim regs = td->td_frame; 320276479Sdim oonstack = sigonstack(regs->tf_rsp); 321234353Sdim 322234353Sdim /* Save user context. */ 323234353Sdim bzero(&sf, sizeof(sf)); 324234353Sdim sf.sf_uc.uc_sigmask = *mask; 325239462Sdim sf.sf_uc.uc_stack = td->td_sigstk; 326239462Sdim sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 327239462Sdim ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 328276479Sdim sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 329239462Sdim bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 330234353Sdim sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 331234353Sdim get_fpcontext(td, &sf.sf_uc.uc_mcontext); 332234353Sdim fpstate_drop(td); 333234353Sdim sf.sf_uc.uc_mcontext.mc_fsbase = td->td_pcb->pcb_fsbase; 334234353Sdim sf.sf_uc.uc_mcontext.mc_gsbase = td->td_pcb->pcb_gsbase; 335234353Sdim 336218887Sdim /* Allocate space for the signal handler context. */ 337218887Sdim if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 338218887Sdim SIGISMEMBER(psp->ps_sigonstack, sig)) { 339218887Sdim sp = td->td_sigstk.ss_sp + 340218887Sdim td->td_sigstk.ss_size - sizeof(struct sigframe); 341280031Sdim#if defined(COMPAT_43) 342280031Sdim td->td_sigstk.ss_flags |= SS_ONSTACK; 343280031Sdim#endif 344280031Sdim } else 345218887Sdim sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 346218887Sdim /* Align to 16 bytes. */ 347218887Sdim sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 348276479Sdim 349218887Sdim /* Translate the signal if appropriate. */ 350218887Sdim if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 351243830Sdim sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 352218887Sdim 353218887Sdim /* Build the argument list for the signal handler. */ 354243830Sdim regs->tf_rdi = sig; /* arg 1 in %rdi */ 355243830Sdim regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 356243830Sdim if (SIGISMEMBER(psp->ps_siginfo, sig)) { 357243830Sdim /* Signal handler installed with SA_SIGINFO. */ 358218887Sdim regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 359218887Sdim sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 360276479Sdim 361276479Sdim /* Fill in POSIX parts */ 362218887Sdim sf.sf_si = ksi->ksi_info; 363218887Sdim sf.sf_si.si_signo = sig; /* maybe a translated signal */ 364218887Sdim regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 365218887Sdim } else { 366218887Sdim /* Old FreeBSD-style arguments. */ 367234353Sdim regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 368234353Sdim regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 369218887Sdim sf.sf_ahu.sf_handler = catcher; 370218887Sdim } 371218887Sdim mtx_unlock(&psp->ps_mtx); 372218887Sdim PROC_UNLOCK(p); 373218887Sdim 374218887Sdim /* 375218887Sdim * Copy the sigframe out to the user's stack. 376218887Sdim */ 377296417Sdim if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 378234353Sdim#ifdef DEBUG 379234353Sdim printf("process %ld has trashed its stack\n", (long)p->p_pid); 380218887Sdim#endif 381218887Sdim PROC_LOCK(p); 382218887Sdim sigexit(td, SIGILL); 383218887Sdim } 384218887Sdim 385243830Sdim regs->tf_rsp = (long)sfp; 386218887Sdim regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 387218887Sdim regs->tf_rflags &= ~(PSL_T | PSL_D); 388218887Sdim regs->tf_cs = _ucodesel; 389218887Sdim regs->tf_ds = _udatasel; 390288943Sdim regs->tf_es = _udatasel; 391288943Sdim regs->tf_fs = _ufssel; 392296417Sdim regs->tf_gs = _ugssel; 393296417Sdim regs->tf_flags = TF_HASSEGS; 394296417Sdim td->td_pcb->pcb_full_iret = 1; 395296417Sdim PROC_LOCK(p); 396296417Sdim mtx_lock(&psp->ps_mtx); 397296417Sdim} 398296417Sdim 399296417Sdim/* 400296417Sdim * System call to cleanup state after a signal 401296417Sdim * has been taken. Reset signal mask and 402296417Sdim * stack state from context left by sendsig (above). 403296417Sdim * Return to previous pc and psl as specified by 404296417Sdim * context left by sendsig. Check carefully to 405234353Sdim * make sure that the user has not modified the 406234353Sdim * state to gain improper privileges. 407234353Sdim * 408234353Sdim * MPSAFE 409234353Sdim */ 410234353Sdimint 411234353Sdimsigreturn(td, uap) 412234353Sdim struct thread *td; 413234353Sdim struct sigreturn_args /* { 414234353Sdim const struct __ucontext *sigcntxp; 415234353Sdim } */ *uap; 416234353Sdim{ 417234353Sdim ucontext_t uc; 418234353Sdim struct proc *p = td->td_proc; 419234353Sdim struct trapframe *regs; 420234353Sdim ucontext_t *ucp; 421234353Sdim long rflags; 422234353Sdim int cs, error, ret; 423234353Sdim ksiginfo_t ksi; 424234353Sdim 425234353Sdim error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 426234353Sdim if (error != 0) { 427234353Sdim printf("sigreturn (pid %d): copyin failed\n", p->p_pid); 428234353Sdim return (error); 429234353Sdim } 430234353Sdim ucp = &uc; 431234353Sdim if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) { 432234353Sdim printf("sigreturn (pid %d): mc_flags %x\n", p->p_pid, 433234353Sdim ucp->uc_mcontext.mc_flags); 434239462Sdim return (EINVAL); 435239462Sdim } 436239462Sdim regs = td->td_frame; 437239462Sdim rflags = ucp->uc_mcontext.mc_rflags; 438296417Sdim /* 439249423Sdim * Don't allow users to change privileged or reserved flags. 440249423Sdim */ 441249423Sdim /* 442249423Sdim * XXX do allow users to change the privileged flag PSL_RF. 443249423Sdim * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 444249423Sdim * should sometimes set it there too. tf_rflags is kept in 445249423Sdim * the signal context during signal handling and there is no 446249423Sdim * other place to remember it, so the PSL_RF bit may be 447296417Sdim * corrupted by the signal handler without us knowing. 448296417Sdim * Corruption of the PSL_RF bit at worst causes one more or 449249423Sdim * one less debugger trap, so allowing it is fairly harmless. 450249423Sdim */ 451249423Sdim if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 452249423Sdim printf("sigreturn (pid %d): rflags = 0x%lx\n", p->p_pid, 453249423Sdim rflags); 454296417Sdim return (EINVAL); 455249423Sdim } 456249423Sdim 457249423Sdim /* 458249423Sdim * Don't allow users to load a valid privileged %cs. Let the 459239462Sdim * hardware check for invalid selectors, excess privilege in 460234353Sdim * other selectors, invalid %eip's and invalid %esp's. 461234353Sdim */ 462218887Sdim cs = ucp->uc_mcontext.mc_cs; 463218887Sdim if (!CS_SECURE(cs)) { 464218887Sdim printf("sigreturn (pid %d): cs = 0x%x\n", p->p_pid, cs); 465288943Sdim ksiginfo_init_trap(&ksi); 466218887Sdim ksi.ksi_signo = SIGBUS; 467218887Sdim ksi.ksi_code = BUS_OBJERR; 468239462Sdim ksi.ksi_trapno = T_PROTFLT; 469239462Sdim ksi.ksi_addr = (void *)regs->tf_rip; 470243830Sdim trapsignal(td, &ksi); 471243830Sdim return (EINVAL); 472243830Sdim } 473243830Sdim 474243830Sdim ret = set_fpcontext(td, &ucp->uc_mcontext); 475243830Sdim if (ret != 0) { 476243830Sdim printf("sigreturn (pid %d): set_fpcontext\n", p->p_pid); 477243830Sdim return (ret); 478243830Sdim } 479243830Sdim bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 480243830Sdim td->td_pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase; 481243830Sdim td->td_pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase; 482243830Sdim 483243830Sdim#if defined(COMPAT_43) 484239462Sdim if (ucp->uc_mcontext.mc_onstack & 1) 485243830Sdim td->td_sigstk.ss_flags |= SS_ONSTACK; 486218887Sdim else 487218887Sdim td->td_sigstk.ss_flags &= ~SS_ONSTACK; 488218887Sdim#endif 489218887Sdim 490218887Sdim kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 491218887Sdim td->td_pcb->pcb_flags |= PCB_FULLCTX; 492218887Sdim td->td_pcb->pcb_full_iret = 1; 493218887Sdim return (EJUSTRETURN); 494218887Sdim} 495218887Sdim 496296417Sdim#ifdef COMPAT_FREEBSD4 497218887Sdimint 498freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 499{ 500 501 return sigreturn(td, (struct sigreturn_args *)uap); 502} 503#endif 504 505 506/* 507 * Machine dependent boot() routine 508 * 509 * I haven't seen anything to put here yet 510 * Possibly some stuff might be grafted back here from boot() 511 */ 512void 513cpu_boot(int howto) 514{ 515} 516 517/* 518 * Flush the D-cache for non-DMA I/O so that the I-cache can 519 * be made coherent later. 520 */ 521void 522cpu_flush_dcache(void *ptr, size_t len) 523{ 524 /* Not applicable */ 525} 526 527/* Get current clock frequency for the given cpu id. */ 528int 529cpu_est_clockrate(int cpu_id, uint64_t *rate) 530{ 531 register_t reg; 532 uint64_t tsc1, tsc2; 533 534 if (pcpu_find(cpu_id) == NULL || rate == NULL) 535 return (EINVAL); 536 537 /* If we're booting, trust the rate calibrated moments ago. */ 538 if (cold) { 539 *rate = tsc_freq; 540 return (0); 541 } 542 543#ifdef SMP 544 /* Schedule ourselves on the indicated cpu. */ 545 thread_lock(curthread); 546 sched_bind(curthread, cpu_id); 547 thread_unlock(curthread); 548#endif 549 550 /* Calibrate by measuring a short delay. */ 551 reg = intr_disable(); 552 tsc1 = rdtsc(); 553 DELAY(1000); 554 tsc2 = rdtsc(); 555 intr_restore(reg); 556 557#ifdef SMP 558 thread_lock(curthread); 559 sched_unbind(curthread); 560 thread_unlock(curthread); 561#endif 562 563 /* 564 * Calculate the difference in readings, convert to Mhz, and 565 * subtract 0.5% of the total. Empirical testing has shown that 566 * overhead in DELAY() works out to approximately this value. 567 */ 568 tsc2 -= tsc1; 569 *rate = tsc2 * 1000 - tsc2 * 5; 570 return (0); 571} 572 573/* 574 * Shutdown the CPU as much as possible 575 */ 576void 577cpu_halt(void) 578{ 579 for (;;) 580 __asm__ ("hlt"); 581} 582 583void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */ 584 585static void 586cpu_idle_hlt(int busy) 587{ 588 /* 589 * we must absolutely guarentee that hlt is the next instruction 590 * after sti or we introduce a timing window. 591 */ 592 disable_intr(); 593 if (sched_runnable()) 594 enable_intr(); 595 else 596 __asm __volatile("sti; hlt"); 597} 598 599static void 600cpu_idle_acpi(int busy) 601{ 602 disable_intr(); 603 if (sched_runnable()) 604 enable_intr(); 605 else if (cpu_idle_hook) 606 cpu_idle_hook(); 607 else 608 __asm __volatile("sti; hlt"); 609} 610 611static int cpu_ident_amdc1e = 0; 612 613static int 614cpu_probe_amdc1e(void) 615{ 616 int i; 617 618 /* 619 * Forget it, if we're not using local APIC timer. 620 */ 621 if (resource_disabled("apic", 0) || 622 (resource_int_value("apic", 0, "clock", &i) == 0 && i == 0)) 623 return (0); 624 625 /* 626 * Detect the presence of C1E capability mostly on latest 627 * dual-cores (or future) k8 family. 628 */ 629 if (cpu_vendor_id == CPU_VENDOR_AMD && 630 (cpu_id & 0x00000f00) == 0x00000f00 && 631 (cpu_id & 0x0fff0000) >= 0x00040000) { 632 cpu_ident_amdc1e = 1; 633 return (1); 634 } 635 636 return (0); 637} 638 639/* 640 * C1E renders the local APIC timer dead, so we disable it by 641 * reading the Interrupt Pending Message register and clearing 642 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27). 643 * 644 * Reference: 645 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" 646 * #32559 revision 3.00+ 647 */ 648#define MSR_AMDK8_IPM 0xc0010055 649#define AMDK8_SMIONCMPHALT (1ULL << 27) 650#define AMDK8_C1EONCMPHALT (1ULL << 28) 651#define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT) 652 653static void 654cpu_idle_amdc1e(int busy) 655{ 656 657 disable_intr(); 658 if (sched_runnable()) 659 enable_intr(); 660 else { 661 uint64_t msr; 662 663 msr = rdmsr(MSR_AMDK8_IPM); 664 if (msr & AMDK8_CMPHALT) 665 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT); 666 667 if (cpu_idle_hook) 668 cpu_idle_hook(); 669 else 670 __asm __volatile("sti; hlt"); 671 } 672} 673 674static void 675cpu_idle_spin(int busy) 676{ 677 return; 678} 679 680void (*cpu_idle_fn)(int) = cpu_idle_acpi; 681 682void 683cpu_idle(int busy) 684{ 685#ifdef SMP 686 if (mp_grab_cpu_hlt()) 687 return; 688#endif 689 cpu_idle_fn(busy); 690} 691 692/* 693 * mwait cpu power states. Lower 4 bits are sub-states. 694 */ 695#define MWAIT_C0 0xf0 696#define MWAIT_C1 0x00 697#define MWAIT_C2 0x10 698#define MWAIT_C3 0x20 699#define MWAIT_C4 0x30 700 701#define MWAIT_DISABLED 0x0 702#define MWAIT_WOKEN 0x1 703#define MWAIT_WAITING 0x2 704 705static void 706cpu_idle_mwait(int busy) 707{ 708 int *mwait; 709 710 mwait = (int *)PCPU_PTR(monitorbuf); 711 *mwait = MWAIT_WAITING; 712 if (sched_runnable()) 713 return; 714 cpu_monitor(mwait, 0, 0); 715 if (*mwait == MWAIT_WAITING) 716 cpu_mwait(0, MWAIT_C1); 717} 718 719static void 720cpu_idle_mwait_hlt(int busy) 721{ 722 int *mwait; 723 724 mwait = (int *)PCPU_PTR(monitorbuf); 725 if (busy == 0) { 726 *mwait = MWAIT_DISABLED; 727 cpu_idle_hlt(busy); 728 return; 729 } 730 *mwait = MWAIT_WAITING; 731 if (sched_runnable()) 732 return; 733 cpu_monitor(mwait, 0, 0); 734 if (*mwait == MWAIT_WAITING) 735 cpu_mwait(0, MWAIT_C1); 736} 737 738int 739cpu_idle_wakeup(int cpu) 740{ 741 struct pcpu *pcpu; 742 int *mwait; 743 744 if (cpu_idle_fn == cpu_idle_spin) 745 return (1); 746 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt) 747 return (0); 748 pcpu = pcpu_find(cpu); 749 mwait = (int *)pcpu->pc_monitorbuf; 750 /* 751 * This doesn't need to be atomic since missing the race will 752 * simply result in unnecessary IPIs. 753 */ 754 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED) 755 return (0); 756 *mwait = MWAIT_WOKEN; 757 758 return (1); 759} 760 761/* 762 * Ordered by speed/power consumption. 763 */ 764struct { 765 void *id_fn; 766 char *id_name; 767} idle_tbl[] = { 768 { cpu_idle_spin, "spin" }, 769 { cpu_idle_mwait, "mwait" }, 770 { cpu_idle_mwait_hlt, "mwait_hlt" }, 771 { cpu_idle_amdc1e, "amdc1e" }, 772 { cpu_idle_hlt, "hlt" }, 773 { cpu_idle_acpi, "acpi" }, 774 { NULL, NULL } 775}; 776 777static int 778idle_sysctl_available(SYSCTL_HANDLER_ARGS) 779{ 780 char *avail, *p; 781 int error; 782 int i; 783 784 avail = malloc(256, M_TEMP, M_WAITOK); 785 p = avail; 786 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 787 if (strstr(idle_tbl[i].id_name, "mwait") && 788 (cpu_feature2 & CPUID2_MON) == 0) 789 continue; 790 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 && 791 cpu_ident_amdc1e == 0) 792 continue; 793 p += sprintf(p, "%s, ", idle_tbl[i].id_name); 794 } 795 error = sysctl_handle_string(oidp, avail, 0, req); 796 free(avail, M_TEMP); 797 return (error); 798} 799 800static int 801idle_sysctl(SYSCTL_HANDLER_ARGS) 802{ 803 char buf[16]; 804 int error; 805 char *p; 806 int i; 807 808 p = "unknown"; 809 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 810 if (idle_tbl[i].id_fn == cpu_idle_fn) { 811 p = idle_tbl[i].id_name; 812 break; 813 } 814 } 815 strncpy(buf, p, sizeof(buf)); 816 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 817 if (error != 0 || req->newptr == NULL) 818 return (error); 819 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 820 if (strstr(idle_tbl[i].id_name, "mwait") && 821 (cpu_feature2 & CPUID2_MON) == 0) 822 continue; 823 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 && 824 cpu_ident_amdc1e == 0) 825 continue; 826 if (strcmp(idle_tbl[i].id_name, buf)) 827 continue; 828 cpu_idle_fn = idle_tbl[i].id_fn; 829 return (0); 830 } 831 return (EINVAL); 832} 833 834SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 835 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 836 837SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 838 idle_sysctl, "A", "currently selected idle function"); 839 840/* 841 * Reset registers to default values on exec. 842 */ 843void 844exec_setregs(td, entry, stack, ps_strings) 845 struct thread *td; 846 u_long entry; 847 u_long stack; 848 u_long ps_strings; 849{ 850 struct trapframe *regs = td->td_frame; 851 struct pcb *pcb = td->td_pcb; 852 853 mtx_lock(&dt_lock); 854 if (td->td_proc->p_md.md_ldt != NULL) 855 user_ldt_free(td); 856 else 857 mtx_unlock(&dt_lock); 858 859 pcb->pcb_fsbase = 0; 860 pcb->pcb_gsbase = 0; 861 pcb->pcb_flags &= ~(PCB_32BIT | PCB_GS32BIT); 862 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 863 pcb->pcb_full_iret = 1; 864 865 bzero((char *)regs, sizeof(struct trapframe)); 866 regs->tf_rip = entry; 867 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 868 regs->tf_rdi = stack; /* argv */ 869 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 870 regs->tf_ss = _udatasel; 871 regs->tf_cs = _ucodesel; 872 regs->tf_ds = _udatasel; 873 regs->tf_es = _udatasel; 874 regs->tf_fs = _ufssel; 875 regs->tf_gs = _ugssel; 876 regs->tf_flags = TF_HASSEGS; 877 878 /* 879 * Reset the hardware debug registers if they were in use. 880 * They won't have any meaning for the newly exec'd process. 881 */ 882 if (pcb->pcb_flags & PCB_DBREGS) { 883 pcb->pcb_dr0 = 0; 884 pcb->pcb_dr1 = 0; 885 pcb->pcb_dr2 = 0; 886 pcb->pcb_dr3 = 0; 887 pcb->pcb_dr6 = 0; 888 pcb->pcb_dr7 = 0; 889 if (pcb == PCPU_GET(curpcb)) { 890 /* 891 * Clear the debug registers on the running 892 * CPU, otherwise they will end up affecting 893 * the next process we switch to. 894 */ 895 reset_dbregs(); 896 } 897 pcb->pcb_flags &= ~PCB_DBREGS; 898 } 899 900 /* 901 * Drop the FP state if we hold it, so that the process gets a 902 * clean FP state if it uses the FPU again. 903 */ 904 fpstate_drop(td); 905} 906 907void 908cpu_setregs(void) 909{ 910 register_t cr0; 911 912 cr0 = rcr0(); 913 /* 914 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 915 * BSP. See the comments there about why we set them. 916 */ 917 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 918 load_cr0(cr0); 919} 920 921/* 922 * Initialize amd64 and configure to run kernel 923 */ 924 925/* 926 * Initialize segments & interrupt table 927 */ 928 929struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 930static struct gate_descriptor idt0[NIDT]; 931struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 932 933static char dblfault_stack[PAGE_SIZE] __aligned(16); 934 935static char nmi0_stack[PAGE_SIZE] __aligned(16); 936CTASSERT(sizeof(struct nmi_pcpu) == 16); 937 938struct amd64tss common_tss[MAXCPU]; 939 940/* 941 * Software prototypes -- in more palatable form. 942 * 943 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same 944 * slots as corresponding segments for i386 kernel. 945 */ 946struct soft_segment_descriptor gdt_segs[] = { 947/* GNULL_SEL 0 Null Descriptor */ 948{ .ssd_base = 0x0, 949 .ssd_limit = 0x0, 950 .ssd_type = 0, 951 .ssd_dpl = 0, 952 .ssd_p = 0, 953 .ssd_long = 0, 954 .ssd_def32 = 0, 955 .ssd_gran = 0 }, 956/* GNULL2_SEL 1 Null Descriptor */ 957{ .ssd_base = 0x0, 958 .ssd_limit = 0x0, 959 .ssd_type = 0, 960 .ssd_dpl = 0, 961 .ssd_p = 0, 962 .ssd_long = 0, 963 .ssd_def32 = 0, 964 .ssd_gran = 0 }, 965/* GUFS32_SEL 2 32 bit %gs Descriptor for user */ 966{ .ssd_base = 0x0, 967 .ssd_limit = 0xfffff, 968 .ssd_type = SDT_MEMRWA, 969 .ssd_dpl = SEL_UPL, 970 .ssd_p = 1, 971 .ssd_long = 0, 972 .ssd_def32 = 1, 973 .ssd_gran = 1 }, 974/* GUGS32_SEL 3 32 bit %fs Descriptor for user */ 975{ .ssd_base = 0x0, 976 .ssd_limit = 0xfffff, 977 .ssd_type = SDT_MEMRWA, 978 .ssd_dpl = SEL_UPL, 979 .ssd_p = 1, 980 .ssd_long = 0, 981 .ssd_def32 = 1, 982 .ssd_gran = 1 }, 983/* GCODE_SEL 4 Code Descriptor for kernel */ 984{ .ssd_base = 0x0, 985 .ssd_limit = 0xfffff, 986 .ssd_type = SDT_MEMERA, 987 .ssd_dpl = SEL_KPL, 988 .ssd_p = 1, 989 .ssd_long = 1, 990 .ssd_def32 = 0, 991 .ssd_gran = 1 }, 992/* GDATA_SEL 5 Data Descriptor for kernel */ 993{ .ssd_base = 0x0, 994 .ssd_limit = 0xfffff, 995 .ssd_type = SDT_MEMRWA, 996 .ssd_dpl = SEL_KPL, 997 .ssd_p = 1, 998 .ssd_long = 1, 999 .ssd_def32 = 0, 1000 .ssd_gran = 1 }, 1001/* GUCODE32_SEL 6 32 bit Code Descriptor for user */ 1002{ .ssd_base = 0x0, 1003 .ssd_limit = 0xfffff, 1004 .ssd_type = SDT_MEMERA, 1005 .ssd_dpl = SEL_UPL, 1006 .ssd_p = 1, 1007 .ssd_long = 0, 1008 .ssd_def32 = 1, 1009 .ssd_gran = 1 }, 1010/* GUDATA_SEL 7 32/64 bit Data Descriptor for user */ 1011{ .ssd_base = 0x0, 1012 .ssd_limit = 0xfffff, 1013 .ssd_type = SDT_MEMRWA, 1014 .ssd_dpl = SEL_UPL, 1015 .ssd_p = 1, 1016 .ssd_long = 0, 1017 .ssd_def32 = 1, 1018 .ssd_gran = 1 }, 1019/* GUCODE_SEL 8 64 bit Code Descriptor for user */ 1020{ .ssd_base = 0x0, 1021 .ssd_limit = 0xfffff, 1022 .ssd_type = SDT_MEMERA, 1023 .ssd_dpl = SEL_UPL, 1024 .ssd_p = 1, 1025 .ssd_long = 1, 1026 .ssd_def32 = 0, 1027 .ssd_gran = 1 }, 1028/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1029{ .ssd_base = 0x0, 1030 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1, 1031 .ssd_type = SDT_SYSTSS, 1032 .ssd_dpl = SEL_KPL, 1033 .ssd_p = 1, 1034 .ssd_long = 0, 1035 .ssd_def32 = 0, 1036 .ssd_gran = 0 }, 1037/* Actually, the TSS is a system descriptor which is double size */ 1038{ .ssd_base = 0x0, 1039 .ssd_limit = 0x0, 1040 .ssd_type = 0, 1041 .ssd_dpl = 0, 1042 .ssd_p = 0, 1043 .ssd_long = 0, 1044 .ssd_def32 = 0, 1045 .ssd_gran = 0 }, 1046/* GUSERLDT_SEL 11 LDT Descriptor */ 1047{ .ssd_base = 0x0, 1048 .ssd_limit = 0x0, 1049 .ssd_type = 0, 1050 .ssd_dpl = 0, 1051 .ssd_p = 0, 1052 .ssd_long = 0, 1053 .ssd_def32 = 0, 1054 .ssd_gran = 0 }, 1055/* GUSERLDT_SEL 12 LDT Descriptor, double size */ 1056{ .ssd_base = 0x0, 1057 .ssd_limit = 0x0, 1058 .ssd_type = 0, 1059 .ssd_dpl = 0, 1060 .ssd_p = 0, 1061 .ssd_long = 0, 1062 .ssd_def32 = 0, 1063 .ssd_gran = 0 }, 1064}; 1065 1066void 1067setidt(idx, func, typ, dpl, ist) 1068 int idx; 1069 inthand_t *func; 1070 int typ; 1071 int dpl; 1072 int ist; 1073{ 1074 struct gate_descriptor *ip; 1075 1076 ip = idt + idx; 1077 ip->gd_looffset = (uintptr_t)func; 1078 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 1079 ip->gd_ist = ist; 1080 ip->gd_xx = 0; 1081 ip->gd_type = typ; 1082 ip->gd_dpl = dpl; 1083 ip->gd_p = 1; 1084 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 1085} 1086 1087extern inthand_t 1088 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1089 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1090 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1091 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1092 IDTVEC(xmm), IDTVEC(dblfault), 1093 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 1094 1095#ifdef DDB 1096/* 1097 * Display the index and function name of any IDT entries that don't use 1098 * the default 'rsvd' entry point. 1099 */ 1100DB_SHOW_COMMAND(idt, db_show_idt) 1101{ 1102 struct gate_descriptor *ip; 1103 int idx; 1104 uintptr_t func; 1105 1106 ip = idt; 1107 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1108 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset); 1109 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1110 db_printf("%3d\t", idx); 1111 db_printsym(func, DB_STGY_PROC); 1112 db_printf("\n"); 1113 } 1114 ip++; 1115 } 1116} 1117#endif 1118 1119void 1120sdtossd(sd, ssd) 1121 struct user_segment_descriptor *sd; 1122 struct soft_segment_descriptor *ssd; 1123{ 1124 1125 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1126 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1127 ssd->ssd_type = sd->sd_type; 1128 ssd->ssd_dpl = sd->sd_dpl; 1129 ssd->ssd_p = sd->sd_p; 1130 ssd->ssd_long = sd->sd_long; 1131 ssd->ssd_def32 = sd->sd_def32; 1132 ssd->ssd_gran = sd->sd_gran; 1133} 1134 1135void 1136ssdtosd(ssd, sd) 1137 struct soft_segment_descriptor *ssd; 1138 struct user_segment_descriptor *sd; 1139{ 1140 1141 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1142 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1143 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1144 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1145 sd->sd_type = ssd->ssd_type; 1146 sd->sd_dpl = ssd->ssd_dpl; 1147 sd->sd_p = ssd->ssd_p; 1148 sd->sd_long = ssd->ssd_long; 1149 sd->sd_def32 = ssd->ssd_def32; 1150 sd->sd_gran = ssd->ssd_gran; 1151} 1152 1153void 1154ssdtosyssd(ssd, sd) 1155 struct soft_segment_descriptor *ssd; 1156 struct system_segment_descriptor *sd; 1157{ 1158 1159 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1160 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1161 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1162 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1163 sd->sd_type = ssd->ssd_type; 1164 sd->sd_dpl = ssd->ssd_dpl; 1165 sd->sd_p = ssd->ssd_p; 1166 sd->sd_gran = ssd->ssd_gran; 1167} 1168 1169#if !defined(DEV_ATPIC) && defined(DEV_ISA) 1170#include <isa/isavar.h> 1171#include <isa/isareg.h> 1172/* 1173 * Return a bitmap of the current interrupt requests. This is 8259-specific 1174 * and is only suitable for use at probe time. 1175 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 1176 * It shouldn't be here. There should probably be an APIC centric 1177 * implementation in the apic driver code, if at all. 1178 */ 1179intrmask_t 1180isa_irq_pending(void) 1181{ 1182 u_char irr1; 1183 u_char irr2; 1184 1185 irr1 = inb(IO_ICU1); 1186 irr2 = inb(IO_ICU2); 1187 return ((irr2 << 8) | irr1); 1188} 1189#endif 1190 1191u_int basemem; 1192 1193static int 1194add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp) 1195{ 1196 int i, insert_idx, physmap_idx; 1197 1198 physmap_idx = *physmap_idxp; 1199 1200 if (boothowto & RB_VERBOSE) 1201 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1202 smap->type, smap->base, smap->length); 1203 1204 if (smap->type != SMAP_TYPE_MEMORY) 1205 return (1); 1206 1207 if (smap->length == 0) 1208 return (0); 1209 1210 /* 1211 * Find insertion point while checking for overlap. Start off by 1212 * assuming the new entry will be added to the end. 1213 */ 1214 insert_idx = physmap_idx + 2; 1215 for (i = 0; i <= physmap_idx; i += 2) { 1216 if (smap->base < physmap[i + 1]) { 1217 if (smap->base + smap->length <= physmap[i]) { 1218 insert_idx = i; 1219 break; 1220 } 1221 if (boothowto & RB_VERBOSE) 1222 printf( 1223 "Overlapping memory regions, ignoring second region\n"); 1224 return (1); 1225 } 1226 } 1227 1228 /* See if we can prepend to the next entry. */ 1229 if (insert_idx <= physmap_idx && 1230 smap->base + smap->length == physmap[insert_idx]) { 1231 physmap[insert_idx] = smap->base; 1232 return (1); 1233 } 1234 1235 /* See if we can append to the previous entry. */ 1236 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) { 1237 physmap[insert_idx - 1] += smap->length; 1238 return (1); 1239 } 1240 1241 physmap_idx += 2; 1242 *physmap_idxp = physmap_idx; 1243 if (physmap_idx == PHYSMAP_SIZE) { 1244 printf( 1245 "Too many segments in the physical address map, giving up\n"); 1246 return (0); 1247 } 1248 1249 /* 1250 * Move the last 'N' entries down to make room for the new 1251 * entry if needed. 1252 */ 1253 for (i = physmap_idx; i > insert_idx; i -= 2) { 1254 physmap[i] = physmap[i - 2]; 1255 physmap[i + 1] = physmap[i - 1]; 1256 } 1257 1258 /* Insert the new entry. */ 1259 physmap[insert_idx] = smap->base; 1260 physmap[insert_idx + 1] = smap->base + smap->length; 1261 return (1); 1262} 1263 1264/* 1265 * Populate the (physmap) array with base/bound pairs describing the 1266 * available physical memory in the system, then test this memory and 1267 * build the phys_avail array describing the actually-available memory. 1268 * 1269 * If we cannot accurately determine the physical memory map, then use 1270 * value from the 0xE801 call, and failing that, the RTC. 1271 * 1272 * Total memory size may be set by the kernel environment variable 1273 * hw.physmem or the compile-time define MAXMEM. 1274 * 1275 * XXX first should be vm_paddr_t. 1276 */ 1277static void 1278getmemsize(caddr_t kmdp, u_int64_t first) 1279{ 1280 int i, physmap_idx, pa_indx, da_indx; 1281 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1282 u_long physmem_tunable; 1283 pt_entry_t *pte; 1284 struct bios_smap *smapbase, *smap, *smapend; 1285 u_int32_t smapsize; 1286 quad_t dcons_addr, dcons_size; 1287 1288 bzero(physmap, sizeof(physmap)); 1289 basemem = 0; 1290 physmap_idx = 0; 1291 1292 /* 1293 * get memory map from INT 15:E820, kindly supplied by the loader. 1294 * 1295 * subr_module.c says: 1296 * "Consumer may safely assume that size value precedes data." 1297 * ie: an int32_t immediately precedes smap. 1298 */ 1299 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1300 MODINFO_METADATA | MODINFOMD_SMAP); 1301 if (smapbase == NULL) 1302 panic("No BIOS smap info from loader!"); 1303 1304 smapsize = *((u_int32_t *)smapbase - 1); 1305 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1306 1307 for (smap = smapbase; smap < smapend; smap++) 1308 if (!add_smap_entry(smap, physmap, &physmap_idx)) 1309 break; 1310 1311 /* 1312 * Find the 'base memory' segment for SMP 1313 */ 1314 basemem = 0; 1315 for (i = 0; i <= physmap_idx; i += 2) { 1316 if (physmap[i] == 0x00000000) { 1317 basemem = physmap[i + 1] / 1024; 1318 break; 1319 } 1320 } 1321 if (basemem == 0) 1322 panic("BIOS smap did not include a basemem segment!"); 1323 1324#ifdef SMP 1325 /* make hole for AP bootstrap code */ 1326 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1327#endif 1328 1329 /* 1330 * Maxmem isn't the "maximum memory", it's one larger than the 1331 * highest page of the physical address space. It should be 1332 * called something like "Maxphyspage". We may adjust this 1333 * based on ``hw.physmem'' and the results of the memory test. 1334 */ 1335 Maxmem = atop(physmap[physmap_idx + 1]); 1336 1337#ifdef MAXMEM 1338 Maxmem = MAXMEM / 4; 1339#endif 1340 1341 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1342 Maxmem = atop(physmem_tunable); 1343 1344 /* 1345 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1346 * in the system. 1347 */ 1348 if (Maxmem > atop(physmap[physmap_idx + 1])) 1349 Maxmem = atop(physmap[physmap_idx + 1]); 1350 1351 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1352 (boothowto & RB_VERBOSE)) 1353 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1354 1355 /* call pmap initialization to make new kernel address space */ 1356 pmap_bootstrap(&first); 1357 1358 /* 1359 * Size up each available chunk of physical memory. 1360 */ 1361 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1362 pa_indx = 0; 1363 da_indx = 1; 1364 phys_avail[pa_indx++] = physmap[0]; 1365 phys_avail[pa_indx] = physmap[0]; 1366 dump_avail[da_indx] = physmap[0]; 1367 pte = CMAP1; 1368 1369 /* 1370 * Get dcons buffer address 1371 */ 1372 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1373 getenv_quad("dcons.size", &dcons_size) == 0) 1374 dcons_addr = 0; 1375 1376 /* 1377 * physmap is in bytes, so when converting to page boundaries, 1378 * round up the start address and round down the end address. 1379 */ 1380 for (i = 0; i <= physmap_idx; i += 2) { 1381 vm_paddr_t end; 1382 1383 end = ptoa((vm_paddr_t)Maxmem); 1384 if (physmap[i + 1] < end) 1385 end = trunc_page(physmap[i + 1]); 1386 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1387 int tmp, page_bad, full; 1388 int *ptr = (int *)CADDR1; 1389 1390 full = FALSE; 1391 /* 1392 * block out kernel memory as not available. 1393 */ 1394 if (pa >= 0x100000 && pa < first) 1395 goto do_dump_avail; 1396 1397 /* 1398 * block out dcons buffer 1399 */ 1400 if (dcons_addr > 0 1401 && pa >= trunc_page(dcons_addr) 1402 && pa < dcons_addr + dcons_size) 1403 goto do_dump_avail; 1404 1405 page_bad = FALSE; 1406 1407 /* 1408 * map page into kernel: valid, read/write,non-cacheable 1409 */ 1410 *pte = pa | PG_V | PG_RW | PG_N; 1411 invltlb(); 1412 1413 tmp = *(int *)ptr; 1414 /* 1415 * Test for alternating 1's and 0's 1416 */ 1417 *(volatile int *)ptr = 0xaaaaaaaa; 1418 if (*(volatile int *)ptr != 0xaaaaaaaa) 1419 page_bad = TRUE; 1420 /* 1421 * Test for alternating 0's and 1's 1422 */ 1423 *(volatile int *)ptr = 0x55555555; 1424 if (*(volatile int *)ptr != 0x55555555) 1425 page_bad = TRUE; 1426 /* 1427 * Test for all 1's 1428 */ 1429 *(volatile int *)ptr = 0xffffffff; 1430 if (*(volatile int *)ptr != 0xffffffff) 1431 page_bad = TRUE; 1432 /* 1433 * Test for all 0's 1434 */ 1435 *(volatile int *)ptr = 0x0; 1436 if (*(volatile int *)ptr != 0x0) 1437 page_bad = TRUE; 1438 /* 1439 * Restore original value. 1440 */ 1441 *(int *)ptr = tmp; 1442 1443 /* 1444 * Adjust array of valid/good pages. 1445 */ 1446 if (page_bad == TRUE) 1447 continue; 1448 /* 1449 * If this good page is a continuation of the 1450 * previous set of good pages, then just increase 1451 * the end pointer. Otherwise start a new chunk. 1452 * Note that "end" points one higher than end, 1453 * making the range >= start and < end. 1454 * If we're also doing a speculative memory 1455 * test and we at or past the end, bump up Maxmem 1456 * so that we keep going. The first bad page 1457 * will terminate the loop. 1458 */ 1459 if (phys_avail[pa_indx] == pa) { 1460 phys_avail[pa_indx] += PAGE_SIZE; 1461 } else { 1462 pa_indx++; 1463 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1464 printf( 1465 "Too many holes in the physical address space, giving up\n"); 1466 pa_indx--; 1467 full = TRUE; 1468 goto do_dump_avail; 1469 } 1470 phys_avail[pa_indx++] = pa; /* start */ 1471 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1472 } 1473 physmem++; 1474do_dump_avail: 1475 if (dump_avail[da_indx] == pa) { 1476 dump_avail[da_indx] += PAGE_SIZE; 1477 } else { 1478 da_indx++; 1479 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1480 da_indx--; 1481 goto do_next; 1482 } 1483 dump_avail[da_indx++] = pa; /* start */ 1484 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1485 } 1486do_next: 1487 if (full) 1488 break; 1489 } 1490 } 1491 *pte = 0; 1492 invltlb(); 1493 1494 /* 1495 * XXX 1496 * The last chunk must contain at least one page plus the message 1497 * buffer to avoid complicating other code (message buffer address 1498 * calculation, etc.). 1499 */ 1500 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1501 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1502 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1503 phys_avail[pa_indx--] = 0; 1504 phys_avail[pa_indx--] = 0; 1505 } 1506 1507 Maxmem = atop(phys_avail[pa_indx]); 1508 1509 /* Trim off space for the message buffer. */ 1510 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1511 1512 /* Map the message buffer. */ 1513 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]); 1514} 1515 1516u_int64_t 1517hammer_time(u_int64_t modulep, u_int64_t physfree) 1518{ 1519 caddr_t kmdp; 1520 int gsel_tss, x; 1521 struct pcpu *pc; 1522 struct nmi_pcpu *np; 1523 u_int64_t msr; 1524 char *env; 1525 1526 thread0.td_kstack = physfree + KERNBASE; 1527 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1528 physfree += KSTACK_PAGES * PAGE_SIZE; 1529 thread0.td_pcb = (struct pcb *) 1530 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1531 1532 /* 1533 * This may be done better later if it gets more high level 1534 * components in it. If so just link td->td_proc here. 1535 */ 1536 proc_linkup0(&proc0, &thread0); 1537 1538 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1539 preload_bootstrap_relocate(KERNBASE); 1540 kmdp = preload_search_by_type("elf kernel"); 1541 if (kmdp == NULL) 1542 kmdp = preload_search_by_type("elf64 kernel"); 1543 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1544 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1545#ifdef DDB 1546 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1547 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1548#endif 1549 1550 /* Init basic tunables, hz etc */ 1551 init_param1(); 1552 1553 /* 1554 * make gdt memory segments 1555 */ 1556 for (x = 0; x < NGDT; x++) { 1557 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) && 1558 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1) 1559 ssdtosd(&gdt_segs[x], &gdt[x]); 1560 } 1561 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1562 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1563 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1564 1565 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1566 r_gdt.rd_base = (long) gdt; 1567 lgdt(&r_gdt); 1568 pc = &__pcpu[0]; 1569 1570 wrmsr(MSR_FSBASE, 0); /* User value */ 1571 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1572 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1573 1574 pcpu_init(pc, 0, sizeof(struct pcpu)); 1575 dpcpu_init((void *)(physfree + KERNBASE), 0); 1576 physfree += DPCPU_SIZE; 1577 PCPU_SET(prvspace, pc); 1578 PCPU_SET(curthread, &thread0); 1579 PCPU_SET(curpcb, thread0.td_pcb); 1580 PCPU_SET(tssp, &common_tss[0]); 1581 PCPU_SET(commontssp, &common_tss[0]); 1582 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1583 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]); 1584 PCPU_SET(fs32p, &gdt[GUFS32_SEL]); 1585 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1586 1587 /* 1588 * Initialize mutexes. 1589 * 1590 * icu_lock: in order to allow an interrupt to occur in a critical 1591 * section, to set pcpu->ipending (etc...) properly, we 1592 * must be able to get the icu lock, so it can't be 1593 * under witness. 1594 */ 1595 mutex_init(); 1596 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1597 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF); 1598 1599 /* exceptions */ 1600 for (x = 0; x < NIDT; x++) 1601 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1602 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1603 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1604 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1605 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1606 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1607 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1608 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1609 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1610 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1611 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1612 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1613 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1614 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1615 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1616 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1617 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1618 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1619 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1620 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1621 1622 r_idt.rd_limit = sizeof(idt0) - 1; 1623 r_idt.rd_base = (long) idt; 1624 lidt(&r_idt); 1625 1626 /* 1627 * Initialize the i8254 before the console so that console 1628 * initialization can use DELAY(). 1629 */ 1630 i8254_init(); 1631 1632 /* 1633 * Initialize the console before we print anything out. 1634 */ 1635 cninit(); 1636 1637#ifdef DEV_ISA 1638#ifdef DEV_ATPIC 1639 elcr_probe(); 1640 atpic_startup(); 1641#else 1642 /* Reset and mask the atpics and leave them shut down. */ 1643 atpic_reset(); 1644 1645 /* 1646 * Point the ICU spurious interrupt vectors at the APIC spurious 1647 * interrupt handler. 1648 */ 1649 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1650 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1651#endif 1652#else 1653#error "have you forgotten the isa device?"; 1654#endif 1655 1656 kdb_init(); 1657 1658#ifdef KDB 1659 if (boothowto & RB_KDB) 1660 kdb_enter(KDB_WHY_BOOTFLAGS, 1661 "Boot flags requested debugger"); 1662#endif 1663 1664 identify_cpu(); /* Final stage of CPU initialization */ 1665 initializecpu(); /* Initialize CPU registers */ 1666 initializecpucache(); 1667 1668 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1669 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1670 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1671 /* Ensure the stack is aligned to 16 bytes */ 1672 common_tss[0].tss_rsp0 &= ~0xFul; 1673 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1674 1675 /* doublefault stack space, runs on ist1 */ 1676 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1677 1678 /* 1679 * NMI stack, runs on ist2. The pcpu pointer is stored just 1680 * above the start of the ist2 stack. 1681 */ 1682 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 1683 np->np_pcpu = (register_t) pc; 1684 common_tss[0].tss_ist2 = (long) np; 1685 1686 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1687 common_tss[0].tss_iobase = sizeof(struct amd64tss) + 1688 IOPAGES * PAGE_SIZE; 1689 1690 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1691 ltr(gsel_tss); 1692 1693 /* Set up the fast syscall stuff */ 1694 msr = rdmsr(MSR_EFER) | EFER_SCE; 1695 wrmsr(MSR_EFER, msr); 1696 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1697 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1698 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1699 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1700 wrmsr(MSR_STAR, msr); 1701 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1702 1703 getmemsize(kmdp, physfree); 1704 init_param2(physmem); 1705 1706 /* now running on new page tables, configured,and u/iom is accessible */ 1707 1708 msgbufinit(msgbufp, MSGBUF_SIZE); 1709 fpuinit(); 1710 1711 /* transfer to user mode */ 1712 1713 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1714 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1715 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1716 _ufssel = GSEL(GUFS32_SEL, SEL_UPL); 1717 _ugssel = GSEL(GUGS32_SEL, SEL_UPL); 1718 1719 load_ds(_udatasel); 1720 load_es(_udatasel); 1721 load_fs(_ufssel); 1722 1723 /* setup proc 0's pcb */ 1724 thread0.td_pcb->pcb_flags = 0; 1725 thread0.td_pcb->pcb_cr3 = KPML4phys; 1726 thread0.td_frame = &proc0_tf; 1727 1728 env = getenv("kernelname"); 1729 if (env != NULL) 1730 strlcpy(kernelname, env, sizeof(kernelname)); 1731 1732#ifdef XENHVM 1733 if (inw(0x10) == 0x49d2) { 1734 if (bootverbose) 1735 printf("Xen detected: disabling emulated block and network devices\n"); 1736 outw(0x10, 3); 1737 } 1738#endif 1739 1740 if (cpu_probe_amdc1e()) 1741 cpu_idle_fn = cpu_idle_amdc1e; 1742 1743 /* Location of kernel stack for locore */ 1744 return ((u_int64_t)thread0.td_pcb); 1745} 1746 1747void 1748cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1749{ 1750 1751 pcpu->pc_acpi_id = 0xffffffff; 1752} 1753 1754void 1755spinlock_enter(void) 1756{ 1757 struct thread *td; 1758 1759 td = curthread; 1760 if (td->td_md.md_spinlock_count == 0) 1761 td->td_md.md_saved_flags = intr_disable(); 1762 td->td_md.md_spinlock_count++; 1763 critical_enter(); 1764} 1765 1766void 1767spinlock_exit(void) 1768{ 1769 struct thread *td; 1770 1771 td = curthread; 1772 critical_exit(); 1773 td->td_md.md_spinlock_count--; 1774 if (td->td_md.md_spinlock_count == 0) 1775 intr_restore(td->td_md.md_saved_flags); 1776} 1777 1778/* 1779 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1780 * we want to start a backtrace from the function that caused us to enter 1781 * the debugger. We have the context in the trapframe, but base the trace 1782 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1783 * enough for a backtrace. 1784 */ 1785void 1786makectx(struct trapframe *tf, struct pcb *pcb) 1787{ 1788 1789 pcb->pcb_r12 = tf->tf_r12; 1790 pcb->pcb_r13 = tf->tf_r13; 1791 pcb->pcb_r14 = tf->tf_r14; 1792 pcb->pcb_r15 = tf->tf_r15; 1793 pcb->pcb_rbp = tf->tf_rbp; 1794 pcb->pcb_rbx = tf->tf_rbx; 1795 pcb->pcb_rip = tf->tf_rip; 1796 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1797} 1798 1799int 1800ptrace_set_pc(struct thread *td, unsigned long addr) 1801{ 1802 td->td_frame->tf_rip = addr; 1803 return (0); 1804} 1805 1806int 1807ptrace_single_step(struct thread *td) 1808{ 1809 td->td_frame->tf_rflags |= PSL_T; 1810 return (0); 1811} 1812 1813int 1814ptrace_clear_single_step(struct thread *td) 1815{ 1816 td->td_frame->tf_rflags &= ~PSL_T; 1817 return (0); 1818} 1819 1820int 1821fill_regs(struct thread *td, struct reg *regs) 1822{ 1823 struct trapframe *tp; 1824 1825 tp = td->td_frame; 1826 regs->r_r15 = tp->tf_r15; 1827 regs->r_r14 = tp->tf_r14; 1828 regs->r_r13 = tp->tf_r13; 1829 regs->r_r12 = tp->tf_r12; 1830 regs->r_r11 = tp->tf_r11; 1831 regs->r_r10 = tp->tf_r10; 1832 regs->r_r9 = tp->tf_r9; 1833 regs->r_r8 = tp->tf_r8; 1834 regs->r_rdi = tp->tf_rdi; 1835 regs->r_rsi = tp->tf_rsi; 1836 regs->r_rbp = tp->tf_rbp; 1837 regs->r_rbx = tp->tf_rbx; 1838 regs->r_rdx = tp->tf_rdx; 1839 regs->r_rcx = tp->tf_rcx; 1840 regs->r_rax = tp->tf_rax; 1841 regs->r_rip = tp->tf_rip; 1842 regs->r_cs = tp->tf_cs; 1843 regs->r_rflags = tp->tf_rflags; 1844 regs->r_rsp = tp->tf_rsp; 1845 regs->r_ss = tp->tf_ss; 1846 if (tp->tf_flags & TF_HASSEGS) { 1847 regs->r_ds = tp->tf_ds; 1848 regs->r_es = tp->tf_es; 1849 regs->r_fs = tp->tf_fs; 1850 regs->r_gs = tp->tf_gs; 1851 } else { 1852 regs->r_ds = 0; 1853 regs->r_es = 0; 1854 regs->r_fs = 0; 1855 regs->r_gs = 0; 1856 } 1857 return (0); 1858} 1859 1860int 1861set_regs(struct thread *td, struct reg *regs) 1862{ 1863 struct trapframe *tp; 1864 register_t rflags; 1865 1866 tp = td->td_frame; 1867 rflags = regs->r_rflags & 0xffffffff; 1868 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1869 return (EINVAL); 1870 tp->tf_r15 = regs->r_r15; 1871 tp->tf_r14 = regs->r_r14; 1872 tp->tf_r13 = regs->r_r13; 1873 tp->tf_r12 = regs->r_r12; 1874 tp->tf_r11 = regs->r_r11; 1875 tp->tf_r10 = regs->r_r10; 1876 tp->tf_r9 = regs->r_r9; 1877 tp->tf_r8 = regs->r_r8; 1878 tp->tf_rdi = regs->r_rdi; 1879 tp->tf_rsi = regs->r_rsi; 1880 tp->tf_rbp = regs->r_rbp; 1881 tp->tf_rbx = regs->r_rbx; 1882 tp->tf_rdx = regs->r_rdx; 1883 tp->tf_rcx = regs->r_rcx; 1884 tp->tf_rax = regs->r_rax; 1885 tp->tf_rip = regs->r_rip; 1886 tp->tf_cs = regs->r_cs; 1887 tp->tf_rflags = rflags; 1888 tp->tf_rsp = regs->r_rsp; 1889 tp->tf_ss = regs->r_ss; 1890 if (0) { /* XXXKIB */ 1891 tp->tf_ds = regs->r_ds; 1892 tp->tf_es = regs->r_es; 1893 tp->tf_fs = regs->r_fs; 1894 tp->tf_gs = regs->r_gs; 1895 tp->tf_flags = TF_HASSEGS; 1896 } 1897 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1898 return (0); 1899} 1900 1901/* XXX check all this stuff! */ 1902/* externalize from sv_xmm */ 1903static void 1904fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1905{ 1906 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1907 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1908 int i; 1909 1910 /* pcb -> fpregs */ 1911 bzero(fpregs, sizeof(*fpregs)); 1912 1913 /* FPU control/status */ 1914 penv_fpreg->en_cw = penv_xmm->en_cw; 1915 penv_fpreg->en_sw = penv_xmm->en_sw; 1916 penv_fpreg->en_tw = penv_xmm->en_tw; 1917 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1918 penv_fpreg->en_rip = penv_xmm->en_rip; 1919 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1920 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1921 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1922 1923 /* FPU registers */ 1924 for (i = 0; i < 8; ++i) 1925 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1926 1927 /* SSE registers */ 1928 for (i = 0; i < 16; ++i) 1929 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1930} 1931 1932/* internalize from fpregs into sv_xmm */ 1933static void 1934set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1935{ 1936 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1937 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1938 int i; 1939 1940 /* fpregs -> pcb */ 1941 /* FPU control/status */ 1942 penv_xmm->en_cw = penv_fpreg->en_cw; 1943 penv_xmm->en_sw = penv_fpreg->en_sw; 1944 penv_xmm->en_tw = penv_fpreg->en_tw; 1945 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1946 penv_xmm->en_rip = penv_fpreg->en_rip; 1947 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1948 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1949 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 1950 1951 /* FPU registers */ 1952 for (i = 0; i < 8; ++i) 1953 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1954 1955 /* SSE registers */ 1956 for (i = 0; i < 16; ++i) 1957 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1958} 1959 1960/* externalize from td->pcb */ 1961int 1962fill_fpregs(struct thread *td, struct fpreg *fpregs) 1963{ 1964 1965 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1966 return (0); 1967} 1968 1969/* internalize to td->pcb */ 1970int 1971set_fpregs(struct thread *td, struct fpreg *fpregs) 1972{ 1973 1974 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1975 return (0); 1976} 1977 1978/* 1979 * Get machine context. 1980 */ 1981int 1982get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1983{ 1984 struct trapframe *tp; 1985 1986 tp = td->td_frame; 1987 PROC_LOCK(curthread->td_proc); 1988 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1989 PROC_UNLOCK(curthread->td_proc); 1990 mcp->mc_r15 = tp->tf_r15; 1991 mcp->mc_r14 = tp->tf_r14; 1992 mcp->mc_r13 = tp->tf_r13; 1993 mcp->mc_r12 = tp->tf_r12; 1994 mcp->mc_r11 = tp->tf_r11; 1995 mcp->mc_r10 = tp->tf_r10; 1996 mcp->mc_r9 = tp->tf_r9; 1997 mcp->mc_r8 = tp->tf_r8; 1998 mcp->mc_rdi = tp->tf_rdi; 1999 mcp->mc_rsi = tp->tf_rsi; 2000 mcp->mc_rbp = tp->tf_rbp; 2001 mcp->mc_rbx = tp->tf_rbx; 2002 mcp->mc_rcx = tp->tf_rcx; 2003 mcp->mc_rflags = tp->tf_rflags; 2004 if (flags & GET_MC_CLEAR_RET) { 2005 mcp->mc_rax = 0; 2006 mcp->mc_rdx = 0; 2007 mcp->mc_rflags &= ~PSL_C; 2008 } else { 2009 mcp->mc_rax = tp->tf_rax; 2010 mcp->mc_rdx = tp->tf_rdx; 2011 } 2012 mcp->mc_rip = tp->tf_rip; 2013 mcp->mc_cs = tp->tf_cs; 2014 mcp->mc_rsp = tp->tf_rsp; 2015 mcp->mc_ss = tp->tf_ss; 2016 mcp->mc_ds = tp->tf_ds; 2017 mcp->mc_es = tp->tf_es; 2018 mcp->mc_fs = tp->tf_fs; 2019 mcp->mc_gs = tp->tf_gs; 2020 mcp->mc_flags = tp->tf_flags; 2021 mcp->mc_len = sizeof(*mcp); 2022 get_fpcontext(td, mcp); 2023 mcp->mc_fsbase = td->td_pcb->pcb_fsbase; 2024 mcp->mc_gsbase = td->td_pcb->pcb_gsbase; 2025 return (0); 2026} 2027 2028/* 2029 * Set machine context. 2030 * 2031 * However, we don't set any but the user modifiable flags, and we won't 2032 * touch the cs selector. 2033 */ 2034int 2035set_mcontext(struct thread *td, const mcontext_t *mcp) 2036{ 2037 struct trapframe *tp; 2038 long rflags; 2039 int ret; 2040 2041 tp = td->td_frame; 2042 if (mcp->mc_len != sizeof(*mcp) || 2043 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0) 2044 return (EINVAL); 2045 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 2046 (tp->tf_rflags & ~PSL_USERCHANGE); 2047 ret = set_fpcontext(td, mcp); 2048 if (ret != 0) 2049 return (ret); 2050 tp->tf_r15 = mcp->mc_r15; 2051 tp->tf_r14 = mcp->mc_r14; 2052 tp->tf_r13 = mcp->mc_r13; 2053 tp->tf_r12 = mcp->mc_r12; 2054 tp->tf_r11 = mcp->mc_r11; 2055 tp->tf_r10 = mcp->mc_r10; 2056 tp->tf_r9 = mcp->mc_r9; 2057 tp->tf_r8 = mcp->mc_r8; 2058 tp->tf_rdi = mcp->mc_rdi; 2059 tp->tf_rsi = mcp->mc_rsi; 2060 tp->tf_rbp = mcp->mc_rbp; 2061 tp->tf_rbx = mcp->mc_rbx; 2062 tp->tf_rdx = mcp->mc_rdx; 2063 tp->tf_rcx = mcp->mc_rcx; 2064 tp->tf_rax = mcp->mc_rax; 2065 tp->tf_rip = mcp->mc_rip; 2066 tp->tf_rflags = rflags; 2067 tp->tf_rsp = mcp->mc_rsp; 2068 tp->tf_ss = mcp->mc_ss; 2069 tp->tf_flags = mcp->mc_flags; 2070 if (tp->tf_flags & TF_HASSEGS) { 2071 tp->tf_ds = mcp->mc_ds; 2072 tp->tf_es = mcp->mc_es; 2073 tp->tf_fs = mcp->mc_fs; 2074 tp->tf_gs = mcp->mc_gs; 2075 } 2076 if (mcp->mc_flags & _MC_HASBASES) { 2077 td->td_pcb->pcb_fsbase = mcp->mc_fsbase; 2078 td->td_pcb->pcb_gsbase = mcp->mc_gsbase; 2079 } 2080 td->td_pcb->pcb_flags |= PCB_FULLCTX; 2081 td->td_pcb->pcb_full_iret = 1; 2082 return (0); 2083} 2084 2085static void 2086get_fpcontext(struct thread *td, mcontext_t *mcp) 2087{ 2088 2089 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 2090 mcp->mc_fpformat = fpuformat(); 2091} 2092 2093static int 2094set_fpcontext(struct thread *td, const mcontext_t *mcp) 2095{ 2096 struct savefpu *fpstate; 2097 2098 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2099 return (0); 2100 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 2101 return (EINVAL); 2102 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2103 /* We don't care what state is left in the FPU or PCB. */ 2104 fpstate_drop(td); 2105 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2106 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2107 /* 2108 * XXX we violate the dubious requirement that fpusetregs() 2109 * be called with interrupts disabled. 2110 * XXX obsolete on trap-16 systems? 2111 */ 2112 fpstate = (struct savefpu *)&mcp->mc_fpstate; 2113 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 2114 fpusetregs(td, fpstate); 2115 } else 2116 return (EINVAL); 2117 return (0); 2118} 2119 2120void 2121fpstate_drop(struct thread *td) 2122{ 2123 register_t s; 2124 2125 s = intr_disable(); 2126 if (PCPU_GET(fpcurthread) == td) 2127 fpudrop(); 2128 /* 2129 * XXX force a full drop of the fpu. The above only drops it if we 2130 * owned it. 2131 * 2132 * XXX I don't much like fpugetregs()'s semantics of doing a full 2133 * drop. Dropping only to the pcb matches fnsave's behaviour. 2134 * We only need to drop to !PCB_INITDONE in sendsig(). But 2135 * sendsig() is the only caller of fpugetregs()... perhaps we just 2136 * have too many layers. 2137 */ 2138 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 2139 intr_restore(s); 2140} 2141 2142int 2143fill_dbregs(struct thread *td, struct dbreg *dbregs) 2144{ 2145 struct pcb *pcb; 2146 2147 if (td == NULL) { 2148 dbregs->dr[0] = rdr0(); 2149 dbregs->dr[1] = rdr1(); 2150 dbregs->dr[2] = rdr2(); 2151 dbregs->dr[3] = rdr3(); 2152 dbregs->dr[6] = rdr6(); 2153 dbregs->dr[7] = rdr7(); 2154 } else { 2155 pcb = td->td_pcb; 2156 dbregs->dr[0] = pcb->pcb_dr0; 2157 dbregs->dr[1] = pcb->pcb_dr1; 2158 dbregs->dr[2] = pcb->pcb_dr2; 2159 dbregs->dr[3] = pcb->pcb_dr3; 2160 dbregs->dr[6] = pcb->pcb_dr6; 2161 dbregs->dr[7] = pcb->pcb_dr7; 2162 } 2163 dbregs->dr[4] = 0; 2164 dbregs->dr[5] = 0; 2165 dbregs->dr[8] = 0; 2166 dbregs->dr[9] = 0; 2167 dbregs->dr[10] = 0; 2168 dbregs->dr[11] = 0; 2169 dbregs->dr[12] = 0; 2170 dbregs->dr[13] = 0; 2171 dbregs->dr[14] = 0; 2172 dbregs->dr[15] = 0; 2173 return (0); 2174} 2175 2176int 2177set_dbregs(struct thread *td, struct dbreg *dbregs) 2178{ 2179 struct pcb *pcb; 2180 int i; 2181 2182 if (td == NULL) { 2183 load_dr0(dbregs->dr[0]); 2184 load_dr1(dbregs->dr[1]); 2185 load_dr2(dbregs->dr[2]); 2186 load_dr3(dbregs->dr[3]); 2187 load_dr6(dbregs->dr[6]); 2188 load_dr7(dbregs->dr[7]); 2189 } else { 2190 /* 2191 * Don't let an illegal value for dr7 get set. Specifically, 2192 * check for undefined settings. Setting these bit patterns 2193 * result in undefined behaviour and can lead to an unexpected 2194 * TRCTRAP or a general protection fault right here. 2195 * Upper bits of dr6 and dr7 must not be set 2196 */ 2197 for (i = 0; i < 4; i++) { 2198 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2199 return (EINVAL); 2200 if (td->td_frame->tf_cs == _ucode32sel && 2201 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 2202 return (EINVAL); 2203 } 2204 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 2205 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 2206 return (EINVAL); 2207 2208 pcb = td->td_pcb; 2209 2210 /* 2211 * Don't let a process set a breakpoint that is not within the 2212 * process's address space. If a process could do this, it 2213 * could halt the system by setting a breakpoint in the kernel 2214 * (if ddb was enabled). Thus, we need to check to make sure 2215 * that no breakpoints are being enabled for addresses outside 2216 * process's address space. 2217 * 2218 * XXX - what about when the watched area of the user's 2219 * address space is written into from within the kernel 2220 * ... wouldn't that still cause a breakpoint to be generated 2221 * from within kernel mode? 2222 */ 2223 2224 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2225 /* dr0 is enabled */ 2226 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2227 return (EINVAL); 2228 } 2229 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2230 /* dr1 is enabled */ 2231 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2232 return (EINVAL); 2233 } 2234 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2235 /* dr2 is enabled */ 2236 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2237 return (EINVAL); 2238 } 2239 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2240 /* dr3 is enabled */ 2241 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2242 return (EINVAL); 2243 } 2244 2245 pcb->pcb_dr0 = dbregs->dr[0]; 2246 pcb->pcb_dr1 = dbregs->dr[1]; 2247 pcb->pcb_dr2 = dbregs->dr[2]; 2248 pcb->pcb_dr3 = dbregs->dr[3]; 2249 pcb->pcb_dr6 = dbregs->dr[6]; 2250 pcb->pcb_dr7 = dbregs->dr[7]; 2251 2252 pcb->pcb_flags |= PCB_DBREGS; 2253 } 2254 2255 return (0); 2256} 2257 2258void 2259reset_dbregs(void) 2260{ 2261 2262 load_dr7(0); /* Turn off the control bits first */ 2263 load_dr0(0); 2264 load_dr1(0); 2265 load_dr2(0); 2266 load_dr3(0); 2267 load_dr6(0); 2268} 2269 2270/* 2271 * Return > 0 if a hardware breakpoint has been hit, and the 2272 * breakpoint was in user space. Return 0, otherwise. 2273 */ 2274int 2275user_dbreg_trap(void) 2276{ 2277 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2278 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2279 int nbp; /* number of breakpoints that triggered */ 2280 caddr_t addr[4]; /* breakpoint addresses */ 2281 int i; 2282 2283 dr7 = rdr7(); 2284 if ((dr7 & 0x000000ff) == 0) { 2285 /* 2286 * all GE and LE bits in the dr7 register are zero, 2287 * thus the trap couldn't have been caused by the 2288 * hardware debug registers 2289 */ 2290 return 0; 2291 } 2292 2293 nbp = 0; 2294 dr6 = rdr6(); 2295 bp = dr6 & 0x0000000f; 2296 2297 if (!bp) { 2298 /* 2299 * None of the breakpoint bits are set meaning this 2300 * trap was not caused by any of the debug registers 2301 */ 2302 return 0; 2303 } 2304 2305 /* 2306 * at least one of the breakpoints were hit, check to see 2307 * which ones and if any of them are user space addresses 2308 */ 2309 2310 if (bp & 0x01) { 2311 addr[nbp++] = (caddr_t)rdr0(); 2312 } 2313 if (bp & 0x02) { 2314 addr[nbp++] = (caddr_t)rdr1(); 2315 } 2316 if (bp & 0x04) { 2317 addr[nbp++] = (caddr_t)rdr2(); 2318 } 2319 if (bp & 0x08) { 2320 addr[nbp++] = (caddr_t)rdr3(); 2321 } 2322 2323 for (i = 0; i < nbp; i++) { 2324 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2325 /* 2326 * addr[i] is in user space 2327 */ 2328 return nbp; 2329 } 2330 } 2331 2332 /* 2333 * None of the breakpoints are in user space. 2334 */ 2335 return 0; 2336} 2337 2338#ifdef KDB 2339 2340/* 2341 * Provide inb() and outb() as functions. They are normally only available as 2342 * inline functions, thus cannot be called from the debugger. 2343 */ 2344 2345/* silence compiler warnings */ 2346u_char inb_(u_short); 2347void outb_(u_short, u_char); 2348 2349u_char 2350inb_(u_short port) 2351{ 2352 return inb(port); 2353} 2354 2355void 2356outb_(u_short port, u_char data) 2357{ 2358 outb(port, data); 2359} 2360 2361#endif /* KDB */ 2362