machdep.c revision 190619
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 190619 2009-04-01 12:53:01Z kib $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_msgbuf.h" 55#include "opt_perfmon.h" 56#include "opt_sched.h" 57 58#include <sys/param.h> 59#include <sys/proc.h> 60#include <sys/systm.h> 61#include <sys/bio.h> 62#include <sys/buf.h> 63#include <sys/bus.h> 64#include <sys/callout.h> 65#include <sys/cons.h> 66#include <sys/cpu.h> 67#include <sys/eventhandler.h> 68#include <sys/exec.h> 69#include <sys/imgact.h> 70#include <sys/kdb.h> 71#include <sys/kernel.h> 72#include <sys/ktr.h> 73#include <sys/linker.h> 74#include <sys/lock.h> 75#include <sys/malloc.h> 76#include <sys/memrange.h> 77#include <sys/msgbuf.h> 78#include <sys/mutex.h> 79#include <sys/pcpu.h> 80#include <sys/ptrace.h> 81#include <sys/reboot.h> 82#include <sys/sched.h> 83#include <sys/signalvar.h> 84#include <sys/sysctl.h> 85#include <sys/sysent.h> 86#include <sys/sysproto.h> 87#include <sys/ucontext.h> 88#include <sys/vmmeter.h> 89 90#include <vm/vm.h> 91#include <vm/vm_extern.h> 92#include <vm/vm_kern.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_object.h> 96#include <vm/vm_pager.h> 97#include <vm/vm_param.h> 98 99#ifdef DDB 100#ifndef KDB 101#error KDB must be enabled in order for DDB to work! 102#endif 103#endif 104#include <ddb/ddb.h> 105 106#include <net/netisr.h> 107 108#include <machine/clock.h> 109#include <machine/cpu.h> 110#include <machine/cputypes.h> 111#include <machine/intr_machdep.h> 112#include <machine/md_var.h> 113#include <machine/metadata.h> 114#include <machine/pc/bios.h> 115#include <machine/pcb.h> 116#include <machine/proc.h> 117#include <machine/reg.h> 118#include <machine/sigframe.h> 119#include <machine/specialreg.h> 120#ifdef PERFMON 121#include <machine/perfmon.h> 122#endif 123#include <machine/tss.h> 124#ifdef SMP 125#include <machine/smp.h> 126#endif 127 128#ifdef DEV_ATPIC 129#include <amd64/isa/icu.h> 130#else 131#include <machine/apicvar.h> 132#endif 133 134#include <isa/isareg.h> 135#include <isa/rtc.h> 136 137/* Sanity check for __curthread() */ 138CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 139 140extern u_int64_t hammer_time(u_int64_t, u_int64_t); 141 142extern void printcpuinfo(void); /* XXX header file */ 143extern void identify_cpu(void); 144extern void panicifcpuunsupported(void); 145 146#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 147#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 148 149static void cpu_startup(void *); 150static void get_fpcontext(struct thread *td, mcontext_t *mcp); 151static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 152SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 153 154#ifdef DDB 155extern vm_offset_t ksym_start, ksym_end; 156#endif 157 158/* Intel ICH registers */ 159#define ICH_PMBASE 0x400 160#define ICH_SMI_EN ICH_PMBASE + 0x30 161 162int _udatasel, _ucodesel, _ucode32sel; 163 164int cold = 1; 165 166long Maxmem = 0; 167long realmem = 0; 168 169/* 170 * The number of PHYSMAP entries must be one less than the number of 171 * PHYSSEG entries because the PHYSMAP entry that spans the largest 172 * physical address that is accessible by ISA DMA is split into two 173 * PHYSSEG entries. 174 */ 175#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 176 177vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 178vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 179 180/* must be 2 less so 0 0 can signal end of chunks */ 181#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 182#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 183 184struct kva_md_info kmi; 185 186static struct trapframe proc0_tf; 187struct region_descriptor r_gdt, r_idt; 188 189struct pcpu __pcpu[MAXCPU]; 190 191struct mtx icu_lock; 192 193struct mem_range_softc mem_range_softc; 194 195static void 196cpu_startup(dummy) 197 void *dummy; 198{ 199 uintmax_t memsize; 200 char *sysenv; 201 202 /* 203 * On MacBooks, we need to disallow the legacy USB circuit to 204 * generate an SMI# because this can cause several problems, 205 * namely: incorrect CPU frequency detection and failure to 206 * start the APs. 207 * We do this by disabling a bit in the SMI_EN (SMI Control and 208 * Enable register) of the Intel ICH LPC Interface Bridge. 209 */ 210 sysenv = getenv("smbios.system.product"); 211 if (sysenv != NULL) { 212 if (strncmp(sysenv, "MacBook", 7) == 0) { 213 if (bootverbose) 214 printf("Disabling LEGACY_USB_EN bit on " 215 "Intel ICH.\n"); 216 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 217 } 218 freeenv(sysenv); 219 } 220 221 /* 222 * Good {morning,afternoon,evening,night}. 223 */ 224 startrtclock(); 225 printcpuinfo(); 226 panicifcpuunsupported(); 227#ifdef PERFMON 228 perfmon_init(); 229#endif 230 sysenv = getenv("smbios.memory.enabled"); 231 if (sysenv != NULL) { 232 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10); 233 freeenv(sysenv); 234 } else 235 memsize = 0; 236 if (memsize > 0) 237 printf("real memory = %ju (%ju MB)\n", memsize << 10, 238 memsize >> 10); 239 else 240 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 241 ptoa((uintmax_t)Maxmem) / 1048576); 242 realmem = Maxmem; 243 /* 244 * Display any holes after the first chunk of extended memory. 245 */ 246 if (bootverbose) { 247 int indx; 248 249 printf("Physical memory chunk(s):\n"); 250 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 251 vm_paddr_t size; 252 253 size = phys_avail[indx + 1] - phys_avail[indx]; 254 printf( 255 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 256 (uintmax_t)phys_avail[indx], 257 (uintmax_t)phys_avail[indx + 1] - 1, 258 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 259 } 260 } 261 262 vm_ksubmap_init(&kmi); 263 264 printf("avail memory = %ju (%ju MB)\n", 265 ptoa((uintmax_t)cnt.v_free_count), 266 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 267 268 /* 269 * Set up buffers, so they can be used to read disk labels. 270 */ 271 bufinit(); 272 vm_pager_bufferinit(); 273 274 cpu_setregs(); 275} 276 277/* 278 * Send an interrupt to process. 279 * 280 * Stack is set up to allow sigcode stored 281 * at top to call routine, followed by kcall 282 * to sigreturn routine below. After sigreturn 283 * resets the signal mask, the stack, and the 284 * frame pointer, it returns to the user 285 * specified pc, psl. 286 */ 287void 288sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 289{ 290 struct sigframe sf, *sfp; 291 struct proc *p; 292 struct thread *td; 293 struct sigacts *psp; 294 char *sp; 295 struct trapframe *regs; 296 int sig; 297 int oonstack; 298 299 td = curthread; 300 p = td->td_proc; 301 PROC_LOCK_ASSERT(p, MA_OWNED); 302 sig = ksi->ksi_signo; 303 psp = p->p_sigacts; 304 mtx_assert(&psp->ps_mtx, MA_OWNED); 305 regs = td->td_frame; 306 oonstack = sigonstack(regs->tf_rsp); 307 308 /* Save user context. */ 309 bzero(&sf, sizeof(sf)); 310 sf.sf_uc.uc_sigmask = *mask; 311 sf.sf_uc.uc_stack = td->td_sigstk; 312 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 313 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 314 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 315 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 316 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 317 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 318 fpstate_drop(td); 319 320 /* Allocate space for the signal handler context. */ 321 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 322 SIGISMEMBER(psp->ps_sigonstack, sig)) { 323 sp = td->td_sigstk.ss_sp + 324 td->td_sigstk.ss_size - sizeof(struct sigframe); 325#if defined(COMPAT_43) 326 td->td_sigstk.ss_flags |= SS_ONSTACK; 327#endif 328 } else 329 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 330 /* Align to 16 bytes. */ 331 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 332 333 /* Translate the signal if appropriate. */ 334 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 335 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 336 337 /* Build the argument list for the signal handler. */ 338 regs->tf_rdi = sig; /* arg 1 in %rdi */ 339 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 340 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 341 /* Signal handler installed with SA_SIGINFO. */ 342 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 343 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 344 345 /* Fill in POSIX parts */ 346 sf.sf_si = ksi->ksi_info; 347 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 348 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 349 } else { 350 /* Old FreeBSD-style arguments. */ 351 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 352 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 353 sf.sf_ahu.sf_handler = catcher; 354 } 355 mtx_unlock(&psp->ps_mtx); 356 PROC_UNLOCK(p); 357 358 /* 359 * Copy the sigframe out to the user's stack. 360 */ 361 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 362#ifdef DEBUG 363 printf("process %ld has trashed its stack\n", (long)p->p_pid); 364#endif 365 PROC_LOCK(p); 366 sigexit(td, SIGILL); 367 } 368 369 regs->tf_rsp = (long)sfp; 370 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 371 regs->tf_rflags &= ~(PSL_T | PSL_D); 372 regs->tf_cs = _ucodesel; 373 PROC_LOCK(p); 374 mtx_lock(&psp->ps_mtx); 375} 376 377/* 378 * System call to cleanup state after a signal 379 * has been taken. Reset signal mask and 380 * stack state from context left by sendsig (above). 381 * Return to previous pc and psl as specified by 382 * context left by sendsig. Check carefully to 383 * make sure that the user has not modified the 384 * state to gain improper privileges. 385 * 386 * MPSAFE 387 */ 388int 389sigreturn(td, uap) 390 struct thread *td; 391 struct sigreturn_args /* { 392 const struct __ucontext *sigcntxp; 393 } */ *uap; 394{ 395 ucontext_t uc; 396 struct proc *p = td->td_proc; 397 struct trapframe *regs; 398 const ucontext_t *ucp; 399 long rflags; 400 int cs, error, ret; 401 ksiginfo_t ksi; 402 403 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 404 if (error != 0) 405 return (error); 406 ucp = &uc; 407 regs = td->td_frame; 408 rflags = ucp->uc_mcontext.mc_rflags; 409 /* 410 * Don't allow users to change privileged or reserved flags. 411 */ 412 /* 413 * XXX do allow users to change the privileged flag PSL_RF. 414 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 415 * should sometimes set it there too. tf_rflags is kept in 416 * the signal context during signal handling and there is no 417 * other place to remember it, so the PSL_RF bit may be 418 * corrupted by the signal handler without us knowing. 419 * Corruption of the PSL_RF bit at worst causes one more or 420 * one less debugger trap, so allowing it is fairly harmless. 421 */ 422 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 423 printf("sigreturn: rflags = 0x%lx\n", rflags); 424 return (EINVAL); 425 } 426 427 /* 428 * Don't allow users to load a valid privileged %cs. Let the 429 * hardware check for invalid selectors, excess privilege in 430 * other selectors, invalid %eip's and invalid %esp's. 431 */ 432 cs = ucp->uc_mcontext.mc_cs; 433 if (!CS_SECURE(cs)) { 434 printf("sigreturn: cs = 0x%x\n", cs); 435 ksiginfo_init_trap(&ksi); 436 ksi.ksi_signo = SIGBUS; 437 ksi.ksi_code = BUS_OBJERR; 438 ksi.ksi_trapno = T_PROTFLT; 439 ksi.ksi_addr = (void *)regs->tf_rip; 440 trapsignal(td, &ksi); 441 return (EINVAL); 442 } 443 444 ret = set_fpcontext(td, &ucp->uc_mcontext); 445 if (ret != 0) 446 return (ret); 447 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 448 449 PROC_LOCK(p); 450#if defined(COMPAT_43) 451 if (ucp->uc_mcontext.mc_onstack & 1) 452 td->td_sigstk.ss_flags |= SS_ONSTACK; 453 else 454 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 455#endif 456 457 td->td_sigmask = ucp->uc_sigmask; 458 SIG_CANTMASK(td->td_sigmask); 459 signotify(td); 460 PROC_UNLOCK(p); 461 td->td_pcb->pcb_flags |= PCB_FULLCTX; 462 return (EJUSTRETURN); 463} 464 465#ifdef COMPAT_FREEBSD4 466int 467freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 468{ 469 470 return sigreturn(td, (struct sigreturn_args *)uap); 471} 472#endif 473 474 475/* 476 * Machine dependent boot() routine 477 * 478 * I haven't seen anything to put here yet 479 * Possibly some stuff might be grafted back here from boot() 480 */ 481void 482cpu_boot(int howto) 483{ 484} 485 486/* Get current clock frequency for the given cpu id. */ 487int 488cpu_est_clockrate(int cpu_id, uint64_t *rate) 489{ 490 register_t reg; 491 uint64_t tsc1, tsc2; 492 493 if (pcpu_find(cpu_id) == NULL || rate == NULL) 494 return (EINVAL); 495 496 /* If we're booting, trust the rate calibrated moments ago. */ 497 if (cold) { 498 *rate = tsc_freq; 499 return (0); 500 } 501 502#ifdef SMP 503 /* Schedule ourselves on the indicated cpu. */ 504 thread_lock(curthread); 505 sched_bind(curthread, cpu_id); 506 thread_unlock(curthread); 507#endif 508 509 /* Calibrate by measuring a short delay. */ 510 reg = intr_disable(); 511 tsc1 = rdtsc(); 512 DELAY(1000); 513 tsc2 = rdtsc(); 514 intr_restore(reg); 515 516#ifdef SMP 517 thread_lock(curthread); 518 sched_unbind(curthread); 519 thread_unlock(curthread); 520#endif 521 522 /* 523 * Calculate the difference in readings, convert to Mhz, and 524 * subtract 0.5% of the total. Empirical testing has shown that 525 * overhead in DELAY() works out to approximately this value. 526 */ 527 tsc2 -= tsc1; 528 *rate = tsc2 * 1000 - tsc2 * 5; 529 return (0); 530} 531 532/* 533 * Shutdown the CPU as much as possible 534 */ 535void 536cpu_halt(void) 537{ 538 for (;;) 539 __asm__ ("hlt"); 540} 541 542void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */ 543 544static void 545cpu_idle_hlt(int busy) 546{ 547 /* 548 * we must absolutely guarentee that hlt is the next instruction 549 * after sti or we introduce a timing window. 550 */ 551 disable_intr(); 552 if (sched_runnable()) 553 enable_intr(); 554 else 555 __asm __volatile("sti; hlt"); 556} 557 558static void 559cpu_idle_acpi(int busy) 560{ 561 disable_intr(); 562 if (sched_runnable()) 563 enable_intr(); 564 else if (cpu_idle_hook) 565 cpu_idle_hook(); 566 else 567 __asm __volatile("sti; hlt"); 568} 569 570static void 571cpu_idle_spin(int busy) 572{ 573 return; 574} 575 576void (*cpu_idle_fn)(int) = cpu_idle_acpi; 577 578void 579cpu_idle(int busy) 580{ 581#ifdef SMP 582 if (mp_grab_cpu_hlt()) 583 return; 584#endif 585 cpu_idle_fn(busy); 586} 587 588/* 589 * mwait cpu power states. Lower 4 bits are sub-states. 590 */ 591#define MWAIT_C0 0xf0 592#define MWAIT_C1 0x00 593#define MWAIT_C2 0x10 594#define MWAIT_C3 0x20 595#define MWAIT_C4 0x30 596 597#define MWAIT_DISABLED 0x0 598#define MWAIT_WOKEN 0x1 599#define MWAIT_WAITING 0x2 600 601static void 602cpu_idle_mwait(int busy) 603{ 604 int *mwait; 605 606 mwait = (int *)PCPU_PTR(monitorbuf); 607 *mwait = MWAIT_WAITING; 608 if (sched_runnable()) 609 return; 610 cpu_monitor(mwait, 0, 0); 611 if (*mwait == MWAIT_WAITING) 612 cpu_mwait(0, MWAIT_C1); 613} 614 615static void 616cpu_idle_mwait_hlt(int busy) 617{ 618 int *mwait; 619 620 mwait = (int *)PCPU_PTR(monitorbuf); 621 if (busy == 0) { 622 *mwait = MWAIT_DISABLED; 623 cpu_idle_hlt(busy); 624 return; 625 } 626 *mwait = MWAIT_WAITING; 627 if (sched_runnable()) 628 return; 629 cpu_monitor(mwait, 0, 0); 630 if (*mwait == MWAIT_WAITING) 631 cpu_mwait(0, MWAIT_C1); 632} 633 634int 635cpu_idle_wakeup(int cpu) 636{ 637 struct pcpu *pcpu; 638 int *mwait; 639 640 if (cpu_idle_fn == cpu_idle_spin) 641 return (1); 642 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt) 643 return (0); 644 pcpu = pcpu_find(cpu); 645 mwait = (int *)pcpu->pc_monitorbuf; 646 /* 647 * This doesn't need to be atomic since missing the race will 648 * simply result in unnecessary IPIs. 649 */ 650 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED) 651 return (0); 652 *mwait = MWAIT_WOKEN; 653 654 return (1); 655} 656 657/* 658 * Ordered by speed/power consumption. 659 */ 660struct { 661 void *id_fn; 662 char *id_name; 663} idle_tbl[] = { 664 { cpu_idle_spin, "spin" }, 665 { cpu_idle_mwait, "mwait" }, 666 { cpu_idle_mwait_hlt, "mwait_hlt" }, 667 { cpu_idle_hlt, "hlt" }, 668 { cpu_idle_acpi, "acpi" }, 669 { NULL, NULL } 670}; 671 672static int 673idle_sysctl_available(SYSCTL_HANDLER_ARGS) 674{ 675 char *avail, *p; 676 int error; 677 int i; 678 679 avail = malloc(256, M_TEMP, M_WAITOK); 680 p = avail; 681 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 682 if (strstr(idle_tbl[i].id_name, "mwait") && 683 (cpu_feature2 & CPUID2_MON) == 0) 684 continue; 685 p += sprintf(p, "%s, ", idle_tbl[i].id_name); 686 } 687 error = sysctl_handle_string(oidp, avail, 0, req); 688 free(avail, M_TEMP); 689 return (error); 690} 691 692static int 693idle_sysctl(SYSCTL_HANDLER_ARGS) 694{ 695 char buf[16]; 696 int error; 697 char *p; 698 int i; 699 700 p = "unknown"; 701 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 702 if (idle_tbl[i].id_fn == cpu_idle_fn) { 703 p = idle_tbl[i].id_name; 704 break; 705 } 706 } 707 strncpy(buf, p, sizeof(buf)); 708 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 709 if (error != 0 || req->newptr == NULL) 710 return (error); 711 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 712 if (strstr(idle_tbl[i].id_name, "mwait") && 713 (cpu_feature2 & CPUID2_MON) == 0) 714 continue; 715 if (strcmp(idle_tbl[i].id_name, buf)) 716 continue; 717 cpu_idle_fn = idle_tbl[i].id_fn; 718 return (0); 719 } 720 return (EINVAL); 721} 722 723SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 724 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 725 726SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 727 idle_sysctl, "A", "currently selected idle function"); 728 729/* 730 * Reset registers to default values on exec. 731 */ 732void 733exec_setregs(td, entry, stack, ps_strings) 734 struct thread *td; 735 u_long entry; 736 u_long stack; 737 u_long ps_strings; 738{ 739 struct trapframe *regs = td->td_frame; 740 struct pcb *pcb = td->td_pcb; 741 742 critical_enter(); 743 wrmsr(MSR_FSBASE, 0); 744 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 745 pcb->pcb_fsbase = 0; 746 pcb->pcb_gsbase = 0; 747 critical_exit(); 748 pcb->pcb_flags &= ~(PCB_32BIT | PCB_GS32BIT); 749 load_ds(_udatasel); 750 load_es(_udatasel); 751 load_fs(_udatasel); 752 load_gs(_udatasel); 753 pcb->pcb_ds = _udatasel; 754 pcb->pcb_es = _udatasel; 755 pcb->pcb_fs = _udatasel; 756 pcb->pcb_gs = _udatasel; 757 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__; 758 759 bzero((char *)regs, sizeof(struct trapframe)); 760 regs->tf_rip = entry; 761 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 762 regs->tf_rdi = stack; /* argv */ 763 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 764 regs->tf_ss = _udatasel; 765 regs->tf_cs = _ucodesel; 766 767 /* 768 * Reset the hardware debug registers if they were in use. 769 * They won't have any meaning for the newly exec'd process. 770 */ 771 if (pcb->pcb_flags & PCB_DBREGS) { 772 pcb->pcb_dr0 = 0; 773 pcb->pcb_dr1 = 0; 774 pcb->pcb_dr2 = 0; 775 pcb->pcb_dr3 = 0; 776 pcb->pcb_dr6 = 0; 777 pcb->pcb_dr7 = 0; 778 if (pcb == PCPU_GET(curpcb)) { 779 /* 780 * Clear the debug registers on the running 781 * CPU, otherwise they will end up affecting 782 * the next process we switch to. 783 */ 784 reset_dbregs(); 785 } 786 pcb->pcb_flags &= ~PCB_DBREGS; 787 } 788 789 /* 790 * Drop the FP state if we hold it, so that the process gets a 791 * clean FP state if it uses the FPU again. 792 */ 793 fpstate_drop(td); 794} 795 796void 797cpu_setregs(void) 798{ 799 register_t cr0; 800 801 cr0 = rcr0(); 802 /* 803 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 804 * BSP. See the comments there about why we set them. 805 */ 806 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 807 load_cr0(cr0); 808} 809 810/* 811 * Initialize amd64 and configure to run kernel 812 */ 813 814/* 815 * Initialize segments & interrupt table 816 */ 817 818struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 819static struct gate_descriptor idt0[NIDT]; 820struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 821 822static char dblfault_stack[PAGE_SIZE] __aligned(16); 823 824static char nmi0_stack[PAGE_SIZE] __aligned(16); 825CTASSERT(sizeof(struct nmi_pcpu) == 16); 826 827struct amd64tss common_tss[MAXCPU]; 828 829/* 830 * Software prototypes -- in more palatable form. 831 * 832 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same 833 * slots as corresponding segments for i386 kernel. 834 */ 835struct soft_segment_descriptor gdt_segs[] = { 836/* GNULL_SEL 0 Null Descriptor */ 837{ .ssd_base = 0x0, 838 .ssd_limit = 0x0, 839 .ssd_type = 0, 840 .ssd_dpl = 0, 841 .ssd_p = 0, 842 .ssd_long = 0, 843 .ssd_def32 = 0, 844 .ssd_gran = 0 }, 845/* GNULL2_SEL 1 Null Descriptor */ 846{ .ssd_base = 0x0, 847 .ssd_limit = 0x0, 848 .ssd_type = 0, 849 .ssd_dpl = 0, 850 .ssd_p = 0, 851 .ssd_long = 0, 852 .ssd_def32 = 0, 853 .ssd_gran = 0 }, 854/* GUFS32_SEL 2 32 bit %gs Descriptor for user */ 855{ .ssd_base = 0x0, 856 .ssd_limit = 0xfffff, 857 .ssd_type = SDT_MEMRWA, 858 .ssd_dpl = SEL_UPL, 859 .ssd_p = 1, 860 .ssd_long = 0, 861 .ssd_def32 = 1, 862 .ssd_gran = 1 }, 863/* GUGS32_SEL 3 32 bit %fs Descriptor for user */ 864{ .ssd_base = 0x0, 865 .ssd_limit = 0xfffff, 866 .ssd_type = SDT_MEMRWA, 867 .ssd_dpl = SEL_UPL, 868 .ssd_p = 1, 869 .ssd_long = 0, 870 .ssd_def32 = 1, 871 .ssd_gran = 1 }, 872/* GCODE_SEL 4 Code Descriptor for kernel */ 873{ .ssd_base = 0x0, 874 .ssd_limit = 0xfffff, 875 .ssd_type = SDT_MEMERA, 876 .ssd_dpl = SEL_KPL, 877 .ssd_p = 1, 878 .ssd_long = 1, 879 .ssd_def32 = 0, 880 .ssd_gran = 1 }, 881/* GDATA_SEL 5 Data Descriptor for kernel */ 882{ .ssd_base = 0x0, 883 .ssd_limit = 0xfffff, 884 .ssd_type = SDT_MEMRWA, 885 .ssd_dpl = SEL_KPL, 886 .ssd_p = 1, 887 .ssd_long = 1, 888 .ssd_def32 = 0, 889 .ssd_gran = 1 }, 890/* GUCODE32_SEL 6 32 bit Code Descriptor for user */ 891{ .ssd_base = 0x0, 892 .ssd_limit = 0xfffff, 893 .ssd_type = SDT_MEMERA, 894 .ssd_dpl = SEL_UPL, 895 .ssd_p = 1, 896 .ssd_long = 0, 897 .ssd_def32 = 1, 898 .ssd_gran = 1 }, 899/* GUDATA_SEL 7 32/64 bit Data Descriptor for user */ 900{ .ssd_base = 0x0, 901 .ssd_limit = 0xfffff, 902 .ssd_type = SDT_MEMRWA, 903 .ssd_dpl = SEL_UPL, 904 .ssd_p = 1, 905 .ssd_long = 0, 906 .ssd_def32 = 1, 907 .ssd_gran = 1 }, 908/* GUCODE_SEL 8 64 bit Code Descriptor for user */ 909{ .ssd_base = 0x0, 910 .ssd_limit = 0xfffff, 911 .ssd_type = SDT_MEMERA, 912 .ssd_dpl = SEL_UPL, 913 .ssd_p = 1, 914 .ssd_long = 1, 915 .ssd_def32 = 0, 916 .ssd_gran = 1 }, 917/* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 918{ .ssd_base = 0x0, 919 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1, 920 .ssd_type = SDT_SYSTSS, 921 .ssd_dpl = SEL_KPL, 922 .ssd_p = 1, 923 .ssd_long = 0, 924 .ssd_def32 = 0, 925 .ssd_gran = 0 }, 926/* Actually, the TSS is a system descriptor which is double size */ 927{ .ssd_base = 0x0, 928 .ssd_limit = 0x0, 929 .ssd_type = 0, 930 .ssd_dpl = 0, 931 .ssd_p = 0, 932 .ssd_long = 0, 933 .ssd_def32 = 0, 934 .ssd_gran = 0 }, 935/* GUSERLDT_SEL 11 LDT Descriptor */ 936{ .ssd_base = 0x0, 937 .ssd_limit = 0x0, 938 .ssd_type = 0, 939 .ssd_dpl = 0, 940 .ssd_p = 0, 941 .ssd_long = 0, 942 .ssd_def32 = 0, 943 .ssd_gran = 0 }, 944/* GUSERLDT_SEL 12 LDT Descriptor, double size */ 945{ .ssd_base = 0x0, 946 .ssd_limit = 0x0, 947 .ssd_type = 0, 948 .ssd_dpl = 0, 949 .ssd_p = 0, 950 .ssd_long = 0, 951 .ssd_def32 = 0, 952 .ssd_gran = 0 }, 953}; 954 955void 956setidt(idx, func, typ, dpl, ist) 957 int idx; 958 inthand_t *func; 959 int typ; 960 int dpl; 961 int ist; 962{ 963 struct gate_descriptor *ip; 964 965 ip = idt + idx; 966 ip->gd_looffset = (uintptr_t)func; 967 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 968 ip->gd_ist = ist; 969 ip->gd_xx = 0; 970 ip->gd_type = typ; 971 ip->gd_dpl = dpl; 972 ip->gd_p = 1; 973 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 974} 975 976extern inthand_t 977 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 978 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 979 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 980 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 981 IDTVEC(xmm), IDTVEC(dblfault), 982 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 983 984void 985sdtossd(sd, ssd) 986 struct user_segment_descriptor *sd; 987 struct soft_segment_descriptor *ssd; 988{ 989 990 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 991 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 992 ssd->ssd_type = sd->sd_type; 993 ssd->ssd_dpl = sd->sd_dpl; 994 ssd->ssd_p = sd->sd_p; 995 ssd->ssd_long = sd->sd_long; 996 ssd->ssd_def32 = sd->sd_def32; 997 ssd->ssd_gran = sd->sd_gran; 998} 999 1000void 1001ssdtosd(ssd, sd) 1002 struct soft_segment_descriptor *ssd; 1003 struct user_segment_descriptor *sd; 1004{ 1005 1006 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1007 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 1008 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1009 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1010 sd->sd_type = ssd->ssd_type; 1011 sd->sd_dpl = ssd->ssd_dpl; 1012 sd->sd_p = ssd->ssd_p; 1013 sd->sd_long = ssd->ssd_long; 1014 sd->sd_def32 = ssd->ssd_def32; 1015 sd->sd_gran = ssd->ssd_gran; 1016} 1017 1018void 1019ssdtosyssd(ssd, sd) 1020 struct soft_segment_descriptor *ssd; 1021 struct system_segment_descriptor *sd; 1022{ 1023 1024 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 1025 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 1026 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 1027 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 1028 sd->sd_type = ssd->ssd_type; 1029 sd->sd_dpl = ssd->ssd_dpl; 1030 sd->sd_p = ssd->ssd_p; 1031 sd->sd_gran = ssd->ssd_gran; 1032} 1033 1034#if !defined(DEV_ATPIC) && defined(DEV_ISA) 1035#include <isa/isavar.h> 1036#include <isa/isareg.h> 1037/* 1038 * Return a bitmap of the current interrupt requests. This is 8259-specific 1039 * and is only suitable for use at probe time. 1040 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 1041 * It shouldn't be here. There should probably be an APIC centric 1042 * implementation in the apic driver code, if at all. 1043 */ 1044intrmask_t 1045isa_irq_pending(void) 1046{ 1047 u_char irr1; 1048 u_char irr2; 1049 1050 irr1 = inb(IO_ICU1); 1051 irr2 = inb(IO_ICU2); 1052 return ((irr2 << 8) | irr1); 1053} 1054#endif 1055 1056u_int basemem; 1057 1058/* 1059 * Populate the (physmap) array with base/bound pairs describing the 1060 * available physical memory in the system, then test this memory and 1061 * build the phys_avail array describing the actually-available memory. 1062 * 1063 * If we cannot accurately determine the physical memory map, then use 1064 * value from the 0xE801 call, and failing that, the RTC. 1065 * 1066 * Total memory size may be set by the kernel environment variable 1067 * hw.physmem or the compile-time define MAXMEM. 1068 * 1069 * XXX first should be vm_paddr_t. 1070 */ 1071static void 1072getmemsize(caddr_t kmdp, u_int64_t first) 1073{ 1074 int i, off, physmap_idx, pa_indx, da_indx; 1075 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1076 u_long physmem_tunable; 1077 pt_entry_t *pte; 1078 struct bios_smap *smapbase, *smap, *smapend; 1079 u_int32_t smapsize; 1080 quad_t dcons_addr, dcons_size; 1081 1082 bzero(physmap, sizeof(physmap)); 1083 basemem = 0; 1084 physmap_idx = 0; 1085 1086 /* 1087 * get memory map from INT 15:E820, kindly supplied by the loader. 1088 * 1089 * subr_module.c says: 1090 * "Consumer may safely assume that size value precedes data." 1091 * ie: an int32_t immediately precedes smap. 1092 */ 1093 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1094 MODINFO_METADATA | MODINFOMD_SMAP); 1095 if (smapbase == NULL) 1096 panic("No BIOS smap info from loader!"); 1097 1098 smapsize = *((u_int32_t *)smapbase - 1); 1099 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1100 1101 for (smap = smapbase; smap < smapend; smap++) { 1102 if (boothowto & RB_VERBOSE) 1103 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1104 smap->type, smap->base, smap->length); 1105 1106 if (smap->type != SMAP_TYPE_MEMORY) 1107 continue; 1108 1109 if (smap->length == 0) 1110 continue; 1111 1112 for (i = 0; i <= physmap_idx; i += 2) { 1113 if (smap->base < physmap[i + 1]) { 1114 if (boothowto & RB_VERBOSE) 1115 printf( 1116 "Overlapping or non-monotonic memory region, ignoring second region\n"); 1117 continue; 1118 } 1119 } 1120 1121 if (smap->base == physmap[physmap_idx + 1]) { 1122 physmap[physmap_idx + 1] += smap->length; 1123 continue; 1124 } 1125 1126 physmap_idx += 2; 1127 if (physmap_idx == PHYSMAP_SIZE) { 1128 printf( 1129 "Too many segments in the physical address map, giving up\n"); 1130 break; 1131 } 1132 physmap[physmap_idx] = smap->base; 1133 physmap[physmap_idx + 1] = smap->base + smap->length; 1134 } 1135 1136 /* 1137 * Find the 'base memory' segment for SMP 1138 */ 1139 basemem = 0; 1140 for (i = 0; i <= physmap_idx; i += 2) { 1141 if (physmap[i] == 0x00000000) { 1142 basemem = physmap[i + 1] / 1024; 1143 break; 1144 } 1145 } 1146 if (basemem == 0) 1147 panic("BIOS smap did not include a basemem segment!"); 1148 1149#ifdef SMP 1150 /* make hole for AP bootstrap code */ 1151 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1152#endif 1153 1154 /* 1155 * Maxmem isn't the "maximum memory", it's one larger than the 1156 * highest page of the physical address space. It should be 1157 * called something like "Maxphyspage". We may adjust this 1158 * based on ``hw.physmem'' and the results of the memory test. 1159 */ 1160 Maxmem = atop(physmap[physmap_idx + 1]); 1161 1162#ifdef MAXMEM 1163 Maxmem = MAXMEM / 4; 1164#endif 1165 1166 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1167 Maxmem = atop(physmem_tunable); 1168 1169 /* 1170 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1171 * in the system. 1172 */ 1173 if (Maxmem > atop(physmap[physmap_idx + 1])) 1174 Maxmem = atop(physmap[physmap_idx + 1]); 1175 1176 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1177 (boothowto & RB_VERBOSE)) 1178 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1179 1180 /* call pmap initialization to make new kernel address space */ 1181 pmap_bootstrap(&first); 1182 1183 /* 1184 * Size up each available chunk of physical memory. 1185 */ 1186 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1187 pa_indx = 0; 1188 da_indx = 1; 1189 phys_avail[pa_indx++] = physmap[0]; 1190 phys_avail[pa_indx] = physmap[0]; 1191 dump_avail[da_indx] = physmap[0]; 1192 pte = CMAP1; 1193 1194 /* 1195 * Get dcons buffer address 1196 */ 1197 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1198 getenv_quad("dcons.size", &dcons_size) == 0) 1199 dcons_addr = 0; 1200 1201 /* 1202 * physmap is in bytes, so when converting to page boundaries, 1203 * round up the start address and round down the end address. 1204 */ 1205 for (i = 0; i <= physmap_idx; i += 2) { 1206 vm_paddr_t end; 1207 1208 end = ptoa((vm_paddr_t)Maxmem); 1209 if (physmap[i + 1] < end) 1210 end = trunc_page(physmap[i + 1]); 1211 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1212 int tmp, page_bad, full; 1213 int *ptr = (int *)CADDR1; 1214 1215 full = FALSE; 1216 /* 1217 * block out kernel memory as not available. 1218 */ 1219 if (pa >= 0x100000 && pa < first) 1220 goto do_dump_avail; 1221 1222 /* 1223 * block out dcons buffer 1224 */ 1225 if (dcons_addr > 0 1226 && pa >= trunc_page(dcons_addr) 1227 && pa < dcons_addr + dcons_size) 1228 goto do_dump_avail; 1229 1230 page_bad = FALSE; 1231 1232 /* 1233 * map page into kernel: valid, read/write,non-cacheable 1234 */ 1235 *pte = pa | PG_V | PG_RW | PG_N; 1236 invltlb(); 1237 1238 tmp = *(int *)ptr; 1239 /* 1240 * Test for alternating 1's and 0's 1241 */ 1242 *(volatile int *)ptr = 0xaaaaaaaa; 1243 if (*(volatile int *)ptr != 0xaaaaaaaa) 1244 page_bad = TRUE; 1245 /* 1246 * Test for alternating 0's and 1's 1247 */ 1248 *(volatile int *)ptr = 0x55555555; 1249 if (*(volatile int *)ptr != 0x55555555) 1250 page_bad = TRUE; 1251 /* 1252 * Test for all 1's 1253 */ 1254 *(volatile int *)ptr = 0xffffffff; 1255 if (*(volatile int *)ptr != 0xffffffff) 1256 page_bad = TRUE; 1257 /* 1258 * Test for all 0's 1259 */ 1260 *(volatile int *)ptr = 0x0; 1261 if (*(volatile int *)ptr != 0x0) 1262 page_bad = TRUE; 1263 /* 1264 * Restore original value. 1265 */ 1266 *(int *)ptr = tmp; 1267 1268 /* 1269 * Adjust array of valid/good pages. 1270 */ 1271 if (page_bad == TRUE) 1272 continue; 1273 /* 1274 * If this good page is a continuation of the 1275 * previous set of good pages, then just increase 1276 * the end pointer. Otherwise start a new chunk. 1277 * Note that "end" points one higher than end, 1278 * making the range >= start and < end. 1279 * If we're also doing a speculative memory 1280 * test and we at or past the end, bump up Maxmem 1281 * so that we keep going. The first bad page 1282 * will terminate the loop. 1283 */ 1284 if (phys_avail[pa_indx] == pa) { 1285 phys_avail[pa_indx] += PAGE_SIZE; 1286 } else { 1287 pa_indx++; 1288 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1289 printf( 1290 "Too many holes in the physical address space, giving up\n"); 1291 pa_indx--; 1292 full = TRUE; 1293 goto do_dump_avail; 1294 } 1295 phys_avail[pa_indx++] = pa; /* start */ 1296 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1297 } 1298 physmem++; 1299do_dump_avail: 1300 if (dump_avail[da_indx] == pa) { 1301 dump_avail[da_indx] += PAGE_SIZE; 1302 } else { 1303 da_indx++; 1304 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1305 da_indx--; 1306 goto do_next; 1307 } 1308 dump_avail[da_indx++] = pa; /* start */ 1309 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1310 } 1311do_next: 1312 if (full) 1313 break; 1314 } 1315 } 1316 *pte = 0; 1317 invltlb(); 1318 1319 /* 1320 * XXX 1321 * The last chunk must contain at least one page plus the message 1322 * buffer to avoid complicating other code (message buffer address 1323 * calculation, etc.). 1324 */ 1325 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1326 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1327 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1328 phys_avail[pa_indx--] = 0; 1329 phys_avail[pa_indx--] = 0; 1330 } 1331 1332 Maxmem = atop(phys_avail[pa_indx]); 1333 1334 /* Trim off space for the message buffer. */ 1335 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1336 1337 /* Map the message buffer. */ 1338 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1339 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1340 off); 1341} 1342 1343u_int64_t 1344hammer_time(u_int64_t modulep, u_int64_t physfree) 1345{ 1346 caddr_t kmdp; 1347 int gsel_tss, x; 1348 struct pcpu *pc; 1349 struct nmi_pcpu *np; 1350 u_int64_t msr; 1351 char *env; 1352 1353 thread0.td_kstack = physfree + KERNBASE; 1354 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1355 physfree += KSTACK_PAGES * PAGE_SIZE; 1356 thread0.td_pcb = (struct pcb *) 1357 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1358 1359 /* 1360 * This may be done better later if it gets more high level 1361 * components in it. If so just link td->td_proc here. 1362 */ 1363 proc_linkup0(&proc0, &thread0); 1364 1365 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1366 preload_bootstrap_relocate(KERNBASE); 1367 kmdp = preload_search_by_type("elf kernel"); 1368 if (kmdp == NULL) 1369 kmdp = preload_search_by_type("elf64 kernel"); 1370 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1371 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1372#ifdef DDB 1373 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1374 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1375#endif 1376 1377 /* Init basic tunables, hz etc */ 1378 init_param1(); 1379 1380 /* 1381 * make gdt memory segments 1382 */ 1383 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1384 1385 for (x = 0; x < NGDT; x++) { 1386 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1387 ssdtosd(&gdt_segs[x], &gdt[x]); 1388 } 1389 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1390 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1391 1392 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1393 r_gdt.rd_base = (long) gdt; 1394 lgdt(&r_gdt); 1395 pc = &__pcpu[0]; 1396 1397 wrmsr(MSR_FSBASE, 0); /* User value */ 1398 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1399 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1400 1401 pcpu_init(pc, 0, sizeof(struct pcpu)); 1402 PCPU_SET(prvspace, pc); 1403 PCPU_SET(curthread, &thread0); 1404 PCPU_SET(curpcb, thread0.td_pcb); 1405 PCPU_SET(tssp, &common_tss[0]); 1406 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1407 1408 /* 1409 * Initialize mutexes. 1410 * 1411 * icu_lock: in order to allow an interrupt to occur in a critical 1412 * section, to set pcpu->ipending (etc...) properly, we 1413 * must be able to get the icu lock, so it can't be 1414 * under witness. 1415 */ 1416 mutex_init(); 1417 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1418 1419 /* exceptions */ 1420 for (x = 0; x < NIDT; x++) 1421 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1422 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1423 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1424 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1425 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1426 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1427 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1428 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1429 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1430 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1431 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1432 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1433 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1434 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1435 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1436 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1437 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1438 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1439 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1440 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1441 1442 r_idt.rd_limit = sizeof(idt0) - 1; 1443 r_idt.rd_base = (long) idt; 1444 lidt(&r_idt); 1445 1446 /* 1447 * Initialize the i8254 before the console so that console 1448 * initialization can use DELAY(). 1449 */ 1450 i8254_init(); 1451 1452 /* 1453 * Initialize the console before we print anything out. 1454 */ 1455 cninit(); 1456 1457#ifdef DEV_ISA 1458#ifdef DEV_ATPIC 1459 elcr_probe(); 1460 atpic_startup(); 1461#else 1462 /* Reset and mask the atpics and leave them shut down. */ 1463 atpic_reset(); 1464 1465 /* 1466 * Point the ICU spurious interrupt vectors at the APIC spurious 1467 * interrupt handler. 1468 */ 1469 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1470 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1471#endif 1472#else 1473#error "have you forgotten the isa device?"; 1474#endif 1475 1476 kdb_init(); 1477 1478#ifdef KDB 1479 if (boothowto & RB_KDB) 1480 kdb_enter(KDB_WHY_BOOTFLAGS, 1481 "Boot flags requested debugger"); 1482#endif 1483 1484 identify_cpu(); /* Final stage of CPU initialization */ 1485 initializecpu(); /* Initialize CPU registers */ 1486 1487 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1488 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1489 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1490 /* Ensure the stack is aligned to 16 bytes */ 1491 common_tss[0].tss_rsp0 &= ~0xFul; 1492 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1493 1494 /* doublefault stack space, runs on ist1 */ 1495 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1496 1497 /* 1498 * NMI stack, runs on ist2. The pcpu pointer is stored just 1499 * above the start of the ist2 stack. 1500 */ 1501 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 1502 np->np_pcpu = (register_t) pc; 1503 common_tss[0].tss_ist2 = (long) np; 1504 1505 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1506 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1507 1508 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1509 ltr(gsel_tss); 1510 1511 /* Set up the fast syscall stuff */ 1512 msr = rdmsr(MSR_EFER) | EFER_SCE; 1513 wrmsr(MSR_EFER, msr); 1514 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1515 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1516 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1517 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1518 wrmsr(MSR_STAR, msr); 1519 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1520 1521 getmemsize(kmdp, physfree); 1522 init_param2(physmem); 1523 1524 /* now running on new page tables, configured,and u/iom is accessible */ 1525 1526 msgbufinit(msgbufp, MSGBUF_SIZE); 1527 fpuinit(); 1528 1529 /* transfer to user mode */ 1530 1531 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1532 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1533 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1534 1535 load_ds(_udatasel); 1536 load_es(_udatasel); 1537 load_fs(_udatasel); 1538 1539 /* setup proc 0's pcb */ 1540 thread0.td_pcb->pcb_flags = 0; 1541 thread0.td_pcb->pcb_cr3 = KPML4phys; 1542 thread0.td_frame = &proc0_tf; 1543 1544 env = getenv("kernelname"); 1545 if (env != NULL) 1546 strlcpy(kernelname, env, sizeof(kernelname)); 1547 1548#ifdef XENHVM 1549 if (inw(0x10) == 0x49d2) { 1550 if (bootverbose) 1551 printf("Xen detected: disabling emulated block and network devices\n"); 1552 outw(0x10, 3); 1553 } 1554#endif 1555 1556 /* Location of kernel stack for locore */ 1557 return ((u_int64_t)thread0.td_pcb); 1558} 1559 1560void 1561cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1562{ 1563 1564 pcpu->pc_acpi_id = 0xffffffff; 1565} 1566 1567void 1568spinlock_enter(void) 1569{ 1570 struct thread *td; 1571 1572 td = curthread; 1573 if (td->td_md.md_spinlock_count == 0) 1574 td->td_md.md_saved_flags = intr_disable(); 1575 td->td_md.md_spinlock_count++; 1576 critical_enter(); 1577} 1578 1579void 1580spinlock_exit(void) 1581{ 1582 struct thread *td; 1583 1584 td = curthread; 1585 critical_exit(); 1586 td->td_md.md_spinlock_count--; 1587 if (td->td_md.md_spinlock_count == 0) 1588 intr_restore(td->td_md.md_saved_flags); 1589} 1590 1591/* 1592 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1593 * we want to start a backtrace from the function that caused us to enter 1594 * the debugger. We have the context in the trapframe, but base the trace 1595 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1596 * enough for a backtrace. 1597 */ 1598void 1599makectx(struct trapframe *tf, struct pcb *pcb) 1600{ 1601 1602 pcb->pcb_r12 = tf->tf_r12; 1603 pcb->pcb_r13 = tf->tf_r13; 1604 pcb->pcb_r14 = tf->tf_r14; 1605 pcb->pcb_r15 = tf->tf_r15; 1606 pcb->pcb_rbp = tf->tf_rbp; 1607 pcb->pcb_rbx = tf->tf_rbx; 1608 pcb->pcb_rip = tf->tf_rip; 1609 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1610} 1611 1612int 1613ptrace_set_pc(struct thread *td, unsigned long addr) 1614{ 1615 td->td_frame->tf_rip = addr; 1616 return (0); 1617} 1618 1619int 1620ptrace_single_step(struct thread *td) 1621{ 1622 td->td_frame->tf_rflags |= PSL_T; 1623 return (0); 1624} 1625 1626int 1627ptrace_clear_single_step(struct thread *td) 1628{ 1629 td->td_frame->tf_rflags &= ~PSL_T; 1630 return (0); 1631} 1632 1633int 1634fill_regs(struct thread *td, struct reg *regs) 1635{ 1636 struct trapframe *tp; 1637 1638 tp = td->td_frame; 1639 regs->r_r15 = tp->tf_r15; 1640 regs->r_r14 = tp->tf_r14; 1641 regs->r_r13 = tp->tf_r13; 1642 regs->r_r12 = tp->tf_r12; 1643 regs->r_r11 = tp->tf_r11; 1644 regs->r_r10 = tp->tf_r10; 1645 regs->r_r9 = tp->tf_r9; 1646 regs->r_r8 = tp->tf_r8; 1647 regs->r_rdi = tp->tf_rdi; 1648 regs->r_rsi = tp->tf_rsi; 1649 regs->r_rbp = tp->tf_rbp; 1650 regs->r_rbx = tp->tf_rbx; 1651 regs->r_rdx = tp->tf_rdx; 1652 regs->r_rcx = tp->tf_rcx; 1653 regs->r_rax = tp->tf_rax; 1654 regs->r_rip = tp->tf_rip; 1655 regs->r_cs = tp->tf_cs; 1656 regs->r_rflags = tp->tf_rflags; 1657 regs->r_rsp = tp->tf_rsp; 1658 regs->r_ss = tp->tf_ss; 1659 return (0); 1660} 1661 1662int 1663set_regs(struct thread *td, struct reg *regs) 1664{ 1665 struct trapframe *tp; 1666 register_t rflags; 1667 1668 tp = td->td_frame; 1669 rflags = regs->r_rflags & 0xffffffff; 1670 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1671 return (EINVAL); 1672 tp->tf_r15 = regs->r_r15; 1673 tp->tf_r14 = regs->r_r14; 1674 tp->tf_r13 = regs->r_r13; 1675 tp->tf_r12 = regs->r_r12; 1676 tp->tf_r11 = regs->r_r11; 1677 tp->tf_r10 = regs->r_r10; 1678 tp->tf_r9 = regs->r_r9; 1679 tp->tf_r8 = regs->r_r8; 1680 tp->tf_rdi = regs->r_rdi; 1681 tp->tf_rsi = regs->r_rsi; 1682 tp->tf_rbp = regs->r_rbp; 1683 tp->tf_rbx = regs->r_rbx; 1684 tp->tf_rdx = regs->r_rdx; 1685 tp->tf_rcx = regs->r_rcx; 1686 tp->tf_rax = regs->r_rax; 1687 tp->tf_rip = regs->r_rip; 1688 tp->tf_cs = regs->r_cs; 1689 tp->tf_rflags = rflags; 1690 tp->tf_rsp = regs->r_rsp; 1691 tp->tf_ss = regs->r_ss; 1692 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1693 return (0); 1694} 1695 1696/* XXX check all this stuff! */ 1697/* externalize from sv_xmm */ 1698static void 1699fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1700{ 1701 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1702 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1703 int i; 1704 1705 /* pcb -> fpregs */ 1706 bzero(fpregs, sizeof(*fpregs)); 1707 1708 /* FPU control/status */ 1709 penv_fpreg->en_cw = penv_xmm->en_cw; 1710 penv_fpreg->en_sw = penv_xmm->en_sw; 1711 penv_fpreg->en_tw = penv_xmm->en_tw; 1712 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1713 penv_fpreg->en_rip = penv_xmm->en_rip; 1714 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1715 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1716 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1717 1718 /* FPU registers */ 1719 for (i = 0; i < 8; ++i) 1720 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1721 1722 /* SSE registers */ 1723 for (i = 0; i < 16; ++i) 1724 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1725} 1726 1727/* internalize from fpregs into sv_xmm */ 1728static void 1729set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1730{ 1731 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1732 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1733 int i; 1734 1735 /* fpregs -> pcb */ 1736 /* FPU control/status */ 1737 penv_xmm->en_cw = penv_fpreg->en_cw; 1738 penv_xmm->en_sw = penv_fpreg->en_sw; 1739 penv_xmm->en_tw = penv_fpreg->en_tw; 1740 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1741 penv_xmm->en_rip = penv_fpreg->en_rip; 1742 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1743 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1744 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 1745 1746 /* FPU registers */ 1747 for (i = 0; i < 8; ++i) 1748 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1749 1750 /* SSE registers */ 1751 for (i = 0; i < 16; ++i) 1752 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1753} 1754 1755/* externalize from td->pcb */ 1756int 1757fill_fpregs(struct thread *td, struct fpreg *fpregs) 1758{ 1759 1760 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1761 return (0); 1762} 1763 1764/* internalize to td->pcb */ 1765int 1766set_fpregs(struct thread *td, struct fpreg *fpregs) 1767{ 1768 1769 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1770 return (0); 1771} 1772 1773/* 1774 * Get machine context. 1775 */ 1776int 1777get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1778{ 1779 struct trapframe *tp; 1780 1781 tp = td->td_frame; 1782 PROC_LOCK(curthread->td_proc); 1783 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1784 PROC_UNLOCK(curthread->td_proc); 1785 mcp->mc_r15 = tp->tf_r15; 1786 mcp->mc_r14 = tp->tf_r14; 1787 mcp->mc_r13 = tp->tf_r13; 1788 mcp->mc_r12 = tp->tf_r12; 1789 mcp->mc_r11 = tp->tf_r11; 1790 mcp->mc_r10 = tp->tf_r10; 1791 mcp->mc_r9 = tp->tf_r9; 1792 mcp->mc_r8 = tp->tf_r8; 1793 mcp->mc_rdi = tp->tf_rdi; 1794 mcp->mc_rsi = tp->tf_rsi; 1795 mcp->mc_rbp = tp->tf_rbp; 1796 mcp->mc_rbx = tp->tf_rbx; 1797 mcp->mc_rcx = tp->tf_rcx; 1798 mcp->mc_rflags = tp->tf_rflags; 1799 if (flags & GET_MC_CLEAR_RET) { 1800 mcp->mc_rax = 0; 1801 mcp->mc_rdx = 0; 1802 mcp->mc_rflags &= ~PSL_C; 1803 } else { 1804 mcp->mc_rax = tp->tf_rax; 1805 mcp->mc_rdx = tp->tf_rdx; 1806 } 1807 mcp->mc_rip = tp->tf_rip; 1808 mcp->mc_cs = tp->tf_cs; 1809 mcp->mc_rsp = tp->tf_rsp; 1810 mcp->mc_ss = tp->tf_ss; 1811 mcp->mc_len = sizeof(*mcp); 1812 get_fpcontext(td, mcp); 1813 return (0); 1814} 1815 1816/* 1817 * Set machine context. 1818 * 1819 * However, we don't set any but the user modifiable flags, and we won't 1820 * touch the cs selector. 1821 */ 1822int 1823set_mcontext(struct thread *td, const mcontext_t *mcp) 1824{ 1825 struct trapframe *tp; 1826 long rflags; 1827 int ret; 1828 1829 tp = td->td_frame; 1830 if (mcp->mc_len != sizeof(*mcp)) 1831 return (EINVAL); 1832 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1833 (tp->tf_rflags & ~PSL_USERCHANGE); 1834 ret = set_fpcontext(td, mcp); 1835 if (ret != 0) 1836 return (ret); 1837 tp->tf_r15 = mcp->mc_r15; 1838 tp->tf_r14 = mcp->mc_r14; 1839 tp->tf_r13 = mcp->mc_r13; 1840 tp->tf_r12 = mcp->mc_r12; 1841 tp->tf_r11 = mcp->mc_r11; 1842 tp->tf_r10 = mcp->mc_r10; 1843 tp->tf_r9 = mcp->mc_r9; 1844 tp->tf_r8 = mcp->mc_r8; 1845 tp->tf_rdi = mcp->mc_rdi; 1846 tp->tf_rsi = mcp->mc_rsi; 1847 tp->tf_rbp = mcp->mc_rbp; 1848 tp->tf_rbx = mcp->mc_rbx; 1849 tp->tf_rdx = mcp->mc_rdx; 1850 tp->tf_rcx = mcp->mc_rcx; 1851 tp->tf_rax = mcp->mc_rax; 1852 tp->tf_rip = mcp->mc_rip; 1853 tp->tf_rflags = rflags; 1854 tp->tf_rsp = mcp->mc_rsp; 1855 tp->tf_ss = mcp->mc_ss; 1856 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1857 return (0); 1858} 1859 1860static void 1861get_fpcontext(struct thread *td, mcontext_t *mcp) 1862{ 1863 1864 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1865 mcp->mc_fpformat = fpuformat(); 1866} 1867 1868static int 1869set_fpcontext(struct thread *td, const mcontext_t *mcp) 1870{ 1871 struct savefpu *fpstate; 1872 1873 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1874 return (0); 1875 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1876 return (EINVAL); 1877 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1878 /* We don't care what state is left in the FPU or PCB. */ 1879 fpstate_drop(td); 1880 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1881 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1882 /* 1883 * XXX we violate the dubious requirement that fpusetregs() 1884 * be called with interrupts disabled. 1885 * XXX obsolete on trap-16 systems? 1886 */ 1887 fpstate = (struct savefpu *)&mcp->mc_fpstate; 1888 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 1889 fpusetregs(td, fpstate); 1890 } else 1891 return (EINVAL); 1892 return (0); 1893} 1894 1895void 1896fpstate_drop(struct thread *td) 1897{ 1898 register_t s; 1899 1900 s = intr_disable(); 1901 if (PCPU_GET(fpcurthread) == td) 1902 fpudrop(); 1903 /* 1904 * XXX force a full drop of the fpu. The above only drops it if we 1905 * owned it. 1906 * 1907 * XXX I don't much like fpugetregs()'s semantics of doing a full 1908 * drop. Dropping only to the pcb matches fnsave's behaviour. 1909 * We only need to drop to !PCB_INITDONE in sendsig(). But 1910 * sendsig() is the only caller of fpugetregs()... perhaps we just 1911 * have too many layers. 1912 */ 1913 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1914 intr_restore(s); 1915} 1916 1917int 1918fill_dbregs(struct thread *td, struct dbreg *dbregs) 1919{ 1920 struct pcb *pcb; 1921 1922 if (td == NULL) { 1923 dbregs->dr[0] = rdr0(); 1924 dbregs->dr[1] = rdr1(); 1925 dbregs->dr[2] = rdr2(); 1926 dbregs->dr[3] = rdr3(); 1927 dbregs->dr[6] = rdr6(); 1928 dbregs->dr[7] = rdr7(); 1929 } else { 1930 pcb = td->td_pcb; 1931 dbregs->dr[0] = pcb->pcb_dr0; 1932 dbregs->dr[1] = pcb->pcb_dr1; 1933 dbregs->dr[2] = pcb->pcb_dr2; 1934 dbregs->dr[3] = pcb->pcb_dr3; 1935 dbregs->dr[6] = pcb->pcb_dr6; 1936 dbregs->dr[7] = pcb->pcb_dr7; 1937 } 1938 dbregs->dr[4] = 0; 1939 dbregs->dr[5] = 0; 1940 dbregs->dr[8] = 0; 1941 dbregs->dr[9] = 0; 1942 dbregs->dr[10] = 0; 1943 dbregs->dr[11] = 0; 1944 dbregs->dr[12] = 0; 1945 dbregs->dr[13] = 0; 1946 dbregs->dr[14] = 0; 1947 dbregs->dr[15] = 0; 1948 return (0); 1949} 1950 1951int 1952set_dbregs(struct thread *td, struct dbreg *dbregs) 1953{ 1954 struct pcb *pcb; 1955 int i; 1956 1957 if (td == NULL) { 1958 load_dr0(dbregs->dr[0]); 1959 load_dr1(dbregs->dr[1]); 1960 load_dr2(dbregs->dr[2]); 1961 load_dr3(dbregs->dr[3]); 1962 load_dr6(dbregs->dr[6]); 1963 load_dr7(dbregs->dr[7]); 1964 } else { 1965 /* 1966 * Don't let an illegal value for dr7 get set. Specifically, 1967 * check for undefined settings. Setting these bit patterns 1968 * result in undefined behaviour and can lead to an unexpected 1969 * TRCTRAP or a general protection fault right here. 1970 * Upper bits of dr6 and dr7 must not be set 1971 */ 1972 for (i = 0; i < 4; i++) { 1973 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 1974 return (EINVAL); 1975 if (td->td_frame->tf_cs == _ucode32sel && 1976 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 1977 return (EINVAL); 1978 } 1979 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1980 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1981 return (EINVAL); 1982 1983 pcb = td->td_pcb; 1984 1985 /* 1986 * Don't let a process set a breakpoint that is not within the 1987 * process's address space. If a process could do this, it 1988 * could halt the system by setting a breakpoint in the kernel 1989 * (if ddb was enabled). Thus, we need to check to make sure 1990 * that no breakpoints are being enabled for addresses outside 1991 * process's address space. 1992 * 1993 * XXX - what about when the watched area of the user's 1994 * address space is written into from within the kernel 1995 * ... wouldn't that still cause a breakpoint to be generated 1996 * from within kernel mode? 1997 */ 1998 1999 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2000 /* dr0 is enabled */ 2001 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2002 return (EINVAL); 2003 } 2004 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2005 /* dr1 is enabled */ 2006 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2007 return (EINVAL); 2008 } 2009 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2010 /* dr2 is enabled */ 2011 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2012 return (EINVAL); 2013 } 2014 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2015 /* dr3 is enabled */ 2016 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2017 return (EINVAL); 2018 } 2019 2020 pcb->pcb_dr0 = dbregs->dr[0]; 2021 pcb->pcb_dr1 = dbregs->dr[1]; 2022 pcb->pcb_dr2 = dbregs->dr[2]; 2023 pcb->pcb_dr3 = dbregs->dr[3]; 2024 pcb->pcb_dr6 = dbregs->dr[6]; 2025 pcb->pcb_dr7 = dbregs->dr[7]; 2026 2027 pcb->pcb_flags |= PCB_DBREGS; 2028 } 2029 2030 return (0); 2031} 2032 2033void 2034reset_dbregs(void) 2035{ 2036 2037 load_dr7(0); /* Turn off the control bits first */ 2038 load_dr0(0); 2039 load_dr1(0); 2040 load_dr2(0); 2041 load_dr3(0); 2042 load_dr6(0); 2043} 2044 2045/* 2046 * Return > 0 if a hardware breakpoint has been hit, and the 2047 * breakpoint was in user space. Return 0, otherwise. 2048 */ 2049int 2050user_dbreg_trap(void) 2051{ 2052 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 2053 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 2054 int nbp; /* number of breakpoints that triggered */ 2055 caddr_t addr[4]; /* breakpoint addresses */ 2056 int i; 2057 2058 dr7 = rdr7(); 2059 if ((dr7 & 0x000000ff) == 0) { 2060 /* 2061 * all GE and LE bits in the dr7 register are zero, 2062 * thus the trap couldn't have been caused by the 2063 * hardware debug registers 2064 */ 2065 return 0; 2066 } 2067 2068 nbp = 0; 2069 dr6 = rdr6(); 2070 bp = dr6 & 0x0000000f; 2071 2072 if (!bp) { 2073 /* 2074 * None of the breakpoint bits are set meaning this 2075 * trap was not caused by any of the debug registers 2076 */ 2077 return 0; 2078 } 2079 2080 /* 2081 * at least one of the breakpoints were hit, check to see 2082 * which ones and if any of them are user space addresses 2083 */ 2084 2085 if (bp & 0x01) { 2086 addr[nbp++] = (caddr_t)rdr0(); 2087 } 2088 if (bp & 0x02) { 2089 addr[nbp++] = (caddr_t)rdr1(); 2090 } 2091 if (bp & 0x04) { 2092 addr[nbp++] = (caddr_t)rdr2(); 2093 } 2094 if (bp & 0x08) { 2095 addr[nbp++] = (caddr_t)rdr3(); 2096 } 2097 2098 for (i = 0; i < nbp; i++) { 2099 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2100 /* 2101 * addr[i] is in user space 2102 */ 2103 return nbp; 2104 } 2105 } 2106 2107 /* 2108 * None of the breakpoints are in user space. 2109 */ 2110 return 0; 2111} 2112 2113#ifdef KDB 2114 2115/* 2116 * Provide inb() and outb() as functions. They are normally only 2117 * available as macros calling inlined functions, thus cannot be 2118 * called from the debugger. 2119 * 2120 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2121 */ 2122 2123#undef inb 2124#undef outb 2125 2126/* silence compiler warnings */ 2127u_char inb(u_int); 2128void outb(u_int, u_char); 2129 2130u_char 2131inb(u_int port) 2132{ 2133 u_char data; 2134 /* 2135 * We use %%dx and not %1 here because i/o is done at %dx and not at 2136 * %edx, while gcc generates inferior code (movw instead of movl) 2137 * if we tell it to load (u_short) port. 2138 */ 2139 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2140 return (data); 2141} 2142 2143void 2144outb(u_int port, u_char data) 2145{ 2146 u_char al; 2147 /* 2148 * Use an unnecessary assignment to help gcc's register allocator. 2149 * This make a large difference for gcc-1.40 and a tiny difference 2150 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2151 * best results. gcc-2.6.0 can't handle this. 2152 */ 2153 al = data; 2154 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2155} 2156 2157#endif /* KDB */ 2158