machdep.c revision 188065
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 188065 2009-02-03 09:01:45Z jkoshy $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_msgbuf.h" 55#include "opt_perfmon.h" 56#include "opt_sched.h" 57 58#include <sys/param.h> 59#include <sys/proc.h> 60#include <sys/systm.h> 61#include <sys/bio.h> 62#include <sys/buf.h> 63#include <sys/bus.h> 64#include <sys/callout.h> 65#include <sys/cons.h> 66#include <sys/cpu.h> 67#include <sys/eventhandler.h> 68#include <sys/exec.h> 69#include <sys/imgact.h> 70#include <sys/kdb.h> 71#include <sys/kernel.h> 72#include <sys/ktr.h> 73#include <sys/linker.h> 74#include <sys/lock.h> 75#include <sys/malloc.h> 76#include <sys/memrange.h> 77#include <sys/msgbuf.h> 78#include <sys/mutex.h> 79#include <sys/pcpu.h> 80#include <sys/ptrace.h> 81#include <sys/reboot.h> 82#include <sys/sched.h> 83#include <sys/signalvar.h> 84#include <sys/sysctl.h> 85#include <sys/sysent.h> 86#include <sys/sysproto.h> 87#include <sys/ucontext.h> 88#include <sys/vmmeter.h> 89 90#include <vm/vm.h> 91#include <vm/vm_extern.h> 92#include <vm/vm_kern.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_object.h> 96#include <vm/vm_pager.h> 97#include <vm/vm_param.h> 98 99#ifdef DDB 100#ifndef KDB 101#error KDB must be enabled in order for DDB to work! 102#endif 103#endif 104#include <ddb/ddb.h> 105 106#include <net/netisr.h> 107 108#include <machine/clock.h> 109#include <machine/cpu.h> 110#include <machine/cputypes.h> 111#include <machine/intr_machdep.h> 112#include <machine/md_var.h> 113#include <machine/metadata.h> 114#include <machine/pc/bios.h> 115#include <machine/pcb.h> 116#include <machine/proc.h> 117#include <machine/reg.h> 118#include <machine/sigframe.h> 119#include <machine/specialreg.h> 120#ifdef PERFMON 121#include <machine/perfmon.h> 122#endif 123#include <machine/tss.h> 124#ifdef SMP 125#include <machine/smp.h> 126#endif 127 128#ifdef DEV_ATPIC 129#include <amd64/isa/icu.h> 130#else 131#include <machine/apicvar.h> 132#endif 133 134#include <isa/isareg.h> 135#include <isa/rtc.h> 136 137/* Sanity check for __curthread() */ 138CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 139 140extern u_int64_t hammer_time(u_int64_t, u_int64_t); 141 142extern void printcpuinfo(void); /* XXX header file */ 143extern void identify_cpu(void); 144extern void panicifcpuunsupported(void); 145 146#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 147#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 148 149static void cpu_startup(void *); 150static void get_fpcontext(struct thread *td, mcontext_t *mcp); 151static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 152SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 153 154#ifdef DDB 155extern vm_offset_t ksym_start, ksym_end; 156#endif 157 158/* Intel ICH registers */ 159#define ICH_PMBASE 0x400 160#define ICH_SMI_EN ICH_PMBASE + 0x30 161 162int _udatasel, _ucodesel, _ucode32sel; 163 164int cold = 1; 165 166long Maxmem = 0; 167long realmem = 0; 168 169/* 170 * The number of PHYSMAP entries must be one less than the number of 171 * PHYSSEG entries because the PHYSMAP entry that spans the largest 172 * physical address that is accessible by ISA DMA is split into two 173 * PHYSSEG entries. 174 */ 175#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 176 177vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 178vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 179 180/* must be 2 less so 0 0 can signal end of chunks */ 181#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 182#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 183 184struct kva_md_info kmi; 185 186static struct trapframe proc0_tf; 187struct region_descriptor r_gdt, r_idt; 188 189struct pcpu __pcpu[MAXCPU]; 190 191struct mtx icu_lock; 192 193struct mem_range_softc mem_range_softc; 194 195static void 196cpu_startup(dummy) 197 void *dummy; 198{ 199 char *sysenv; 200 201 /* 202 * On MacBooks, we need to disallow the legacy USB circuit to 203 * generate an SMI# because this can cause several problems, 204 * namely: incorrect CPU frequency detection and failure to 205 * start the APs. 206 * We do this by disabling a bit in the SMI_EN (SMI Control and 207 * Enable register) of the Intel ICH LPC Interface Bridge. 208 */ 209 sysenv = getenv("smbios.system.product"); 210 if (sysenv != NULL) { 211 if (strncmp(sysenv, "MacBook", 7) == 0) { 212 if (bootverbose) 213 printf("Disabling LEGACY_USB_EN bit on " 214 "Intel ICH.\n"); 215 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 216 } 217 freeenv(sysenv); 218 } 219 220 /* 221 * Good {morning,afternoon,evening,night}. 222 */ 223 startrtclock(); 224 printcpuinfo(); 225 panicifcpuunsupported(); 226#ifdef PERFMON 227 perfmon_init(); 228#endif 229 printf("usable memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem), 230 ptoa((uintmax_t)physmem) / 1048576); 231 realmem = Maxmem; 232 /* 233 * Display any holes after the first chunk of extended memory. 234 */ 235 if (bootverbose) { 236 int indx; 237 238 printf("Physical memory chunk(s):\n"); 239 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 240 vm_paddr_t size; 241 242 size = phys_avail[indx + 1] - phys_avail[indx]; 243 printf( 244 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 245 (uintmax_t)phys_avail[indx], 246 (uintmax_t)phys_avail[indx + 1] - 1, 247 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 248 } 249 } 250 251 vm_ksubmap_init(&kmi); 252 253 printf("avail memory = %ju (%ju MB)\n", 254 ptoa((uintmax_t)cnt.v_free_count), 255 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 256 257 /* 258 * Set up buffers, so they can be used to read disk labels. 259 */ 260 bufinit(); 261 vm_pager_bufferinit(); 262 263 cpu_setregs(); 264} 265 266/* 267 * Send an interrupt to process. 268 * 269 * Stack is set up to allow sigcode stored 270 * at top to call routine, followed by kcall 271 * to sigreturn routine below. After sigreturn 272 * resets the signal mask, the stack, and the 273 * frame pointer, it returns to the user 274 * specified pc, psl. 275 */ 276void 277sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 278{ 279 struct sigframe sf, *sfp; 280 struct proc *p; 281 struct thread *td; 282 struct sigacts *psp; 283 char *sp; 284 struct trapframe *regs; 285 int sig; 286 int oonstack; 287 288 td = curthread; 289 p = td->td_proc; 290 PROC_LOCK_ASSERT(p, MA_OWNED); 291 sig = ksi->ksi_signo; 292 psp = p->p_sigacts; 293 mtx_assert(&psp->ps_mtx, MA_OWNED); 294 regs = td->td_frame; 295 oonstack = sigonstack(regs->tf_rsp); 296 297 /* Save user context. */ 298 bzero(&sf, sizeof(sf)); 299 sf.sf_uc.uc_sigmask = *mask; 300 sf.sf_uc.uc_stack = td->td_sigstk; 301 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 302 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 303 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 304 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 305 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 306 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 307 fpstate_drop(td); 308 309 /* Allocate space for the signal handler context. */ 310 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 311 SIGISMEMBER(psp->ps_sigonstack, sig)) { 312 sp = td->td_sigstk.ss_sp + 313 td->td_sigstk.ss_size - sizeof(struct sigframe); 314#if defined(COMPAT_43) 315 td->td_sigstk.ss_flags |= SS_ONSTACK; 316#endif 317 } else 318 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 319 /* Align to 16 bytes. */ 320 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 321 322 /* Translate the signal if appropriate. */ 323 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 324 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 325 326 /* Build the argument list for the signal handler. */ 327 regs->tf_rdi = sig; /* arg 1 in %rdi */ 328 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 329 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 330 /* Signal handler installed with SA_SIGINFO. */ 331 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 332 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 333 334 /* Fill in POSIX parts */ 335 sf.sf_si = ksi->ksi_info; 336 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 337 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 338 } else { 339 /* Old FreeBSD-style arguments. */ 340 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 341 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 342 sf.sf_ahu.sf_handler = catcher; 343 } 344 mtx_unlock(&psp->ps_mtx); 345 PROC_UNLOCK(p); 346 347 /* 348 * Copy the sigframe out to the user's stack. 349 */ 350 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 351#ifdef DEBUG 352 printf("process %ld has trashed its stack\n", (long)p->p_pid); 353#endif 354 PROC_LOCK(p); 355 sigexit(td, SIGILL); 356 } 357 358 regs->tf_rsp = (long)sfp; 359 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 360 regs->tf_rflags &= ~(PSL_T | PSL_D); 361 regs->tf_cs = _ucodesel; 362 PROC_LOCK(p); 363 mtx_lock(&psp->ps_mtx); 364} 365 366/* 367 * System call to cleanup state after a signal 368 * has been taken. Reset signal mask and 369 * stack state from context left by sendsig (above). 370 * Return to previous pc and psl as specified by 371 * context left by sendsig. Check carefully to 372 * make sure that the user has not modified the 373 * state to gain improper privileges. 374 * 375 * MPSAFE 376 */ 377int 378sigreturn(td, uap) 379 struct thread *td; 380 struct sigreturn_args /* { 381 const struct __ucontext *sigcntxp; 382 } */ *uap; 383{ 384 ucontext_t uc; 385 struct proc *p = td->td_proc; 386 struct trapframe *regs; 387 const ucontext_t *ucp; 388 long rflags; 389 int cs, error, ret; 390 ksiginfo_t ksi; 391 392 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 393 if (error != 0) 394 return (error); 395 ucp = &uc; 396 regs = td->td_frame; 397 rflags = ucp->uc_mcontext.mc_rflags; 398 /* 399 * Don't allow users to change privileged or reserved flags. 400 */ 401 /* 402 * XXX do allow users to change the privileged flag PSL_RF. 403 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 404 * should sometimes set it there too. tf_rflags is kept in 405 * the signal context during signal handling and there is no 406 * other place to remember it, so the PSL_RF bit may be 407 * corrupted by the signal handler without us knowing. 408 * Corruption of the PSL_RF bit at worst causes one more or 409 * one less debugger trap, so allowing it is fairly harmless. 410 */ 411 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 412 printf("sigreturn: rflags = 0x%lx\n", rflags); 413 return (EINVAL); 414 } 415 416 /* 417 * Don't allow users to load a valid privileged %cs. Let the 418 * hardware check for invalid selectors, excess privilege in 419 * other selectors, invalid %eip's and invalid %esp's. 420 */ 421 cs = ucp->uc_mcontext.mc_cs; 422 if (!CS_SECURE(cs)) { 423 printf("sigreturn: cs = 0x%x\n", cs); 424 ksiginfo_init_trap(&ksi); 425 ksi.ksi_signo = SIGBUS; 426 ksi.ksi_code = BUS_OBJERR; 427 ksi.ksi_trapno = T_PROTFLT; 428 ksi.ksi_addr = (void *)regs->tf_rip; 429 trapsignal(td, &ksi); 430 return (EINVAL); 431 } 432 433 ret = set_fpcontext(td, &ucp->uc_mcontext); 434 if (ret != 0) 435 return (ret); 436 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 437 438 PROC_LOCK(p); 439#if defined(COMPAT_43) 440 if (ucp->uc_mcontext.mc_onstack & 1) 441 td->td_sigstk.ss_flags |= SS_ONSTACK; 442 else 443 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 444#endif 445 446 td->td_sigmask = ucp->uc_sigmask; 447 SIG_CANTMASK(td->td_sigmask); 448 signotify(td); 449 PROC_UNLOCK(p); 450 td->td_pcb->pcb_flags |= PCB_FULLCTX; 451 return (EJUSTRETURN); 452} 453 454#ifdef COMPAT_FREEBSD4 455int 456freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 457{ 458 459 return sigreturn(td, (struct sigreturn_args *)uap); 460} 461#endif 462 463 464/* 465 * Machine dependent boot() routine 466 * 467 * I haven't seen anything to put here yet 468 * Possibly some stuff might be grafted back here from boot() 469 */ 470void 471cpu_boot(int howto) 472{ 473} 474 475/* Get current clock frequency for the given cpu id. */ 476int 477cpu_est_clockrate(int cpu_id, uint64_t *rate) 478{ 479 register_t reg; 480 uint64_t tsc1, tsc2; 481 482 if (pcpu_find(cpu_id) == NULL || rate == NULL) 483 return (EINVAL); 484 485 /* If we're booting, trust the rate calibrated moments ago. */ 486 if (cold) { 487 *rate = tsc_freq; 488 return (0); 489 } 490 491#ifdef SMP 492 /* Schedule ourselves on the indicated cpu. */ 493 thread_lock(curthread); 494 sched_bind(curthread, cpu_id); 495 thread_unlock(curthread); 496#endif 497 498 /* Calibrate by measuring a short delay. */ 499 reg = intr_disable(); 500 tsc1 = rdtsc(); 501 DELAY(1000); 502 tsc2 = rdtsc(); 503 intr_restore(reg); 504 505#ifdef SMP 506 thread_lock(curthread); 507 sched_unbind(curthread); 508 thread_unlock(curthread); 509#endif 510 511 /* 512 * Calculate the difference in readings, convert to Mhz, and 513 * subtract 0.5% of the total. Empirical testing has shown that 514 * overhead in DELAY() works out to approximately this value. 515 */ 516 tsc2 -= tsc1; 517 *rate = tsc2 * 1000 - tsc2 * 5; 518 return (0); 519} 520 521/* 522 * Shutdown the CPU as much as possible 523 */ 524void 525cpu_halt(void) 526{ 527 for (;;) 528 __asm__ ("hlt"); 529} 530 531void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */ 532 533static void 534cpu_idle_hlt(int busy) 535{ 536 /* 537 * we must absolutely guarentee that hlt is the next instruction 538 * after sti or we introduce a timing window. 539 */ 540 disable_intr(); 541 if (sched_runnable()) 542 enable_intr(); 543 else 544 __asm __volatile("sti; hlt"); 545} 546 547static void 548cpu_idle_acpi(int busy) 549{ 550 disable_intr(); 551 if (sched_runnable()) 552 enable_intr(); 553 else if (cpu_idle_hook) 554 cpu_idle_hook(); 555 else 556 __asm __volatile("sti; hlt"); 557} 558 559static void 560cpu_idle_spin(int busy) 561{ 562 return; 563} 564 565void (*cpu_idle_fn)(int) = cpu_idle_acpi; 566 567void 568cpu_idle(int busy) 569{ 570#ifdef SMP 571 if (mp_grab_cpu_hlt()) 572 return; 573#endif 574 cpu_idle_fn(busy); 575} 576 577/* 578 * mwait cpu power states. Lower 4 bits are sub-states. 579 */ 580#define MWAIT_C0 0xf0 581#define MWAIT_C1 0x00 582#define MWAIT_C2 0x10 583#define MWAIT_C3 0x20 584#define MWAIT_C4 0x30 585 586#define MWAIT_DISABLED 0x0 587#define MWAIT_WOKEN 0x1 588#define MWAIT_WAITING 0x2 589 590static void 591cpu_idle_mwait(int busy) 592{ 593 int *mwait; 594 595 mwait = (int *)PCPU_PTR(monitorbuf); 596 *mwait = MWAIT_WAITING; 597 if (sched_runnable()) 598 return; 599 cpu_monitor(mwait, 0, 0); 600 if (*mwait == MWAIT_WAITING) 601 cpu_mwait(0, MWAIT_C1); 602} 603 604static void 605cpu_idle_mwait_hlt(int busy) 606{ 607 int *mwait; 608 609 mwait = (int *)PCPU_PTR(monitorbuf); 610 if (busy == 0) { 611 *mwait = MWAIT_DISABLED; 612 cpu_idle_hlt(busy); 613 return; 614 } 615 *mwait = MWAIT_WAITING; 616 if (sched_runnable()) 617 return; 618 cpu_monitor(mwait, 0, 0); 619 if (*mwait == MWAIT_WAITING) 620 cpu_mwait(0, MWAIT_C1); 621} 622 623int 624cpu_idle_wakeup(int cpu) 625{ 626 struct pcpu *pcpu; 627 int *mwait; 628 629 if (cpu_idle_fn == cpu_idle_spin) 630 return (1); 631 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt) 632 return (0); 633 pcpu = pcpu_find(cpu); 634 mwait = (int *)pcpu->pc_monitorbuf; 635 /* 636 * This doesn't need to be atomic since missing the race will 637 * simply result in unnecessary IPIs. 638 */ 639 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED) 640 return (0); 641 *mwait = MWAIT_WOKEN; 642 643 return (1); 644} 645 646/* 647 * Ordered by speed/power consumption. 648 */ 649struct { 650 void *id_fn; 651 char *id_name; 652} idle_tbl[] = { 653 { cpu_idle_spin, "spin" }, 654 { cpu_idle_mwait, "mwait" }, 655 { cpu_idle_mwait_hlt, "mwait_hlt" }, 656 { cpu_idle_hlt, "hlt" }, 657 { cpu_idle_acpi, "acpi" }, 658 { NULL, NULL } 659}; 660 661static int 662idle_sysctl_available(SYSCTL_HANDLER_ARGS) 663{ 664 char *avail, *p; 665 int error; 666 int i; 667 668 avail = malloc(256, M_TEMP, M_WAITOK); 669 p = avail; 670 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 671 if (strstr(idle_tbl[i].id_name, "mwait") && 672 (cpu_feature2 & CPUID2_MON) == 0) 673 continue; 674 p += sprintf(p, "%s, ", idle_tbl[i].id_name); 675 } 676 error = sysctl_handle_string(oidp, avail, 0, req); 677 free(avail, M_TEMP); 678 return (error); 679} 680 681static int 682idle_sysctl(SYSCTL_HANDLER_ARGS) 683{ 684 char buf[16]; 685 int error; 686 char *p; 687 int i; 688 689 p = "unknown"; 690 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 691 if (idle_tbl[i].id_fn == cpu_idle_fn) { 692 p = idle_tbl[i].id_name; 693 break; 694 } 695 } 696 strncpy(buf, p, sizeof(buf)); 697 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 698 if (error != 0 || req->newptr == NULL) 699 return (error); 700 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 701 if (strstr(idle_tbl[i].id_name, "mwait") && 702 (cpu_feature2 & CPUID2_MON) == 0) 703 continue; 704 if (strcmp(idle_tbl[i].id_name, buf)) 705 continue; 706 cpu_idle_fn = idle_tbl[i].id_fn; 707 return (0); 708 } 709 return (EINVAL); 710} 711 712SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 713 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 714 715SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 716 idle_sysctl, "A", "currently selected idle function"); 717 718/* 719 * Clear registers on exec 720 */ 721void 722exec_setregs(td, entry, stack, ps_strings) 723 struct thread *td; 724 u_long entry; 725 u_long stack; 726 u_long ps_strings; 727{ 728 struct trapframe *regs = td->td_frame; 729 struct pcb *pcb = td->td_pcb; 730 731 critical_enter(); 732 wrmsr(MSR_FSBASE, 0); 733 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 734 pcb->pcb_fsbase = 0; 735 pcb->pcb_gsbase = 0; 736 critical_exit(); 737 pcb->pcb_flags &= ~(PCB_32BIT | PCB_GS32BIT); 738 load_ds(_udatasel); 739 load_es(_udatasel); 740 load_fs(_udatasel); 741 load_gs(_udatasel); 742 pcb->pcb_ds = _udatasel; 743 pcb->pcb_es = _udatasel; 744 pcb->pcb_fs = _udatasel; 745 pcb->pcb_gs = _udatasel; 746 747 bzero((char *)regs, sizeof(struct trapframe)); 748 regs->tf_rip = entry; 749 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 750 regs->tf_rdi = stack; /* argv */ 751 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 752 regs->tf_ss = _udatasel; 753 regs->tf_cs = _ucodesel; 754 755 /* 756 * Reset the hardware debug registers if they were in use. 757 * They won't have any meaning for the newly exec'd process. 758 */ 759 if (pcb->pcb_flags & PCB_DBREGS) { 760 pcb->pcb_dr0 = 0; 761 pcb->pcb_dr1 = 0; 762 pcb->pcb_dr2 = 0; 763 pcb->pcb_dr3 = 0; 764 pcb->pcb_dr6 = 0; 765 pcb->pcb_dr7 = 0; 766 if (pcb == PCPU_GET(curpcb)) { 767 /* 768 * Clear the debug registers on the running 769 * CPU, otherwise they will end up affecting 770 * the next process we switch to. 771 */ 772 reset_dbregs(); 773 } 774 pcb->pcb_flags &= ~PCB_DBREGS; 775 } 776 777 /* 778 * Drop the FP state if we hold it, so that the process gets a 779 * clean FP state if it uses the FPU again. 780 */ 781 fpstate_drop(td); 782} 783 784void 785cpu_setregs(void) 786{ 787 register_t cr0; 788 789 cr0 = rcr0(); 790 /* 791 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 792 * BSP. See the comments there about why we set them. 793 */ 794 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 795 load_cr0(cr0); 796} 797 798/* 799 * Initialize amd64 and configure to run kernel 800 */ 801 802/* 803 * Initialize segments & interrupt table 804 */ 805 806struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 807static struct gate_descriptor idt0[NIDT]; 808struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 809 810static char dblfault_stack[PAGE_SIZE] __aligned(16); 811 812static char nmi0_stack[PAGE_SIZE] __aligned(16); 813CTASSERT(sizeof(struct nmi_pcpu) == 16); 814 815struct amd64tss common_tss[MAXCPU]; 816 817/* software prototypes -- in more palatable form */ 818struct soft_segment_descriptor gdt_segs[] = { 819/* GNULL_SEL 0 Null Descriptor */ 820{ 0x0, /* segment base address */ 821 0x0, /* length */ 822 0, /* segment type */ 823 0, /* segment descriptor priority level */ 824 0, /* segment descriptor present */ 825 0, /* long */ 826 0, /* default 32 vs 16 bit size */ 827 0 /* limit granularity (byte/page units)*/ }, 828/* GCODE_SEL 1 Code Descriptor for kernel */ 829{ 0x0, /* segment base address */ 830 0xfffff, /* length - all address space */ 831 SDT_MEMERA, /* segment type */ 832 SEL_KPL, /* segment descriptor priority level */ 833 1, /* segment descriptor present */ 834 1, /* long */ 835 0, /* default 32 vs 16 bit size */ 836 1 /* limit granularity (byte/page units)*/ }, 837/* GDATA_SEL 2 Data Descriptor for kernel */ 838{ 0x0, /* segment base address */ 839 0xfffff, /* length - all address space */ 840 SDT_MEMRWA, /* segment type */ 841 SEL_KPL, /* segment descriptor priority level */ 842 1, /* segment descriptor present */ 843 1, /* long */ 844 0, /* default 32 vs 16 bit size */ 845 1 /* limit granularity (byte/page units)*/ }, 846/* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 847{ 0x0, /* segment base address */ 848 0xfffff, /* length - all address space */ 849 SDT_MEMERA, /* segment type */ 850 SEL_UPL, /* segment descriptor priority level */ 851 1, /* segment descriptor present */ 852 0, /* long */ 853 1, /* default 32 vs 16 bit size */ 854 1 /* limit granularity (byte/page units)*/ }, 855/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 856{ 0x0, /* segment base address */ 857 0xfffff, /* length - all address space */ 858 SDT_MEMRWA, /* segment type */ 859 SEL_UPL, /* segment descriptor priority level */ 860 1, /* segment descriptor present */ 861 0, /* long */ 862 1, /* default 32 vs 16 bit size */ 863 1 /* limit granularity (byte/page units)*/ }, 864/* GUCODE_SEL 5 64 bit Code Descriptor for user */ 865{ 0x0, /* segment base address */ 866 0xfffff, /* length - all address space */ 867 SDT_MEMERA, /* segment type */ 868 SEL_UPL, /* segment descriptor priority level */ 869 1, /* segment descriptor present */ 870 1, /* long */ 871 0, /* default 32 vs 16 bit size */ 872 1 /* limit granularity (byte/page units)*/ }, 873/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 874{ 875 0x0, /* segment base address */ 876 sizeof(struct amd64tss)-1,/* length */ 877 SDT_SYSTSS, /* segment type */ 878 SEL_KPL, /* segment descriptor priority level */ 879 1, /* segment descriptor present */ 880 0, /* long */ 881 0, /* unused - default 32 vs 16 bit size */ 882 0 /* limit granularity (byte/page units)*/ }, 883/* Actually, the TSS is a system descriptor which is double size */ 884{ 0x0, /* segment base address */ 885 0x0, /* length */ 886 0, /* segment type */ 887 0, /* segment descriptor priority level */ 888 0, /* segment descriptor present */ 889 0, /* long */ 890 0, /* default 32 vs 16 bit size */ 891 0 /* limit granularity (byte/page units)*/ }, 892/* GUGS32_SEL 8 32 bit GS Descriptor for user */ 893{ 0x0, /* segment base address */ 894 0xfffff, /* length - all address space */ 895 SDT_MEMRWA, /* segment type */ 896 SEL_UPL, /* segment descriptor priority level */ 897 1, /* segment descriptor present */ 898 0, /* long */ 899 1, /* default 32 vs 16 bit size */ 900 1 /* limit granularity (byte/page units)*/ }, 901}; 902 903void 904setidt(idx, func, typ, dpl, ist) 905 int idx; 906 inthand_t *func; 907 int typ; 908 int dpl; 909 int ist; 910{ 911 struct gate_descriptor *ip; 912 913 ip = idt + idx; 914 ip->gd_looffset = (uintptr_t)func; 915 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 916 ip->gd_ist = ist; 917 ip->gd_xx = 0; 918 ip->gd_type = typ; 919 ip->gd_dpl = dpl; 920 ip->gd_p = 1; 921 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 922} 923 924extern inthand_t 925 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 926 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 927 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 928 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 929 IDTVEC(xmm), IDTVEC(dblfault), 930 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 931 932void 933sdtossd(sd, ssd) 934 struct user_segment_descriptor *sd; 935 struct soft_segment_descriptor *ssd; 936{ 937 938 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 939 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 940 ssd->ssd_type = sd->sd_type; 941 ssd->ssd_dpl = sd->sd_dpl; 942 ssd->ssd_p = sd->sd_p; 943 ssd->ssd_long = sd->sd_long; 944 ssd->ssd_def32 = sd->sd_def32; 945 ssd->ssd_gran = sd->sd_gran; 946} 947 948void 949ssdtosd(ssd, sd) 950 struct soft_segment_descriptor *ssd; 951 struct user_segment_descriptor *sd; 952{ 953 954 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 955 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 956 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 957 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 958 sd->sd_type = ssd->ssd_type; 959 sd->sd_dpl = ssd->ssd_dpl; 960 sd->sd_p = ssd->ssd_p; 961 sd->sd_long = ssd->ssd_long; 962 sd->sd_def32 = ssd->ssd_def32; 963 sd->sd_gran = ssd->ssd_gran; 964} 965 966void 967ssdtosyssd(ssd, sd) 968 struct soft_segment_descriptor *ssd; 969 struct system_segment_descriptor *sd; 970{ 971 972 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 973 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 974 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 975 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 976 sd->sd_type = ssd->ssd_type; 977 sd->sd_dpl = ssd->ssd_dpl; 978 sd->sd_p = ssd->ssd_p; 979 sd->sd_gran = ssd->ssd_gran; 980} 981 982#if !defined(DEV_ATPIC) && defined(DEV_ISA) 983#include <isa/isavar.h> 984#include <isa/isareg.h> 985/* 986 * Return a bitmap of the current interrupt requests. This is 8259-specific 987 * and is only suitable for use at probe time. 988 * This is only here to pacify sio. It is NOT FATAL if this doesn't work. 989 * It shouldn't be here. There should probably be an APIC centric 990 * implementation in the apic driver code, if at all. 991 */ 992intrmask_t 993isa_irq_pending(void) 994{ 995 u_char irr1; 996 u_char irr2; 997 998 irr1 = inb(IO_ICU1); 999 irr2 = inb(IO_ICU2); 1000 return ((irr2 << 8) | irr1); 1001} 1002#endif 1003 1004u_int basemem; 1005 1006/* 1007 * Populate the (physmap) array with base/bound pairs describing the 1008 * available physical memory in the system, then test this memory and 1009 * build the phys_avail array describing the actually-available memory. 1010 * 1011 * If we cannot accurately determine the physical memory map, then use 1012 * value from the 0xE801 call, and failing that, the RTC. 1013 * 1014 * Total memory size may be set by the kernel environment variable 1015 * hw.physmem or the compile-time define MAXMEM. 1016 * 1017 * XXX first should be vm_paddr_t. 1018 */ 1019static void 1020getmemsize(caddr_t kmdp, u_int64_t first) 1021{ 1022 int i, off, physmap_idx, pa_indx, da_indx; 1023 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1024 u_long physmem_tunable; 1025 pt_entry_t *pte; 1026 struct bios_smap *smapbase, *smap, *smapend; 1027 u_int32_t smapsize; 1028 quad_t dcons_addr, dcons_size; 1029 1030 bzero(physmap, sizeof(physmap)); 1031 basemem = 0; 1032 physmap_idx = 0; 1033 1034 /* 1035 * get memory map from INT 15:E820, kindly supplied by the loader. 1036 * 1037 * subr_module.c says: 1038 * "Consumer may safely assume that size value precedes data." 1039 * ie: an int32_t immediately precedes smap. 1040 */ 1041 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1042 MODINFO_METADATA | MODINFOMD_SMAP); 1043 if (smapbase == NULL) 1044 panic("No BIOS smap info from loader!"); 1045 1046 smapsize = *((u_int32_t *)smapbase - 1); 1047 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1048 1049 for (smap = smapbase; smap < smapend; smap++) { 1050 if (boothowto & RB_VERBOSE) 1051 printf("SMAP type=%02x base=%016lx len=%016lx\n", 1052 smap->type, smap->base, smap->length); 1053 1054 if (smap->type != SMAP_TYPE_MEMORY) 1055 continue; 1056 1057 if (smap->length == 0) 1058 continue; 1059 1060 for (i = 0; i <= physmap_idx; i += 2) { 1061 if (smap->base < physmap[i + 1]) { 1062 if (boothowto & RB_VERBOSE) 1063 printf( 1064 "Overlapping or non-monotonic memory region, ignoring second region\n"); 1065 continue; 1066 } 1067 } 1068 1069 if (smap->base == physmap[physmap_idx + 1]) { 1070 physmap[physmap_idx + 1] += smap->length; 1071 continue; 1072 } 1073 1074 physmap_idx += 2; 1075 if (physmap_idx == PHYSMAP_SIZE) { 1076 printf( 1077 "Too many segments in the physical address map, giving up\n"); 1078 break; 1079 } 1080 physmap[physmap_idx] = smap->base; 1081 physmap[physmap_idx + 1] = smap->base + smap->length; 1082 } 1083 1084 /* 1085 * Find the 'base memory' segment for SMP 1086 */ 1087 basemem = 0; 1088 for (i = 0; i <= physmap_idx; i += 2) { 1089 if (physmap[i] == 0x00000000) { 1090 basemem = physmap[i + 1] / 1024; 1091 break; 1092 } 1093 } 1094 if (basemem == 0) 1095 panic("BIOS smap did not include a basemem segment!"); 1096 1097#ifdef SMP 1098 /* make hole for AP bootstrap code */ 1099 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1100#endif 1101 1102 /* 1103 * Maxmem isn't the "maximum memory", it's one larger than the 1104 * highest page of the physical address space. It should be 1105 * called something like "Maxphyspage". We may adjust this 1106 * based on ``hw.physmem'' and the results of the memory test. 1107 */ 1108 Maxmem = atop(physmap[physmap_idx + 1]); 1109 1110#ifdef MAXMEM 1111 Maxmem = MAXMEM / 4; 1112#endif 1113 1114 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1115 Maxmem = atop(physmem_tunable); 1116 1117 /* 1118 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 1119 * in the system. 1120 */ 1121 if (Maxmem > atop(physmap[physmap_idx + 1])) 1122 Maxmem = atop(physmap[physmap_idx + 1]); 1123 1124 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1125 (boothowto & RB_VERBOSE)) 1126 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1127 1128 /* call pmap initialization to make new kernel address space */ 1129 pmap_bootstrap(&first); 1130 1131 /* 1132 * Size up each available chunk of physical memory. 1133 */ 1134 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1135 pa_indx = 0; 1136 da_indx = 1; 1137 phys_avail[pa_indx++] = physmap[0]; 1138 phys_avail[pa_indx] = physmap[0]; 1139 dump_avail[da_indx] = physmap[0]; 1140 pte = CMAP1; 1141 1142 /* 1143 * Get dcons buffer address 1144 */ 1145 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1146 getenv_quad("dcons.size", &dcons_size) == 0) 1147 dcons_addr = 0; 1148 1149 /* 1150 * physmap is in bytes, so when converting to page boundaries, 1151 * round up the start address and round down the end address. 1152 */ 1153 for (i = 0; i <= physmap_idx; i += 2) { 1154 vm_paddr_t end; 1155 1156 end = ptoa((vm_paddr_t)Maxmem); 1157 if (physmap[i + 1] < end) 1158 end = trunc_page(physmap[i + 1]); 1159 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1160 int tmp, page_bad, full; 1161 int *ptr = (int *)CADDR1; 1162 1163 full = FALSE; 1164 /* 1165 * block out kernel memory as not available. 1166 */ 1167 if (pa >= 0x100000 && pa < first) 1168 goto do_dump_avail; 1169 1170 /* 1171 * block out dcons buffer 1172 */ 1173 if (dcons_addr > 0 1174 && pa >= trunc_page(dcons_addr) 1175 && pa < dcons_addr + dcons_size) 1176 goto do_dump_avail; 1177 1178 page_bad = FALSE; 1179 1180 /* 1181 * map page into kernel: valid, read/write,non-cacheable 1182 */ 1183 *pte = pa | PG_V | PG_RW | PG_N; 1184 invltlb(); 1185 1186 tmp = *(int *)ptr; 1187 /* 1188 * Test for alternating 1's and 0's 1189 */ 1190 *(volatile int *)ptr = 0xaaaaaaaa; 1191 if (*(volatile int *)ptr != 0xaaaaaaaa) 1192 page_bad = TRUE; 1193 /* 1194 * Test for alternating 0's and 1's 1195 */ 1196 *(volatile int *)ptr = 0x55555555; 1197 if (*(volatile int *)ptr != 0x55555555) 1198 page_bad = TRUE; 1199 /* 1200 * Test for all 1's 1201 */ 1202 *(volatile int *)ptr = 0xffffffff; 1203 if (*(volatile int *)ptr != 0xffffffff) 1204 page_bad = TRUE; 1205 /* 1206 * Test for all 0's 1207 */ 1208 *(volatile int *)ptr = 0x0; 1209 if (*(volatile int *)ptr != 0x0) 1210 page_bad = TRUE; 1211 /* 1212 * Restore original value. 1213 */ 1214 *(int *)ptr = tmp; 1215 1216 /* 1217 * Adjust array of valid/good pages. 1218 */ 1219 if (page_bad == TRUE) 1220 continue; 1221 /* 1222 * If this good page is a continuation of the 1223 * previous set of good pages, then just increase 1224 * the end pointer. Otherwise start a new chunk. 1225 * Note that "end" points one higher than end, 1226 * making the range >= start and < end. 1227 * If we're also doing a speculative memory 1228 * test and we at or past the end, bump up Maxmem 1229 * so that we keep going. The first bad page 1230 * will terminate the loop. 1231 */ 1232 if (phys_avail[pa_indx] == pa) { 1233 phys_avail[pa_indx] += PAGE_SIZE; 1234 } else { 1235 pa_indx++; 1236 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1237 printf( 1238 "Too many holes in the physical address space, giving up\n"); 1239 pa_indx--; 1240 full = TRUE; 1241 goto do_dump_avail; 1242 } 1243 phys_avail[pa_indx++] = pa; /* start */ 1244 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1245 } 1246 physmem++; 1247do_dump_avail: 1248 if (dump_avail[da_indx] == pa) { 1249 dump_avail[da_indx] += PAGE_SIZE; 1250 } else { 1251 da_indx++; 1252 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1253 da_indx--; 1254 goto do_next; 1255 } 1256 dump_avail[da_indx++] = pa; /* start */ 1257 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1258 } 1259do_next: 1260 if (full) 1261 break; 1262 } 1263 } 1264 *pte = 0; 1265 invltlb(); 1266 1267 /* 1268 * XXX 1269 * The last chunk must contain at least one page plus the message 1270 * buffer to avoid complicating other code (message buffer address 1271 * calculation, etc.). 1272 */ 1273 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1274 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1275 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1276 phys_avail[pa_indx--] = 0; 1277 phys_avail[pa_indx--] = 0; 1278 } 1279 1280 Maxmem = atop(phys_avail[pa_indx]); 1281 1282 /* Trim off space for the message buffer. */ 1283 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1284 1285 /* Map the message buffer. */ 1286 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1287 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1288 off); 1289} 1290 1291u_int64_t 1292hammer_time(u_int64_t modulep, u_int64_t physfree) 1293{ 1294 caddr_t kmdp; 1295 int gsel_tss, x; 1296 struct pcpu *pc; 1297 struct nmi_pcpu *np; 1298 u_int64_t msr; 1299 char *env; 1300 1301 thread0.td_kstack = physfree + KERNBASE; 1302 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1303 physfree += KSTACK_PAGES * PAGE_SIZE; 1304 thread0.td_pcb = (struct pcb *) 1305 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1306 1307 /* 1308 * This may be done better later if it gets more high level 1309 * components in it. If so just link td->td_proc here. 1310 */ 1311 proc_linkup0(&proc0, &thread0); 1312 1313 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1314 preload_bootstrap_relocate(KERNBASE); 1315 kmdp = preload_search_by_type("elf kernel"); 1316 if (kmdp == NULL) 1317 kmdp = preload_search_by_type("elf64 kernel"); 1318 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1319 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1320#ifdef DDB 1321 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1322 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1323#endif 1324 1325 /* Init basic tunables, hz etc */ 1326 init_param1(); 1327 1328 /* 1329 * make gdt memory segments 1330 */ 1331 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1332 1333 for (x = 0; x < NGDT; x++) { 1334 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1335 ssdtosd(&gdt_segs[x], &gdt[x]); 1336 } 1337 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1338 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1339 1340 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1341 r_gdt.rd_base = (long) gdt; 1342 lgdt(&r_gdt); 1343 pc = &__pcpu[0]; 1344 1345 wrmsr(MSR_FSBASE, 0); /* User value */ 1346 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1347 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1348 1349 pcpu_init(pc, 0, sizeof(struct pcpu)); 1350 PCPU_SET(prvspace, pc); 1351 PCPU_SET(curthread, &thread0); 1352 PCPU_SET(curpcb, thread0.td_pcb); 1353 PCPU_SET(tssp, &common_tss[0]); 1354 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1355 1356 /* 1357 * Initialize mutexes. 1358 * 1359 * icu_lock: in order to allow an interrupt to occur in a critical 1360 * section, to set pcpu->ipending (etc...) properly, we 1361 * must be able to get the icu lock, so it can't be 1362 * under witness. 1363 */ 1364 mutex_init(); 1365 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1366 1367 /* exceptions */ 1368 for (x = 0; x < NIDT; x++) 1369 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1370 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1371 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1372 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2); 1373 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1374 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1375 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1376 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1377 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1378 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1379 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1380 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1381 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1382 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1383 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1384 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1385 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1386 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1387 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1388 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1389 1390 r_idt.rd_limit = sizeof(idt0) - 1; 1391 r_idt.rd_base = (long) idt; 1392 lidt(&r_idt); 1393 1394 /* 1395 * Initialize the i8254 before the console so that console 1396 * initialization can use DELAY(). 1397 */ 1398 i8254_init(); 1399 1400 /* 1401 * Initialize the console before we print anything out. 1402 */ 1403 cninit(); 1404 1405#ifdef DEV_ISA 1406#ifdef DEV_ATPIC 1407 elcr_probe(); 1408 atpic_startup(); 1409#else 1410 /* Reset and mask the atpics and leave them shut down. */ 1411 atpic_reset(); 1412 1413 /* 1414 * Point the ICU spurious interrupt vectors at the APIC spurious 1415 * interrupt handler. 1416 */ 1417 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1418 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1419#endif 1420#else 1421#error "have you forgotten the isa device?"; 1422#endif 1423 1424 kdb_init(); 1425 1426#ifdef KDB 1427 if (boothowto & RB_KDB) 1428 kdb_enter(KDB_WHY_BOOTFLAGS, 1429 "Boot flags requested debugger"); 1430#endif 1431 1432 identify_cpu(); /* Final stage of CPU initialization */ 1433 initializecpu(); /* Initialize CPU registers */ 1434 1435 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1436 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1437 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1438 /* Ensure the stack is aligned to 16 bytes */ 1439 common_tss[0].tss_rsp0 &= ~0xFul; 1440 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1441 1442 /* doublefault stack space, runs on ist1 */ 1443 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1444 1445 /* 1446 * NMI stack, runs on ist2. The pcpu pointer is stored just 1447 * above the start of the ist2 stack. 1448 */ 1449 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1; 1450 np->np_pcpu = (register_t) pc; 1451 common_tss[0].tss_ist2 = (long) np; 1452 1453 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1454 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1455 1456 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1457 ltr(gsel_tss); 1458 1459 /* Set up the fast syscall stuff */ 1460 msr = rdmsr(MSR_EFER) | EFER_SCE; 1461 wrmsr(MSR_EFER, msr); 1462 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1463 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1464 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1465 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1466 wrmsr(MSR_STAR, msr); 1467 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1468 1469 getmemsize(kmdp, physfree); 1470 init_param2(physmem); 1471 1472 /* now running on new page tables, configured,and u/iom is accessible */ 1473 1474 msgbufinit(msgbufp, MSGBUF_SIZE); 1475 fpuinit(); 1476 1477 /* transfer to user mode */ 1478 1479 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1480 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1481 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1482 1483 load_ds(_udatasel); 1484 load_es(_udatasel); 1485 load_fs(_udatasel); 1486 1487 /* setup proc 0's pcb */ 1488 thread0.td_pcb->pcb_flags = 0; 1489 thread0.td_pcb->pcb_cr3 = KPML4phys; 1490 thread0.td_frame = &proc0_tf; 1491 1492 env = getenv("kernelname"); 1493 if (env != NULL) 1494 strlcpy(kernelname, env, sizeof(kernelname)); 1495 1496 /* Location of kernel stack for locore */ 1497 return ((u_int64_t)thread0.td_pcb); 1498} 1499 1500void 1501cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1502{ 1503 1504 pcpu->pc_acpi_id = 0xffffffff; 1505} 1506 1507void 1508spinlock_enter(void) 1509{ 1510 struct thread *td; 1511 1512 td = curthread; 1513 if (td->td_md.md_spinlock_count == 0) 1514 td->td_md.md_saved_flags = intr_disable(); 1515 td->td_md.md_spinlock_count++; 1516 critical_enter(); 1517} 1518 1519void 1520spinlock_exit(void) 1521{ 1522 struct thread *td; 1523 1524 td = curthread; 1525 critical_exit(); 1526 td->td_md.md_spinlock_count--; 1527 if (td->td_md.md_spinlock_count == 0) 1528 intr_restore(td->td_md.md_saved_flags); 1529} 1530 1531/* 1532 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1533 * we want to start a backtrace from the function that caused us to enter 1534 * the debugger. We have the context in the trapframe, but base the trace 1535 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1536 * enough for a backtrace. 1537 */ 1538void 1539makectx(struct trapframe *tf, struct pcb *pcb) 1540{ 1541 1542 pcb->pcb_r12 = tf->tf_r12; 1543 pcb->pcb_r13 = tf->tf_r13; 1544 pcb->pcb_r14 = tf->tf_r14; 1545 pcb->pcb_r15 = tf->tf_r15; 1546 pcb->pcb_rbp = tf->tf_rbp; 1547 pcb->pcb_rbx = tf->tf_rbx; 1548 pcb->pcb_rip = tf->tf_rip; 1549 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1550} 1551 1552int 1553ptrace_set_pc(struct thread *td, unsigned long addr) 1554{ 1555 td->td_frame->tf_rip = addr; 1556 return (0); 1557} 1558 1559int 1560ptrace_single_step(struct thread *td) 1561{ 1562 td->td_frame->tf_rflags |= PSL_T; 1563 return (0); 1564} 1565 1566int 1567ptrace_clear_single_step(struct thread *td) 1568{ 1569 td->td_frame->tf_rflags &= ~PSL_T; 1570 return (0); 1571} 1572 1573int 1574fill_regs(struct thread *td, struct reg *regs) 1575{ 1576 struct trapframe *tp; 1577 1578 tp = td->td_frame; 1579 regs->r_r15 = tp->tf_r15; 1580 regs->r_r14 = tp->tf_r14; 1581 regs->r_r13 = tp->tf_r13; 1582 regs->r_r12 = tp->tf_r12; 1583 regs->r_r11 = tp->tf_r11; 1584 regs->r_r10 = tp->tf_r10; 1585 regs->r_r9 = tp->tf_r9; 1586 regs->r_r8 = tp->tf_r8; 1587 regs->r_rdi = tp->tf_rdi; 1588 regs->r_rsi = tp->tf_rsi; 1589 regs->r_rbp = tp->tf_rbp; 1590 regs->r_rbx = tp->tf_rbx; 1591 regs->r_rdx = tp->tf_rdx; 1592 regs->r_rcx = tp->tf_rcx; 1593 regs->r_rax = tp->tf_rax; 1594 regs->r_rip = tp->tf_rip; 1595 regs->r_cs = tp->tf_cs; 1596 regs->r_rflags = tp->tf_rflags; 1597 regs->r_rsp = tp->tf_rsp; 1598 regs->r_ss = tp->tf_ss; 1599 return (0); 1600} 1601 1602int 1603set_regs(struct thread *td, struct reg *regs) 1604{ 1605 struct trapframe *tp; 1606 register_t rflags; 1607 1608 tp = td->td_frame; 1609 rflags = regs->r_rflags & 0xffffffff; 1610 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1611 return (EINVAL); 1612 tp->tf_r15 = regs->r_r15; 1613 tp->tf_r14 = regs->r_r14; 1614 tp->tf_r13 = regs->r_r13; 1615 tp->tf_r12 = regs->r_r12; 1616 tp->tf_r11 = regs->r_r11; 1617 tp->tf_r10 = regs->r_r10; 1618 tp->tf_r9 = regs->r_r9; 1619 tp->tf_r8 = regs->r_r8; 1620 tp->tf_rdi = regs->r_rdi; 1621 tp->tf_rsi = regs->r_rsi; 1622 tp->tf_rbp = regs->r_rbp; 1623 tp->tf_rbx = regs->r_rbx; 1624 tp->tf_rdx = regs->r_rdx; 1625 tp->tf_rcx = regs->r_rcx; 1626 tp->tf_rax = regs->r_rax; 1627 tp->tf_rip = regs->r_rip; 1628 tp->tf_cs = regs->r_cs; 1629 tp->tf_rflags = rflags; 1630 tp->tf_rsp = regs->r_rsp; 1631 tp->tf_ss = regs->r_ss; 1632 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1633 return (0); 1634} 1635 1636/* XXX check all this stuff! */ 1637/* externalize from sv_xmm */ 1638static void 1639fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1640{ 1641 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1642 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1643 int i; 1644 1645 /* pcb -> fpregs */ 1646 bzero(fpregs, sizeof(*fpregs)); 1647 1648 /* FPU control/status */ 1649 penv_fpreg->en_cw = penv_xmm->en_cw; 1650 penv_fpreg->en_sw = penv_xmm->en_sw; 1651 penv_fpreg->en_tw = penv_xmm->en_tw; 1652 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1653 penv_fpreg->en_rip = penv_xmm->en_rip; 1654 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1655 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1656 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1657 1658 /* FPU registers */ 1659 for (i = 0; i < 8; ++i) 1660 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1661 1662 /* SSE registers */ 1663 for (i = 0; i < 16; ++i) 1664 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1665} 1666 1667/* internalize from fpregs into sv_xmm */ 1668static void 1669set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1670{ 1671 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1672 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1673 int i; 1674 1675 /* fpregs -> pcb */ 1676 /* FPU control/status */ 1677 penv_xmm->en_cw = penv_fpreg->en_cw; 1678 penv_xmm->en_sw = penv_fpreg->en_sw; 1679 penv_xmm->en_tw = penv_fpreg->en_tw; 1680 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1681 penv_xmm->en_rip = penv_fpreg->en_rip; 1682 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1683 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1684 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 1685 1686 /* FPU registers */ 1687 for (i = 0; i < 8; ++i) 1688 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1689 1690 /* SSE registers */ 1691 for (i = 0; i < 16; ++i) 1692 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1693} 1694 1695/* externalize from td->pcb */ 1696int 1697fill_fpregs(struct thread *td, struct fpreg *fpregs) 1698{ 1699 1700 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1701 return (0); 1702} 1703 1704/* internalize to td->pcb */ 1705int 1706set_fpregs(struct thread *td, struct fpreg *fpregs) 1707{ 1708 1709 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1710 return (0); 1711} 1712 1713/* 1714 * Get machine context. 1715 */ 1716int 1717get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1718{ 1719 struct trapframe *tp; 1720 1721 tp = td->td_frame; 1722 PROC_LOCK(curthread->td_proc); 1723 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1724 PROC_UNLOCK(curthread->td_proc); 1725 mcp->mc_r15 = tp->tf_r15; 1726 mcp->mc_r14 = tp->tf_r14; 1727 mcp->mc_r13 = tp->tf_r13; 1728 mcp->mc_r12 = tp->tf_r12; 1729 mcp->mc_r11 = tp->tf_r11; 1730 mcp->mc_r10 = tp->tf_r10; 1731 mcp->mc_r9 = tp->tf_r9; 1732 mcp->mc_r8 = tp->tf_r8; 1733 mcp->mc_rdi = tp->tf_rdi; 1734 mcp->mc_rsi = tp->tf_rsi; 1735 mcp->mc_rbp = tp->tf_rbp; 1736 mcp->mc_rbx = tp->tf_rbx; 1737 mcp->mc_rcx = tp->tf_rcx; 1738 mcp->mc_rflags = tp->tf_rflags; 1739 if (flags & GET_MC_CLEAR_RET) { 1740 mcp->mc_rax = 0; 1741 mcp->mc_rdx = 0; 1742 mcp->mc_rflags &= ~PSL_C; 1743 } else { 1744 mcp->mc_rax = tp->tf_rax; 1745 mcp->mc_rdx = tp->tf_rdx; 1746 } 1747 mcp->mc_rip = tp->tf_rip; 1748 mcp->mc_cs = tp->tf_cs; 1749 mcp->mc_rsp = tp->tf_rsp; 1750 mcp->mc_ss = tp->tf_ss; 1751 mcp->mc_len = sizeof(*mcp); 1752 get_fpcontext(td, mcp); 1753 return (0); 1754} 1755 1756/* 1757 * Set machine context. 1758 * 1759 * However, we don't set any but the user modifiable flags, and we won't 1760 * touch the cs selector. 1761 */ 1762int 1763set_mcontext(struct thread *td, const mcontext_t *mcp) 1764{ 1765 struct trapframe *tp; 1766 long rflags; 1767 int ret; 1768 1769 tp = td->td_frame; 1770 if (mcp->mc_len != sizeof(*mcp)) 1771 return (EINVAL); 1772 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1773 (tp->tf_rflags & ~PSL_USERCHANGE); 1774 ret = set_fpcontext(td, mcp); 1775 if (ret != 0) 1776 return (ret); 1777 tp->tf_r15 = mcp->mc_r15; 1778 tp->tf_r14 = mcp->mc_r14; 1779 tp->tf_r13 = mcp->mc_r13; 1780 tp->tf_r12 = mcp->mc_r12; 1781 tp->tf_r11 = mcp->mc_r11; 1782 tp->tf_r10 = mcp->mc_r10; 1783 tp->tf_r9 = mcp->mc_r9; 1784 tp->tf_r8 = mcp->mc_r8; 1785 tp->tf_rdi = mcp->mc_rdi; 1786 tp->tf_rsi = mcp->mc_rsi; 1787 tp->tf_rbp = mcp->mc_rbp; 1788 tp->tf_rbx = mcp->mc_rbx; 1789 tp->tf_rdx = mcp->mc_rdx; 1790 tp->tf_rcx = mcp->mc_rcx; 1791 tp->tf_rax = mcp->mc_rax; 1792 tp->tf_rip = mcp->mc_rip; 1793 tp->tf_rflags = rflags; 1794 tp->tf_rsp = mcp->mc_rsp; 1795 tp->tf_ss = mcp->mc_ss; 1796 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1797 return (0); 1798} 1799 1800static void 1801get_fpcontext(struct thread *td, mcontext_t *mcp) 1802{ 1803 1804 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1805 mcp->mc_fpformat = fpuformat(); 1806} 1807 1808static int 1809set_fpcontext(struct thread *td, const mcontext_t *mcp) 1810{ 1811 struct savefpu *fpstate; 1812 1813 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1814 return (0); 1815 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1816 return (EINVAL); 1817 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1818 /* We don't care what state is left in the FPU or PCB. */ 1819 fpstate_drop(td); 1820 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1821 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1822 /* 1823 * XXX we violate the dubious requirement that fpusetregs() 1824 * be called with interrupts disabled. 1825 * XXX obsolete on trap-16 systems? 1826 */ 1827 fpstate = (struct savefpu *)&mcp->mc_fpstate; 1828 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 1829 fpusetregs(td, fpstate); 1830 } else 1831 return (EINVAL); 1832 return (0); 1833} 1834 1835void 1836fpstate_drop(struct thread *td) 1837{ 1838 register_t s; 1839 1840 s = intr_disable(); 1841 if (PCPU_GET(fpcurthread) == td) 1842 fpudrop(); 1843 /* 1844 * XXX force a full drop of the fpu. The above only drops it if we 1845 * owned it. 1846 * 1847 * XXX I don't much like fpugetregs()'s semantics of doing a full 1848 * drop. Dropping only to the pcb matches fnsave's behaviour. 1849 * We only need to drop to !PCB_INITDONE in sendsig(). But 1850 * sendsig() is the only caller of fpugetregs()... perhaps we just 1851 * have too many layers. 1852 */ 1853 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1854 intr_restore(s); 1855} 1856 1857int 1858fill_dbregs(struct thread *td, struct dbreg *dbregs) 1859{ 1860 struct pcb *pcb; 1861 1862 if (td == NULL) { 1863 dbregs->dr[0] = rdr0(); 1864 dbregs->dr[1] = rdr1(); 1865 dbregs->dr[2] = rdr2(); 1866 dbregs->dr[3] = rdr3(); 1867 dbregs->dr[6] = rdr6(); 1868 dbregs->dr[7] = rdr7(); 1869 } else { 1870 pcb = td->td_pcb; 1871 dbregs->dr[0] = pcb->pcb_dr0; 1872 dbregs->dr[1] = pcb->pcb_dr1; 1873 dbregs->dr[2] = pcb->pcb_dr2; 1874 dbregs->dr[3] = pcb->pcb_dr3; 1875 dbregs->dr[6] = pcb->pcb_dr6; 1876 dbregs->dr[7] = pcb->pcb_dr7; 1877 } 1878 dbregs->dr[4] = 0; 1879 dbregs->dr[5] = 0; 1880 dbregs->dr[8] = 0; 1881 dbregs->dr[9] = 0; 1882 dbregs->dr[10] = 0; 1883 dbregs->dr[11] = 0; 1884 dbregs->dr[12] = 0; 1885 dbregs->dr[13] = 0; 1886 dbregs->dr[14] = 0; 1887 dbregs->dr[15] = 0; 1888 return (0); 1889} 1890 1891int 1892set_dbregs(struct thread *td, struct dbreg *dbregs) 1893{ 1894 struct pcb *pcb; 1895 int i; 1896 1897 if (td == NULL) { 1898 load_dr0(dbregs->dr[0]); 1899 load_dr1(dbregs->dr[1]); 1900 load_dr2(dbregs->dr[2]); 1901 load_dr3(dbregs->dr[3]); 1902 load_dr6(dbregs->dr[6]); 1903 load_dr7(dbregs->dr[7]); 1904 } else { 1905 /* 1906 * Don't let an illegal value for dr7 get set. Specifically, 1907 * check for undefined settings. Setting these bit patterns 1908 * result in undefined behaviour and can lead to an unexpected 1909 * TRCTRAP or a general protection fault right here. 1910 * Upper bits of dr6 and dr7 must not be set 1911 */ 1912 for (i = 0; i < 4; i++) { 1913 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 1914 return (EINVAL); 1915 if (td->td_frame->tf_cs == _ucode32sel && 1916 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 1917 return (EINVAL); 1918 } 1919 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1920 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1921 return (EINVAL); 1922 1923 pcb = td->td_pcb; 1924 1925 /* 1926 * Don't let a process set a breakpoint that is not within the 1927 * process's address space. If a process could do this, it 1928 * could halt the system by setting a breakpoint in the kernel 1929 * (if ddb was enabled). Thus, we need to check to make sure 1930 * that no breakpoints are being enabled for addresses outside 1931 * process's address space. 1932 * 1933 * XXX - what about when the watched area of the user's 1934 * address space is written into from within the kernel 1935 * ... wouldn't that still cause a breakpoint to be generated 1936 * from within kernel mode? 1937 */ 1938 1939 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 1940 /* dr0 is enabled */ 1941 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1942 return (EINVAL); 1943 } 1944 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 1945 /* dr1 is enabled */ 1946 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1947 return (EINVAL); 1948 } 1949 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 1950 /* dr2 is enabled */ 1951 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1952 return (EINVAL); 1953 } 1954 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 1955 /* dr3 is enabled */ 1956 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1957 return (EINVAL); 1958 } 1959 1960 pcb->pcb_dr0 = dbregs->dr[0]; 1961 pcb->pcb_dr1 = dbregs->dr[1]; 1962 pcb->pcb_dr2 = dbregs->dr[2]; 1963 pcb->pcb_dr3 = dbregs->dr[3]; 1964 pcb->pcb_dr6 = dbregs->dr[6]; 1965 pcb->pcb_dr7 = dbregs->dr[7]; 1966 1967 pcb->pcb_flags |= PCB_DBREGS; 1968 } 1969 1970 return (0); 1971} 1972 1973void 1974reset_dbregs(void) 1975{ 1976 1977 load_dr7(0); /* Turn off the control bits first */ 1978 load_dr0(0); 1979 load_dr1(0); 1980 load_dr2(0); 1981 load_dr3(0); 1982 load_dr6(0); 1983} 1984 1985/* 1986 * Return > 0 if a hardware breakpoint has been hit, and the 1987 * breakpoint was in user space. Return 0, otherwise. 1988 */ 1989int 1990user_dbreg_trap(void) 1991{ 1992 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1993 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1994 int nbp; /* number of breakpoints that triggered */ 1995 caddr_t addr[4]; /* breakpoint addresses */ 1996 int i; 1997 1998 dr7 = rdr7(); 1999 if ((dr7 & 0x000000ff) == 0) { 2000 /* 2001 * all GE and LE bits in the dr7 register are zero, 2002 * thus the trap couldn't have been caused by the 2003 * hardware debug registers 2004 */ 2005 return 0; 2006 } 2007 2008 nbp = 0; 2009 dr6 = rdr6(); 2010 bp = dr6 & 0x0000000f; 2011 2012 if (!bp) { 2013 /* 2014 * None of the breakpoint bits are set meaning this 2015 * trap was not caused by any of the debug registers 2016 */ 2017 return 0; 2018 } 2019 2020 /* 2021 * at least one of the breakpoints were hit, check to see 2022 * which ones and if any of them are user space addresses 2023 */ 2024 2025 if (bp & 0x01) { 2026 addr[nbp++] = (caddr_t)rdr0(); 2027 } 2028 if (bp & 0x02) { 2029 addr[nbp++] = (caddr_t)rdr1(); 2030 } 2031 if (bp & 0x04) { 2032 addr[nbp++] = (caddr_t)rdr2(); 2033 } 2034 if (bp & 0x08) { 2035 addr[nbp++] = (caddr_t)rdr3(); 2036 } 2037 2038 for (i = 0; i < nbp; i++) { 2039 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2040 /* 2041 * addr[i] is in user space 2042 */ 2043 return nbp; 2044 } 2045 } 2046 2047 /* 2048 * None of the breakpoints are in user space. 2049 */ 2050 return 0; 2051} 2052 2053#ifdef KDB 2054 2055/* 2056 * Provide inb() and outb() as functions. They are normally only 2057 * available as macros calling inlined functions, thus cannot be 2058 * called from the debugger. 2059 * 2060 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2061 */ 2062 2063#undef inb 2064#undef outb 2065 2066/* silence compiler warnings */ 2067u_char inb(u_int); 2068void outb(u_int, u_char); 2069 2070u_char 2071inb(u_int port) 2072{ 2073 u_char data; 2074 /* 2075 * We use %%dx and not %1 here because i/o is done at %dx and not at 2076 * %edx, while gcc generates inferior code (movw instead of movl) 2077 * if we tell it to load (u_short) port. 2078 */ 2079 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2080 return (data); 2081} 2082 2083void 2084outb(u_int port, u_char data) 2085{ 2086 u_char al; 2087 /* 2088 * Use an unnecessary assignment to help gcc's register allocator. 2089 * This make a large difference for gcc-1.40 and a tiny difference 2090 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2091 * best results. gcc-2.6.0 can't handle this. 2092 */ 2093 al = data; 2094 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2095} 2096 2097#endif /* KDB */ 2098