machdep.c revision 151719
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 151719 2005-10-26 22:16:52Z peter $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_msgbuf.h" 55#include "opt_perfmon.h" 56 57#include <sys/param.h> 58#include <sys/proc.h> 59#include <sys/systm.h> 60#include <sys/bio.h> 61#include <sys/buf.h> 62#include <sys/bus.h> 63#include <sys/callout.h> 64#include <sys/cons.h> 65#include <sys/cpu.h> 66#include <sys/eventhandler.h> 67#include <sys/exec.h> 68#include <sys/imgact.h> 69#include <sys/kdb.h> 70#include <sys/kernel.h> 71#include <sys/ktr.h> 72#include <sys/linker.h> 73#include <sys/lock.h> 74#include <sys/malloc.h> 75#include <sys/memrange.h> 76#include <sys/msgbuf.h> 77#include <sys/mutex.h> 78#include <sys/pcpu.h> 79#include <sys/ptrace.h> 80#include <sys/reboot.h> 81#include <sys/sched.h> 82#include <sys/signalvar.h> 83#include <sys/sysctl.h> 84#include <sys/sysent.h> 85#include <sys/sysproto.h> 86#include <sys/ucontext.h> 87#include <sys/vmmeter.h> 88 89#include <vm/vm.h> 90#include <vm/vm_extern.h> 91#include <vm/vm_kern.h> 92#include <vm/vm_page.h> 93#include <vm/vm_map.h> 94#include <vm/vm_object.h> 95#include <vm/vm_pager.h> 96#include <vm/vm_param.h> 97 98#ifdef DDB 99#ifndef KDB 100#error KDB must be enabled in order for DDB to work! 101#endif 102#endif 103#include <ddb/ddb.h> 104 105#include <net/netisr.h> 106 107#include <machine/clock.h> 108#include <machine/cpu.h> 109#include <machine/cputypes.h> 110#include <machine/intr_machdep.h> 111#include <machine/md_var.h> 112#include <machine/metadata.h> 113#include <machine/pc/bios.h> 114#include <machine/pcb.h> 115#include <machine/proc.h> 116#include <machine/reg.h> 117#include <machine/sigframe.h> 118#include <machine/specialreg.h> 119#ifdef PERFMON 120#include <machine/perfmon.h> 121#endif 122#include <machine/tss.h> 123#ifdef SMP 124#include <machine/smp.h> 125#endif 126 127#include <amd64/isa/icu.h> 128 129#include <isa/isareg.h> 130#include <isa/rtc.h> 131 132/* Sanity check for __curthread() */ 133CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 134 135extern u_int64_t hammer_time(u_int64_t, u_int64_t); 136extern void dblfault_handler(void); 137 138extern void printcpuinfo(void); /* XXX header file */ 139extern void identify_cpu(void); 140extern void panicifcpuunsupported(void); 141 142#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 143#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 144 145static void cpu_startup(void *); 146static void get_fpcontext(struct thread *td, mcontext_t *mcp); 147static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 148SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 149 150#ifdef DDB 151extern vm_offset_t ksym_start, ksym_end; 152#endif 153 154int _udatasel, _ucodesel, _ucode32sel; 155 156int cold = 1; 157 158long Maxmem = 0; 159long realmem = 0; 160 161vm_paddr_t phys_avail[20]; 162vm_paddr_t dump_avail[20]; 163 164/* must be 2 less so 0 0 can signal end of chunks */ 165#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 166#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 167 168struct kva_md_info kmi; 169 170static struct trapframe proc0_tf; 171struct region_descriptor r_gdt, r_idt; 172 173struct pcpu __pcpu[MAXCPU]; 174 175struct mtx icu_lock; 176 177struct mem_range_softc mem_range_softc; 178 179static void 180cpu_startup(dummy) 181 void *dummy; 182{ 183 /* 184 * Good {morning,afternoon,evening,night}. 185 */ 186 startrtclock(); 187 printcpuinfo(); 188 panicifcpuunsupported(); 189#ifdef PERFMON 190 perfmon_init(); 191#endif 192 printf("usable memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem), 193 ptoa((uintmax_t)physmem) / 1048576); 194 realmem = Maxmem; 195 /* 196 * Display any holes after the first chunk of extended memory. 197 */ 198 if (bootverbose) { 199 int indx; 200 201 printf("Physical memory chunk(s):\n"); 202 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 203 vm_paddr_t size; 204 205 size = phys_avail[indx + 1] - phys_avail[indx]; 206 printf( 207 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 208 (uintmax_t)phys_avail[indx], 209 (uintmax_t)phys_avail[indx + 1] - 1, 210 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 211 } 212 } 213 214 vm_ksubmap_init(&kmi); 215 216 printf("avail memory = %ju (%ju MB)\n", 217 ptoa((uintmax_t)cnt.v_free_count), 218 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 219 220 /* 221 * Set up buffers, so they can be used to read disk labels. 222 */ 223 bufinit(); 224 vm_pager_bufferinit(); 225 226 cpu_setregs(); 227} 228 229/* 230 * Send an interrupt to process. 231 * 232 * Stack is set up to allow sigcode stored 233 * at top to call routine, followed by kcall 234 * to sigreturn routine below. After sigreturn 235 * resets the signal mask, the stack, and the 236 * frame pointer, it returns to the user 237 * specified pc, psl. 238 */ 239void 240sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 241{ 242 struct sigframe sf, *sfp; 243 struct proc *p; 244 struct thread *td; 245 struct sigacts *psp; 246 char *sp; 247 struct trapframe *regs; 248 int oonstack; 249 int sig; 250 251 td = curthread; 252 p = td->td_proc; 253 PROC_LOCK_ASSERT(p, MA_OWNED); 254 sig = ksi->ksi_signo; 255 psp = p->p_sigacts; 256 mtx_assert(&psp->ps_mtx, MA_OWNED); 257 regs = td->td_frame; 258 oonstack = sigonstack(regs->tf_rsp); 259 260 /* Save user context. */ 261 bzero(&sf, sizeof(sf)); 262 sf.sf_uc.uc_sigmask = *mask; 263 sf.sf_uc.uc_stack = td->td_sigstk; 264 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 265 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 266 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 267 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 268 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 269 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 270 fpstate_drop(td); 271 272 /* Allocate space for the signal handler context. */ 273 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 274 SIGISMEMBER(psp->ps_sigonstack, sig)) { 275 sp = td->td_sigstk.ss_sp + 276 td->td_sigstk.ss_size - sizeof(struct sigframe); 277#if defined(COMPAT_43) 278 td->td_sigstk.ss_flags |= SS_ONSTACK; 279#endif 280 } else 281 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 282 /* Align to 16 bytes. */ 283 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 284 285 /* Translate the signal if appropriate. */ 286 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 287 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 288 289 /* Build the argument list for the signal handler. */ 290 regs->tf_rdi = sig; /* arg 1 in %rdi */ 291 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 292 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 293 /* Signal handler installed with SA_SIGINFO. */ 294 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 295 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 296 297 /* Fill in POSIX parts */ 298 sf.sf_si = ksi->ksi_info; 299 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 300 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 301 } else { 302 /* Old FreeBSD-style arguments. */ 303 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 304 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 305 sf.sf_ahu.sf_handler = catcher; 306 } 307 mtx_unlock(&psp->ps_mtx); 308 PROC_UNLOCK(p); 309 310 /* 311 * Copy the sigframe out to the user's stack. 312 */ 313 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 314#ifdef DEBUG 315 printf("process %ld has trashed its stack\n", (long)p->p_pid); 316#endif 317 PROC_LOCK(p); 318 sigexit(td, SIGILL); 319 } 320 321 regs->tf_rsp = (long)sfp; 322 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 323 regs->tf_rflags &= ~PSL_T; 324 regs->tf_cs = _ucodesel; 325 PROC_LOCK(p); 326 mtx_lock(&psp->ps_mtx); 327} 328 329/* 330 * System call to cleanup state after a signal 331 * has been taken. Reset signal mask and 332 * stack state from context left by sendsig (above). 333 * Return to previous pc and psl as specified by 334 * context left by sendsig. Check carefully to 335 * make sure that the user has not modified the 336 * state to gain improper privileges. 337 * 338 * MPSAFE 339 */ 340int 341sigreturn(td, uap) 342 struct thread *td; 343 struct sigreturn_args /* { 344 const __ucontext *sigcntxp; 345 } */ *uap; 346{ 347 ucontext_t uc; 348 struct proc *p = td->td_proc; 349 struct trapframe *regs; 350 const ucontext_t *ucp; 351 long rflags; 352 int cs, error, ret; 353 ksiginfo_t ksi; 354 355 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 356 if (error != 0) 357 return (error); 358 ucp = &uc; 359 regs = td->td_frame; 360 rflags = ucp->uc_mcontext.mc_rflags; 361 /* 362 * Don't allow users to change privileged or reserved flags. 363 */ 364 /* 365 * XXX do allow users to change the privileged flag PSL_RF. 366 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 367 * should sometimes set it there too. tf_rflags is kept in 368 * the signal context during signal handling and there is no 369 * other place to remember it, so the PSL_RF bit may be 370 * corrupted by the signal handler without us knowing. 371 * Corruption of the PSL_RF bit at worst causes one more or 372 * one less debugger trap, so allowing it is fairly harmless. 373 */ 374 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 375 printf("sigreturn: rflags = 0x%lx\n", rflags); 376 return (EINVAL); 377 } 378 379 /* 380 * Don't allow users to load a valid privileged %cs. Let the 381 * hardware check for invalid selectors, excess privilege in 382 * other selectors, invalid %eip's and invalid %esp's. 383 */ 384 cs = ucp->uc_mcontext.mc_cs; 385 if (!CS_SECURE(cs)) { 386 printf("sigreturn: cs = 0x%x\n", cs); 387 ksiginfo_init_trap(&ksi); 388 ksi.ksi_signo = SIGBUS; 389 ksi.ksi_code = BUS_OBJERR; 390 ksi.ksi_trapno = T_PROTFLT; 391 ksi.ksi_addr = (void *)regs->tf_rip; 392 trapsignal(td, &ksi); 393 return (EINVAL); 394 } 395 396 ret = set_fpcontext(td, &ucp->uc_mcontext); 397 if (ret != 0) 398 return (ret); 399 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 400 401 PROC_LOCK(p); 402#if defined(COMPAT_43) 403 if (ucp->uc_mcontext.mc_onstack & 1) 404 td->td_sigstk.ss_flags |= SS_ONSTACK; 405 else 406 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 407#endif 408 409 td->td_sigmask = ucp->uc_sigmask; 410 SIG_CANTMASK(td->td_sigmask); 411 signotify(td); 412 PROC_UNLOCK(p); 413 td->td_pcb->pcb_flags |= PCB_FULLCTX; 414 return (EJUSTRETURN); 415} 416 417#ifdef COMPAT_FREEBSD4 418int 419freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 420{ 421 422 return sigreturn(td, (struct sigreturn_args *)uap); 423} 424#endif 425 426 427/* 428 * Machine dependent boot() routine 429 * 430 * I haven't seen anything to put here yet 431 * Possibly some stuff might be grafted back here from boot() 432 */ 433void 434cpu_boot(int howto) 435{ 436} 437 438/* Get current clock frequency for the given cpu id. */ 439int 440cpu_est_clockrate(int cpu_id, uint64_t *rate) 441{ 442 register_t reg; 443 uint64_t tsc1, tsc2; 444 445 if (pcpu_find(cpu_id) == NULL || rate == NULL) 446 return (EINVAL); 447 448 /* If we're booting, trust the rate calibrated moments ago. */ 449 if (cold) { 450 *rate = tsc_freq; 451 return (0); 452 } 453 454#ifdef SMP 455 /* Schedule ourselves on the indicated cpu. */ 456 mtx_lock_spin(&sched_lock); 457 sched_bind(curthread, cpu_id); 458 mtx_unlock_spin(&sched_lock); 459#endif 460 461 /* Calibrate by measuring a short delay. */ 462 reg = intr_disable(); 463 tsc1 = rdtsc(); 464 DELAY(1000); 465 tsc2 = rdtsc(); 466 intr_restore(reg); 467 468#ifdef SMP 469 mtx_lock_spin(&sched_lock); 470 sched_unbind(curthread); 471 mtx_unlock_spin(&sched_lock); 472#endif 473 474 /* 475 * Calculate the difference in readings, convert to Mhz, and 476 * subtract 0.5% of the total. Empirical testing has shown that 477 * overhead in DELAY() works out to approximately this value. 478 */ 479 tsc2 -= tsc1; 480 *rate = tsc2 * 1000 - tsc2 * 5; 481 return (0); 482} 483 484/* 485 * Shutdown the CPU as much as possible 486 */ 487void 488cpu_halt(void) 489{ 490 for (;;) 491 __asm__ ("hlt"); 492} 493 494/* 495 * Hook to idle the CPU when possible. In the SMP case we default to 496 * off because a halted cpu will not currently pick up a new thread in the 497 * run queue until the next timer tick. If turned on this will result in 498 * approximately a 4.2% loss in real time performance in buildworld tests 499 * (but improves user and sys times oddly enough), and saves approximately 500 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 501 * 502 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 503 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 504 * Then we can have our cake and eat it too. 505 * 506 * XXX I'm turning it on for SMP as well by default for now. It seems to 507 * help lock contention somewhat, and this is critical for HTT. -Peter 508 */ 509static int cpu_idle_hlt = 1; 510SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 511 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 512 513static void 514cpu_idle_default(void) 515{ 516 /* 517 * we must absolutely guarentee that hlt is the 518 * absolute next instruction after sti or we 519 * introduce a timing window. 520 */ 521 __asm __volatile("sti; hlt"); 522} 523 524/* 525 * Note that we have to be careful here to avoid a race between checking 526 * sched_runnable() and actually halting. If we don't do this, we may waste 527 * the time between calling hlt and the next interrupt even though there 528 * is a runnable process. 529 */ 530void 531cpu_idle(void) 532{ 533 534#ifdef SMP 535 if (mp_grab_cpu_hlt()) 536 return; 537#endif 538 if (cpu_idle_hlt) { 539 disable_intr(); 540 if (sched_runnable()) 541 enable_intr(); 542 else 543 (*cpu_idle_hook)(); 544 } 545} 546 547/* Other subsystems (e.g., ACPI) can hook this later. */ 548void (*cpu_idle_hook)(void) = cpu_idle_default; 549 550/* 551 * Clear registers on exec 552 */ 553void 554exec_setregs(td, entry, stack, ps_strings) 555 struct thread *td; 556 u_long entry; 557 u_long stack; 558 u_long ps_strings; 559{ 560 struct trapframe *regs = td->td_frame; 561 struct pcb *pcb = td->td_pcb; 562 563 critical_enter(); 564 wrmsr(MSR_FSBASE, 0); 565 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 566 pcb->pcb_fsbase = 0; 567 pcb->pcb_gsbase = 0; 568 critical_exit(); 569 load_ds(_udatasel); 570 load_es(_udatasel); 571 load_fs(_udatasel); 572 load_gs(_udatasel); 573 pcb->pcb_ds = _udatasel; 574 pcb->pcb_es = _udatasel; 575 pcb->pcb_fs = _udatasel; 576 pcb->pcb_gs = _udatasel; 577 578 bzero((char *)regs, sizeof(struct trapframe)); 579 regs->tf_rip = entry; 580 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 581 regs->tf_rdi = stack; /* argv */ 582 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 583 regs->tf_ss = _udatasel; 584 regs->tf_cs = _ucodesel; 585 586 /* 587 * Reset the hardware debug registers if they were in use. 588 * They won't have any meaning for the newly exec'd process. 589 */ 590 if (pcb->pcb_flags & PCB_DBREGS) { 591 pcb->pcb_dr0 = 0; 592 pcb->pcb_dr1 = 0; 593 pcb->pcb_dr2 = 0; 594 pcb->pcb_dr3 = 0; 595 pcb->pcb_dr6 = 0; 596 pcb->pcb_dr7 = 0; 597 if (pcb == PCPU_GET(curpcb)) { 598 /* 599 * Clear the debug registers on the running 600 * CPU, otherwise they will end up affecting 601 * the next process we switch to. 602 */ 603 reset_dbregs(); 604 } 605 pcb->pcb_flags &= ~PCB_DBREGS; 606 } 607 608 /* 609 * Drop the FP state if we hold it, so that the process gets a 610 * clean FP state if it uses the FPU again. 611 */ 612 fpstate_drop(td); 613} 614 615void 616cpu_setregs(void) 617{ 618 register_t cr0; 619 620 cr0 = rcr0(); 621 /* 622 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 623 * BSP. See the comments there about why we set them. 624 */ 625 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 626 load_cr0(cr0); 627} 628 629static int 630sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 631{ 632 int error; 633 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 634 req); 635 if (!error && req->newptr) 636 resettodr(); 637 return (error); 638} 639 640SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 641 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 642 643SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 644 CTLFLAG_RW, &disable_rtc_set, 0, ""); 645 646SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 647 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 648 649/* 650 * Initialize amd64 and configure to run kernel 651 */ 652 653/* 654 * Initialize segments & interrupt table 655 */ 656 657struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor table */ 658static struct gate_descriptor idt0[NIDT]; 659struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 660 661static char dblfault_stack[PAGE_SIZE] __aligned(16); 662 663struct amd64tss common_tss[MAXCPU]; 664 665/* software prototypes -- in more palatable form */ 666struct soft_segment_descriptor gdt_segs[] = { 667/* GNULL_SEL 0 Null Descriptor */ 668{ 0x0, /* segment base address */ 669 0x0, /* length */ 670 0, /* segment type */ 671 0, /* segment descriptor priority level */ 672 0, /* segment descriptor present */ 673 0, /* long */ 674 0, /* default 32 vs 16 bit size */ 675 0 /* limit granularity (byte/page units)*/ }, 676/* GCODE_SEL 1 Code Descriptor for kernel */ 677{ 0x0, /* segment base address */ 678 0xfffff, /* length - all address space */ 679 SDT_MEMERA, /* segment type */ 680 SEL_KPL, /* segment descriptor priority level */ 681 1, /* segment descriptor present */ 682 1, /* long */ 683 0, /* default 32 vs 16 bit size */ 684 1 /* limit granularity (byte/page units)*/ }, 685/* GDATA_SEL 2 Data Descriptor for kernel */ 686{ 0x0, /* segment base address */ 687 0xfffff, /* length - all address space */ 688 SDT_MEMRWA, /* segment type */ 689 SEL_KPL, /* segment descriptor priority level */ 690 1, /* segment descriptor present */ 691 1, /* long */ 692 0, /* default 32 vs 16 bit size */ 693 1 /* limit granularity (byte/page units)*/ }, 694/* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 695{ 0x0, /* segment base address */ 696 0xfffff, /* length - all address space */ 697 SDT_MEMERA, /* segment type */ 698 SEL_UPL, /* segment descriptor priority level */ 699 1, /* segment descriptor present */ 700 0, /* long */ 701 1, /* default 32 vs 16 bit size */ 702 1 /* limit granularity (byte/page units)*/ }, 703/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 704{ 0x0, /* segment base address */ 705 0xfffff, /* length - all address space */ 706 SDT_MEMRWA, /* segment type */ 707 SEL_UPL, /* segment descriptor priority level */ 708 1, /* segment descriptor present */ 709 0, /* long */ 710 1, /* default 32 vs 16 bit size */ 711 1 /* limit granularity (byte/page units)*/ }, 712/* GUCODE_SEL 5 64 bit Code Descriptor for user */ 713{ 0x0, /* segment base address */ 714 0xfffff, /* length - all address space */ 715 SDT_MEMERA, /* segment type */ 716 SEL_UPL, /* segment descriptor priority level */ 717 1, /* segment descriptor present */ 718 1, /* long */ 719 0, /* default 32 vs 16 bit size */ 720 1 /* limit granularity (byte/page units)*/ }, 721/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 722{ 723 0x0, /* segment base address */ 724 sizeof(struct amd64tss)-1,/* length - all address space */ 725 SDT_SYSTSS, /* segment type */ 726 SEL_KPL, /* segment descriptor priority level */ 727 1, /* segment descriptor present */ 728 0, /* long */ 729 0, /* unused - default 32 vs 16 bit size */ 730 0 /* limit granularity (byte/page units)*/ }, 731/* Actually, the TSS is a system descriptor which is double size */ 732{ 0x0, /* segment base address */ 733 0x0, /* length */ 734 0, /* segment type */ 735 0, /* segment descriptor priority level */ 736 0, /* segment descriptor present */ 737 0, /* long */ 738 0, /* default 32 vs 16 bit size */ 739 0 /* limit granularity (byte/page units)*/ }, 740}; 741 742void 743setidt(idx, func, typ, dpl, ist) 744 int idx; 745 inthand_t *func; 746 int typ; 747 int dpl; 748 int ist; 749{ 750 struct gate_descriptor *ip; 751 752 ip = idt + idx; 753 ip->gd_looffset = (uintptr_t)func; 754 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 755 ip->gd_ist = ist; 756 ip->gd_xx = 0; 757 ip->gd_type = typ; 758 ip->gd_dpl = dpl; 759 ip->gd_p = 1; 760 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 761} 762 763#define IDTVEC(name) __CONCAT(X,name) 764 765extern inthand_t 766 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 767 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 768 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 769 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 770 IDTVEC(xmm), IDTVEC(dblfault), 771 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 772 773void 774sdtossd(sd, ssd) 775 struct user_segment_descriptor *sd; 776 struct soft_segment_descriptor *ssd; 777{ 778 779 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 780 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 781 ssd->ssd_type = sd->sd_type; 782 ssd->ssd_dpl = sd->sd_dpl; 783 ssd->ssd_p = sd->sd_p; 784 ssd->ssd_long = sd->sd_long; 785 ssd->ssd_def32 = sd->sd_def32; 786 ssd->ssd_gran = sd->sd_gran; 787} 788 789void 790ssdtosd(ssd, sd) 791 struct soft_segment_descriptor *ssd; 792 struct user_segment_descriptor *sd; 793{ 794 795 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 796 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 797 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 798 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 799 sd->sd_type = ssd->ssd_type; 800 sd->sd_dpl = ssd->ssd_dpl; 801 sd->sd_p = ssd->ssd_p; 802 sd->sd_long = ssd->ssd_long; 803 sd->sd_def32 = ssd->ssd_def32; 804 sd->sd_gran = ssd->ssd_gran; 805} 806 807void 808ssdtosyssd(ssd, sd) 809 struct soft_segment_descriptor *ssd; 810 struct system_segment_descriptor *sd; 811{ 812 813 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 814 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 815 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 816 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 817 sd->sd_type = ssd->ssd_type; 818 sd->sd_dpl = ssd->ssd_dpl; 819 sd->sd_p = ssd->ssd_p; 820 sd->sd_gran = ssd->ssd_gran; 821} 822 823#if !defined(DEV_ATPIC) && defined(DEV_ISA) 824#include <isa/isavar.h> 825u_int 826isa_irq_pending(void) 827{ 828 829 return (0); 830} 831#endif 832 833#define PHYSMAP_SIZE (2 * 20) 834 835u_int basemem; 836 837/* 838 * Populate the (physmap) array with base/bound pairs describing the 839 * available physical memory in the system, then test this memory and 840 * build the phys_avail array describing the actually-available memory. 841 * 842 * If we cannot accurately determine the physical memory map, then use 843 * value from the 0xE801 call, and failing that, the RTC. 844 * 845 * Total memory size may be set by the kernel environment variable 846 * hw.physmem or the compile-time define MAXMEM. 847 * 848 * XXX first should be vm_paddr_t. 849 */ 850static void 851getmemsize(caddr_t kmdp, u_int64_t first) 852{ 853 int i, physmap_idx, pa_indx, da_indx; 854 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 855 u_long physmem_tunable; 856 pt_entry_t *pte; 857 struct bios_smap *smapbase, *smap, *smapend; 858 u_int32_t smapsize; 859 quad_t dcons_addr, dcons_size; 860 861 bzero(physmap, sizeof(physmap)); 862 basemem = 0; 863 physmap_idx = 0; 864 865 /* 866 * get memory map from INT 15:E820, kindly supplied by the loader. 867 * 868 * subr_module.c says: 869 * "Consumer may safely assume that size value precedes data." 870 * ie: an int32_t immediately precedes smap. 871 */ 872 smapbase = (struct bios_smap *)preload_search_info(kmdp, 873 MODINFO_METADATA | MODINFOMD_SMAP); 874 if (smapbase == NULL) 875 panic("No BIOS smap info from loader!"); 876 877 smapsize = *((u_int32_t *)smapbase - 1); 878 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 879 880 for (smap = smapbase; smap < smapend; smap++) { 881 if (boothowto & RB_VERBOSE) 882 printf("SMAP type=%02x base=%016lx len=%016lx\n", 883 smap->type, smap->base, smap->length); 884 885 if (smap->type != 0x01) 886 continue; 887 888 if (smap->length == 0) 889 continue; 890 891 for (i = 0; i <= physmap_idx; i += 2) { 892 if (smap->base < physmap[i + 1]) { 893 if (boothowto & RB_VERBOSE) 894 printf( 895 "Overlapping or non-montonic memory region, ignoring second region\n"); 896 continue; 897 } 898 } 899 900 if (smap->base == physmap[physmap_idx + 1]) { 901 physmap[physmap_idx + 1] += smap->length; 902 continue; 903 } 904 905 physmap_idx += 2; 906 if (physmap_idx == PHYSMAP_SIZE) { 907 printf( 908 "Too many segments in the physical address map, giving up\n"); 909 break; 910 } 911 physmap[physmap_idx] = smap->base; 912 physmap[physmap_idx + 1] = smap->base + smap->length; 913 } 914 915 /* 916 * Find the 'base memory' segment for SMP 917 */ 918 basemem = 0; 919 for (i = 0; i <= physmap_idx; i += 2) { 920 if (physmap[i] == 0x00000000) { 921 basemem = physmap[i + 1] / 1024; 922 break; 923 } 924 } 925 if (basemem == 0) 926 panic("BIOS smap did not include a basemem segment!"); 927 928#ifdef SMP 929 /* make hole for AP bootstrap code */ 930 physmap[1] = mp_bootaddress(physmap[1] / 1024); 931#endif 932 933 /* 934 * Maxmem isn't the "maximum memory", it's one larger than the 935 * highest page of the physical address space. It should be 936 * called something like "Maxphyspage". We may adjust this 937 * based on ``hw.physmem'' and the results of the memory test. 938 */ 939 Maxmem = atop(physmap[physmap_idx + 1]); 940 941#ifdef MAXMEM 942 Maxmem = MAXMEM / 4; 943#endif 944 945 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 946 Maxmem = atop(physmem_tunable); 947 948 if (atop(physmap[physmap_idx + 1]) != Maxmem && 949 (boothowto & RB_VERBOSE)) 950 printf("Physical memory use set to %ldK\n", Maxmem * 4); 951 952 /* 953 * If Maxmem has been increased beyond what the system has detected, 954 * extend the last memory segment to the new limit. 955 */ 956 if (atop(physmap[physmap_idx + 1]) < Maxmem) 957 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 958 959 /* call pmap initialization to make new kernel address space */ 960 pmap_bootstrap(&first); 961 962 /* 963 * Size up each available chunk of physical memory. 964 */ 965 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 966 pa_indx = 0; 967 da_indx = 1; 968 phys_avail[pa_indx++] = physmap[0]; 969 phys_avail[pa_indx] = physmap[0]; 970 dump_avail[da_indx] = physmap[0]; 971 pte = CMAP1; 972 973 /* 974 * Get dcons buffer address 975 */ 976 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 977 getenv_quad("dcons.size", &dcons_size) == 0) 978 dcons_addr = 0; 979 980 /* 981 * physmap is in bytes, so when converting to page boundaries, 982 * round up the start address and round down the end address. 983 */ 984 for (i = 0; i <= physmap_idx; i += 2) { 985 vm_paddr_t end; 986 987 end = ptoa((vm_paddr_t)Maxmem); 988 if (physmap[i + 1] < end) 989 end = trunc_page(physmap[i + 1]); 990 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 991 int tmp, page_bad, full; 992 int *ptr = (int *)CADDR1; 993 994 full = FALSE; 995 /* 996 * block out kernel memory as not available. 997 */ 998 if (pa >= 0x100000 && pa < first) 999 goto do_dump_avail; 1000 1001 /* 1002 * block out dcons buffer 1003 */ 1004 if (dcons_addr > 0 1005 && pa >= trunc_page(dcons_addr) 1006 && pa < dcons_addr + dcons_size) 1007 goto do_dump_avail; 1008 1009 page_bad = FALSE; 1010 1011 /* 1012 * map page into kernel: valid, read/write,non-cacheable 1013 */ 1014 *pte = pa | PG_V | PG_RW | PG_N; 1015 invltlb(); 1016 1017 tmp = *(int *)ptr; 1018 /* 1019 * Test for alternating 1's and 0's 1020 */ 1021 *(volatile int *)ptr = 0xaaaaaaaa; 1022 if (*(volatile int *)ptr != 0xaaaaaaaa) 1023 page_bad = TRUE; 1024 /* 1025 * Test for alternating 0's and 1's 1026 */ 1027 *(volatile int *)ptr = 0x55555555; 1028 if (*(volatile int *)ptr != 0x55555555) 1029 page_bad = TRUE; 1030 /* 1031 * Test for all 1's 1032 */ 1033 *(volatile int *)ptr = 0xffffffff; 1034 if (*(volatile int *)ptr != 0xffffffff) 1035 page_bad = TRUE; 1036 /* 1037 * Test for all 0's 1038 */ 1039 *(volatile int *)ptr = 0x0; 1040 if (*(volatile int *)ptr != 0x0) 1041 page_bad = TRUE; 1042 /* 1043 * Restore original value. 1044 */ 1045 *(int *)ptr = tmp; 1046 1047 /* 1048 * Adjust array of valid/good pages. 1049 */ 1050 if (page_bad == TRUE) 1051 continue; 1052 /* 1053 * If this good page is a continuation of the 1054 * previous set of good pages, then just increase 1055 * the end pointer. Otherwise start a new chunk. 1056 * Note that "end" points one higher than end, 1057 * making the range >= start and < end. 1058 * If we're also doing a speculative memory 1059 * test and we at or past the end, bump up Maxmem 1060 * so that we keep going. The first bad page 1061 * will terminate the loop. 1062 */ 1063 if (phys_avail[pa_indx] == pa) { 1064 phys_avail[pa_indx] += PAGE_SIZE; 1065 } else { 1066 pa_indx++; 1067 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1068 printf( 1069 "Too many holes in the physical address space, giving up\n"); 1070 pa_indx--; 1071 full = TRUE; 1072 goto do_dump_avail; 1073 } 1074 phys_avail[pa_indx++] = pa; /* start */ 1075 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1076 } 1077 physmem++; 1078do_dump_avail: 1079 if (dump_avail[da_indx] == pa) { 1080 dump_avail[da_indx] += PAGE_SIZE; 1081 } else { 1082 da_indx++; 1083 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1084 da_indx--; 1085 goto do_next; 1086 } 1087 dump_avail[da_indx++] = pa; /* start */ 1088 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1089 } 1090do_next: 1091 if (full) 1092 break; 1093 } 1094 } 1095 *pte = 0; 1096 invltlb(); 1097 1098 /* 1099 * XXX 1100 * The last chunk must contain at least one page plus the message 1101 * buffer to avoid complicating other code (message buffer address 1102 * calculation, etc.). 1103 */ 1104 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1105 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1106 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1107 phys_avail[pa_indx--] = 0; 1108 phys_avail[pa_indx--] = 0; 1109 } 1110 1111 Maxmem = atop(phys_avail[pa_indx]); 1112 1113 /* Trim off space for the message buffer. */ 1114 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1115 1116 avail_end = phys_avail[pa_indx]; 1117} 1118 1119u_int64_t 1120hammer_time(u_int64_t modulep, u_int64_t physfree) 1121{ 1122 caddr_t kmdp; 1123 int gsel_tss, off, x; 1124 struct pcpu *pc; 1125 u_int64_t msr; 1126 char *env; 1127 1128#ifdef DEV_ISA 1129 /* Preemptively mask the atpics and leave them shut down */ 1130 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); 1131 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); 1132#else 1133#error "have you forgotten the isa device?"; 1134#endif 1135 1136 thread0.td_kstack = physfree + KERNBASE; 1137 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1138 physfree += KSTACK_PAGES * PAGE_SIZE; 1139 thread0.td_pcb = (struct pcb *) 1140 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1141 1142 /* 1143 * This may be done better later if it gets more high level 1144 * components in it. If so just link td->td_proc here. 1145 */ 1146 proc_linkup(&proc0, &ksegrp0, &thread0); 1147 1148 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1149 preload_bootstrap_relocate(KERNBASE); 1150 kmdp = preload_search_by_type("elf kernel"); 1151 if (kmdp == NULL) 1152 kmdp = preload_search_by_type("elf64 kernel"); 1153 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1154 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1155#ifdef DDB 1156 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1157 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1158#endif 1159 1160 /* Init basic tunables, hz etc */ 1161 init_param1(); 1162 1163 /* 1164 * make gdt memory segments 1165 */ 1166 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1167 1168 for (x = 0; x < NGDT; x++) { 1169 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1170 ssdtosd(&gdt_segs[x], &gdt[x]); 1171 } 1172 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1173 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1174 1175 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1176 r_gdt.rd_base = (long) gdt; 1177 lgdt(&r_gdt); 1178 pc = &__pcpu[0]; 1179 1180 wrmsr(MSR_FSBASE, 0); /* User value */ 1181 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1182 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1183 1184 pcpu_init(pc, 0, sizeof(struct pcpu)); 1185 PCPU_SET(prvspace, pc); 1186 PCPU_SET(curthread, &thread0); 1187 PCPU_SET(curpcb, thread0.td_pcb); 1188 PCPU_SET(tssp, &common_tss[0]); 1189 1190 /* 1191 * Initialize mutexes. 1192 * 1193 * icu_lock: in order to allow an interrupt to occur in a critical 1194 * section, to set pcpu->ipending (etc...) properly, we 1195 * must be able to get the icu lock, so it can't be 1196 * under witness. 1197 */ 1198 mutex_init(); 1199 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 1200 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1201 1202 /* exceptions */ 1203 for (x = 0; x < NIDT; x++) 1204 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1205 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1206 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1207 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 0); 1208 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1209 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1210 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1211 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1212 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1213 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1214 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1215 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1216 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1217 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1218 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1219 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1220 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1221 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1222 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1223 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1224 1225 r_idt.rd_limit = sizeof(idt0) - 1; 1226 r_idt.rd_base = (long) idt; 1227 lidt(&r_idt); 1228 1229 /* 1230 * Initialize the console before we print anything out. 1231 */ 1232 cninit(); 1233 1234#ifdef DEV_ATPIC 1235 elcr_probe(); 1236 atpic_startup(); 1237#endif 1238 1239 kdb_init(); 1240 1241#ifdef KDB 1242 if (boothowto & RB_KDB) 1243 kdb_enter("Boot flags requested debugger"); 1244#endif 1245 1246 identify_cpu(); /* Final stage of CPU initialization */ 1247 initializecpu(); /* Initialize CPU registers */ 1248 1249 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1250 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1251 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1252 /* Ensure the stack is aligned to 16 bytes */ 1253 common_tss[0].tss_rsp0 &= ~0xFul; 1254 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1255 1256 /* doublefault stack space, runs on ist1 */ 1257 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1258 1259 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1260 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1261 1262 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1263 ltr(gsel_tss); 1264 1265 /* Set up the fast syscall stuff */ 1266 msr = rdmsr(MSR_EFER) | EFER_SCE; 1267 wrmsr(MSR_EFER, msr); 1268 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1269 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1270 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1271 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1272 wrmsr(MSR_STAR, msr); 1273 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1274 1275 getmemsize(kmdp, physfree); 1276 init_param2(physmem); 1277 1278 /* now running on new page tables, configured,and u/iom is accessible */ 1279 1280 /* Map the message buffer. */ 1281 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1282 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1283 1284 msgbufinit(msgbufp, MSGBUF_SIZE); 1285 fpuinit(); 1286 1287 /* transfer to user mode */ 1288 1289 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1290 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1291 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1292 1293 /* setup proc 0's pcb */ 1294 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1295 thread0.td_pcb->pcb_cr3 = KPML4phys; 1296 thread0.td_frame = &proc0_tf; 1297 1298 env = getenv("kernelname"); 1299 if (env != NULL) 1300 strlcpy(kernelname, env, sizeof(kernelname)); 1301 1302 /* Location of kernel stack for locore */ 1303 return ((u_int64_t)thread0.td_pcb); 1304} 1305 1306void 1307cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1308{ 1309 1310 pcpu->pc_acpi_id = 0xffffffff; 1311} 1312 1313void 1314spinlock_enter(void) 1315{ 1316 struct thread *td; 1317 1318 td = curthread; 1319 if (td->td_md.md_spinlock_count == 0) 1320 td->td_md.md_saved_flags = intr_disable(); 1321 td->td_md.md_spinlock_count++; 1322 critical_enter(); 1323} 1324 1325void 1326spinlock_exit(void) 1327{ 1328 struct thread *td; 1329 1330 td = curthread; 1331 critical_exit(); 1332 td->td_md.md_spinlock_count--; 1333 if (td->td_md.md_spinlock_count == 0) 1334 intr_restore(td->td_md.md_saved_flags); 1335} 1336 1337/* 1338 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1339 * we want to start a backtrace from the function that caused us to enter 1340 * the debugger. We have the context in the trapframe, but base the trace 1341 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1342 * enough for a backtrace. 1343 */ 1344void 1345makectx(struct trapframe *tf, struct pcb *pcb) 1346{ 1347 1348 pcb->pcb_r12 = tf->tf_r12; 1349 pcb->pcb_r13 = tf->tf_r13; 1350 pcb->pcb_r14 = tf->tf_r14; 1351 pcb->pcb_r15 = tf->tf_r15; 1352 pcb->pcb_rbp = tf->tf_rbp; 1353 pcb->pcb_rbx = tf->tf_rbx; 1354 pcb->pcb_rip = tf->tf_rip; 1355 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1356} 1357 1358int 1359ptrace_set_pc(struct thread *td, unsigned long addr) 1360{ 1361 td->td_frame->tf_rip = addr; 1362 return (0); 1363} 1364 1365int 1366ptrace_single_step(struct thread *td) 1367{ 1368 td->td_frame->tf_rflags |= PSL_T; 1369 return (0); 1370} 1371 1372int 1373ptrace_clear_single_step(struct thread *td) 1374{ 1375 td->td_frame->tf_rflags &= ~PSL_T; 1376 return (0); 1377} 1378 1379int 1380fill_regs(struct thread *td, struct reg *regs) 1381{ 1382 struct trapframe *tp; 1383 1384 tp = td->td_frame; 1385 regs->r_r15 = tp->tf_r15; 1386 regs->r_r14 = tp->tf_r14; 1387 regs->r_r13 = tp->tf_r13; 1388 regs->r_r12 = tp->tf_r12; 1389 regs->r_r11 = tp->tf_r11; 1390 regs->r_r10 = tp->tf_r10; 1391 regs->r_r9 = tp->tf_r9; 1392 regs->r_r8 = tp->tf_r8; 1393 regs->r_rdi = tp->tf_rdi; 1394 regs->r_rsi = tp->tf_rsi; 1395 regs->r_rbp = tp->tf_rbp; 1396 regs->r_rbx = tp->tf_rbx; 1397 regs->r_rdx = tp->tf_rdx; 1398 regs->r_rcx = tp->tf_rcx; 1399 regs->r_rax = tp->tf_rax; 1400 regs->r_rip = tp->tf_rip; 1401 regs->r_cs = tp->tf_cs; 1402 regs->r_rflags = tp->tf_rflags; 1403 regs->r_rsp = tp->tf_rsp; 1404 regs->r_ss = tp->tf_ss; 1405 return (0); 1406} 1407 1408int 1409set_regs(struct thread *td, struct reg *regs) 1410{ 1411 struct trapframe *tp; 1412 register_t rflags; 1413 1414 tp = td->td_frame; 1415 rflags = regs->r_rflags & 0xffffffff; 1416 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1417 return (EINVAL); 1418 tp->tf_r15 = regs->r_r15; 1419 tp->tf_r14 = regs->r_r14; 1420 tp->tf_r13 = regs->r_r13; 1421 tp->tf_r12 = regs->r_r12; 1422 tp->tf_r11 = regs->r_r11; 1423 tp->tf_r10 = regs->r_r10; 1424 tp->tf_r9 = regs->r_r9; 1425 tp->tf_r8 = regs->r_r8; 1426 tp->tf_rdi = regs->r_rdi; 1427 tp->tf_rsi = regs->r_rsi; 1428 tp->tf_rbp = regs->r_rbp; 1429 tp->tf_rbx = regs->r_rbx; 1430 tp->tf_rdx = regs->r_rdx; 1431 tp->tf_rcx = regs->r_rcx; 1432 tp->tf_rax = regs->r_rax; 1433 tp->tf_rip = regs->r_rip; 1434 tp->tf_cs = regs->r_cs; 1435 tp->tf_rflags = rflags; 1436 tp->tf_rsp = regs->r_rsp; 1437 tp->tf_ss = regs->r_ss; 1438 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1439 return (0); 1440} 1441 1442/* XXX check all this stuff! */ 1443/* externalize from sv_xmm */ 1444static void 1445fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1446{ 1447 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1448 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1449 int i; 1450 1451 /* pcb -> fpregs */ 1452 bzero(fpregs, sizeof(*fpregs)); 1453 1454 /* FPU control/status */ 1455 penv_fpreg->en_cw = penv_xmm->en_cw; 1456 penv_fpreg->en_sw = penv_xmm->en_sw; 1457 penv_fpreg->en_tw = penv_xmm->en_tw; 1458 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1459 penv_fpreg->en_rip = penv_xmm->en_rip; 1460 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1461 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1462 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1463 1464 /* FPU registers */ 1465 for (i = 0; i < 8; ++i) 1466 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1467 1468 /* SSE registers */ 1469 for (i = 0; i < 16; ++i) 1470 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1471} 1472 1473/* internalize from fpregs into sv_xmm */ 1474static void 1475set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1476{ 1477 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1478 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1479 int i; 1480 1481 /* fpregs -> pcb */ 1482 /* FPU control/status */ 1483 penv_xmm->en_cw = penv_fpreg->en_cw; 1484 penv_xmm->en_sw = penv_fpreg->en_sw; 1485 penv_xmm->en_tw = penv_fpreg->en_tw; 1486 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1487 penv_xmm->en_rip = penv_fpreg->en_rip; 1488 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1489 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1490 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask; 1491 1492 /* FPU registers */ 1493 for (i = 0; i < 8; ++i) 1494 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1495 1496 /* SSE registers */ 1497 for (i = 0; i < 16; ++i) 1498 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1499} 1500 1501/* externalize from td->pcb */ 1502int 1503fill_fpregs(struct thread *td, struct fpreg *fpregs) 1504{ 1505 1506 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1507 return (0); 1508} 1509 1510/* internalize to td->pcb */ 1511int 1512set_fpregs(struct thread *td, struct fpreg *fpregs) 1513{ 1514 1515 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1516 return (0); 1517} 1518 1519/* 1520 * Get machine context. 1521 */ 1522int 1523get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1524{ 1525 struct trapframe *tp; 1526 1527 tp = td->td_frame; 1528 PROC_LOCK(curthread->td_proc); 1529 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1530 PROC_UNLOCK(curthread->td_proc); 1531 mcp->mc_r15 = tp->tf_r15; 1532 mcp->mc_r14 = tp->tf_r14; 1533 mcp->mc_r13 = tp->tf_r13; 1534 mcp->mc_r12 = tp->tf_r12; 1535 mcp->mc_r11 = tp->tf_r11; 1536 mcp->mc_r10 = tp->tf_r10; 1537 mcp->mc_r9 = tp->tf_r9; 1538 mcp->mc_r8 = tp->tf_r8; 1539 mcp->mc_rdi = tp->tf_rdi; 1540 mcp->mc_rsi = tp->tf_rsi; 1541 mcp->mc_rbp = tp->tf_rbp; 1542 mcp->mc_rbx = tp->tf_rbx; 1543 mcp->mc_rcx = tp->tf_rcx; 1544 if (flags & GET_MC_CLEAR_RET) { 1545 mcp->mc_rax = 0; 1546 mcp->mc_rdx = 0; 1547 } else { 1548 mcp->mc_rax = tp->tf_rax; 1549 mcp->mc_rdx = tp->tf_rdx; 1550 } 1551 mcp->mc_rip = tp->tf_rip; 1552 mcp->mc_cs = tp->tf_cs; 1553 mcp->mc_rflags = tp->tf_rflags; 1554 mcp->mc_rsp = tp->tf_rsp; 1555 mcp->mc_ss = tp->tf_ss; 1556 mcp->mc_len = sizeof(*mcp); 1557 get_fpcontext(td, mcp); 1558 return (0); 1559} 1560 1561/* 1562 * Set machine context. 1563 * 1564 * However, we don't set any but the user modifiable flags, and we won't 1565 * touch the cs selector. 1566 */ 1567int 1568set_mcontext(struct thread *td, const mcontext_t *mcp) 1569{ 1570 struct trapframe *tp; 1571 long rflags; 1572 int ret; 1573 1574 tp = td->td_frame; 1575 if (mcp->mc_len != sizeof(*mcp)) 1576 return (EINVAL); 1577 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1578 (tp->tf_rflags & ~PSL_USERCHANGE); 1579 ret = set_fpcontext(td, mcp); 1580 if (ret != 0) 1581 return (ret); 1582 tp->tf_r15 = mcp->mc_r15; 1583 tp->tf_r14 = mcp->mc_r14; 1584 tp->tf_r13 = mcp->mc_r13; 1585 tp->tf_r12 = mcp->mc_r12; 1586 tp->tf_r11 = mcp->mc_r11; 1587 tp->tf_r10 = mcp->mc_r10; 1588 tp->tf_r9 = mcp->mc_r9; 1589 tp->tf_r8 = mcp->mc_r8; 1590 tp->tf_rdi = mcp->mc_rdi; 1591 tp->tf_rsi = mcp->mc_rsi; 1592 tp->tf_rbp = mcp->mc_rbp; 1593 tp->tf_rbx = mcp->mc_rbx; 1594 tp->tf_rdx = mcp->mc_rdx; 1595 tp->tf_rcx = mcp->mc_rcx; 1596 tp->tf_rax = mcp->mc_rax; 1597 tp->tf_rip = mcp->mc_rip; 1598 tp->tf_rflags = rflags; 1599 tp->tf_rsp = mcp->mc_rsp; 1600 tp->tf_ss = mcp->mc_ss; 1601 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1602 return (0); 1603} 1604 1605static void 1606get_fpcontext(struct thread *td, mcontext_t *mcp) 1607{ 1608 1609 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1610 mcp->mc_fpformat = fpuformat(); 1611} 1612 1613static int 1614set_fpcontext(struct thread *td, const mcontext_t *mcp) 1615{ 1616 1617 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1618 return (0); 1619 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1620 return (EINVAL); 1621 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1622 /* We don't care what state is left in the FPU or PCB. */ 1623 fpstate_drop(td); 1624 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1625 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1626 /* 1627 * XXX we violate the dubious requirement that fpusetregs() 1628 * be called with interrupts disabled. 1629 * XXX obsolete on trap-16 systems? 1630 */ 1631 fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1632 } else 1633 return (EINVAL); 1634 return (0); 1635} 1636 1637void 1638fpstate_drop(struct thread *td) 1639{ 1640 register_t s; 1641 1642 s = intr_disable(); 1643 if (PCPU_GET(fpcurthread) == td) 1644 fpudrop(); 1645 /* 1646 * XXX force a full drop of the fpu. The above only drops it if we 1647 * owned it. 1648 * 1649 * XXX I don't much like fpugetregs()'s semantics of doing a full 1650 * drop. Dropping only to the pcb matches fnsave's behaviour. 1651 * We only need to drop to !PCB_INITDONE in sendsig(). But 1652 * sendsig() is the only caller of fpugetregs()... perhaps we just 1653 * have too many layers. 1654 */ 1655 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1656 intr_restore(s); 1657} 1658 1659int 1660fill_dbregs(struct thread *td, struct dbreg *dbregs) 1661{ 1662 struct pcb *pcb; 1663 1664 if (td == NULL) { 1665 dbregs->dr[0] = rdr0(); 1666 dbregs->dr[1] = rdr1(); 1667 dbregs->dr[2] = rdr2(); 1668 dbregs->dr[3] = rdr3(); 1669 dbregs->dr[6] = rdr6(); 1670 dbregs->dr[7] = rdr7(); 1671 } else { 1672 pcb = td->td_pcb; 1673 dbregs->dr[0] = pcb->pcb_dr0; 1674 dbregs->dr[1] = pcb->pcb_dr1; 1675 dbregs->dr[2] = pcb->pcb_dr2; 1676 dbregs->dr[3] = pcb->pcb_dr3; 1677 dbregs->dr[6] = pcb->pcb_dr6; 1678 dbregs->dr[7] = pcb->pcb_dr7; 1679 } 1680 dbregs->dr[4] = 0; 1681 dbregs->dr[5] = 0; 1682 dbregs->dr[8] = 0; 1683 dbregs->dr[9] = 0; 1684 dbregs->dr[10] = 0; 1685 dbregs->dr[11] = 0; 1686 dbregs->dr[12] = 0; 1687 dbregs->dr[13] = 0; 1688 dbregs->dr[14] = 0; 1689 dbregs->dr[15] = 0; 1690 return (0); 1691} 1692 1693int 1694set_dbregs(struct thread *td, struct dbreg *dbregs) 1695{ 1696 struct pcb *pcb; 1697 int i; 1698 u_int64_t mask1, mask2; 1699 1700 if (td == NULL) { 1701 load_dr0(dbregs->dr[0]); 1702 load_dr1(dbregs->dr[1]); 1703 load_dr2(dbregs->dr[2]); 1704 load_dr3(dbregs->dr[3]); 1705 load_dr6(dbregs->dr[6]); 1706 load_dr7(dbregs->dr[7]); 1707 } else { 1708 /* 1709 * Don't let an illegal value for dr7 get set. Specifically, 1710 * check for undefined settings. Setting these bit patterns 1711 * result in undefined behaviour and can lead to an unexpected 1712 * TRCTRAP or a general protection fault right here. 1713 * Upper bits of dr6 and dr7 must not be set 1714 */ 1715 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 1716 i++, mask1 <<= 2, mask2 <<= 2) 1717 if ((dbregs->dr[7] & mask1) == mask2) 1718 return (EINVAL); 1719 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1720 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1721 return (EINVAL); 1722 1723 pcb = td->td_pcb; 1724 1725 /* 1726 * Don't let a process set a breakpoint that is not within the 1727 * process's address space. If a process could do this, it 1728 * could halt the system by setting a breakpoint in the kernel 1729 * (if ddb was enabled). Thus, we need to check to make sure 1730 * that no breakpoints are being enabled for addresses outside 1731 * process's address space, unless, perhaps, we were called by 1732 * uid 0. 1733 * 1734 * XXX - what about when the watched area of the user's 1735 * address space is written into from within the kernel 1736 * ... wouldn't that still cause a breakpoint to be generated 1737 * from within kernel mode? 1738 */ 1739 1740 if (suser(td) != 0) { 1741 if (dbregs->dr[7] & 0x3) { 1742 /* dr0 is enabled */ 1743 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1744 return (EINVAL); 1745 } 1746 if (dbregs->dr[7] & 0x3<<2) { 1747 /* dr1 is enabled */ 1748 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1749 return (EINVAL); 1750 } 1751 if (dbregs->dr[7] & 0x3<<4) { 1752 /* dr2 is enabled */ 1753 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1754 return (EINVAL); 1755 } 1756 if (dbregs->dr[7] & 0x3<<6) { 1757 /* dr3 is enabled */ 1758 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1759 return (EINVAL); 1760 } 1761 } 1762 1763 pcb->pcb_dr0 = dbregs->dr[0]; 1764 pcb->pcb_dr1 = dbregs->dr[1]; 1765 pcb->pcb_dr2 = dbregs->dr[2]; 1766 pcb->pcb_dr3 = dbregs->dr[3]; 1767 pcb->pcb_dr6 = dbregs->dr[6]; 1768 pcb->pcb_dr7 = dbregs->dr[7]; 1769 1770 pcb->pcb_flags |= PCB_DBREGS; 1771 } 1772 1773 return (0); 1774} 1775 1776void 1777reset_dbregs(void) 1778{ 1779 1780 load_dr7(0); /* Turn off the control bits first */ 1781 load_dr0(0); 1782 load_dr1(0); 1783 load_dr2(0); 1784 load_dr3(0); 1785 load_dr6(0); 1786} 1787 1788/* 1789 * Return > 0 if a hardware breakpoint has been hit, and the 1790 * breakpoint was in user space. Return 0, otherwise. 1791 */ 1792int 1793user_dbreg_trap(void) 1794{ 1795 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1796 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1797 int nbp; /* number of breakpoints that triggered */ 1798 caddr_t addr[4]; /* breakpoint addresses */ 1799 int i; 1800 1801 dr7 = rdr7(); 1802 if ((dr7 & 0x000000ff) == 0) { 1803 /* 1804 * all GE and LE bits in the dr7 register are zero, 1805 * thus the trap couldn't have been caused by the 1806 * hardware debug registers 1807 */ 1808 return 0; 1809 } 1810 1811 nbp = 0; 1812 dr6 = rdr6(); 1813 bp = dr6 & 0x0000000f; 1814 1815 if (!bp) { 1816 /* 1817 * None of the breakpoint bits are set meaning this 1818 * trap was not caused by any of the debug registers 1819 */ 1820 return 0; 1821 } 1822 1823 /* 1824 * at least one of the breakpoints were hit, check to see 1825 * which ones and if any of them are user space addresses 1826 */ 1827 1828 if (bp & 0x01) { 1829 addr[nbp++] = (caddr_t)rdr0(); 1830 } 1831 if (bp & 0x02) { 1832 addr[nbp++] = (caddr_t)rdr1(); 1833 } 1834 if (bp & 0x04) { 1835 addr[nbp++] = (caddr_t)rdr2(); 1836 } 1837 if (bp & 0x08) { 1838 addr[nbp++] = (caddr_t)rdr3(); 1839 } 1840 1841 for (i=0; i<nbp; i++) { 1842 if (addr[i] < 1843 (caddr_t)VM_MAXUSER_ADDRESS) { 1844 /* 1845 * addr[i] is in user space 1846 */ 1847 return nbp; 1848 } 1849 } 1850 1851 /* 1852 * None of the breakpoints are in user space. 1853 */ 1854 return 0; 1855} 1856 1857#ifdef KDB 1858 1859/* 1860 * Provide inb() and outb() as functions. They are normally only 1861 * available as macros calling inlined functions, thus cannot be 1862 * called from the debugger. 1863 * 1864 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1865 */ 1866 1867#undef inb 1868#undef outb 1869 1870/* silence compiler warnings */ 1871u_char inb(u_int); 1872void outb(u_int, u_char); 1873 1874u_char 1875inb(u_int port) 1876{ 1877 u_char data; 1878 /* 1879 * We use %%dx and not %1 here because i/o is done at %dx and not at 1880 * %edx, while gcc generates inferior code (movw instead of movl) 1881 * if we tell it to load (u_short) port. 1882 */ 1883 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1884 return (data); 1885} 1886 1887void 1888outb(u_int port, u_char data) 1889{ 1890 u_char al; 1891 /* 1892 * Use an unnecessary assignment to help gcc's register allocator. 1893 * This make a large difference for gcc-1.40 and a tiny difference 1894 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1895 * best results. gcc-2.6.0 can't handle this. 1896 */ 1897 al = data; 1898 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1899} 1900 1901#endif /* KDB */ 1902