machdep.c revision 112883
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by the University of
20 *	California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 *    may be used to endorse or promote products derived from this software
23 *    without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 112883 2003-03-31 22:02:38Z jeff $
39 */
40
41#include "opt_atalk.h"
42#include "opt_compat.h"
43#include "opt_cpu.h"
44#include "opt_ddb.h"
45#include "opt_inet.h"
46#include "opt_ipx.h"
47#include "opt_isa.h"
48#include "opt_maxmem.h"
49#include "opt_msgbuf.h"
50#include "opt_npx.h"
51#include "opt_perfmon.h"
52#include "opt_kstack_pages.h"
53
54#include <sys/param.h>
55#include <sys/systm.h>
56#include <sys/sysproto.h>
57#include <sys/signalvar.h>
58#include <sys/imgact.h>
59#include <sys/kernel.h>
60#include <sys/ktr.h>
61#include <sys/linker.h>
62#include <sys/lock.h>
63#include <sys/malloc.h>
64#include <sys/mutex.h>
65#include <sys/pcpu.h>
66#include <sys/proc.h>
67#include <sys/bio.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/msgbuf.h>
72#include <sys/sched.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/ucontext.h>
76#include <sys/vmmeter.h>
77#include <sys/bus.h>
78#include <sys/eventhandler.h>
79
80#include <vm/vm.h>
81#include <vm/vm_param.h>
82#include <vm/vm_kern.h>
83#include <vm/vm_object.h>
84#include <vm/vm_page.h>
85#include <vm/vm_map.h>
86#include <vm/vm_pager.h>
87#include <vm/vm_extern.h>
88
89#include <sys/user.h>
90#include <sys/exec.h>
91#include <sys/cons.h>
92
93#include <ddb/ddb.h>
94
95#include <net/netisr.h>
96
97#include <machine/cpu.h>
98#include <machine/cputypes.h>
99#include <machine/reg.h>
100#include <machine/clock.h>
101#include <machine/specialreg.h>
102#include <machine/bootinfo.h>
103#include <machine/md_var.h>
104#include <machine/pc/bios.h>
105#include <machine/pcb_ext.h>		/* pcb.h included via sys/user.h */
106#include <machine/proc.h>
107#ifdef PERFMON
108#include <machine/perfmon.h>
109#endif
110#ifdef SMP
111#include <machine/privatespace.h>
112#include <machine/smp.h>
113#endif
114
115#include <i386/isa/icu.h>
116#include <i386/isa/intr_machdep.h>
117#include <isa/rtc.h>
118#include <machine/vm86.h>
119#include <sys/ptrace.h>
120#include <machine/sigframe.h>
121
122extern void init386(int first);
123extern void dblfault_handler(void);
124
125extern void printcpuinfo(void);	/* XXX header file */
126extern void finishidentcpu(void);
127extern void panicifcpuunsupported(void);
128extern void initializecpu(void);
129
130#define	CS_SECURE(cs)		(ISPL(cs) == SEL_UPL)
131#define	EFL_SECURE(ef, oef)	((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
132
133#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU)
134#define CPU_ENABLE_SSE
135#endif
136#if defined(CPU_DISABLE_SSE)
137#undef CPU_ENABLE_SSE
138#endif
139
140static void cpu_startup(void *);
141static void fpstate_drop(struct thread *td);
142static void get_fpcontext(struct thread *td, mcontext_t *mcp);
143static int  set_fpcontext(struct thread *td, const mcontext_t *mcp);
144#ifdef CPU_ENABLE_SSE
145static void set_fpregs_xmm(struct save87 *, struct savexmm *);
146static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
147#endif /* CPU_ENABLE_SSE */
148SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
149
150int	_udatasel, _ucodesel;
151u_int	atdevbase;
152
153#if defined(SWTCH_OPTIM_STATS)
154extern int swtch_optim_stats;
155SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
156	CTLFLAG_RD, &swtch_optim_stats, 0, "");
157SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
158	CTLFLAG_RD, &tlb_flush_count, 0, "");
159#endif
160
161int cold = 1;
162
163#ifdef COMPAT_43
164static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code);
165#endif
166#ifdef COMPAT_FREEBSD4
167static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask,
168    u_long code);
169#endif
170
171long Maxmem = 0;
172
173vm_paddr_t phys_avail[10];
174
175/* must be 2 less so 0 0 can signal end of chunks */
176#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
177
178struct kva_md_info kmi;
179
180static struct trapframe proc0_tf;
181#ifndef SMP
182static struct pcpu __pcpu;
183#endif
184
185struct mtx icu_lock;
186
187static void
188cpu_startup(dummy)
189	void *dummy;
190{
191	/*
192	 * Good {morning,afternoon,evening,night}.
193	 */
194	startrtclock();
195	printcpuinfo();
196	panicifcpuunsupported();
197#ifdef PERFMON
198	perfmon_init();
199#endif
200	printf("real memory  = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
201	    ptoa((uintmax_t)Maxmem) / 1048576);
202	/*
203	 * Display any holes after the first chunk of extended memory.
204	 */
205	if (bootverbose) {
206		int indx;
207
208		printf("Physical memory chunk(s):\n");
209		for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
210			vm_paddr_t size;
211
212			size = phys_avail[indx + 1] - phys_avail[indx];
213			printf(
214			    "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
215			    (uintmax_t)phys_avail[indx],
216			    (uintmax_t)phys_avail[indx + 1] - 1,
217			    (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
218		}
219	}
220
221	vm_ksubmap_init(&kmi);
222
223	printf("avail memory = %ju (%ju MB)\n",
224	    ptoa((uintmax_t)cnt.v_free_count),
225	    ptoa((uintmax_t)cnt.v_free_count) / 1048576);
226
227	/*
228	 * Set up buffers, so they can be used to read disk labels.
229	 */
230	bufinit();
231	vm_pager_bufferinit();
232
233#ifndef SMP
234	/* For SMP, we delay the cpu_setregs() until after SMP startup. */
235	cpu_setregs();
236#endif
237}
238
239/*
240 * Send an interrupt to process.
241 *
242 * Stack is set up to allow sigcode stored
243 * at top to call routine, followed by kcall
244 * to sigreturn routine below.  After sigreturn
245 * resets the signal mask, the stack, and the
246 * frame pointer, it returns to the user
247 * specified pc, psl.
248 */
249#ifdef COMPAT_43
250static void
251osendsig(catcher, sig, mask, code)
252	sig_t catcher;
253	int sig;
254	sigset_t *mask;
255	u_long code;
256{
257	struct osigframe sf, *fp;
258	struct proc *p;
259	struct thread *td;
260	struct sigacts *psp;
261	struct trapframe *regs;
262	int oonstack;
263
264	td = curthread;
265	p = td->td_proc;
266	PROC_LOCK_ASSERT(p, MA_OWNED);
267	psp = p->p_sigacts;
268	regs = td->td_frame;
269	oonstack = sigonstack(regs->tf_esp);
270
271	/* Allocate space for the signal handler context. */
272	if ((p->p_flag & P_ALTSTACK) && !oonstack &&
273	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
274		fp = (struct osigframe *)(p->p_sigstk.ss_sp +
275		    p->p_sigstk.ss_size - sizeof(struct osigframe));
276#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
277		p->p_sigstk.ss_flags |= SS_ONSTACK;
278#endif
279	} else
280		fp = (struct osigframe *)regs->tf_esp - 1;
281	PROC_UNLOCK(p);
282
283	/* Translate the signal if appropriate. */
284	if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
285		sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
286
287	/* Build the argument list for the signal handler. */
288	sf.sf_signum = sig;
289	sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
290	PROC_LOCK(p);
291	if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
292		/* Signal handler installed with SA_SIGINFO. */
293		sf.sf_arg2 = (register_t)&fp->sf_siginfo;
294		sf.sf_siginfo.si_signo = sig;
295		sf.sf_siginfo.si_code = code;
296		sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
297	} else {
298		/* Old FreeBSD-style arguments. */
299		sf.sf_arg2 = code;
300		sf.sf_addr = regs->tf_err;
301		sf.sf_ahu.sf_handler = catcher;
302	}
303	PROC_UNLOCK(p);
304
305	/* Save most if not all of trap frame. */
306	sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
307	sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
308	sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
309	sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
310	sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
311	sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
312	sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
313	sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
314	sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
315	sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
316	sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
317	sf.sf_siginfo.si_sc.sc_gs = rgs();
318	sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
319
320	/* Build the signal context to be used by osigreturn(). */
321	sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
322	SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
323	sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
324	sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
325	sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
326	sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
327	sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
328	sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
329
330	/*
331	 * If we're a vm86 process, we want to save the segment registers.
332	 * We also change eflags to be our emulated eflags, not the actual
333	 * eflags.
334	 */
335	if (regs->tf_eflags & PSL_VM) {
336		/* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
337		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
338		struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
339
340		sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
341		sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
342		sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
343		sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
344
345		if (vm86->vm86_has_vme == 0)
346			sf.sf_siginfo.si_sc.sc_ps =
347			    (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
348			    (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
349
350		/* See sendsig() for comments. */
351		tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
352	}
353
354	/*
355	 * Copy the sigframe out to the user's stack.
356	 */
357	if (copyout(&sf, fp, sizeof(*fp)) != 0) {
358#ifdef DEBUG
359		printf("process %ld has trashed its stack\n", (long)p->p_pid);
360#endif
361		PROC_LOCK(p);
362		sigexit(td, SIGILL);
363	}
364
365	regs->tf_esp = (int)fp;
366	regs->tf_eip = PS_STRINGS - szosigcode;
367	regs->tf_eflags &= ~PSL_T;
368	regs->tf_cs = _ucodesel;
369	regs->tf_ds = _udatasel;
370	regs->tf_es = _udatasel;
371	regs->tf_fs = _udatasel;
372	load_gs(_udatasel);
373	regs->tf_ss = _udatasel;
374	PROC_LOCK(p);
375}
376#endif /* COMPAT_43 */
377
378#ifdef COMPAT_FREEBSD4
379static void
380freebsd4_sendsig(catcher, sig, mask, code)
381	sig_t catcher;
382	int sig;
383	sigset_t *mask;
384	u_long code;
385{
386	struct sigframe4 sf, *sfp;
387	struct proc *p;
388	struct thread *td;
389	struct sigacts *psp;
390	struct trapframe *regs;
391	int oonstack;
392
393	td = curthread;
394	p = td->td_proc;
395	PROC_LOCK_ASSERT(p, MA_OWNED);
396	psp = p->p_sigacts;
397	regs = td->td_frame;
398	oonstack = sigonstack(regs->tf_esp);
399
400	/* Save user context. */
401	bzero(&sf, sizeof(sf));
402	sf.sf_uc.uc_sigmask = *mask;
403	sf.sf_uc.uc_stack = p->p_sigstk;
404	sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK)
405	    ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
406	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
407	sf.sf_uc.uc_mcontext.mc_gs = rgs();
408	bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
409
410	/* Allocate space for the signal handler context. */
411	if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
412	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
413		sfp = (struct sigframe4 *)(p->p_sigstk.ss_sp +
414		    p->p_sigstk.ss_size - sizeof(struct sigframe4));
415#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
416		p->p_sigstk.ss_flags |= SS_ONSTACK;
417#endif
418	} else
419		sfp = (struct sigframe4 *)regs->tf_esp - 1;
420	PROC_UNLOCK(p);
421
422	/* Translate the signal if appropriate. */
423	if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
424		sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
425
426	/* Build the argument list for the signal handler. */
427	sf.sf_signum = sig;
428	sf.sf_ucontext = (register_t)&sfp->sf_uc;
429	PROC_LOCK(p);
430	if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
431		/* Signal handler installed with SA_SIGINFO. */
432		sf.sf_siginfo = (register_t)&sfp->sf_si;
433		sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
434
435		/* Fill in POSIX parts */
436		sf.sf_si.si_signo = sig;
437		sf.sf_si.si_code = code;
438		sf.sf_si.si_addr = (void *)regs->tf_err;
439	} else {
440		/* Old FreeBSD-style arguments. */
441		sf.sf_siginfo = code;
442		sf.sf_addr = regs->tf_err;
443		sf.sf_ahu.sf_handler = catcher;
444	}
445	PROC_UNLOCK(p);
446
447	/*
448	 * If we're a vm86 process, we want to save the segment registers.
449	 * We also change eflags to be our emulated eflags, not the actual
450	 * eflags.
451	 */
452	if (regs->tf_eflags & PSL_VM) {
453		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
454		struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
455
456		sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
457		sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
458		sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
459		sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
460
461		if (vm86->vm86_has_vme == 0)
462			sf.sf_uc.uc_mcontext.mc_eflags =
463			    (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
464			    (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
465
466		/*
467		 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
468		 * syscalls made by the signal handler.  This just avoids
469		 * wasting time for our lazy fixup of such faults.  PSL_NT
470		 * does nothing in vm86 mode, but vm86 programs can set it
471		 * almost legitimately in probes for old cpu types.
472		 */
473		tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
474	}
475
476	/*
477	 * Copy the sigframe out to the user's stack.
478	 */
479	if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
480#ifdef DEBUG
481		printf("process %ld has trashed its stack\n", (long)p->p_pid);
482#endif
483		PROC_LOCK(p);
484		sigexit(td, SIGILL);
485	}
486
487	regs->tf_esp = (int)sfp;
488	regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
489	regs->tf_eflags &= ~PSL_T;
490	regs->tf_cs = _ucodesel;
491	regs->tf_ds = _udatasel;
492	regs->tf_es = _udatasel;
493	regs->tf_fs = _udatasel;
494	regs->tf_ss = _udatasel;
495	PROC_LOCK(p);
496}
497#endif	/* COMPAT_FREEBSD4 */
498
499void
500sendsig(catcher, sig, mask, code)
501	sig_t catcher;
502	int sig;
503	sigset_t *mask;
504	u_long code;
505{
506	struct sigframe sf, *sfp;
507	struct proc *p;
508	struct thread *td;
509	struct sigacts *psp;
510	char *sp;
511	struct trapframe *regs;
512	int oonstack;
513
514	td = curthread;
515	p = td->td_proc;
516	PROC_LOCK_ASSERT(p, MA_OWNED);
517	psp = p->p_sigacts;
518#ifdef COMPAT_FREEBSD4
519	if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
520		freebsd4_sendsig(catcher, sig, mask, code);
521		return;
522	}
523#endif
524#ifdef COMPAT_43
525	if (SIGISMEMBER(psp->ps_osigset, sig)) {
526		osendsig(catcher, sig, mask, code);
527		return;
528	}
529#endif
530	regs = td->td_frame;
531	oonstack = sigonstack(regs->tf_esp);
532
533	/* Save user context. */
534	bzero(&sf, sizeof(sf));
535	sf.sf_uc.uc_sigmask = *mask;
536	sf.sf_uc.uc_stack = p->p_sigstk;
537	sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK)
538	    ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
539	sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
540	sf.sf_uc.uc_mcontext.mc_gs = rgs();
541	bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
542	sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
543	get_fpcontext(td, &sf.sf_uc.uc_mcontext);
544	fpstate_drop(td);
545
546	/* Allocate space for the signal handler context. */
547	if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
548	    SIGISMEMBER(psp->ps_sigonstack, sig)) {
549		sp = p->p_sigstk.ss_sp +
550		    p->p_sigstk.ss_size - sizeof(struct sigframe);
551#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
552		p->p_sigstk.ss_flags |= SS_ONSTACK;
553#endif
554	} else
555		sp = (char *)regs->tf_esp - sizeof(struct sigframe);
556	/* Align to 16 bytes. */
557	sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
558	PROC_UNLOCK(p);
559
560	/* Translate the signal if appropriate. */
561	if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
562		sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
563
564	/* Build the argument list for the signal handler. */
565	sf.sf_signum = sig;
566	sf.sf_ucontext = (register_t)&sfp->sf_uc;
567	PROC_LOCK(p);
568	if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
569		/* Signal handler installed with SA_SIGINFO. */
570		sf.sf_siginfo = (register_t)&sfp->sf_si;
571		sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
572
573		/* Fill in POSIX parts */
574		sf.sf_si.si_signo = sig;
575		sf.sf_si.si_code = code;
576		sf.sf_si.si_addr = (void *)regs->tf_err;
577	} else {
578		/* Old FreeBSD-style arguments. */
579		sf.sf_siginfo = code;
580		sf.sf_addr = regs->tf_err;
581		sf.sf_ahu.sf_handler = catcher;
582	}
583	PROC_UNLOCK(p);
584
585	/*
586	 * If we're a vm86 process, we want to save the segment registers.
587	 * We also change eflags to be our emulated eflags, not the actual
588	 * eflags.
589	 */
590	if (regs->tf_eflags & PSL_VM) {
591		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
592		struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
593
594		sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
595		sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
596		sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
597		sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
598
599		if (vm86->vm86_has_vme == 0)
600			sf.sf_uc.uc_mcontext.mc_eflags =
601			    (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
602			    (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
603
604		/*
605		 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
606		 * syscalls made by the signal handler.  This just avoids
607		 * wasting time for our lazy fixup of such faults.  PSL_NT
608		 * does nothing in vm86 mode, but vm86 programs can set it
609		 * almost legitimately in probes for old cpu types.
610		 */
611		tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
612	}
613
614	/*
615	 * Copy the sigframe out to the user's stack.
616	 */
617	if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
618#ifdef DEBUG
619		printf("process %ld has trashed its stack\n", (long)p->p_pid);
620#endif
621		PROC_LOCK(p);
622		sigexit(td, SIGILL);
623	}
624
625	regs->tf_esp = (int)sfp;
626	regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
627	regs->tf_eflags &= ~PSL_T;
628	regs->tf_cs = _ucodesel;
629	regs->tf_ds = _udatasel;
630	regs->tf_es = _udatasel;
631	regs->tf_fs = _udatasel;
632	regs->tf_ss = _udatasel;
633	PROC_LOCK(p);
634}
635
636/*
637 * System call to cleanup state after a signal
638 * has been taken.  Reset signal mask and
639 * stack state from context left by sendsig (above).
640 * Return to previous pc and psl as specified by
641 * context left by sendsig. Check carefully to
642 * make sure that the user has not modified the
643 * state to gain improper privileges.
644 *
645 * MPSAFE
646 */
647#ifdef COMPAT_43
648int
649osigreturn(td, uap)
650	struct thread *td;
651	struct osigreturn_args /* {
652		struct osigcontext *sigcntxp;
653	} */ *uap;
654{
655	struct osigcontext sc;
656	struct trapframe *regs;
657	struct osigcontext *scp;
658	struct proc *p = td->td_proc;
659	int eflags, error;
660
661	regs = td->td_frame;
662	error = copyin(uap->sigcntxp, &sc, sizeof(sc));
663	if (error != 0)
664		return (error);
665	scp = &sc;
666	eflags = scp->sc_ps;
667	if (eflags & PSL_VM) {
668		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
669		struct vm86_kernel *vm86;
670
671		/*
672		 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
673		 * set up the vm86 area, and we can't enter vm86 mode.
674		 */
675		if (td->td_pcb->pcb_ext == 0)
676			return (EINVAL);
677		vm86 = &td->td_pcb->pcb_ext->ext_vm86;
678		if (vm86->vm86_inited == 0)
679			return (EINVAL);
680
681		/* Go back to user mode if both flags are set. */
682		if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
683			trapsignal(td, SIGBUS, 0);
684
685		if (vm86->vm86_has_vme) {
686			eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
687			    (eflags & VME_USERCHANGE) | PSL_VM;
688		} else {
689			vm86->vm86_eflags = eflags;	/* save VIF, VIP */
690			eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
691			    (eflags & VM_USERCHANGE) | PSL_VM;
692		}
693		tf->tf_vm86_ds = scp->sc_ds;
694		tf->tf_vm86_es = scp->sc_es;
695		tf->tf_vm86_fs = scp->sc_fs;
696		tf->tf_vm86_gs = scp->sc_gs;
697		tf->tf_ds = _udatasel;
698		tf->tf_es = _udatasel;
699		tf->tf_fs = _udatasel;
700	} else {
701		/*
702		 * Don't allow users to change privileged or reserved flags.
703		 */
704		/*
705		 * XXX do allow users to change the privileged flag PSL_RF.
706		 * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
707		 * should sometimes set it there too.  tf_eflags is kept in
708		 * the signal context during signal handling and there is no
709		 * other place to remember it, so the PSL_RF bit may be
710		 * corrupted by the signal handler without us knowing.
711		 * Corruption of the PSL_RF bit at worst causes one more or
712		 * one less debugger trap, so allowing it is fairly harmless.
713		 */
714		if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
715	    		return (EINVAL);
716		}
717
718		/*
719		 * Don't allow users to load a valid privileged %cs.  Let the
720		 * hardware check for invalid selectors, excess privilege in
721		 * other selectors, invalid %eip's and invalid %esp's.
722		 */
723		if (!CS_SECURE(scp->sc_cs)) {
724			trapsignal(td, SIGBUS, T_PROTFLT);
725			return (EINVAL);
726		}
727		regs->tf_ds = scp->sc_ds;
728		regs->tf_es = scp->sc_es;
729		regs->tf_fs = scp->sc_fs;
730	}
731
732	/* Restore remaining registers. */
733	regs->tf_eax = scp->sc_eax;
734	regs->tf_ebx = scp->sc_ebx;
735	regs->tf_ecx = scp->sc_ecx;
736	regs->tf_edx = scp->sc_edx;
737	regs->tf_esi = scp->sc_esi;
738	regs->tf_edi = scp->sc_edi;
739	regs->tf_cs = scp->sc_cs;
740	regs->tf_ss = scp->sc_ss;
741	regs->tf_isp = scp->sc_isp;
742	regs->tf_ebp = scp->sc_fp;
743	regs->tf_esp = scp->sc_sp;
744	regs->tf_eip = scp->sc_pc;
745	regs->tf_eflags = eflags;
746
747	PROC_LOCK(p);
748#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
749	if (scp->sc_onstack & 1)
750		p->p_sigstk.ss_flags |= SS_ONSTACK;
751	else
752		p->p_sigstk.ss_flags &= ~SS_ONSTACK;
753#endif
754	SIGSETOLD(p->p_sigmask, scp->sc_mask);
755	SIG_CANTMASK(p->p_sigmask);
756	signotify(p);
757	PROC_UNLOCK(p);
758	return (EJUSTRETURN);
759}
760#endif /* COMPAT_43 */
761
762#ifdef COMPAT_FREEBSD4
763/*
764 * MPSAFE
765 */
766int
767freebsd4_sigreturn(td, uap)
768	struct thread *td;
769	struct freebsd4_sigreturn_args /* {
770		const ucontext4 *sigcntxp;
771	} */ *uap;
772{
773	struct ucontext4 uc;
774	struct proc *p = td->td_proc;
775	struct trapframe *regs;
776	const struct ucontext4 *ucp;
777	int cs, eflags, error;
778
779	error = copyin(uap->sigcntxp, &uc, sizeof(uc));
780	if (error != 0)
781		return (error);
782	ucp = &uc;
783	regs = td->td_frame;
784	eflags = ucp->uc_mcontext.mc_eflags;
785	if (eflags & PSL_VM) {
786		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
787		struct vm86_kernel *vm86;
788
789		/*
790		 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
791		 * set up the vm86 area, and we can't enter vm86 mode.
792		 */
793		if (td->td_pcb->pcb_ext == 0)
794			return (EINVAL);
795		vm86 = &td->td_pcb->pcb_ext->ext_vm86;
796		if (vm86->vm86_inited == 0)
797			return (EINVAL);
798
799		/* Go back to user mode if both flags are set. */
800		if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
801			trapsignal(td, SIGBUS, 0);
802
803		if (vm86->vm86_has_vme) {
804			eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
805			    (eflags & VME_USERCHANGE) | PSL_VM;
806		} else {
807			vm86->vm86_eflags = eflags;	/* save VIF, VIP */
808			eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
809			    (eflags & VM_USERCHANGE) | PSL_VM;
810		}
811		bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
812		tf->tf_eflags = eflags;
813		tf->tf_vm86_ds = tf->tf_ds;
814		tf->tf_vm86_es = tf->tf_es;
815		tf->tf_vm86_fs = tf->tf_fs;
816		tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
817		tf->tf_ds = _udatasel;
818		tf->tf_es = _udatasel;
819		tf->tf_fs = _udatasel;
820	} else {
821		/*
822		 * Don't allow users to change privileged or reserved flags.
823		 */
824		/*
825		 * XXX do allow users to change the privileged flag PSL_RF.
826		 * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
827		 * should sometimes set it there too.  tf_eflags is kept in
828		 * the signal context during signal handling and there is no
829		 * other place to remember it, so the PSL_RF bit may be
830		 * corrupted by the signal handler without us knowing.
831		 * Corruption of the PSL_RF bit at worst causes one more or
832		 * one less debugger trap, so allowing it is fairly harmless.
833		 */
834		if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
835			printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
836	    		return (EINVAL);
837		}
838
839		/*
840		 * Don't allow users to load a valid privileged %cs.  Let the
841		 * hardware check for invalid selectors, excess privilege in
842		 * other selectors, invalid %eip's and invalid %esp's.
843		 */
844		cs = ucp->uc_mcontext.mc_cs;
845		if (!CS_SECURE(cs)) {
846			printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
847			trapsignal(td, SIGBUS, T_PROTFLT);
848			return (EINVAL);
849		}
850
851		bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
852	}
853
854	PROC_LOCK(p);
855#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
856	if (ucp->uc_mcontext.mc_onstack & 1)
857		p->p_sigstk.ss_flags |= SS_ONSTACK;
858	else
859		p->p_sigstk.ss_flags &= ~SS_ONSTACK;
860#endif
861
862	p->p_sigmask = ucp->uc_sigmask;
863	SIG_CANTMASK(p->p_sigmask);
864	signotify(p);
865	PROC_UNLOCK(p);
866	return (EJUSTRETURN);
867}
868#endif	/* COMPAT_FREEBSD4 */
869
870/*
871 * MPSAFE
872 */
873int
874sigreturn(td, uap)
875	struct thread *td;
876	struct sigreturn_args /* {
877		const __ucontext *sigcntxp;
878	} */ *uap;
879{
880	ucontext_t uc;
881	struct proc *p = td->td_proc;
882	struct trapframe *regs;
883	const ucontext_t *ucp;
884	int cs, eflags, error, ret;
885
886	error = copyin(uap->sigcntxp, &uc, sizeof(uc));
887	if (error != 0)
888		return (error);
889	ucp = &uc;
890	regs = td->td_frame;
891	eflags = ucp->uc_mcontext.mc_eflags;
892	if (eflags & PSL_VM) {
893		struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
894		struct vm86_kernel *vm86;
895
896		/*
897		 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
898		 * set up the vm86 area, and we can't enter vm86 mode.
899		 */
900		if (td->td_pcb->pcb_ext == 0)
901			return (EINVAL);
902		vm86 = &td->td_pcb->pcb_ext->ext_vm86;
903		if (vm86->vm86_inited == 0)
904			return (EINVAL);
905
906		/* Go back to user mode if both flags are set. */
907		if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
908			trapsignal(td, SIGBUS, 0);
909
910		if (vm86->vm86_has_vme) {
911			eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
912			    (eflags & VME_USERCHANGE) | PSL_VM;
913		} else {
914			vm86->vm86_eflags = eflags;	/* save VIF, VIP */
915			eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
916			    (eflags & VM_USERCHANGE) | PSL_VM;
917		}
918		bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
919		tf->tf_eflags = eflags;
920		tf->tf_vm86_ds = tf->tf_ds;
921		tf->tf_vm86_es = tf->tf_es;
922		tf->tf_vm86_fs = tf->tf_fs;
923		tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
924		tf->tf_ds = _udatasel;
925		tf->tf_es = _udatasel;
926		tf->tf_fs = _udatasel;
927	} else {
928		/*
929		 * Don't allow users to change privileged or reserved flags.
930		 */
931		/*
932		 * XXX do allow users to change the privileged flag PSL_RF.
933		 * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
934		 * should sometimes set it there too.  tf_eflags is kept in
935		 * the signal context during signal handling and there is no
936		 * other place to remember it, so the PSL_RF bit may be
937		 * corrupted by the signal handler without us knowing.
938		 * Corruption of the PSL_RF bit at worst causes one more or
939		 * one less debugger trap, so allowing it is fairly harmless.
940		 */
941		if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
942			printf("sigreturn: eflags = 0x%x\n", eflags);
943	    		return (EINVAL);
944		}
945
946		/*
947		 * Don't allow users to load a valid privileged %cs.  Let the
948		 * hardware check for invalid selectors, excess privilege in
949		 * other selectors, invalid %eip's and invalid %esp's.
950		 */
951		cs = ucp->uc_mcontext.mc_cs;
952		if (!CS_SECURE(cs)) {
953			printf("sigreturn: cs = 0x%x\n", cs);
954			trapsignal(td, SIGBUS, T_PROTFLT);
955			return (EINVAL);
956		}
957
958		ret = set_fpcontext(td, &ucp->uc_mcontext);
959		if (ret != 0)
960			return (ret);
961		bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
962	}
963
964	PROC_LOCK(p);
965#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
966	if (ucp->uc_mcontext.mc_onstack & 1)
967		p->p_sigstk.ss_flags |= SS_ONSTACK;
968	else
969		p->p_sigstk.ss_flags &= ~SS_ONSTACK;
970#endif
971
972	p->p_sigmask = ucp->uc_sigmask;
973	SIG_CANTMASK(p->p_sigmask);
974	signotify(p);
975	PROC_UNLOCK(p);
976	return (EJUSTRETURN);
977}
978
979/*
980 * Machine dependent boot() routine
981 *
982 * I haven't seen anything to put here yet
983 * Possibly some stuff might be grafted back here from boot()
984 */
985void
986cpu_boot(int howto)
987{
988}
989
990/*
991 * Shutdown the CPU as much as possible
992 */
993void
994cpu_halt(void)
995{
996	for (;;)
997		__asm__ ("hlt");
998}
999
1000/*
1001 * Hook to idle the CPU when possible.  In the SMP case we default to
1002 * off because a halted cpu will not currently pick up a new thread in the
1003 * run queue until the next timer tick.  If turned on this will result in
1004 * approximately a 4.2% loss in real time performance in buildworld tests
1005 * (but improves user and sys times oddly enough), and saves approximately
1006 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
1007 *
1008 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
1009 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
1010 * Then we can have our cake and eat it too.
1011 *
1012 * XXX I'm turning it on for SMP as well by default for now.  It seems to
1013 * help lock contention somewhat, and this is critical for HTT. -Peter
1014 */
1015static int	cpu_idle_hlt = 1;
1016SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
1017    &cpu_idle_hlt, 0, "Idle loop HLT enable");
1018
1019/*
1020 * Note that we have to be careful here to avoid a race between checking
1021 * sched_runnable() and actually halting.  If we don't do this, we may waste
1022 * the time between calling hlt and the next interrupt even though there
1023 * is a runnable process.
1024 */
1025void
1026cpu_idle(void)
1027{
1028
1029#ifdef SMP
1030	if (mp_grab_cpu_hlt())
1031		return;
1032#endif
1033
1034	if (cpu_idle_hlt) {
1035		disable_intr();
1036  		if (sched_runnable()) {
1037			enable_intr();
1038		} else {
1039			/*
1040			 * we must absolutely guarentee that hlt is the
1041			 * absolute next instruction after sti or we
1042			 * introduce a timing window.
1043			 */
1044			__asm __volatile("sti; hlt");
1045		}
1046	}
1047}
1048
1049/*
1050 * Clear registers on exec
1051 */
1052void
1053exec_setregs(td, entry, stack, ps_strings)
1054	struct thread *td;
1055	u_long entry;
1056	u_long stack;
1057	u_long ps_strings;
1058{
1059	struct trapframe *regs = td->td_frame;
1060	struct pcb *pcb = td->td_pcb;
1061
1062	/* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1063	pcb->pcb_gs = _udatasel;
1064	load_gs(_udatasel);
1065
1066	if (td->td_proc->p_md.md_ldt)
1067		user_ldt_free(td);
1068
1069	bzero((char *)regs, sizeof(struct trapframe));
1070	regs->tf_eip = entry;
1071	regs->tf_esp = stack;
1072	regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1073	regs->tf_ss = _udatasel;
1074	regs->tf_ds = _udatasel;
1075	regs->tf_es = _udatasel;
1076	regs->tf_fs = _udatasel;
1077	regs->tf_cs = _ucodesel;
1078
1079	/* PS_STRINGS value for BSD/OS binaries.  It is 0 for non-BSD/OS. */
1080	regs->tf_ebx = ps_strings;
1081
1082        /*
1083         * Reset the hardware debug registers if they were in use.
1084         * They won't have any meaning for the newly exec'd process.
1085         */
1086        if (pcb->pcb_flags & PCB_DBREGS) {
1087                pcb->pcb_dr0 = 0;
1088                pcb->pcb_dr1 = 0;
1089                pcb->pcb_dr2 = 0;
1090                pcb->pcb_dr3 = 0;
1091                pcb->pcb_dr6 = 0;
1092                pcb->pcb_dr7 = 0;
1093                if (pcb == PCPU_GET(curpcb)) {
1094		        /*
1095			 * Clear the debug registers on the running
1096			 * CPU, otherwise they will end up affecting
1097			 * the next process we switch to.
1098			 */
1099		        reset_dbregs();
1100                }
1101                pcb->pcb_flags &= ~PCB_DBREGS;
1102        }
1103
1104	/*
1105	 * Initialize the math emulator (if any) for the current process.
1106	 * Actually, just clear the bit that says that the emulator has
1107	 * been initialized.  Initialization is delayed until the process
1108	 * traps to the emulator (if it is done at all) mainly because
1109	 * emulators don't provide an entry point for initialization.
1110	 */
1111	td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1112
1113	/*
1114	 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1115	 * for why fwait must be trapped at least if there is an npx or an
1116	 * emulator).  This is mainly to handle the case where npx0 is not
1117	 * configured, since the npx routines normally set up the trap
1118	 * otherwise.  It should be done only at boot time, but doing it
1119	 * here allows modifying `npx_exists' for testing the emulator on
1120	 * systems with an npx.
1121	 */
1122	load_cr0(rcr0() | CR0_MP | CR0_TS);
1123
1124	/* Initialize the npx (if any) for the current process. */
1125	/*
1126	 * XXX the above load_cr0() also initializes it and is a layering
1127	 * violation if NPX is configured.  It drops the npx partially
1128	 * and this would be fatal if we were interrupted now, and decided
1129	 * to force the state to the pcb, and checked the invariant
1130	 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL).
1131	 * ALL of this can happen except the check.  The check used to
1132	 * happen and be fatal later when we didn't complete the drop
1133	 * before returning to user mode.  This should be fixed properly
1134	 * soon.
1135	 */
1136	fpstate_drop(td);
1137
1138	/*
1139	 * XXX - Linux emulator
1140	 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1141	 * on it.
1142	 */
1143	td->td_retval[1] = 0;
1144}
1145
1146void
1147cpu_setregs(void)
1148{
1149	unsigned int cr0;
1150
1151	cr0 = rcr0();
1152#ifdef SMP
1153	cr0 |= CR0_NE;			/* Done by npxinit() */
1154#endif
1155	cr0 |= CR0_MP | CR0_TS;		/* Done at every execve() too. */
1156#ifndef I386_CPU
1157	cr0 |= CR0_WP | CR0_AM;
1158#endif
1159	load_cr0(cr0);
1160	load_gs(_udatasel);
1161}
1162
1163static int
1164sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1165{
1166	int error;
1167	error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1168		req);
1169	if (!error && req->newptr)
1170		resettodr();
1171	return (error);
1172}
1173
1174SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1175	&adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1176
1177SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1178	CTLFLAG_RW, &disable_rtc_set, 0, "");
1179
1180SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1181	CTLFLAG_RD, &bootinfo, bootinfo, "");
1182
1183SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1184	CTLFLAG_RW, &wall_cmos_clock, 0, "");
1185
1186u_long bootdev;		/* not a dev_t - encoding is different */
1187SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1188	CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in dev_t format)");
1189
1190/*
1191 * Initialize 386 and configure to run kernel
1192 */
1193
1194/*
1195 * Initialize segments & interrupt table
1196 */
1197
1198int _default_ldt;
1199union descriptor gdt[NGDT * MAXCPU];	/* global descriptor table */
1200static struct gate_descriptor idt0[NIDT];
1201struct gate_descriptor *idt = &idt0[0];	/* interrupt descriptor table */
1202union descriptor ldt[NLDT];		/* local descriptor table */
1203#ifdef SMP
1204/* table descriptors - used to load tables by microp */
1205struct region_descriptor r_gdt, r_idt;
1206#endif
1207
1208int private_tss;			/* flag indicating private tss */
1209
1210#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1211extern int has_f00f_bug;
1212#endif
1213
1214static struct i386tss dblfault_tss;
1215static char dblfault_stack[PAGE_SIZE];
1216
1217extern  struct user	*proc0uarea;
1218extern  vm_offset_t	proc0kstack;
1219
1220
1221/* software prototypes -- in more palatable form */
1222struct soft_segment_descriptor gdt_segs[] = {
1223/* GNULL_SEL	0 Null Descriptor */
1224{	0x0,			/* segment base address  */
1225	0x0,			/* length */
1226	0,			/* segment type */
1227	0,			/* segment descriptor priority level */
1228	0,			/* segment descriptor present */
1229	0, 0,
1230	0,			/* default 32 vs 16 bit size */
1231	0  			/* limit granularity (byte/page units)*/ },
1232/* GCODE_SEL	1 Code Descriptor for kernel */
1233{	0x0,			/* segment base address  */
1234	0xfffff,		/* length - all address space */
1235	SDT_MEMERA,		/* segment type */
1236	0,			/* segment descriptor priority level */
1237	1,			/* segment descriptor present */
1238	0, 0,
1239	1,			/* default 32 vs 16 bit size */
1240	1  			/* limit granularity (byte/page units)*/ },
1241/* GDATA_SEL	2 Data Descriptor for kernel */
1242{	0x0,			/* segment base address  */
1243	0xfffff,		/* length - all address space */
1244	SDT_MEMRWA,		/* segment type */
1245	0,			/* segment descriptor priority level */
1246	1,			/* segment descriptor present */
1247	0, 0,
1248	1,			/* default 32 vs 16 bit size */
1249	1  			/* limit granularity (byte/page units)*/ },
1250/* GPRIV_SEL	3 SMP Per-Processor Private Data Descriptor */
1251{	0x0,			/* segment base address  */
1252	0xfffff,		/* length - all address space */
1253	SDT_MEMRWA,		/* segment type */
1254	0,			/* segment descriptor priority level */
1255	1,			/* segment descriptor present */
1256	0, 0,
1257	1,			/* default 32 vs 16 bit size */
1258	1  			/* limit granularity (byte/page units)*/ },
1259/* GPROC0_SEL	4 Proc 0 Tss Descriptor */
1260{
1261	0x0,			/* segment base address */
1262	sizeof(struct i386tss)-1,/* length - all address space */
1263	SDT_SYS386TSS,		/* segment type */
1264	0,			/* segment descriptor priority level */
1265	1,			/* segment descriptor present */
1266	0, 0,
1267	0,			/* unused - default 32 vs 16 bit size */
1268	0  			/* limit granularity (byte/page units)*/ },
1269/* GLDT_SEL	5 LDT Descriptor */
1270{	(int) ldt,		/* segment base address  */
1271	sizeof(ldt)-1,		/* length - all address space */
1272	SDT_SYSLDT,		/* segment type */
1273	SEL_UPL,		/* segment descriptor priority level */
1274	1,			/* segment descriptor present */
1275	0, 0,
1276	0,			/* unused - default 32 vs 16 bit size */
1277	0  			/* limit granularity (byte/page units)*/ },
1278/* GUSERLDT_SEL	6 User LDT Descriptor per process */
1279{	(int) ldt,		/* segment base address  */
1280	(512 * sizeof(union descriptor)-1),		/* length */
1281	SDT_SYSLDT,		/* segment type */
1282	0,			/* segment descriptor priority level */
1283	1,			/* segment descriptor present */
1284	0, 0,
1285	0,			/* unused - default 32 vs 16 bit size */
1286	0  			/* limit granularity (byte/page units)*/ },
1287/* GTGATE_SEL	7 Null Descriptor - Placeholder */
1288{	0x0,			/* segment base address  */
1289	0x0,			/* length - all address space */
1290	0,			/* segment type */
1291	0,			/* segment descriptor priority level */
1292	0,			/* segment descriptor present */
1293	0, 0,
1294	0,			/* default 32 vs 16 bit size */
1295	0  			/* limit granularity (byte/page units)*/ },
1296/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1297{	0x400,			/* segment base address */
1298	0xfffff,		/* length */
1299	SDT_MEMRWA,		/* segment type */
1300	0,			/* segment descriptor priority level */
1301	1,			/* segment descriptor present */
1302	0, 0,
1303	1,			/* default 32 vs 16 bit size */
1304	1  			/* limit granularity (byte/page units)*/ },
1305/* GPANIC_SEL	9 Panic Tss Descriptor */
1306{	(int) &dblfault_tss,	/* segment base address  */
1307	sizeof(struct i386tss)-1,/* length - all address space */
1308	SDT_SYS386TSS,		/* segment type */
1309	0,			/* segment descriptor priority level */
1310	1,			/* segment descriptor present */
1311	0, 0,
1312	0,			/* unused - default 32 vs 16 bit size */
1313	0  			/* limit granularity (byte/page units)*/ },
1314/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1315{	0,			/* segment base address (overwritten)  */
1316	0xfffff,		/* length */
1317	SDT_MEMERA,		/* segment type */
1318	0,			/* segment descriptor priority level */
1319	1,			/* segment descriptor present */
1320	0, 0,
1321	0,			/* default 32 vs 16 bit size */
1322	1  			/* limit granularity (byte/page units)*/ },
1323/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1324{	0,			/* segment base address (overwritten)  */
1325	0xfffff,		/* length */
1326	SDT_MEMERA,		/* segment type */
1327	0,			/* segment descriptor priority level */
1328	1,			/* segment descriptor present */
1329	0, 0,
1330	0,			/* default 32 vs 16 bit size */
1331	1  			/* limit granularity (byte/page units)*/ },
1332/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1333{	0,			/* segment base address (overwritten) */
1334	0xfffff,		/* length */
1335	SDT_MEMRWA,		/* segment type */
1336	0,			/* segment descriptor priority level */
1337	1,			/* segment descriptor present */
1338	0, 0,
1339	1,			/* default 32 vs 16 bit size */
1340	1  			/* limit granularity (byte/page units)*/ },
1341/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1342{	0,			/* segment base address (overwritten) */
1343	0xfffff,		/* length */
1344	SDT_MEMRWA,		/* segment type */
1345	0,			/* segment descriptor priority level */
1346	1,			/* segment descriptor present */
1347	0, 0,
1348	0,			/* default 32 vs 16 bit size */
1349	1  			/* limit granularity (byte/page units)*/ },
1350/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1351{	0,			/* segment base address (overwritten) */
1352	0xfffff,		/* length */
1353	SDT_MEMRWA,		/* segment type */
1354	0,			/* segment descriptor priority level */
1355	1,			/* segment descriptor present */
1356	0, 0,
1357	0,			/* default 32 vs 16 bit size */
1358	1  			/* limit granularity (byte/page units)*/ },
1359};
1360
1361static struct soft_segment_descriptor ldt_segs[] = {
1362	/* Null Descriptor - overwritten by call gate */
1363{	0x0,			/* segment base address  */
1364	0x0,			/* length - all address space */
1365	0,			/* segment type */
1366	0,			/* segment descriptor priority level */
1367	0,			/* segment descriptor present */
1368	0, 0,
1369	0,			/* default 32 vs 16 bit size */
1370	0  			/* limit granularity (byte/page units)*/ },
1371	/* Null Descriptor - overwritten by call gate */
1372{	0x0,			/* segment base address  */
1373	0x0,			/* length - all address space */
1374	0,			/* segment type */
1375	0,			/* segment descriptor priority level */
1376	0,			/* segment descriptor present */
1377	0, 0,
1378	0,			/* default 32 vs 16 bit size */
1379	0  			/* limit granularity (byte/page units)*/ },
1380	/* Null Descriptor - overwritten by call gate */
1381{	0x0,			/* segment base address  */
1382	0x0,			/* length - all address space */
1383	0,			/* segment type */
1384	0,			/* segment descriptor priority level */
1385	0,			/* segment descriptor present */
1386	0, 0,
1387	0,			/* default 32 vs 16 bit size */
1388	0  			/* limit granularity (byte/page units)*/ },
1389	/* Code Descriptor for user */
1390{	0x0,			/* segment base address  */
1391	0xfffff,		/* length - all address space */
1392	SDT_MEMERA,		/* segment type */
1393	SEL_UPL,		/* segment descriptor priority level */
1394	1,			/* segment descriptor present */
1395	0, 0,
1396	1,			/* default 32 vs 16 bit size */
1397	1  			/* limit granularity (byte/page units)*/ },
1398	/* Null Descriptor - overwritten by call gate */
1399{	0x0,			/* segment base address  */
1400	0x0,			/* length - all address space */
1401	0,			/* segment type */
1402	0,			/* segment descriptor priority level */
1403	0,			/* segment descriptor present */
1404	0, 0,
1405	0,			/* default 32 vs 16 bit size */
1406	0  			/* limit granularity (byte/page units)*/ },
1407	/* Data Descriptor for user */
1408{	0x0,			/* segment base address  */
1409	0xfffff,		/* length - all address space */
1410	SDT_MEMRWA,		/* segment type */
1411	SEL_UPL,		/* segment descriptor priority level */
1412	1,			/* segment descriptor present */
1413	0, 0,
1414	1,			/* default 32 vs 16 bit size */
1415	1  			/* limit granularity (byte/page units)*/ },
1416};
1417
1418void
1419setidt(idx, func, typ, dpl, selec)
1420	int idx;
1421	inthand_t *func;
1422	int typ;
1423	int dpl;
1424	int selec;
1425{
1426	struct gate_descriptor *ip;
1427
1428	ip = idt + idx;
1429	ip->gd_looffset = (int)func;
1430	ip->gd_selector = selec;
1431	ip->gd_stkcpy = 0;
1432	ip->gd_xx = 0;
1433	ip->gd_type = typ;
1434	ip->gd_dpl = dpl;
1435	ip->gd_p = 1;
1436	ip->gd_hioffset = ((int)func)>>16 ;
1437}
1438
1439#define	IDTVEC(name)	__CONCAT(X,name)
1440
1441extern inthand_t
1442	IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1443	IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1444	IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1445	IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1446	IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1447
1448void
1449sdtossd(sd, ssd)
1450	struct segment_descriptor *sd;
1451	struct soft_segment_descriptor *ssd;
1452{
1453	ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
1454	ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1455	ssd->ssd_type  = sd->sd_type;
1456	ssd->ssd_dpl   = sd->sd_dpl;
1457	ssd->ssd_p     = sd->sd_p;
1458	ssd->ssd_def32 = sd->sd_def32;
1459	ssd->ssd_gran  = sd->sd_gran;
1460}
1461
1462#define PHYSMAP_SIZE	(2 * 8)
1463
1464/*
1465 * Populate the (physmap) array with base/bound pairs describing the
1466 * available physical memory in the system, then test this memory and
1467 * build the phys_avail array describing the actually-available memory.
1468 *
1469 * If we cannot accurately determine the physical memory map, then use
1470 * value from the 0xE801 call, and failing that, the RTC.
1471 *
1472 * Total memory size may be set by the kernel environment variable
1473 * hw.physmem or the compile-time define MAXMEM.
1474 *
1475 * XXX first should be vm_paddr_t.
1476 */
1477static void
1478getmemsize(int first)
1479{
1480	int i, physmap_idx, pa_indx;
1481	int hasbrokenint12;
1482	u_int basemem, extmem;
1483	struct vm86frame vmf;
1484	struct vm86context vmc;
1485	vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1486	pt_entry_t *pte;
1487	char *cp;
1488	struct bios_smap *smap;
1489
1490	hasbrokenint12 = 0;
1491	TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1492	bzero(&vmf, sizeof(struct vm86frame));
1493	bzero(physmap, sizeof(physmap));
1494	basemem = 0;
1495
1496	/*
1497	 * Some newer BIOSes has broken INT 12H implementation which cause
1498	 * kernel panic immediately. In this case, we need to scan SMAP
1499	 * with INT 15:E820 first, then determine base memory size.
1500	 */
1501	if (hasbrokenint12) {
1502		goto int15e820;
1503	}
1504
1505	/*
1506	 * Perform "base memory" related probes & setup
1507	 */
1508	vm86_intcall(0x12, &vmf);
1509	basemem = vmf.vmf_ax;
1510	if (basemem > 640) {
1511		printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1512			basemem);
1513		basemem = 640;
1514	}
1515
1516	/*
1517	 * XXX if biosbasemem is now < 640, there is a `hole'
1518	 * between the end of base memory and the start of
1519	 * ISA memory.  The hole may be empty or it may
1520	 * contain BIOS code or data.  Map it read/write so
1521	 * that the BIOS can write to it.  (Memory from 0 to
1522	 * the physical end of the kernel is mapped read-only
1523	 * to begin with and then parts of it are remapped.
1524	 * The parts that aren't remapped form holes that
1525	 * remain read-only and are unused by the kernel.
1526	 * The base memory area is below the physical end of
1527	 * the kernel and right now forms a read-only hole.
1528	 * The part of it from PAGE_SIZE to
1529	 * (trunc_page(biosbasemem * 1024) - 1) will be
1530	 * remapped and used by the kernel later.)
1531	 *
1532	 * This code is similar to the code used in
1533	 * pmap_mapdev, but since no memory needs to be
1534	 * allocated we simply change the mapping.
1535	 */
1536	for (pa = trunc_page(basemem * 1024);
1537	     pa < ISA_HOLE_START; pa += PAGE_SIZE)
1538		pmap_kenter(KERNBASE + pa, pa);
1539
1540	/*
1541	 * if basemem != 640, map pages r/w into vm86 page table so
1542	 * that the bios can scribble on it.
1543	 */
1544	pte = (pt_entry_t *)vm86paddr;
1545	for (i = basemem / 4; i < 160; i++)
1546		pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1547
1548int15e820:
1549	/*
1550	 * map page 1 R/W into the kernel page table so we can use it
1551	 * as a buffer.  The kernel will unmap this page later.
1552	 */
1553	pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
1554
1555	/*
1556	 * get memory map with INT 15:E820
1557	 */
1558	vmc.npages = 0;
1559	smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1560	vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1561
1562	physmap_idx = 0;
1563	vmf.vmf_ebx = 0;
1564	do {
1565		vmf.vmf_eax = 0xE820;
1566		vmf.vmf_edx = SMAP_SIG;
1567		vmf.vmf_ecx = sizeof(struct bios_smap);
1568		i = vm86_datacall(0x15, &vmf, &vmc);
1569		if (i || vmf.vmf_eax != SMAP_SIG)
1570			break;
1571		if (boothowto & RB_VERBOSE)
1572			printf("SMAP type=%02x base=%016llx len=%016llx\n",
1573			    smap->type, smap->base, smap->length);
1574
1575		if (smap->type != 0x01)
1576			goto next_run;
1577
1578		if (smap->length == 0)
1579			goto next_run;
1580
1581#ifndef PAE
1582		if (smap->base >= 0xffffffff) {
1583			printf("%uK of memory above 4GB ignored\n",
1584			    (u_int)(smap->length / 1024));
1585			goto next_run;
1586		}
1587#endif
1588
1589		for (i = 0; i <= physmap_idx; i += 2) {
1590			if (smap->base < physmap[i + 1]) {
1591				if (boothowto & RB_VERBOSE)
1592					printf(
1593	"Overlapping or non-montonic memory region, ignoring second region\n");
1594				goto next_run;
1595			}
1596		}
1597
1598		if (smap->base == physmap[physmap_idx + 1]) {
1599			physmap[physmap_idx + 1] += smap->length;
1600			goto next_run;
1601		}
1602
1603		physmap_idx += 2;
1604		if (physmap_idx == PHYSMAP_SIZE) {
1605			printf(
1606		"Too many segments in the physical address map, giving up\n");
1607			break;
1608		}
1609		physmap[physmap_idx] = smap->base;
1610		physmap[physmap_idx + 1] = smap->base + smap->length;
1611next_run: ;
1612	} while (vmf.vmf_ebx != 0);
1613
1614	/*
1615	 * Perform "base memory" related probes & setup based on SMAP
1616	 */
1617	if (basemem == 0) {
1618		for (i = 0; i <= physmap_idx; i += 2) {
1619			if (physmap[i] == 0x00000000) {
1620				basemem = physmap[i + 1] / 1024;
1621				break;
1622			}
1623		}
1624
1625		if (basemem == 0) {
1626			basemem = 640;
1627		}
1628
1629		if (basemem > 640) {
1630			printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1631				basemem);
1632			basemem = 640;
1633		}
1634
1635		for (pa = trunc_page(basemem * 1024);
1636		     pa < ISA_HOLE_START; pa += PAGE_SIZE)
1637			pmap_kenter(KERNBASE + pa, pa);
1638
1639		pte = (pt_entry_t *)vm86paddr;
1640		for (i = basemem / 4; i < 160; i++)
1641			pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1642	}
1643
1644	if (physmap[1] != 0)
1645		goto physmap_done;
1646
1647	/*
1648	 * If we failed above, try memory map with INT 15:E801
1649	 */
1650	vmf.vmf_ax = 0xE801;
1651	if (vm86_intcall(0x15, &vmf) == 0) {
1652		extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1653	} else {
1654#if 0
1655		vmf.vmf_ah = 0x88;
1656		vm86_intcall(0x15, &vmf);
1657		extmem = vmf.vmf_ax;
1658#else
1659		/*
1660		 * Prefer the RTC value for extended memory.
1661		 */
1662		extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1663#endif
1664	}
1665
1666	/*
1667	 * Special hack for chipsets that still remap the 384k hole when
1668	 * there's 16MB of memory - this really confuses people that
1669	 * are trying to use bus mastering ISA controllers with the
1670	 * "16MB limit"; they only have 16MB, but the remapping puts
1671	 * them beyond the limit.
1672	 *
1673	 * If extended memory is between 15-16MB (16-17MB phys address range),
1674	 *	chop it to 15MB.
1675	 */
1676	if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1677		extmem = 15 * 1024;
1678
1679	physmap[0] = 0;
1680	physmap[1] = basemem * 1024;
1681	physmap_idx = 2;
1682	physmap[physmap_idx] = 0x100000;
1683	physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1684
1685physmap_done:
1686	/*
1687	 * Now, physmap contains a map of physical memory.
1688	 */
1689
1690#ifdef SMP
1691	/* make hole for AP bootstrap code */
1692	physmap[1] = mp_bootaddress(physmap[1] / 1024);
1693
1694	/* look for the MP hardware - needed for apic addresses */
1695	i386_mp_probe();
1696#endif
1697
1698	/*
1699	 * Maxmem isn't the "maximum memory", it's one larger than the
1700	 * highest page of the physical address space.  It should be
1701	 * called something like "Maxphyspage".  We may adjust this
1702	 * based on ``hw.physmem'' and the results of the memory test.
1703	 */
1704	Maxmem = atop(physmap[physmap_idx + 1]);
1705
1706#ifdef MAXMEM
1707	Maxmem = MAXMEM / 4;
1708#endif
1709
1710	/*
1711	 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1712	 * for the appropriate modifiers.  This overrides MAXMEM.
1713	 */
1714	if ((cp = getenv("hw.physmem")) != NULL) {
1715		u_int64_t AllowMem, sanity;
1716		char *ep;
1717
1718		sanity = AllowMem = strtouq(cp, &ep, 0);
1719		if ((ep != cp) && (*ep != 0)) {
1720			switch(*ep) {
1721			case 'g':
1722			case 'G':
1723				AllowMem <<= 10;
1724			case 'm':
1725			case 'M':
1726				AllowMem <<= 10;
1727			case 'k':
1728			case 'K':
1729				AllowMem <<= 10;
1730				break;
1731			default:
1732				AllowMem = sanity = 0;
1733			}
1734			if (AllowMem < sanity)
1735				AllowMem = 0;
1736		}
1737		if (AllowMem == 0)
1738			printf("Ignoring invalid memory size of '%s'\n", cp);
1739		else
1740			Maxmem = atop(AllowMem);
1741		freeenv(cp);
1742	}
1743
1744	if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1745	    (boothowto & RB_VERBOSE))
1746		printf("Physical memory use set to %ldK\n", Maxmem * 4);
1747
1748	/*
1749	 * If Maxmem has been increased beyond what the system has detected,
1750	 * extend the last memory segment to the new limit.
1751	 */
1752	if (atop(physmap[physmap_idx + 1]) < Maxmem)
1753		physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1754
1755	/* call pmap initialization to make new kernel address space */
1756	pmap_bootstrap(first, 0);
1757
1758	/*
1759	 * Size up each available chunk of physical memory.
1760	 */
1761	physmap[0] = PAGE_SIZE;		/* mask off page 0 */
1762	pa_indx = 0;
1763	phys_avail[pa_indx++] = physmap[0];
1764	phys_avail[pa_indx] = physmap[0];
1765	pte = CMAP1;
1766
1767	/*
1768	 * physmap is in bytes, so when converting to page boundaries,
1769	 * round up the start address and round down the end address.
1770	 */
1771	for (i = 0; i <= physmap_idx; i += 2) {
1772		vm_paddr_t end;
1773
1774		end = ptoa((vm_paddr_t)Maxmem);
1775		if (physmap[i + 1] < end)
1776			end = trunc_page(physmap[i + 1]);
1777		for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1778			int tmp, page_bad;
1779			int *ptr = (int *)CADDR1;
1780
1781			/*
1782			 * block out kernel memory as not available.
1783			 */
1784			if (pa >= 0x100000 && pa < first)
1785				continue;
1786
1787			page_bad = FALSE;
1788
1789			/*
1790			 * map page into kernel: valid, read/write,non-cacheable
1791			 */
1792			*pte = pa | PG_V | PG_RW | PG_N;
1793			invltlb();
1794
1795			tmp = *(int *)ptr;
1796			/*
1797			 * Test for alternating 1's and 0's
1798			 */
1799			*(volatile int *)ptr = 0xaaaaaaaa;
1800			if (*(volatile int *)ptr != 0xaaaaaaaa) {
1801				page_bad = TRUE;
1802			}
1803			/*
1804			 * Test for alternating 0's and 1's
1805			 */
1806			*(volatile int *)ptr = 0x55555555;
1807			if (*(volatile int *)ptr != 0x55555555) {
1808			page_bad = TRUE;
1809			}
1810			/*
1811			 * Test for all 1's
1812			 */
1813			*(volatile int *)ptr = 0xffffffff;
1814			if (*(volatile int *)ptr != 0xffffffff) {
1815				page_bad = TRUE;
1816			}
1817			/*
1818			 * Test for all 0's
1819			 */
1820			*(volatile int *)ptr = 0x0;
1821			if (*(volatile int *)ptr != 0x0) {
1822				page_bad = TRUE;
1823			}
1824			/*
1825			 * Restore original value.
1826			 */
1827			*(int *)ptr = tmp;
1828
1829			/*
1830			 * Adjust array of valid/good pages.
1831			 */
1832			if (page_bad == TRUE) {
1833				continue;
1834			}
1835			/*
1836			 * If this good page is a continuation of the
1837			 * previous set of good pages, then just increase
1838			 * the end pointer. Otherwise start a new chunk.
1839			 * Note that "end" points one higher than end,
1840			 * making the range >= start and < end.
1841			 * If we're also doing a speculative memory
1842			 * test and we at or past the end, bump up Maxmem
1843			 * so that we keep going. The first bad page
1844			 * will terminate the loop.
1845			 */
1846			if (phys_avail[pa_indx] == pa) {
1847				phys_avail[pa_indx] += PAGE_SIZE;
1848			} else {
1849				pa_indx++;
1850				if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1851					printf(
1852		"Too many holes in the physical address space, giving up\n");
1853					pa_indx--;
1854					break;
1855				}
1856				phys_avail[pa_indx++] = pa;	/* start */
1857				phys_avail[pa_indx] = pa + PAGE_SIZE;	/* end */
1858			}
1859			physmem++;
1860		}
1861	}
1862	*pte = 0;
1863	invltlb();
1864
1865	/*
1866	 * XXX
1867	 * The last chunk must contain at least one page plus the message
1868	 * buffer to avoid complicating other code (message buffer address
1869	 * calculation, etc.).
1870	 */
1871	while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1872	    round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1873		physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1874		phys_avail[pa_indx--] = 0;
1875		phys_avail[pa_indx--] = 0;
1876	}
1877
1878	Maxmem = atop(phys_avail[pa_indx]);
1879
1880	/* Trim off space for the message buffer. */
1881	phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1882
1883	avail_end = phys_avail[pa_indx];
1884}
1885
1886void
1887init386(first)
1888	int first;
1889{
1890	struct gate_descriptor *gdp;
1891	int gsel_tss, metadata_missing, off, x;
1892#ifndef SMP
1893	/* table descriptors - used to load tables by microp */
1894	struct region_descriptor r_gdt, r_idt;
1895#endif
1896	struct pcpu *pc;
1897
1898	proc0.p_uarea = proc0uarea;
1899	thread0.td_kstack = proc0kstack;
1900	thread0.td_pcb = (struct pcb *)
1901	   (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
1902	atdevbase = ISA_HOLE_START + KERNBASE;
1903
1904	/*
1905 	 * This may be done better later if it gets more high level
1906 	 * components in it. If so just link td->td_proc here.
1907	 */
1908	proc_linkup(&proc0, &ksegrp0, &kse0, &thread0);
1909
1910	metadata_missing = 0;
1911	if (bootinfo.bi_modulep) {
1912		preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1913		preload_bootstrap_relocate(KERNBASE);
1914	} else {
1915		metadata_missing = 1;
1916	}
1917	if (envmode == 1)
1918		kern_envp = static_env;
1919	else if (bootinfo.bi_envp)
1920		kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1921
1922	/* Init basic tunables, hz etc */
1923	init_param1();
1924
1925	/*
1926	 * make gdt memory segments, the code segment goes up to end of the
1927	 * page with etext in it, the data segment goes to the end of
1928	 * the address space
1929	 */
1930	/*
1931	 * XXX text protection is temporarily (?) disabled.  The limit was
1932	 * i386_btop(round_page(etext)) - 1.
1933	 */
1934	gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1935	gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1936#ifdef SMP
1937	pc = &SMP_prvspace[0].pcpu;
1938	gdt_segs[GPRIV_SEL].ssd_limit =
1939		atop(sizeof(struct privatespace) - 1);
1940#else
1941	pc = &__pcpu;
1942	gdt_segs[GPRIV_SEL].ssd_limit =
1943		atop(sizeof(struct pcpu) - 1);
1944#endif
1945	gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
1946	gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
1947
1948	for (x = 0; x < NGDT; x++)
1949		ssdtosd(&gdt_segs[x], &gdt[x].sd);
1950
1951	r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1952	r_gdt.rd_base =  (int) gdt;
1953	lgdt(&r_gdt);
1954
1955	pcpu_init(pc, 0, sizeof(struct pcpu));
1956	PCPU_SET(prvspace, pc);
1957	PCPU_SET(curthread, &thread0);
1958
1959	/*
1960	 * Initialize mutexes.
1961	 *
1962	 * icu_lock: in order to allow an interrupt to occur in a critical
1963	 * 	     section, to set pcpu->ipending (etc...) properly, we
1964	 *	     must be able to get the icu lock, so it can't be
1965	 *	     under witness.
1966	 */
1967	mutex_init();
1968	mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_RECURSE);
1969	mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1970
1971	/* make ldt memory segments */
1972	/*
1973	 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max.  And it
1974	 * should be spelled ...MAX_USER...
1975	 */
1976	ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1977	ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1978	for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1979		ssdtosd(&ldt_segs[x], &ldt[x].sd);
1980
1981	_default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1982	lldt(_default_ldt);
1983	PCPU_SET(currentldt, _default_ldt);
1984
1985	/* exceptions */
1986	for (x = 0; x < NIDT; x++)
1987		setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
1988		    GSEL(GCODE_SEL, SEL_KPL));
1989	setidt(0, &IDTVEC(div),  SDT_SYS386TGT, SEL_KPL,
1990	    GSEL(GCODE_SEL, SEL_KPL));
1991	setidt(1, &IDTVEC(dbg),  SDT_SYS386IGT, SEL_KPL,
1992	    GSEL(GCODE_SEL, SEL_KPL));
1993	setidt(2, &IDTVEC(nmi),  SDT_SYS386TGT, SEL_KPL,
1994	    GSEL(GCODE_SEL, SEL_KPL));
1995 	setidt(3, &IDTVEC(bpt),  SDT_SYS386IGT, SEL_UPL,
1996	    GSEL(GCODE_SEL, SEL_KPL));
1997	setidt(4, &IDTVEC(ofl),  SDT_SYS386TGT, SEL_UPL,
1998	    GSEL(GCODE_SEL, SEL_KPL));
1999	setidt(5, &IDTVEC(bnd),  SDT_SYS386TGT, SEL_KPL,
2000	    GSEL(GCODE_SEL, SEL_KPL));
2001	setidt(6, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
2002	    GSEL(GCODE_SEL, SEL_KPL));
2003	setidt(7, &IDTVEC(dna),  SDT_SYS386TGT, SEL_KPL
2004	    , GSEL(GCODE_SEL, SEL_KPL));
2005	setidt(8, 0,  SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2006	setidt(9, &IDTVEC(fpusegm),  SDT_SYS386TGT, SEL_KPL,
2007	    GSEL(GCODE_SEL, SEL_KPL));
2008	setidt(10, &IDTVEC(tss),  SDT_SYS386TGT, SEL_KPL,
2009	    GSEL(GCODE_SEL, SEL_KPL));
2010	setidt(11, &IDTVEC(missing),  SDT_SYS386TGT, SEL_KPL,
2011	    GSEL(GCODE_SEL, SEL_KPL));
2012	setidt(12, &IDTVEC(stk),  SDT_SYS386TGT, SEL_KPL,
2013	    GSEL(GCODE_SEL, SEL_KPL));
2014	setidt(13, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
2015	    GSEL(GCODE_SEL, SEL_KPL));
2016	setidt(14, &IDTVEC(page),  SDT_SYS386IGT, SEL_KPL,
2017	    GSEL(GCODE_SEL, SEL_KPL));
2018	setidt(15, &IDTVEC(rsvd),  SDT_SYS386TGT, SEL_KPL,
2019	    GSEL(GCODE_SEL, SEL_KPL));
2020	setidt(16, &IDTVEC(fpu),  SDT_SYS386TGT, SEL_KPL,
2021	    GSEL(GCODE_SEL, SEL_KPL));
2022	setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2023	    GSEL(GCODE_SEL, SEL_KPL));
2024	setidt(18, &IDTVEC(mchk),  SDT_SYS386TGT, SEL_KPL,
2025	    GSEL(GCODE_SEL, SEL_KPL));
2026	setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2027	    GSEL(GCODE_SEL, SEL_KPL));
2028 	setidt(0x80, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2029	    GSEL(GCODE_SEL, SEL_KPL));
2030
2031	r_idt.rd_limit = sizeof(idt0) - 1;
2032	r_idt.rd_base = (int) idt;
2033	lidt(&r_idt);
2034
2035	/*
2036	 * Initialize the console before we print anything out.
2037	 */
2038	cninit();
2039
2040	if (metadata_missing)
2041		printf("WARNING: loader(8) metadata is missing!\n");
2042
2043#ifdef DEV_ISA
2044	isa_defaultirq();
2045#endif
2046
2047#ifdef DDB
2048	kdb_init();
2049	if (boothowto & RB_KDB)
2050		Debugger("Boot flags requested debugger");
2051#endif
2052
2053	finishidentcpu();	/* Final stage of CPU initialization */
2054	setidt(6, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
2055	    GSEL(GCODE_SEL, SEL_KPL));
2056	setidt(13, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
2057	    GSEL(GCODE_SEL, SEL_KPL));
2058	initializecpu();	/* Initialize CPU registers */
2059
2060	/* make an initial tss so cpu can get interrupt stack on syscall! */
2061	/* Note: -16 is so we can grow the trapframe if we came from vm86 */
2062	PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2063	    KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2064	PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2065	gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2066	private_tss = 0;
2067	PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2068	PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2069	PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2070	ltr(gsel_tss);
2071
2072	dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2073	    dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2074	dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2075	    dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2076#ifdef PAE
2077	dblfault_tss.tss_cr3 = (int)IdlePDPT;
2078#else
2079	dblfault_tss.tss_cr3 = (int)IdlePTD;
2080#endif
2081	dblfault_tss.tss_eip = (int)dblfault_handler;
2082	dblfault_tss.tss_eflags = PSL_KERNEL;
2083	dblfault_tss.tss_ds = dblfault_tss.tss_es =
2084	    dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2085	dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2086	dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2087	dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2088
2089	vm86_initialize();
2090	getmemsize(first);
2091	init_param2(physmem);
2092
2093	/* now running on new page tables, configured,and u/iom is accessible */
2094
2095	/* Map the message buffer. */
2096	for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2097		pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2098
2099	msgbufinit(msgbufp, MSGBUF_SIZE);
2100
2101	/* make a call gate to reenter kernel with */
2102	gdp = &ldt[LSYS5CALLS_SEL].gd;
2103
2104	x = (int) &IDTVEC(lcall_syscall);
2105	gdp->gd_looffset = x;
2106	gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2107	gdp->gd_stkcpy = 1;
2108	gdp->gd_type = SDT_SYS386CGT;
2109	gdp->gd_dpl = SEL_UPL;
2110	gdp->gd_p = 1;
2111	gdp->gd_hioffset = x >> 16;
2112
2113	/* XXX does this work? */
2114	ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2115	ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2116
2117	/* transfer to user mode */
2118
2119	_ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2120	_udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2121
2122	/* setup proc 0's pcb */
2123	thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
2124#ifdef PAE
2125	thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2126#else
2127	thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2128#endif
2129	thread0.td_pcb->pcb_ext = 0;
2130	thread0.td_frame = &proc0_tf;
2131}
2132
2133void
2134cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2135{
2136}
2137
2138#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2139static void f00f_hack(void *unused);
2140SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2141
2142static void
2143f00f_hack(void *unused) {
2144	struct gate_descriptor *new_idt;
2145#ifndef SMP
2146	struct region_descriptor r_idt;
2147#endif
2148	vm_offset_t tmp;
2149
2150	if (!has_f00f_bug)
2151		return;
2152
2153	GIANT_REQUIRED;
2154
2155	printf("Intel Pentium detected, installing workaround for F00F bug\n");
2156
2157	r_idt.rd_limit = sizeof(idt0) - 1;
2158
2159	tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2160	if (tmp == 0)
2161		panic("kmem_alloc returned 0");
2162	if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2163		panic("kmem_alloc returned non-page-aligned memory");
2164	/* Put the first seven entries in the lower page */
2165	new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2166	bcopy(idt, new_idt, sizeof(idt0));
2167	r_idt.rd_base = (int)new_idt;
2168	lidt(&r_idt);
2169	idt = new_idt;
2170	if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2171			   VM_PROT_READ, FALSE) != KERN_SUCCESS)
2172		panic("vm_map_protect failed");
2173	return;
2174}
2175#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2176
2177int
2178ptrace_set_pc(struct thread *td, unsigned long addr)
2179{
2180	td->td_frame->tf_eip = addr;
2181	return (0);
2182}
2183
2184int
2185ptrace_single_step(struct thread *td)
2186{
2187	td->td_frame->tf_eflags |= PSL_T;
2188	return (0);
2189}
2190
2191int
2192fill_regs(struct thread *td, struct reg *regs)
2193{
2194	struct pcb *pcb;
2195	struct trapframe *tp;
2196
2197	tp = td->td_frame;
2198	regs->r_fs = tp->tf_fs;
2199	regs->r_es = tp->tf_es;
2200	regs->r_ds = tp->tf_ds;
2201	regs->r_edi = tp->tf_edi;
2202	regs->r_esi = tp->tf_esi;
2203	regs->r_ebp = tp->tf_ebp;
2204	regs->r_ebx = tp->tf_ebx;
2205	regs->r_edx = tp->tf_edx;
2206	regs->r_ecx = tp->tf_ecx;
2207	regs->r_eax = tp->tf_eax;
2208	regs->r_eip = tp->tf_eip;
2209	regs->r_cs = tp->tf_cs;
2210	regs->r_eflags = tp->tf_eflags;
2211	regs->r_esp = tp->tf_esp;
2212	regs->r_ss = tp->tf_ss;
2213	pcb = td->td_pcb;
2214	regs->r_gs = pcb->pcb_gs;
2215	return (0);
2216}
2217
2218int
2219set_regs(struct thread *td, struct reg *regs)
2220{
2221	struct pcb *pcb;
2222	struct trapframe *tp;
2223
2224	tp = td->td_frame;
2225	if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2226	    !CS_SECURE(regs->r_cs))
2227		return (EINVAL);
2228	tp->tf_fs = regs->r_fs;
2229	tp->tf_es = regs->r_es;
2230	tp->tf_ds = regs->r_ds;
2231	tp->tf_edi = regs->r_edi;
2232	tp->tf_esi = regs->r_esi;
2233	tp->tf_ebp = regs->r_ebp;
2234	tp->tf_ebx = regs->r_ebx;
2235	tp->tf_edx = regs->r_edx;
2236	tp->tf_ecx = regs->r_ecx;
2237	tp->tf_eax = regs->r_eax;
2238	tp->tf_eip = regs->r_eip;
2239	tp->tf_cs = regs->r_cs;
2240	tp->tf_eflags = regs->r_eflags;
2241	tp->tf_esp = regs->r_esp;
2242	tp->tf_ss = regs->r_ss;
2243	pcb = td->td_pcb;
2244	pcb->pcb_gs = regs->r_gs;
2245	return (0);
2246}
2247
2248#ifdef CPU_ENABLE_SSE
2249static void
2250fill_fpregs_xmm(sv_xmm, sv_87)
2251	struct savexmm *sv_xmm;
2252	struct save87 *sv_87;
2253{
2254	register struct env87 *penv_87 = &sv_87->sv_env;
2255	register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2256	int i;
2257
2258	bzero(sv_87, sizeof(*sv_87));
2259
2260	/* FPU control/status */
2261	penv_87->en_cw = penv_xmm->en_cw;
2262	penv_87->en_sw = penv_xmm->en_sw;
2263	penv_87->en_tw = penv_xmm->en_tw;
2264	penv_87->en_fip = penv_xmm->en_fip;
2265	penv_87->en_fcs = penv_xmm->en_fcs;
2266	penv_87->en_opcode = penv_xmm->en_opcode;
2267	penv_87->en_foo = penv_xmm->en_foo;
2268	penv_87->en_fos = penv_xmm->en_fos;
2269
2270	/* FPU registers */
2271	for (i = 0; i < 8; ++i)
2272		sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2273}
2274
2275static void
2276set_fpregs_xmm(sv_87, sv_xmm)
2277	struct save87 *sv_87;
2278	struct savexmm *sv_xmm;
2279{
2280	register struct env87 *penv_87 = &sv_87->sv_env;
2281	register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2282	int i;
2283
2284	/* FPU control/status */
2285	penv_xmm->en_cw = penv_87->en_cw;
2286	penv_xmm->en_sw = penv_87->en_sw;
2287	penv_xmm->en_tw = penv_87->en_tw;
2288	penv_xmm->en_fip = penv_87->en_fip;
2289	penv_xmm->en_fcs = penv_87->en_fcs;
2290	penv_xmm->en_opcode = penv_87->en_opcode;
2291	penv_xmm->en_foo = penv_87->en_foo;
2292	penv_xmm->en_fos = penv_87->en_fos;
2293
2294	/* FPU registers */
2295	for (i = 0; i < 8; ++i)
2296		sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2297}
2298#endif /* CPU_ENABLE_SSE */
2299
2300int
2301fill_fpregs(struct thread *td, struct fpreg *fpregs)
2302{
2303#ifdef CPU_ENABLE_SSE
2304	if (cpu_fxsr) {
2305		fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2306						(struct save87 *)fpregs);
2307		return (0);
2308	}
2309#endif /* CPU_ENABLE_SSE */
2310	bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2311	return (0);
2312}
2313
2314int
2315set_fpregs(struct thread *td, struct fpreg *fpregs)
2316{
2317#ifdef CPU_ENABLE_SSE
2318	if (cpu_fxsr) {
2319		set_fpregs_xmm((struct save87 *)fpregs,
2320					   &td->td_pcb->pcb_save.sv_xmm);
2321		return (0);
2322	}
2323#endif /* CPU_ENABLE_SSE */
2324	bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2325	return (0);
2326}
2327
2328/*
2329 * Get machine context.
2330 */
2331int
2332get_mcontext(struct thread *td, mcontext_t *mcp)
2333{
2334	struct trapframe *tp;
2335
2336	tp = td->td_frame;
2337
2338	mcp->mc_onstack = sigonstack(tp->tf_esp);
2339	mcp->mc_gs = td->td_pcb->pcb_gs;
2340	mcp->mc_fs = tp->tf_fs;
2341	mcp->mc_es = tp->tf_es;
2342	mcp->mc_ds = tp->tf_ds;
2343	mcp->mc_edi = tp->tf_edi;
2344	mcp->mc_esi = tp->tf_esi;
2345	mcp->mc_ebp = tp->tf_ebp;
2346	mcp->mc_isp = tp->tf_isp;
2347	mcp->mc_ebx = tp->tf_ebx;
2348	mcp->mc_edx = tp->tf_edx;
2349	mcp->mc_ecx = tp->tf_ecx;
2350	mcp->mc_eax = tp->tf_eax;
2351	mcp->mc_eip = tp->tf_eip;
2352	mcp->mc_cs = tp->tf_cs;
2353	mcp->mc_eflags = tp->tf_eflags;
2354	mcp->mc_esp = tp->tf_esp;
2355	mcp->mc_ss = tp->tf_ss;
2356	mcp->mc_len = sizeof(*mcp);
2357	get_fpcontext(td, mcp);
2358	return (0);
2359}
2360
2361/*
2362 * Set machine context.
2363 *
2364 * However, we don't set any but the user modifiable flags, and we won't
2365 * touch the cs selector.
2366 */
2367int
2368set_mcontext(struct thread *td, const mcontext_t *mcp)
2369{
2370	struct trapframe *tp;
2371	int eflags, ret;
2372
2373	tp = td->td_frame;
2374	if (mcp->mc_len != sizeof(*mcp))
2375		return (EINVAL);
2376	eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2377	    (tp->tf_eflags & ~PSL_USERCHANGE);
2378	if ((ret = set_fpcontext(td, mcp)) == 0) {
2379		tp->tf_fs = mcp->mc_fs;
2380		tp->tf_es = mcp->mc_es;
2381		tp->tf_ds = mcp->mc_ds;
2382		tp->tf_edi = mcp->mc_edi;
2383		tp->tf_esi = mcp->mc_esi;
2384		tp->tf_ebp = mcp->mc_ebp;
2385		tp->tf_ebx = mcp->mc_ebx;
2386		tp->tf_edx = mcp->mc_edx;
2387		tp->tf_ecx = mcp->mc_ecx;
2388		tp->tf_eax = mcp->mc_eax;
2389		tp->tf_eip = mcp->mc_eip;
2390		tp->tf_eflags = eflags;
2391		tp->tf_esp = mcp->mc_esp;
2392		tp->tf_ss = mcp->mc_ss;
2393		td->td_pcb->pcb_gs = mcp->mc_gs;
2394		ret = 0;
2395	}
2396	return (ret);
2397}
2398
2399static void
2400get_fpcontext(struct thread *td, mcontext_t *mcp)
2401{
2402#ifndef DEV_NPX
2403	mcp->mc_fpformat = _MC_FPFMT_NODEV;
2404	mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2405#else
2406	union savefpu *addr;
2407
2408	/*
2409	 * XXX mc_fpstate might be misaligned, since its declaration is not
2410	 * unportabilized using __attribute__((aligned(16))) like the
2411	 * declaration of struct savemm, and anyway, alignment doesn't work
2412	 * for auto variables since we don't use gcc's pessimal stack
2413	 * alignment.  Work around this by abusing the spare fields after
2414	 * mcp->mc_fpstate.
2415	 *
2416	 * XXX unpessimize most cases by only aligning when fxsave might be
2417	 * called, although this requires knowing too much about
2418	 * npxgetregs()'s internals.
2419	 */
2420	addr = (union savefpu *)&mcp->mc_fpstate;
2421	if (td == PCPU_GET(fpcurthread) &&
2422#ifdef CPU_ENABLE_SSE
2423	    cpu_fxsr &&
2424#endif
2425	    ((uintptr_t)(void *)addr & 0xF)) {
2426		do
2427			addr = (void *)((char *)addr + 4);
2428		while ((uintptr_t)(void *)addr & 0xF);
2429	}
2430	mcp->mc_ownedfp = npxgetregs(td, addr);
2431	if (addr != (union savefpu *)&mcp->mc_fpstate) {
2432		bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2433		bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
2434	}
2435	mcp->mc_fpformat = npxformat();
2436#endif
2437}
2438
2439static int
2440set_fpcontext(struct thread *td, const mcontext_t *mcp)
2441{
2442	union savefpu *addr;
2443
2444	if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2445		return (0);
2446	else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2447	    mcp->mc_fpformat != _MC_FPFMT_XMM)
2448		return (EINVAL);
2449	else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2450		/* We don't care what state is left in the FPU or PCB. */
2451		fpstate_drop(td);
2452	else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2453	    mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2454		/* XXX align as above. */
2455		addr = (union savefpu *)&mcp->mc_fpstate;
2456		if (td == PCPU_GET(fpcurthread) &&
2457#ifdef CPU_ENABLE_SSE
2458		    cpu_fxsr &&
2459#endif
2460		    ((uintptr_t)(void *)addr & 0xF)) {
2461			do
2462				addr = (void *)((char *)addr + 4);
2463			while ((uintptr_t)(void *)addr & 0xF);
2464			bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
2465		}
2466#ifdef DEV_NPX
2467		/*
2468		 * XXX we violate the dubious requirement that npxsetregs()
2469		 * be called with interrupts disabled.
2470		 */
2471		npxsetregs(td, addr);
2472#endif
2473		/*
2474		 * Don't bother putting things back where they were in the
2475		 * misaligned case, since we know that the caller won't use
2476		 * them again.
2477		 */
2478	} else
2479		return (EINVAL);
2480	return (0);
2481}
2482
2483static void
2484fpstate_drop(struct thread *td)
2485{
2486	register_t s;
2487
2488	s = intr_disable();
2489#ifdef DEV_NPX
2490	if (PCPU_GET(fpcurthread) == td)
2491		npxdrop();
2492#endif
2493	/*
2494	 * XXX force a full drop of the npx.  The above only drops it if we
2495	 * owned it.  npxgetregs() has the same bug in the !cpu_fxsr case.
2496	 *
2497	 * XXX I don't much like npxgetregs()'s semantics of doing a full
2498	 * drop.  Dropping only to the pcb matches fnsave's behaviour.
2499	 * We only need to drop to !PCB_INITDONE in sendsig().  But
2500	 * sendsig() is the only caller of npxgetregs()... perhaps we just
2501	 * have too many layers.
2502	 */
2503	curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
2504	intr_restore(s);
2505}
2506
2507int
2508fill_dbregs(struct thread *td, struct dbreg *dbregs)
2509{
2510	struct pcb *pcb;
2511
2512	if (td == NULL) {
2513		dbregs->dr[0] = rdr0();
2514		dbregs->dr[1] = rdr1();
2515		dbregs->dr[2] = rdr2();
2516		dbregs->dr[3] = rdr3();
2517		dbregs->dr[4] = rdr4();
2518		dbregs->dr[5] = rdr5();
2519		dbregs->dr[6] = rdr6();
2520		dbregs->dr[7] = rdr7();
2521	} else {
2522		pcb = td->td_pcb;
2523		dbregs->dr[0] = pcb->pcb_dr0;
2524		dbregs->dr[1] = pcb->pcb_dr1;
2525		dbregs->dr[2] = pcb->pcb_dr2;
2526		dbregs->dr[3] = pcb->pcb_dr3;
2527		dbregs->dr[4] = 0;
2528		dbregs->dr[5] = 0;
2529		dbregs->dr[6] = pcb->pcb_dr6;
2530		dbregs->dr[7] = pcb->pcb_dr7;
2531	}
2532	return (0);
2533}
2534
2535int
2536set_dbregs(struct thread *td, struct dbreg *dbregs)
2537{
2538	struct pcb *pcb;
2539	int i;
2540	u_int32_t mask1, mask2;
2541
2542	if (td == NULL) {
2543		load_dr0(dbregs->dr[0]);
2544		load_dr1(dbregs->dr[1]);
2545		load_dr2(dbregs->dr[2]);
2546		load_dr3(dbregs->dr[3]);
2547		load_dr4(dbregs->dr[4]);
2548		load_dr5(dbregs->dr[5]);
2549		load_dr6(dbregs->dr[6]);
2550		load_dr7(dbregs->dr[7]);
2551	} else {
2552		/*
2553		 * Don't let an illegal value for dr7 get set.	Specifically,
2554		 * check for undefined settings.  Setting these bit patterns
2555		 * result in undefined behaviour and can lead to an unexpected
2556		 * TRCTRAP.
2557		 */
2558		for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2559		     i++, mask1 <<= 2, mask2 <<= 2)
2560			if ((dbregs->dr[7] & mask1) == mask2)
2561				return (EINVAL);
2562
2563		pcb = td->td_pcb;
2564
2565		/*
2566		 * Don't let a process set a breakpoint that is not within the
2567		 * process's address space.  If a process could do this, it
2568		 * could halt the system by setting a breakpoint in the kernel
2569		 * (if ddb was enabled).  Thus, we need to check to make sure
2570		 * that no breakpoints are being enabled for addresses outside
2571		 * process's address space, unless, perhaps, we were called by
2572		 * uid 0.
2573		 *
2574		 * XXX - what about when the watched area of the user's
2575		 * address space is written into from within the kernel
2576		 * ... wouldn't that still cause a breakpoint to be generated
2577		 * from within kernel mode?
2578		 */
2579
2580		if (suser(td) != 0) {
2581			if (dbregs->dr[7] & 0x3) {
2582				/* dr0 is enabled */
2583				if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2584					return (EINVAL);
2585			}
2586
2587			if (dbregs->dr[7] & (0x3<<2)) {
2588				/* dr1 is enabled */
2589				if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2590					return (EINVAL);
2591			}
2592
2593			if (dbregs->dr[7] & (0x3<<4)) {
2594				/* dr2 is enabled */
2595				if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2596					return (EINVAL);
2597			}
2598
2599			if (dbregs->dr[7] & (0x3<<6)) {
2600				/* dr3 is enabled */
2601				if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2602					return (EINVAL);
2603			}
2604		}
2605
2606		pcb->pcb_dr0 = dbregs->dr[0];
2607		pcb->pcb_dr1 = dbregs->dr[1];
2608		pcb->pcb_dr2 = dbregs->dr[2];
2609		pcb->pcb_dr3 = dbregs->dr[3];
2610		pcb->pcb_dr6 = dbregs->dr[6];
2611		pcb->pcb_dr7 = dbregs->dr[7];
2612
2613		pcb->pcb_flags |= PCB_DBREGS;
2614	}
2615
2616	return (0);
2617}
2618
2619/*
2620 * Return > 0 if a hardware breakpoint has been hit, and the
2621 * breakpoint was in user space.  Return 0, otherwise.
2622 */
2623int
2624user_dbreg_trap(void)
2625{
2626        u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2627        u_int32_t bp;       /* breakpoint bits extracted from dr6 */
2628        int nbp;            /* number of breakpoints that triggered */
2629        caddr_t addr[4];    /* breakpoint addresses */
2630        int i;
2631
2632        dr7 = rdr7();
2633        if ((dr7 & 0x000000ff) == 0) {
2634                /*
2635                 * all GE and LE bits in the dr7 register are zero,
2636                 * thus the trap couldn't have been caused by the
2637                 * hardware debug registers
2638                 */
2639                return 0;
2640        }
2641
2642        nbp = 0;
2643        dr6 = rdr6();
2644        bp = dr6 & 0x0000000f;
2645
2646        if (!bp) {
2647                /*
2648                 * None of the breakpoint bits are set meaning this
2649                 * trap was not caused by any of the debug registers
2650                 */
2651                return 0;
2652        }
2653
2654        /*
2655         * at least one of the breakpoints were hit, check to see
2656         * which ones and if any of them are user space addresses
2657         */
2658
2659        if (bp & 0x01) {
2660                addr[nbp++] = (caddr_t)rdr0();
2661        }
2662        if (bp & 0x02) {
2663                addr[nbp++] = (caddr_t)rdr1();
2664        }
2665        if (bp & 0x04) {
2666                addr[nbp++] = (caddr_t)rdr2();
2667        }
2668        if (bp & 0x08) {
2669                addr[nbp++] = (caddr_t)rdr3();
2670        }
2671
2672        for (i=0; i<nbp; i++) {
2673                if (addr[i] <
2674                    (caddr_t)VM_MAXUSER_ADDRESS) {
2675                        /*
2676                         * addr[i] is in user space
2677                         */
2678                        return nbp;
2679                }
2680        }
2681
2682        /*
2683         * None of the breakpoints are in user space.
2684         */
2685        return 0;
2686}
2687
2688
2689#ifndef DDB
2690void
2691Debugger(const char *msg)
2692{
2693	printf("Debugger(\"%s\") called.\n", msg);
2694}
2695#endif /* no DDB */
2696
2697#ifdef DDB
2698
2699/*
2700 * Provide inb() and outb() as functions.  They are normally only
2701 * available as macros calling inlined functions, thus cannot be
2702 * called inside DDB.
2703 *
2704 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2705 */
2706
2707#undef inb
2708#undef outb
2709
2710/* silence compiler warnings */
2711u_char inb(u_int);
2712void outb(u_int, u_char);
2713
2714u_char
2715inb(u_int port)
2716{
2717	u_char	data;
2718	/*
2719	 * We use %%dx and not %1 here because i/o is done at %dx and not at
2720	 * %edx, while gcc generates inferior code (movw instead of movl)
2721	 * if we tell it to load (u_short) port.
2722	 */
2723	__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2724	return (data);
2725}
2726
2727void
2728outb(u_int port, u_char data)
2729{
2730	u_char	al;
2731	/*
2732	 * Use an unnecessary assignment to help gcc's register allocator.
2733	 * This make a large difference for gcc-1.40 and a tiny difference
2734	 * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
2735	 * best results.  gcc-2.6.0 can't handle this.
2736	 */
2737	al = data;
2738	__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2739}
2740
2741#endif /* DDB */
2742