Copyright (c) 2014 Luiz Otavio O Souza <loos@freebsd.org>
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$FreeBSD: releng/11.0/share/man/man4/man4.arm/ti_adc.4 267938 2014-06-26 21:46:14Z bapt $
.Dd June 1, 2014 .Dt TI_ADC 4 .Os .Sh NAME .Nm ti_adc .Nd TI AM3XXX analog to digital converter driver .Sh SYNOPSIS .Cd "device ti_adc" .Sh DESCRIPTION The .Nm driver provides access to the AIN (analog inputs) on am3xxx SoCs.
p It provides raw readings of the converted values for each analog inputs.
p The access to .Nm data is made via the .Xr sysctl 8 interface: d -literal dev.ti_adc.0.%desc: TI ADC controller dev.ti_adc.0.%driver: ti_adc dev.ti_adc.0.%pnpinfo: name=adc@44E0D000 compat=ti,adc dev.ti_adc.0.%parent: simplebus0 dev.ti_adc.0.clockdiv: 2400 dev.ti_adc.0.ain.0.enable: 0 dev.ti_adc.0.ain.0.open_delay: 0 dev.ti_adc.0.ain.0.samples_avg: 0 dev.ti_adc.0.ain.0.input: 0 dev.ti_adc.0.ain.1.enable: 0 dev.ti_adc.0.ain.1.open_delay: 0 dev.ti_adc.0.ain.1.samples_avg: 0 dev.ti_adc.0.ain.1.input: 0 dev.ti_adc.0.ain.2.enable: 0 dev.ti_adc.0.ain.2.open_delay: 0 dev.ti_adc.0.ain.2.samples_avg: 0 dev.ti_adc.0.ain.2.input: 0 dev.ti_adc.0.ain.3.enable: 0 dev.ti_adc.0.ain.3.open_delay: 0 dev.ti_adc.0.ain.3.samples_avg: 0 dev.ti_adc.0.ain.3.input: 0 dev.ti_adc.0.ain.4.enable: 0 dev.ti_adc.0.ain.4.open_delay: 0 dev.ti_adc.0.ain.4.samples_avg: 0 dev.ti_adc.0.ain.4.input: 0 dev.ti_adc.0.ain.5.enable: 0 dev.ti_adc.0.ain.5.open_delay: 0 dev.ti_adc.0.ain.5.samples_avg: 0 dev.ti_adc.0.ain.5.input: 0 dev.ti_adc.0.ain.6.enable: 1 dev.ti_adc.0.ain.6.open_delay: 0 dev.ti_adc.0.ain.6.samples_avg: 4 dev.ti_adc.0.ain.6.input: 2308 dev.ti_adc.0.ain.7.enable: 1 dev.ti_adc.0.ain.7.open_delay: 0 dev.ti_adc.0.ain.7.samples_avg: 0 dev.ti_adc.0.ain.7.input: 3812 .Ed
p On Beaglebone-black the analog input 7 is connected to the 3V3B rail through a voltage divisor (2:1). The 3V3B voltage rail comes from the TL5209 LDO regulator which is limited to 500mA maximum.
p Global settings: l -tag -width ".Va dev.ti_adc.0.clockdiv" t Va dev.ti_adc.0.clockdiv Sets the ADC clock prescaler. The minimum value is 10 and the maximum is 65535. The ADC clock is based on CLK_M_OSC (24Mhz) / clockdiv. This gives a maximum of ~2.4Mhz for the ADC clock and ~10Khz for the default setting (clockdiv = 2400). .El
p Settings per input: l -tag -width ".Va dev.ti_adc.0.ain.%d.samples_avg" t Va dev.ti_adc.0.ain.%d.enable Enable the conversion for the input. Each input should be individually enabled before it can be used. When all the inputs are disabled, the ADC is turned off. t Va dev.ti_adc.0.ain.%d.open_delay Sets the number of ADC clock cycles to wait after applying the input configuration and before start the ADC conversion. t Va dev.ti_adc.0.ain.%d.samples_avg Sets the number of samples average used on each input, it can be set to 0 (no samples average), 2, 4, 8, or 16. t Va dev.ti_adc.0.ain.%d.input Is the converted raw value of the voltage applied on the analog input. It is made of a 12 bit value (0 ~ 4095). .El .Sh SEE ALSO .Xr sysctl 8 .Sh HISTORY The .Nm driver first appeared in .Fx 10.1 . .Sh AUTHORS .An -nosplit The driver and this manual page was written by .An Luiz Otavio O Souza Aq Mt loos@FreeBSD.org .