143932Sdcs/* $NetBSD: memcmp.S,v 1.3 2003/10/14 07:51:45 scw Exp $ */ 243932Sdcs 343932Sdcs/* 443932Sdcs * Copyright 2003 Wasabi Systems, Inc. 543932Sdcs * All rights reserved. 643932Sdcs * 743932Sdcs * Written by Steve C. Woodford for Wasabi Systems, Inc. 843932Sdcs * 943932Sdcs * Redistribution and use in source and binary forms, with or without 1043932Sdcs * modification, are permitted provided that the following conditions 1143932Sdcs * are met: 1243932Sdcs * 1. Redistributions of source code must retain the above copyright 1343932Sdcs * notice, this list of conditions and the following disclaimer. 1443932Sdcs * 2. Redistributions in binary form must reproduce the above copyright 1543932Sdcs * notice, this list of conditions and the following disclaimer in the 1643932Sdcs * documentation and/or other materials provided with the distribution. 1743932Sdcs * 3. All advertising materials mentioning features or use of this software 1843932Sdcs * must display the following acknowledgement: 1943932Sdcs * This product includes software developed for the NetBSD Project by 2043932Sdcs * Wasabi Systems, Inc. 2143932Sdcs * 4. The name of Wasabi Systems, Inc. may not be used to endorse 2243932Sdcs * or promote products derived from this software without specific prior 2343932Sdcs * written permission. 2443932Sdcs * 2543932Sdcs * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 2643932Sdcs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2743932Sdcs * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2843932Sdcs * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 2943932Sdcs * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 3043932Sdcs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3143932Sdcs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3243932Sdcs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3343932Sdcs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3443932Sdcs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3550476Speter * POSSIBILITY OF SUCH DAMAGE. 3643932Sdcs */ 3743932Sdcs/* 3843932Sdcs * Copyright (c) 2002 ARM Ltd 3943932Sdcs * All rights reserved. 4043932Sdcs * 4143932Sdcs * Redistribution and use in source and binary forms, with or without 4243932Sdcs * modification, are permitted provided that the following conditions 4343932Sdcs * are met: 4443932Sdcs * 1. Redistributions of source code must retain the above copyright 4543932Sdcs * notice, this list of conditions and the following disclaimer. 4643932Sdcs * 2. Redistributions in binary form must reproduce the above copyright 4743932Sdcs * notice, this list of conditions and the following disclaimer in the 4885451Speter * documentation and/or other materials provided with the distribution. 4943932Sdcs * 3. The name of the company may not be used to endorse or promote 5043932Sdcs * products derived from this software without specific prior written 5143932Sdcs * permission. 5243932Sdcs * 5343932Sdcs * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED 5443932Sdcs * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 5543932Sdcs * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 5643932Sdcs * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 5743932Sdcs * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 5843932Sdcs * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 5943932Sdcs * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 6043932Sdcs * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 61192760Sattilio * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 6243932Sdcs * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 6343932Sdcs */ 6443932Sdcs 6543932Sdcs#include <machine/asm.h> 6643932Sdcs 6743932Sdcs__FBSDID("$FreeBSD: releng/11.0/lib/libc/arm/string/memcmp.S 288373 2015-09-29 16:09:58Z kib $"); 6843932Sdcs 6943932Sdcs.syntax unified 7043932Sdcs 7143932SdcsENTRY(memcmp) 7243932Sdcs mov ip, r0 7343932Sdcs#if defined(_KERNEL) && !defined(_STANDALONE) 7443932Sdcs cmp r2, #0x06 7543932Sdcs beq .Lmemcmp_6bytes 7643932Sdcs#endif 77192760Sattilio mov r0, #0x00 78 79 /* Are both addresses aligned the same way? */ 80 cmp r2, #0x00 81 eorsne r3, ip, r1 82 RETeq /* len == 0, or same addresses! */ 83 tst r3, #0x03 84 subne r2, r2, #0x01 85 bne .Lmemcmp_bytewise2 /* Badly aligned. Do it the slow way */ 86 87 /* Word-align the addresses, if necessary */ 88 sub r3, r1, #0x05 89 ands r3, r3, #0x03 90 add r3, r3, r3, lsl #1 91 addne pc, pc, r3, lsl #3 92 nop 93 94 /* Compare up to 3 bytes */ 95 ldrb r0, [ip], #0x01 96 ldrb r3, [r1], #0x01 97 subs r0, r0, r3 98 RETne 99 subs r2, r2, #0x01 100 RETeq 101 102 /* Compare up to 2 bytes */ 103 ldrb r0, [ip], #0x01 104 ldrb r3, [r1], #0x01 105 subs r0, r0, r3 106 RETne 107 subs r2, r2, #0x01 108 RETeq 109 110 /* Compare 1 byte */ 111 ldrb r0, [ip], #0x01 112 ldrb r3, [r1], #0x01 113 subs r0, r0, r3 114 RETne 115 subs r2, r2, #0x01 116 RETeq 117 118 /* Compare 4 bytes at a time, if possible */ 119 subs r2, r2, #0x04 120 bcc .Lmemcmp_bytewise 121.Lmemcmp_word_aligned: 122 ldr r0, [ip], #0x04 123 ldr r3, [r1], #0x04 124 subs r2, r2, #0x04 125 cmpcs r0, r3 126 beq .Lmemcmp_word_aligned 127 sub r0, r0, r3 128 129 /* Correct for extra subtraction, and check if done */ 130 adds r2, r2, #0x04 131 cmpeq r0, #0x00 /* If done, did all bytes match? */ 132 RETeq /* Yup. Just return */ 133 134 /* Re-do the final word byte-wise */ 135 sub ip, ip, #0x04 136 sub r1, r1, #0x04 137 138.Lmemcmp_bytewise: 139 add r2, r2, #0x03 140.Lmemcmp_bytewise2: 141 ldrb r0, [ip], #0x01 142 ldrb r3, [r1], #0x01 143 subs r2, r2, #0x01 144 cmpcs r0, r3 145 beq .Lmemcmp_bytewise2 146 sub r0, r0, r3 147 RET 148 149#if defined(_KERNEL) && !defined(_STANDALONE) 150 /* 151 * 6 byte compares are very common, thanks to the network stack. 152 * This code is hand-scheduled to reduce the number of stalls for 153 * load results. Everything else being equal, this will be ~32% 154 * faster than a byte-wise memcmp. 155 */ 156 .align 5 157.Lmemcmp_6bytes: 158 ldrb r3, [r1, #0x00] /* r3 = b2#0 */ 159 ldrb r0, [ip, #0x00] /* r0 = b1#0 */ 160 ldrb r2, [r1, #0x01] /* r2 = b2#1 */ 161 subs r0, r0, r3 /* r0 = b1#0 - b2#0 */ 162 ldreqb r3, [ip, #0x01] /* r3 = b1#1 */ 163 RETne /* Return if mismatch on #0 */ 164 subs r0, r3, r2 /* r0 = b1#1 - b2#1 */ 165 ldreqb r3, [r1, #0x02] /* r3 = b2#2 */ 166 ldreqb r0, [ip, #0x02] /* r0 = b1#2 */ 167 RETne /* Return if mismatch on #1 */ 168 ldrb r2, [r1, #0x03] /* r2 = b2#3 */ 169 subs r0, r0, r3 /* r0 = b1#2 - b2#2 */ 170 ldreqb r3, [ip, #0x03] /* r3 = b1#3 */ 171 RETne /* Return if mismatch on #2 */ 172 subs r0, r3, r2 /* r0 = b1#3 - b2#3 */ 173 ldreqb r3, [r1, #0x04] /* r3 = b2#4 */ 174 ldreqb r0, [ip, #0x04] /* r0 = b1#4 */ 175 RETne /* Return if mismatch on #3 */ 176 ldrb r2, [r1, #0x05] /* r2 = b2#5 */ 177 subs r0, r0, r3 /* r0 = b1#4 - b2#4 */ 178 ldreqb r3, [ip, #0x05] /* r3 = b1#5 */ 179 RETne /* Return if mismatch on #4 */ 180 sub r0, r3, r2 /* r0 = b1#5 - b2#5 */ 181 RET 182#endif 183END(memcmp) 184 185 .section .note.GNU-stack,"",%progbits 186