InstrInfoEmitter.cpp revision 261991
1122394Sharti//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===// 2122394Sharti// 3122394Sharti// The LLVM Compiler Infrastructure 4122394Sharti// 5122394Sharti// This file is distributed under the University of Illinois Open Source 6122394Sharti// License. See LICENSE.TXT for details. 7133211Sharti// 8133211Sharti//===----------------------------------------------------------------------===// 9133211Sharti// 10133211Sharti// This tablegen backend is responsible for emitting a description of the target 11133211Sharti// instruction set for the code generator. 12133211Sharti// 13122394Sharti//===----------------------------------------------------------------------===// 14122394Sharti 15122394Sharti 16133211Sharti#include "CodeGenDAGPatterns.h" 17133211Sharti#include "CodeGenSchedule.h" 18133211Sharti#include "CodeGenTarget.h" 19133211Sharti#include "SequenceToOffsetTable.h" 20133211Sharti#include "TableGenBackends.h" 21133211Sharti#include "llvm/ADT/StringExtras.h" 22133211Sharti#include "llvm/TableGen/Error.h" 23133211Sharti#include "llvm/TableGen/Record.h" 24133211Sharti#include "llvm/TableGen/TableGenBackend.h" 25133211Sharti#include <algorithm> 26133211Sharti#include <cstdio> 27133211Sharti#include <map> 28122394Sharti#include <vector> 29156066Shartiusing namespace llvm; 30122394Sharti 31122394Shartinamespace { 32122394Sharticlass InstrInfoEmitter { 33122394Sharti RecordKeeper &Records; 34122394Sharti CodeGenDAGPatterns CDP; 35122394Sharti const CodeGenSchedModels &SchedModels; 36122394Sharti 37122394Shartipublic: 38122394Sharti InstrInfoEmitter(RecordKeeper &R): 39122394Sharti Records(R), CDP(R), SchedModels(CDP.getTargetInfo().getSchedModels()) {} 40122394Sharti 41122394Sharti // run - Output the instruction set description. 42122394Sharti void run(raw_ostream &OS); 43122394Sharti 44133211Shartiprivate: 45122394Sharti void emitEnums(raw_ostream &OS); 46122394Sharti 47122394Sharti typedef std::map<std::vector<std::string>, unsigned> OperandInfoMapTy; 48122394Sharti 49133211Sharti /// The keys of this map are maps which have OpName enum values as their keys 50122394Sharti /// and instruction operand indices as their values. The values of this map 51122394Sharti /// are lists of instruction names. 52122394Sharti typedef std::map<std::map<unsigned, unsigned>, 53122394Sharti std::vector<std::string> > OpNameMapTy; 54122394Sharti typedef std::map<std::string, unsigned>::iterator StrUintMapIter; 55122394Sharti void emitRecord(const CodeGenInstruction &Inst, unsigned Num, 56122394Sharti Record *InstrInfo, 57122394Sharti std::map<std::vector<Record*>, unsigned> &EL, 58122394Sharti const OperandInfoMapTy &OpInfo, 59122394Sharti raw_ostream &OS); 60122394Sharti void emitOperandTypesEnum(raw_ostream &OS, const CodeGenTarget &Target); 61122394Sharti void initOperandMapData( 62122394Sharti const std::vector<const CodeGenInstruction *> NumberedInstructions, 63122394Sharti const std::string &Namespace, 64122394Sharti std::map<std::string, unsigned> &Operands, 65122394Sharti OpNameMapTy &OperandMap); 66122394Sharti void emitOperandNameMappings(raw_ostream &OS, const CodeGenTarget &Target, 67122394Sharti const std::vector<const CodeGenInstruction*> &NumberedInstructions); 68122394Sharti 69122394Sharti // Operand information. 70122394Sharti void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs); 71122394Sharti std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst); 72122394Sharti}; 73122394Sharti} // End anonymous namespace 74122394Sharti 75122394Shartistatic void PrintDefList(const std::vector<Record*> &Uses, 76122394Sharti unsigned Num, raw_ostream &OS) { 77122394Sharti OS << "static const uint16_t ImplicitList" << Num << "[] = { "; 78122394Sharti for (unsigned i = 0, e = Uses.size(); i != e; ++i) 79122394Sharti OS << getQualifiedName(Uses[i]) << ", "; 80122394Sharti OS << "0 };\n"; 81122394Sharti} 82122394Sharti 83122394Sharti//===----------------------------------------------------------------------===// 84122394Sharti// Operand Info Emission. 85122394Sharti//===----------------------------------------------------------------------===// 86122394Sharti 87122394Shartistd::vector<std::string> 88122394ShartiInstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) { 89122394Sharti std::vector<std::string> Result; 90122394Sharti 91122394Sharti for (unsigned i = 0, e = Inst.Operands.size(); i != e; ++i) { 92122394Sharti // Handle aggregate operands and normal operands the same way by expanding 93122394Sharti // either case into a list of operands for this op. 94122394Sharti std::vector<CGIOperandList::OperandInfo> OperandList; 95122394Sharti 96122394Sharti // This might be a multiple operand thing. Targets like X86 have 97122394Sharti // registers in their multi-operand operands. It may also be an anonymous 98122394Sharti // operand, which has a single operand, but no declared class for the 99122394Sharti // operand. 100122394Sharti DagInit *MIOI = Inst.Operands[i].MIOperandInfo; 101122394Sharti 102122394Sharti if (!MIOI || MIOI->getNumArgs() == 0) { 103122394Sharti // Single, anonymous, operand. 104122394Sharti OperandList.push_back(Inst.Operands[i]); 105122394Sharti } else { 106122394Sharti for (unsigned j = 0, e = Inst.Operands[i].MINumOperands; j != e; ++j) { 107122394Sharti OperandList.push_back(Inst.Operands[i]); 108122394Sharti 109122394Sharti Record *OpR = cast<DefInit>(MIOI->getArg(j))->getDef(); 110122394Sharti OperandList.back().Rec = OpR; 111122394Sharti } 112122394Sharti } 113122394Sharti 114122394Sharti for (unsigned j = 0, e = OperandList.size(); j != e; ++j) { 115122394Sharti Record *OpR = OperandList[j].Rec; 116122394Sharti std::string Res; 117122394Sharti 118122394Sharti if (OpR->isSubClassOf("RegisterOperand")) 119122394Sharti OpR = OpR->getValueAsDef("RegClass"); 120122394Sharti if (OpR->isSubClassOf("RegisterClass")) 121122394Sharti Res += getQualifiedName(OpR) + "RegClassID, "; 122122394Sharti else if (OpR->isSubClassOf("PointerLikeRegClass")) 123122394Sharti Res += utostr(OpR->getValueAsInt("RegClassKind")) + ", "; 124122394Sharti else 125122394Sharti // -1 means the operand does not have a fixed register class. 126122394Sharti Res += "-1, "; 127122394Sharti 128122394Sharti // Fill in applicable flags. 129122394Sharti Res += "0"; 130122394Sharti 131128237Sharti // Ptr value whose register class is resolved via callback. 132128237Sharti if (OpR->isSubClassOf("PointerLikeRegClass")) 133128237Sharti Res += "|(1<<MCOI::LookupPtrRegClass)"; 134122394Sharti 135122394Sharti // Predicate operands. Check to see if the original unexpanded operand 136122394Sharti // was of type PredicateOp. 137122394Sharti if (Inst.Operands[i].Rec->isSubClassOf("PredicateOp")) 138146525Sharti Res += "|(1<<MCOI::Predicate)"; 139146525Sharti 140146525Sharti // Optional def operands. Check to see if the original unexpanded operand 141146525Sharti // was of type OptionalDefOperand. 142133211Sharti if (Inst.Operands[i].Rec->isSubClassOf("OptionalDefOperand")) 143122394Sharti Res += "|(1<<MCOI::OptionalDef)"; 144122394Sharti 145146525Sharti // Fill in operand type. 146122394Sharti Res += ", MCOI::"; 147122394Sharti assert(!Inst.Operands[i].OperandType.empty() && "Invalid operand type."); 148146525Sharti Res += Inst.Operands[i].OperandType; 149122394Sharti 150122394Sharti // Fill in constraint info. 151122394Sharti Res += ", "; 152122394Sharti 153122394Sharti const CGIOperandList::ConstraintInfo &Constraint = 154122394Sharti Inst.Operands[i].Constraints[j]; 155122394Sharti if (Constraint.isNone()) 156122394Sharti Res += "0"; 157122394Sharti else if (Constraint.isEarlyClobber()) 158122394Sharti Res += "(1 << MCOI::EARLY_CLOBBER)"; 159122394Sharti else { 160122394Sharti assert(Constraint.isTied()); 161122394Sharti Res += "((" + utostr(Constraint.getTiedOperand()) + 162122394Sharti " << 16) | (1 << MCOI::TIED_TO))"; 163122394Sharti } 164122394Sharti 165122394Sharti Result.push_back(Res); 166122394Sharti } 167122394Sharti } 168122394Sharti 169122394Sharti return Result; 170122394Sharti} 171122394Sharti 172122394Shartivoid InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS, 173122394Sharti OperandInfoMapTy &OperandInfoIDs) { 174122394Sharti // ID #0 is for no operand info. 175122394Sharti unsigned OperandListNum = 0; 176122394Sharti OperandInfoIDs[std::vector<std::string>()] = ++OperandListNum; 177122394Sharti 178122394Sharti OS << "\n"; 179122394Sharti const CodeGenTarget &Target = CDP.getTargetInfo(); 180122394Sharti for (CodeGenTarget::inst_iterator II = Target.inst_begin(), 181122394Sharti E = Target.inst_end(); II != E; ++II) { 182122394Sharti std::vector<std::string> OperandInfo = GetOperandInfo(**II); 183122394Sharti unsigned &N = OperandInfoIDs[OperandInfo]; 184122394Sharti if (N != 0) continue; 185122394Sharti 186122394Sharti N = ++OperandListNum; 187122394Sharti OS << "static const MCOperandInfo OperandInfo" << N << "[] = { "; 188122394Sharti for (unsigned i = 0, e = OperandInfo.size(); i != e; ++i) 189122394Sharti OS << "{ " << OperandInfo[i] << " }, "; 190122394Sharti OS << "};\n"; 191122394Sharti } 192122394Sharti} 193122394Sharti 194122394Sharti 195122394Sharti/// Initialize data structures for generating operand name mappings. 196122394Sharti/// 197122394Sharti/// \param Operands [out] A map used to generate the OpName enum with operand 198122394Sharti/// names as its keys and operand enum values as its values. 199122394Sharti/// \param OperandMap [out] A map for representing the operand name mappings for 200122394Sharti/// each instructions. This is used to generate the OperandMap table as 201122394Sharti/// well as the getNamedOperandIdx() function. 202122394Shartivoid InstrInfoEmitter::initOperandMapData( 203122394Sharti const std::vector<const CodeGenInstruction *> NumberedInstructions, 204122394Sharti const std::string &Namespace, 205122394Sharti std::map<std::string, unsigned> &Operands, 206122394Sharti OpNameMapTy &OperandMap) { 207122394Sharti 208122394Sharti unsigned NumOperands = 0; 209122394Sharti for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { 210122394Sharti const CodeGenInstruction *Inst = NumberedInstructions[i]; 211122394Sharti if (!Inst->TheDef->getValueAsBit("UseNamedOperandTable")) { 212122394Sharti continue; 213122394Sharti } 214122394Sharti std::map<unsigned, unsigned> OpList; 215122394Sharti for (unsigned j = 0, je = Inst->Operands.size(); j != je; ++j) { 216122394Sharti const CGIOperandList::OperandInfo &Info = Inst->Operands[j]; 217122394Sharti StrUintMapIter I = Operands.find(Info.Name); 218122394Sharti 219122394Sharti if (I == Operands.end()) { 220122394Sharti I = Operands.insert(Operands.begin(), 221122394Sharti std::pair<std::string, unsigned>(Info.Name, NumOperands++)); 222122394Sharti } 223122394Sharti OpList[I->second] = Info.MIOperandNo; 224122394Sharti } 225122394Sharti OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName()); 226122394Sharti } 227122394Sharti} 228122394Sharti 229122394Sharti/// Generate a table and function for looking up the indices of operands by 230122394Sharti/// name. 231122394Sharti/// 232122394Sharti/// This code generates: 233122394Sharti/// - An enum in the llvm::TargetNamespace::OpName namespace, with one entry 234122394Sharti/// for each operand name. 235122394Sharti/// - A 2-dimensional table called OperandMap for mapping OpName enum values to 236122394Sharti/// operand indices. 237122394Sharti/// - A function called getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) 238122394Sharti/// for looking up the operand index for an instruction, given a value from 239122394Sharti/// OpName enum 240122394Shartivoid InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS, 241122394Sharti const CodeGenTarget &Target, 242122394Sharti const std::vector<const CodeGenInstruction*> &NumberedInstructions) { 243122394Sharti 244122394Sharti const std::string &Namespace = Target.getInstNamespace(); 245122394Sharti std::string OpNameNS = "OpName"; 246122394Sharti // Map of operand names to their enumeration value. This will be used to 247122394Sharti // generate the OpName enum. 248122394Sharti std::map<std::string, unsigned> Operands; 249122394Sharti OpNameMapTy OperandMap; 250122394Sharti 251122394Sharti initOperandMapData(NumberedInstructions, Namespace, Operands, OperandMap); 252122394Sharti 253122394Sharti OS << "#ifdef GET_INSTRINFO_OPERAND_ENUM\n"; 254122394Sharti OS << "#undef GET_INSTRINFO_OPERAND_ENUM\n"; 255122394Sharti OS << "namespace llvm {"; 256122394Sharti OS << "namespace " << Namespace << " {\n"; 257122394Sharti OS << "namespace " << OpNameNS << " { \n"; 258122394Sharti OS << "enum {\n"; 259122394Sharti for (StrUintMapIter i = Operands.begin(), e = Operands.end(); i != e; ++i) 260122394Sharti OS << " " << i->first << " = " << i->second << ",\n"; 261122394Sharti 262122394Sharti OS << "OPERAND_LAST"; 263122394Sharti OS << "\n};\n"; 264122394Sharti OS << "} // End namespace OpName\n"; 265122394Sharti OS << "} // End namespace " << Namespace << "\n"; 266122394Sharti OS << "} // End namespace llvm\n"; 267122394Sharti OS << "#endif //GET_INSTRINFO_OPERAND_ENUM\n"; 268122394Sharti 269122394Sharti OS << "#ifdef GET_INSTRINFO_NAMED_OPS\n"; 270122394Sharti OS << "#undef GET_INSTRINFO_NAMED_OPS\n"; 271122394Sharti OS << "namespace llvm {"; 272122394Sharti OS << "namespace " << Namespace << " {\n"; 273122394Sharti OS << "int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {\n"; 274122394Sharti if (!Operands.empty()) { 275122394Sharti OS << " static const int16_t OperandMap [][" << Operands.size() 276122394Sharti << "] = {\n"; 277122394Sharti for (OpNameMapTy::iterator i = OperandMap.begin(), e = OperandMap.end(); 278122394Sharti i != e; ++i) { 279122394Sharti const std::map<unsigned, unsigned> &OpList = i->first; 280122394Sharti OS << "{"; 281122394Sharti 282122394Sharti // Emit a row of the OperandMap table 283151970Sharti for (unsigned ii = 0, ie = Operands.size(); ii != ie; ++ii) 284151970Sharti OS << (OpList.count(ii) == 0 ? -1 : (int)OpList.find(ii)->second) 285151970Sharti << ", "; 286151970Sharti 287151970Sharti OS << "},\n"; 288151970Sharti } 289151970Sharti OS << "};\n"; 290151970Sharti 291151970Sharti OS << " switch(Opcode) {\n"; 292151970Sharti unsigned TableIndex = 0; 293151970Sharti for (OpNameMapTy::iterator i = OperandMap.begin(), e = OperandMap.end(); 294151970Sharti i != e; ++i) { 295151970Sharti std::vector<std::string> &OpcodeList = i->second; 296151970Sharti 297151970Sharti for (unsigned ii = 0, ie = OpcodeList.size(); ii != ie; ++ii) 298151970Sharti OS << " case " << OpcodeList[ii] << ":\n"; 299122394Sharti 300122394Sharti OS << " return OperandMap[" << TableIndex++ << "][NamedIdx];\n"; 301122394Sharti } 302122394Sharti OS << " default: return -1;\n"; 303122394Sharti OS << " }\n"; 304122394Sharti } else { 305122394Sharti // There are no operands, so no need to emit anything 306122394Sharti OS << " return -1;\n"; 307122394Sharti } 308122394Sharti OS << "}\n"; 309122394Sharti OS << "} // End namespace " << Namespace << "\n"; 310122394Sharti OS << "} // End namespace llvm\n"; 311122394Sharti OS << "#endif //GET_INSTRINFO_NAMED_OPS\n"; 312122394Sharti 313122394Sharti} 314122394Sharti 315122394Sharti/// Generate an enum for all the operand types for this target, under the 316122394Sharti/// llvm::TargetNamespace::OpTypes namespace. 317122394Sharti/// Operand types are all definitions derived of the Operand Target.td class. 318122394Shartivoid InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS, 319122394Sharti const CodeGenTarget &Target) { 320122394Sharti 321122394Sharti const std::string &Namespace = Target.getInstNamespace(); 322122394Sharti std::vector<Record *> Operands = Records.getAllDerivedDefinitions("Operand"); 323122394Sharti 324122394Sharti OS << "\n#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM\n"; 325122394Sharti OS << "#undef GET_INSTRINFO_OPERAND_TYPES_ENUM\n"; 326122394Sharti OS << "namespace llvm {"; 327122394Sharti OS << "namespace " << Namespace << " {\n"; 328122394Sharti OS << "namespace OpTypes { \n"; 329122394Sharti OS << "enum OperandType {\n"; 330122394Sharti 331122394Sharti for (unsigned oi = 0, oe = Operands.size(); oi != oe; ++oi) { 332122394Sharti if (!Operands[oi]->isAnonymous()) 333122394Sharti OS << " " << Operands[oi]->getName() << " = " << oi << ",\n"; 334122394Sharti } 335122394Sharti 336122394Sharti OS << " OPERAND_TYPE_LIST_END" << "\n};\n"; 337122394Sharti OS << "} // End namespace OpTypes\n"; 338122394Sharti OS << "} // End namespace " << Namespace << "\n"; 339122394Sharti OS << "} // End namespace llvm\n"; 340122394Sharti OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n"; 341122394Sharti} 342122394Sharti 343122394Sharti//===----------------------------------------------------------------------===// 344122394Sharti// Main Output. 345122394Sharti//===----------------------------------------------------------------------===// 346122394Sharti 347122394Sharti// run - Emit the main instruction description records for the target... 348122394Shartivoid InstrInfoEmitter::run(raw_ostream &OS) { 349122394Sharti emitSourceFileHeader("Target Instruction Enum Values", OS); 350122394Sharti emitEnums(OS); 351122394Sharti 352122394Sharti emitSourceFileHeader("Target Instruction Descriptors", OS); 353122394Sharti 354122394Sharti OS << "\n#ifdef GET_INSTRINFO_MC_DESC\n"; 355122394Sharti OS << "#undef GET_INSTRINFO_MC_DESC\n"; 356122394Sharti 357142810Sharti OS << "namespace llvm {\n\n"; 358122394Sharti 359122394Sharti CodeGenTarget &Target = CDP.getTargetInfo(); 360122394Sharti const std::string &TargetName = Target.getName(); 361122394Sharti Record *InstrInfo = Target.getInstructionSet(); 362122394Sharti 363122394Sharti // Keep track of all of the def lists we have emitted already. 364122394Sharti std::map<std::vector<Record*>, unsigned> EmittedLists; 365122394Sharti unsigned ListNumber = 0; 366122394Sharti 367122394Sharti // Emit all of the instruction's implicit uses and defs. 368122394Sharti for (CodeGenTarget::inst_iterator II = Target.inst_begin(), 369122394Sharti E = Target.inst_end(); II != E; ++II) { 370122394Sharti Record *Inst = (*II)->TheDef; 371122394Sharti std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses"); 372122394Sharti if (!Uses.empty()) { 373122394Sharti unsigned &IL = EmittedLists[Uses]; 374122394Sharti if (!IL) PrintDefList(Uses, IL = ++ListNumber, OS); 375122394Sharti } 376122394Sharti std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs"); 377122394Sharti if (!Defs.empty()) { 378122394Sharti unsigned &IL = EmittedLists[Defs]; 379122394Sharti if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); 380122394Sharti } 381122394Sharti } 382122394Sharti 383122394Sharti OperandInfoMapTy OperandInfoIDs; 384122394Sharti 385122394Sharti // Emit all of the operand info records. 386122394Sharti EmitOperandInfo(OS, OperandInfoIDs); 387122394Sharti 388122394Sharti // Emit all of the MCInstrDesc records in their ENUM ordering. 389122394Sharti // 390122394Sharti OS << "\nextern const MCInstrDesc " << TargetName << "Insts[] = {\n"; 391122394Sharti const std::vector<const CodeGenInstruction*> &NumberedInstructions = 392122394Sharti Target.getInstructionsByEnumValue(); 393122394Sharti 394122394Sharti for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) 395122394Sharti emitRecord(*NumberedInstructions[i], i, InstrInfo, EmittedLists, 396122394Sharti OperandInfoIDs, OS); 397122394Sharti OS << "};\n\n"; 398122394Sharti 399122394Sharti // Build an array of instruction names 400122394Sharti SequenceToOffsetTable<std::string> InstrNames; 401122394Sharti for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { 402122394Sharti const CodeGenInstruction *Instr = NumberedInstructions[i]; 403122394Sharti InstrNames.add(Instr->TheDef->getName()); 404122394Sharti } 405122394Sharti 406122394Sharti InstrNames.layout(); 407122394Sharti OS << "extern const char " << TargetName << "InstrNameData[] = {\n"; 408122394Sharti InstrNames.emit(OS, printChar); 409122394Sharti OS << "};\n\n"; 410122394Sharti 411122394Sharti OS << "extern const unsigned " << TargetName <<"InstrNameIndices[] = {"; 412122394Sharti for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { 413122394Sharti if (i % 8 == 0) 414122394Sharti OS << "\n "; 415122394Sharti const CodeGenInstruction *Instr = NumberedInstructions[i]; 416122394Sharti OS << InstrNames.get(Instr->TheDef->getName()) << "U, "; 417122394Sharti } 418122394Sharti 419122394Sharti OS << "\n};\n\n"; 420122394Sharti 421122394Sharti // MCInstrInfo initialization routine. 422122394Sharti OS << "static inline void Init" << TargetName 423122394Sharti << "MCInstrInfo(MCInstrInfo *II) {\n"; 424122394Sharti OS << " II->InitMCInstrInfo(" << TargetName << "Insts, " 425122394Sharti << TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, " 426122394Sharti << NumberedInstructions.size() << ");\n}\n\n"; 427122394Sharti 428122394Sharti OS << "} // End llvm namespace \n"; 429122394Sharti 430122394Sharti OS << "#endif // GET_INSTRINFO_MC_DESC\n\n"; 431122394Sharti 432122394Sharti // Create a TargetInstrInfo subclass to hide the MC layer initialization. 433122394Sharti OS << "\n#ifdef GET_INSTRINFO_HEADER\n"; 434122394Sharti OS << "#undef GET_INSTRINFO_HEADER\n"; 435122394Sharti 436122394Sharti std::string ClassName = TargetName + "GenInstrInfo"; 437122394Sharti OS << "namespace llvm {\n"; 438122394Sharti OS << "struct " << ClassName << " : public TargetInstrInfo {\n" 439122394Sharti << " explicit " << ClassName << "(int SO = -1, int DO = -1);\n" 440122394Sharti << " virtual ~" << ClassName << "();\n" 441122394Sharti << "};\n"; 442122394Sharti OS << "} // End llvm namespace \n"; 443122394Sharti 444122394Sharti OS << "#endif // GET_INSTRINFO_HEADER\n\n"; 445122394Sharti 446122394Sharti OS << "\n#ifdef GET_INSTRINFO_CTOR_DTOR\n"; 447122394Sharti OS << "#undef GET_INSTRINFO_CTOR_DTOR\n"; 448122394Sharti 449122394Sharti OS << "namespace llvm {\n"; 450122394Sharti OS << "extern const MCInstrDesc " << TargetName << "Insts[];\n"; 451122394Sharti OS << "extern const unsigned " << TargetName << "InstrNameIndices[];\n"; 452122394Sharti OS << "extern const char " << TargetName << "InstrNameData[];\n"; 453122394Sharti OS << ClassName << "::" << ClassName << "(int SO, int DO)\n" 454122394Sharti << " : TargetInstrInfo(SO, DO) {\n" 455122394Sharti << " InitMCInstrInfo(" << TargetName << "Insts, " 456122394Sharti << TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, " 457122394Sharti << NumberedInstructions.size() << ");\n}\n" 458122394Sharti << ClassName << "::~" << ClassName << "() {}\n"; 459122394Sharti OS << "} // End llvm namespace \n"; 460122394Sharti 461122394Sharti OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n"; 462122394Sharti 463122394Sharti emitOperandNameMappings(OS, Target, NumberedInstructions); 464122394Sharti 465122394Sharti emitOperandTypesEnum(OS, Target); 466155602Sharti} 467122394Sharti 468122394Shartivoid InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, 469122394Sharti Record *InstrInfo, 470122394Sharti std::map<std::vector<Record*>, unsigned> &EmittedLists, 471122394Sharti const OperandInfoMapTy &OpInfo, 472155602Sharti raw_ostream &OS) { 473155602Sharti int MinOperands = 0; 474122394Sharti if (!Inst.Operands.empty()) 475122394Sharti // Each logical operand can be multiple MI operands. 476122394Sharti MinOperands = Inst.Operands.back().MIOperandNo + 477122394Sharti Inst.Operands.back().MINumOperands; 478122394Sharti 479155602Sharti OS << " { "; 480122394Sharti OS << Num << ",\t" << MinOperands << ",\t" 481122394Sharti << Inst.Operands.NumDefs << ",\t" 482122394Sharti << SchedModels.getSchedClassIdx(Inst) << ",\t" 483122394Sharti << Inst.TheDef->getValueAsInt("Size") << ",\t0"; 484122394Sharti 485122394Sharti // Emit all of the target indepedent flags... 486122394Sharti if (Inst.isPseudo) OS << "|(1<<MCID::Pseudo)"; 487122394Sharti if (Inst.isReturn) OS << "|(1<<MCID::Return)"; 488122394Sharti if (Inst.isBranch) OS << "|(1<<MCID::Branch)"; 489122394Sharti if (Inst.isIndirectBranch) OS << "|(1<<MCID::IndirectBranch)"; 490122394Sharti if (Inst.isCompare) OS << "|(1<<MCID::Compare)"; 491155602Sharti if (Inst.isMoveImm) OS << "|(1<<MCID::MoveImm)"; 492122394Sharti if (Inst.isBitcast) OS << "|(1<<MCID::Bitcast)"; 493122394Sharti if (Inst.isSelect) OS << "|(1<<MCID::Select)"; 494122394Sharti if (Inst.isBarrier) OS << "|(1<<MCID::Barrier)"; 495122394Sharti if (Inst.hasDelaySlot) OS << "|(1<<MCID::DelaySlot)"; 496122394Sharti if (Inst.isCall) OS << "|(1<<MCID::Call)"; 497155602Sharti if (Inst.canFoldAsLoad) OS << "|(1<<MCID::FoldableAsLoad)"; 498155602Sharti if (Inst.mayLoad) OS << "|(1<<MCID::MayLoad)"; 499122394Sharti if (Inst.mayStore) OS << "|(1<<MCID::MayStore)"; 500122394Sharti if (Inst.isPredicable) OS << "|(1<<MCID::Predicable)"; 501122394Sharti if (Inst.isConvertibleToThreeAddress) OS << "|(1<<MCID::ConvertibleTo3Addr)"; 502122394Sharti if (Inst.isCommutable) OS << "|(1<<MCID::Commutable)"; 503122394Sharti if (Inst.isTerminator) OS << "|(1<<MCID::Terminator)"; 504155602Sharti if (Inst.isReMaterializable) OS << "|(1<<MCID::Rematerializable)"; 505122394Sharti if (Inst.isNotDuplicable) OS << "|(1<<MCID::NotDuplicable)"; 506122394Sharti if (Inst.Operands.hasOptionalDef) OS << "|(1<<MCID::HasOptionalDef)"; 507122394Sharti if (Inst.usesCustomInserter) OS << "|(1<<MCID::UsesCustomInserter)"; 508122394Sharti if (Inst.hasPostISelHook) OS << "|(1<<MCID::HasPostISelHook)"; 509122394Sharti if (Inst.Operands.isVariadic)OS << "|(1<<MCID::Variadic)"; 510122394Sharti if (Inst.hasSideEffects) OS << "|(1<<MCID::UnmodeledSideEffects)"; 511122394Sharti if (Inst.isAsCheapAsAMove) OS << "|(1<<MCID::CheapAsAMove)"; 512122394Sharti if (Inst.hasExtraSrcRegAllocReq) OS << "|(1<<MCID::ExtraSrcRegAllocReq)"; 513122394Sharti if (Inst.hasExtraDefRegAllocReq) OS << "|(1<<MCID::ExtraDefRegAllocReq)"; 514122394Sharti 515122394Sharti // Emit all of the target-specific flags... 516122394Sharti BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags"); 517122394Sharti if (!TSF) 518122394Sharti PrintFatalError("no TSFlags?"); 519122394Sharti uint64_t Value = 0; 520122394Sharti for (unsigned i = 0, e = TSF->getNumBits(); i != e; ++i) { 521122394Sharti if (BitInit *Bit = dyn_cast<BitInit>(TSF->getBit(i))) 522122394Sharti Value |= uint64_t(Bit->getValue()) << i; 523122394Sharti else 524122394Sharti PrintFatalError("Invalid TSFlags bit in " + Inst.TheDef->getName()); 525122394Sharti } 526122394Sharti OS << ", 0x"; 527122394Sharti OS.write_hex(Value); 528122394Sharti OS << "ULL, "; 529122394Sharti 530122394Sharti // Emit the implicit uses and defs lists... 531122394Sharti std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses"); 532122394Sharti if (UseList.empty()) 533122394Sharti OS << "NULL, "; 534122394Sharti else 535122394Sharti OS << "ImplicitList" << EmittedLists[UseList] << ", "; 536122394Sharti 537122394Sharti std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs"); 538122394Sharti if (DefList.empty()) 539122394Sharti OS << "NULL, "; 540122394Sharti else 541122394Sharti OS << "ImplicitList" << EmittedLists[DefList] << ", "; 542122394Sharti 543122394Sharti // Emit the operand info. 544 std::vector<std::string> OperandInfo = GetOperandInfo(Inst); 545 if (OperandInfo.empty()) 546 OS << "0"; 547 else 548 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second; 549 550 CodeGenTarget &Target = CDP.getTargetInfo(); 551 if (Inst.HasComplexDeprecationPredicate) 552 // Emit a function pointer to the complex predicate method. 553 OS << ",0" 554 << ",&get" << Inst.DeprecatedReason << "DeprecationInfo"; 555 else if (!Inst.DeprecatedReason.empty()) 556 // Emit the Subtarget feature. 557 OS << "," << Target.getInstNamespace() << "::" << Inst.DeprecatedReason 558 << ",0"; 559 else 560 // Instruction isn't deprecated. 561 OS << ",0,0"; 562 563 OS << " }, // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n"; 564} 565 566// emitEnums - Print out enum values for all of the instructions. 567void InstrInfoEmitter::emitEnums(raw_ostream &OS) { 568 569 OS << "\n#ifdef GET_INSTRINFO_ENUM\n"; 570 OS << "#undef GET_INSTRINFO_ENUM\n"; 571 572 OS << "namespace llvm {\n\n"; 573 574 CodeGenTarget Target(Records); 575 576 // We must emit the PHI opcode first... 577 std::string Namespace = Target.getInstNamespace(); 578 579 if (Namespace.empty()) { 580 fprintf(stderr, "No instructions defined!\n"); 581 exit(1); 582 } 583 584 const std::vector<const CodeGenInstruction*> &NumberedInstructions = 585 Target.getInstructionsByEnumValue(); 586 587 OS << "namespace " << Namespace << " {\n"; 588 OS << " enum {\n"; 589 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { 590 OS << " " << NumberedInstructions[i]->TheDef->getName() 591 << "\t= " << i << ",\n"; 592 } 593 OS << " INSTRUCTION_LIST_END = " << NumberedInstructions.size() << "\n"; 594 OS << " };\n"; 595 OS << "namespace Sched {\n"; 596 OS << " enum {\n"; 597 for (unsigned i = 0, e = SchedModels.numInstrSchedClasses(); i != e; ++i) { 598 OS << " " << SchedModels.getSchedClass(i).Name 599 << "\t= " << i << ",\n"; 600 } 601 OS << " SCHED_LIST_END = " << SchedModels.numInstrSchedClasses() << "\n"; 602 OS << " };\n}\n}\n"; 603 OS << "} // End llvm namespace \n"; 604 605 OS << "#endif // GET_INSTRINFO_ENUM\n\n"; 606} 607 608namespace llvm { 609 610void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) { 611 InstrInfoEmitter(RK).run(OS); 612 EmitMapTable(RK, OS); 613} 614 615} // End llvm namespace 616