DAGISelMatcherGen.cpp revision 205218
1//===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10#include "DAGISelMatcher.h" 11#include "CodeGenDAGPatterns.h" 12#include "Record.h" 13#include "llvm/ADT/SmallVector.h" 14#include "llvm/ADT/StringMap.h" 15#include <utility> 16using namespace llvm; 17 18 19/// getRegisterValueType - Look up and return the ValueType of the specified 20/// register. If the register is a member of multiple register classes which 21/// have different associated types, return MVT::Other. 22static MVT::SimpleValueType getRegisterValueType(Record *R, 23 const CodeGenTarget &T) { 24 bool FoundRC = false; 25 MVT::SimpleValueType VT = MVT::Other; 26 const std::vector<CodeGenRegisterClass> &RCs = T.getRegisterClasses(); 27 std::vector<Record*>::const_iterator Element; 28 29 for (unsigned rc = 0, e = RCs.size(); rc != e; ++rc) { 30 const CodeGenRegisterClass &RC = RCs[rc]; 31 if (!std::count(RC.Elements.begin(), RC.Elements.end(), R)) 32 continue; 33 34 if (!FoundRC) { 35 FoundRC = true; 36 VT = RC.getValueTypeNum(0); 37 continue; 38 } 39 40 // If this occurs in multiple register classes, they all have to agree. 41 assert(VT == RC.getValueTypeNum(0)); 42 } 43 return VT; 44} 45 46 47namespace { 48 class MatcherGen { 49 const PatternToMatch &Pattern; 50 const CodeGenDAGPatterns &CGP; 51 52 /// PatWithNoTypes - This is a clone of Pattern.getSrcPattern() that starts 53 /// out with all of the types removed. This allows us to insert type checks 54 /// as we scan the tree. 55 TreePatternNode *PatWithNoTypes; 56 57 /// VariableMap - A map from variable names ('$dst') to the recorded operand 58 /// number that they were captured as. These are biased by 1 to make 59 /// insertion easier. 60 StringMap<unsigned> VariableMap; 61 62 /// NextRecordedOperandNo - As we emit opcodes to record matched values in 63 /// the RecordedNodes array, this keeps track of which slot will be next to 64 /// record into. 65 unsigned NextRecordedOperandNo; 66 67 /// MatchedChainNodes - This maintains the position in the recorded nodes 68 /// array of all of the recorded input nodes that have chains. 69 SmallVector<unsigned, 2> MatchedChainNodes; 70 71 /// MatchedFlagResultNodes - This maintains the position in the recorded 72 /// nodes array of all of the recorded input nodes that have flag results. 73 SmallVector<unsigned, 2> MatchedFlagResultNodes; 74 75 /// MatchedComplexPatterns - This maintains a list of all of the 76 /// ComplexPatterns that we need to check. The patterns are known to have 77 /// names which were recorded. The second element of each pair is the first 78 /// slot number that the OPC_CheckComplexPat opcode drops the matched 79 /// results into. 80 SmallVector<std::pair<const TreePatternNode*, 81 unsigned>, 2> MatchedComplexPatterns; 82 83 /// PhysRegInputs - List list has an entry for each explicitly specified 84 /// physreg input to the pattern. The first elt is the Register node, the 85 /// second is the recorded slot number the input pattern match saved it in. 86 SmallVector<std::pair<Record*, unsigned>, 2> PhysRegInputs; 87 88 /// Matcher - This is the top level of the generated matcher, the result. 89 Matcher *TheMatcher; 90 91 /// CurPredicate - As we emit matcher nodes, this points to the latest check 92 /// which should have future checks stuck into its Next position. 93 Matcher *CurPredicate; 94 public: 95 MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp); 96 97 ~MatcherGen() { 98 delete PatWithNoTypes; 99 } 100 101 bool EmitMatcherCode(unsigned Variant); 102 void EmitResultCode(); 103 104 Matcher *GetMatcher() const { return TheMatcher; } 105 Matcher *GetCurPredicate() const { return CurPredicate; } 106 private: 107 void AddMatcher(Matcher *NewNode); 108 void InferPossibleTypes(); 109 110 // Matcher Generation. 111 void EmitMatchCode(const TreePatternNode *N, TreePatternNode *NodeNoTypes); 112 void EmitLeafMatchCode(const TreePatternNode *N); 113 void EmitOperatorMatchCode(const TreePatternNode *N, 114 TreePatternNode *NodeNoTypes); 115 116 // Result Code Generation. 117 unsigned getNamedArgumentSlot(StringRef Name) { 118 unsigned VarMapEntry = VariableMap[Name]; 119 assert(VarMapEntry != 0 && 120 "Variable referenced but not defined and not caught earlier!"); 121 return VarMapEntry-1; 122 } 123 124 /// GetInstPatternNode - Get the pattern for an instruction. 125 const TreePatternNode *GetInstPatternNode(const DAGInstruction &Ins, 126 const TreePatternNode *N); 127 128 void EmitResultOperand(const TreePatternNode *N, 129 SmallVectorImpl<unsigned> &ResultOps); 130 void EmitResultOfNamedOperand(const TreePatternNode *N, 131 SmallVectorImpl<unsigned> &ResultOps); 132 void EmitResultLeafAsOperand(const TreePatternNode *N, 133 SmallVectorImpl<unsigned> &ResultOps); 134 void EmitResultInstructionAsOperand(const TreePatternNode *N, 135 SmallVectorImpl<unsigned> &ResultOps); 136 void EmitResultSDNodeXFormAsOperand(const TreePatternNode *N, 137 SmallVectorImpl<unsigned> &ResultOps); 138 }; 139 140} // end anon namespace. 141 142MatcherGen::MatcherGen(const PatternToMatch &pattern, 143 const CodeGenDAGPatterns &cgp) 144: Pattern(pattern), CGP(cgp), NextRecordedOperandNo(0), 145 TheMatcher(0), CurPredicate(0) { 146 // We need to produce the matcher tree for the patterns source pattern. To do 147 // this we need to match the structure as well as the types. To do the type 148 // matching, we want to figure out the fewest number of type checks we need to 149 // emit. For example, if there is only one integer type supported by a 150 // target, there should be no type comparisons at all for integer patterns! 151 // 152 // To figure out the fewest number of type checks needed, clone the pattern, 153 // remove the types, then perform type inference on the pattern as a whole. 154 // If there are unresolved types, emit an explicit check for those types, 155 // apply the type to the tree, then rerun type inference. Iterate until all 156 // types are resolved. 157 // 158 PatWithNoTypes = Pattern.getSrcPattern()->clone(); 159 PatWithNoTypes->RemoveAllTypes(); 160 161 // If there are types that are manifestly known, infer them. 162 InferPossibleTypes(); 163} 164 165/// InferPossibleTypes - As we emit the pattern, we end up generating type 166/// checks and applying them to the 'PatWithNoTypes' tree. As we do this, we 167/// want to propagate implied types as far throughout the tree as possible so 168/// that we avoid doing redundant type checks. This does the type propagation. 169void MatcherGen::InferPossibleTypes() { 170 // TP - Get *SOME* tree pattern, we don't care which. It is only used for 171 // diagnostics, which we know are impossible at this point. 172 TreePattern &TP = *CGP.pf_begin()->second; 173 174 try { 175 bool MadeChange = true; 176 while (MadeChange) 177 MadeChange = PatWithNoTypes->ApplyTypeConstraints(TP, 178 true/*Ignore reg constraints*/); 179 } catch (...) { 180 errs() << "Type constraint application shouldn't fail!"; 181 abort(); 182 } 183} 184 185 186/// AddMatcher - Add a matcher node to the current graph we're building. 187void MatcherGen::AddMatcher(Matcher *NewNode) { 188 if (CurPredicate != 0) 189 CurPredicate->setNext(NewNode); 190 else 191 TheMatcher = NewNode; 192 CurPredicate = NewNode; 193} 194 195 196//===----------------------------------------------------------------------===// 197// Pattern Match Generation 198//===----------------------------------------------------------------------===// 199 200/// EmitLeafMatchCode - Generate matching code for leaf nodes. 201void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) { 202 assert(N->isLeaf() && "Not a leaf?"); 203 204 // Direct match against an integer constant. 205 if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) { 206 // If this is the root of the dag we're matching, we emit a redundant opcode 207 // check to ensure that this gets folded into the normal top-level 208 // OpcodeSwitch. 209 if (N == Pattern.getSrcPattern()) { 210 const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("imm")); 211 AddMatcher(new CheckOpcodeMatcher(NI)); 212 } 213 214 return AddMatcher(new CheckIntegerMatcher(II->getValue())); 215 } 216 217 DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue()); 218 if (DI == 0) { 219 errs() << "Unknown leaf kind: " << *DI << "\n"; 220 abort(); 221 } 222 223 Record *LeafRec = DI->getDef(); 224 if (// Handle register references. Nothing to do here, they always match. 225 LeafRec->isSubClassOf("RegisterClass") || 226 LeafRec->isSubClassOf("PointerLikeRegClass") || 227 // Place holder for SRCVALUE nodes. Nothing to do here. 228 LeafRec->getName() == "srcvalue") 229 return; 230 231 // If we have a physreg reference like (mul gpr:$src, EAX) then we need to 232 // record the register 233 if (LeafRec->isSubClassOf("Register")) { 234 AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName(), 235 NextRecordedOperandNo)); 236 PhysRegInputs.push_back(std::make_pair(LeafRec, NextRecordedOperandNo++)); 237 return; 238 } 239 240 if (LeafRec->isSubClassOf("ValueType")) 241 return AddMatcher(new CheckValueTypeMatcher(LeafRec->getName())); 242 243 if (LeafRec->isSubClassOf("CondCode")) 244 return AddMatcher(new CheckCondCodeMatcher(LeafRec->getName())); 245 246 if (LeafRec->isSubClassOf("ComplexPattern")) { 247 // We can't model ComplexPattern uses that don't have their name taken yet. 248 // The OPC_CheckComplexPattern operation implicitly records the results. 249 if (N->getName().empty()) { 250 errs() << "We expect complex pattern uses to have names: " << *N << "\n"; 251 exit(1); 252 } 253 254 // Remember this ComplexPattern so that we can emit it after all the other 255 // structural matches are done. 256 MatchedComplexPatterns.push_back(std::make_pair(N, 0)); 257 return; 258 } 259 260 errs() << "Unknown leaf kind: " << *N << "\n"; 261 abort(); 262} 263 264void MatcherGen::EmitOperatorMatchCode(const TreePatternNode *N, 265 TreePatternNode *NodeNoTypes) { 266 assert(!N->isLeaf() && "Not an operator?"); 267 const SDNodeInfo &CInfo = CGP.getSDNodeInfo(N->getOperator()); 268 269 // If this is an 'and R, 1234' where the operation is AND/OR and the RHS is 270 // a constant without a predicate fn that has more that one bit set, handle 271 // this as a special case. This is usually for targets that have special 272 // handling of certain large constants (e.g. alpha with it's 8/16/32-bit 273 // handling stuff). Using these instructions is often far more efficient 274 // than materializing the constant. Unfortunately, both the instcombiner 275 // and the dag combiner can often infer that bits are dead, and thus drop 276 // them from the mask in the dag. For example, it might turn 'AND X, 255' 277 // into 'AND X, 254' if it knows the low bit is set. Emit code that checks 278 // to handle this. 279 if ((N->getOperator()->getName() == "and" || 280 N->getOperator()->getName() == "or") && 281 N->getChild(1)->isLeaf() && N->getChild(1)->getPredicateFns().empty() && 282 N->getPredicateFns().empty()) { 283 if (IntInit *II = dynamic_cast<IntInit*>(N->getChild(1)->getLeafValue())) { 284 if (!isPowerOf2_32(II->getValue())) { // Don't bother with single bits. 285 // If this is at the root of the pattern, we emit a redundant 286 // CheckOpcode so that the following checks get factored properly under 287 // a single opcode check. 288 if (N == Pattern.getSrcPattern()) 289 AddMatcher(new CheckOpcodeMatcher(CInfo)); 290 291 // Emit the CheckAndImm/CheckOrImm node. 292 if (N->getOperator()->getName() == "and") 293 AddMatcher(new CheckAndImmMatcher(II->getValue())); 294 else 295 AddMatcher(new CheckOrImmMatcher(II->getValue())); 296 297 // Match the LHS of the AND as appropriate. 298 AddMatcher(new MoveChildMatcher(0)); 299 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0)); 300 AddMatcher(new MoveParentMatcher()); 301 return; 302 } 303 } 304 } 305 306 // Check that the current opcode lines up. 307 AddMatcher(new CheckOpcodeMatcher(CInfo)); 308 309 // If this node has memory references (i.e. is a load or store), tell the 310 // interpreter to capture them in the memref array. 311 if (N->NodeHasProperty(SDNPMemOperand, CGP)) 312 AddMatcher(new RecordMemRefMatcher()); 313 314 // If this node has a chain, then the chain is operand #0 is the SDNode, and 315 // the child numbers of the node are all offset by one. 316 unsigned OpNo = 0; 317 if (N->NodeHasProperty(SDNPHasChain, CGP)) { 318 // Record the node and remember it in our chained nodes list. 319 AddMatcher(new RecordMatcher("'" + N->getOperator()->getName() + 320 "' chained node", 321 NextRecordedOperandNo)); 322 // Remember all of the input chains our pattern will match. 323 MatchedChainNodes.push_back(NextRecordedOperandNo++); 324 325 // Don't look at the input chain when matching the tree pattern to the 326 // SDNode. 327 OpNo = 1; 328 329 // If this node is not the root and the subtree underneath it produces a 330 // chain, then the result of matching the node is also produce a chain. 331 // Beyond that, this means that we're also folding (at least) the root node 332 // into the node that produce the chain (for example, matching 333 // "(add reg, (load ptr))" as a add_with_memory on X86). This is 334 // problematic, if the 'reg' node also uses the load (say, its chain). 335 // Graphically: 336 // 337 // [LD] 338 // ^ ^ 339 // | \ DAG's like cheese. 340 // / | 341 // / [YY] 342 // | ^ 343 // [XX]--/ 344 // 345 // It would be invalid to fold XX and LD. In this case, folding the two 346 // nodes together would induce a cycle in the DAG, making it a 'cyclic DAG' 347 // To prevent this, we emit a dynamic check for legality before allowing 348 // this to be folded. 349 // 350 const TreePatternNode *Root = Pattern.getSrcPattern(); 351 if (N != Root) { // Not the root of the pattern. 352 // If there is a node between the root and this node, then we definitely 353 // need to emit the check. 354 bool NeedCheck = !Root->hasChild(N); 355 356 // If it *is* an immediate child of the root, we can still need a check if 357 // the root SDNode has multiple inputs. For us, this means that it is an 358 // intrinsic, has multiple operands, or has other inputs like chain or 359 // flag). 360 if (!NeedCheck) { 361 const SDNodeInfo &PInfo = CGP.getSDNodeInfo(Root->getOperator()); 362 NeedCheck = 363 Root->getOperator() == CGP.get_intrinsic_void_sdnode() || 364 Root->getOperator() == CGP.get_intrinsic_w_chain_sdnode() || 365 Root->getOperator() == CGP.get_intrinsic_wo_chain_sdnode() || 366 PInfo.getNumOperands() > 1 || 367 PInfo.hasProperty(SDNPHasChain) || 368 PInfo.hasProperty(SDNPInFlag) || 369 PInfo.hasProperty(SDNPOptInFlag); 370 } 371 372 if (NeedCheck) 373 AddMatcher(new CheckFoldableChainNodeMatcher()); 374 } 375 } 376 377 // If this node has an output flag and isn't the root, remember it. 378 if (N->NodeHasProperty(SDNPOutFlag, CGP) && 379 N != Pattern.getSrcPattern()) { 380 // TODO: This redundantly records nodes with both flags and chains. 381 382 // Record the node and remember it in our chained nodes list. 383 AddMatcher(new RecordMatcher("'" + N->getOperator()->getName() + 384 "' flag output node", 385 NextRecordedOperandNo)); 386 // Remember all of the nodes with output flags our pattern will match. 387 MatchedFlagResultNodes.push_back(NextRecordedOperandNo++); 388 } 389 390 // If this node is known to have an input flag or if it *might* have an input 391 // flag, capture it as the flag input of the pattern. 392 if (N->NodeHasProperty(SDNPOptInFlag, CGP) || 393 N->NodeHasProperty(SDNPInFlag, CGP)) 394 AddMatcher(new CaptureFlagInputMatcher()); 395 396 for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) { 397 // Get the code suitable for matching this child. Move to the child, check 398 // it then move back to the parent. 399 AddMatcher(new MoveChildMatcher(OpNo)); 400 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i)); 401 AddMatcher(new MoveParentMatcher()); 402 } 403} 404 405 406void MatcherGen::EmitMatchCode(const TreePatternNode *N, 407 TreePatternNode *NodeNoTypes) { 408 // If N and NodeNoTypes don't agree on a type, then this is a case where we 409 // need to do a type check. Emit the check, apply the tyep to NodeNoTypes and 410 // reinfer any correlated types. 411 bool DoTypeCheck = false; 412 if (NodeNoTypes->getExtType() != N->getExtType()) { 413 NodeNoTypes->setType(N->getExtType()); 414 InferPossibleTypes(); 415 DoTypeCheck = true; 416 } 417 418 // If this node has a name associated with it, capture it in VariableMap. If 419 // we already saw this in the pattern, emit code to verify dagness. 420 if (!N->getName().empty()) { 421 unsigned &VarMapEntry = VariableMap[N->getName()]; 422 if (VarMapEntry == 0) { 423 // If it is a named node, we must emit a 'Record' opcode. 424 AddMatcher(new RecordMatcher("$" + N->getName(), NextRecordedOperandNo)); 425 VarMapEntry = ++NextRecordedOperandNo; 426 } else { 427 // If we get here, this is a second reference to a specific name. Since 428 // we already have checked that the first reference is valid, we don't 429 // have to recursively match it, just check that it's the same as the 430 // previously named thing. 431 AddMatcher(new CheckSameMatcher(VarMapEntry-1)); 432 return; 433 } 434 } 435 436 if (N->isLeaf()) 437 EmitLeafMatchCode(N); 438 else 439 EmitOperatorMatchCode(N, NodeNoTypes); 440 441 // If there are node predicates for this node, generate their checks. 442 for (unsigned i = 0, e = N->getPredicateFns().size(); i != e; ++i) 443 AddMatcher(new CheckPredicateMatcher(N->getPredicateFns()[i])); 444 445 if (DoTypeCheck) 446 AddMatcher(new CheckTypeMatcher(N->getType())); 447} 448 449/// EmitMatcherCode - Generate the code that matches the predicate of this 450/// pattern for the specified Variant. If the variant is invalid this returns 451/// true and does not generate code, if it is valid, it returns false. 452bool MatcherGen::EmitMatcherCode(unsigned Variant) { 453 // If the root of the pattern is a ComplexPattern and if it is specified to 454 // match some number of root opcodes, these are considered to be our variants. 455 // Depending on which variant we're generating code for, emit the root opcode 456 // check. 457 if (const ComplexPattern *CP = 458 Pattern.getSrcPattern()->getComplexPatternInfo(CGP)) { 459 const std::vector<Record*> &OpNodes = CP->getRootNodes(); 460 assert(!OpNodes.empty() &&"Complex Pattern must specify what it can match"); 461 if (Variant >= OpNodes.size()) return true; 462 463 AddMatcher(new CheckOpcodeMatcher(CGP.getSDNodeInfo(OpNodes[Variant]))); 464 } else { 465 if (Variant != 0) return true; 466 } 467 468 // Emit the matcher for the pattern structure and types. 469 EmitMatchCode(Pattern.getSrcPattern(), PatWithNoTypes); 470 471 // If the pattern has a predicate on it (e.g. only enabled when a subtarget 472 // feature is around, do the check). 473 if (!Pattern.getPredicateCheck().empty()) 474 AddMatcher(new CheckPatternPredicateMatcher(Pattern.getPredicateCheck())); 475 476 // Now that we've completed the structural type match, emit any ComplexPattern 477 // checks (e.g. addrmode matches). We emit this after the structural match 478 // because they are generally more expensive to evaluate and more difficult to 479 // factor. 480 for (unsigned i = 0, e = MatchedComplexPatterns.size(); i != e; ++i) { 481 const TreePatternNode *N = MatchedComplexPatterns[i].first; 482 483 // Remember where the results of this match get stuck. 484 MatchedComplexPatterns[i].second = NextRecordedOperandNo; 485 486 // Get the slot we recorded the value in from the name on the node. 487 unsigned RecNodeEntry = VariableMap[N->getName()]; 488 assert(!N->getName().empty() && RecNodeEntry && 489 "Complex pattern should have a name and slot"); 490 --RecNodeEntry; // Entries in VariableMap are biased. 491 492 const ComplexPattern &CP = 493 CGP.getComplexPattern(((DefInit*)N->getLeafValue())->getDef()); 494 495 // Emit a CheckComplexPat operation, which does the match (aborting if it 496 // fails) and pushes the matched operands onto the recorded nodes list. 497 AddMatcher(new CheckComplexPatMatcher(CP, RecNodeEntry, 498 N->getName(), NextRecordedOperandNo)); 499 500 // Record the right number of operands. 501 NextRecordedOperandNo += CP.getNumOperands(); 502 if (CP.hasProperty(SDNPHasChain)) { 503 // If the complex pattern has a chain, then we need to keep track of the 504 // fact that we just recorded a chain input. The chain input will be 505 // matched as the last operand of the predicate if it was successful. 506 ++NextRecordedOperandNo; // Chained node operand. 507 508 // It is the last operand recorded. 509 assert(NextRecordedOperandNo > 1 && 510 "Should have recorded input/result chains at least!"); 511 MatchedChainNodes.push_back(NextRecordedOperandNo-1); 512 } 513 514 // TODO: Complex patterns can't have output flags, if they did, we'd want 515 // to record them. 516 } 517 518 return false; 519} 520 521 522//===----------------------------------------------------------------------===// 523// Node Result Generation 524//===----------------------------------------------------------------------===// 525 526void MatcherGen::EmitResultOfNamedOperand(const TreePatternNode *N, 527 SmallVectorImpl<unsigned> &ResultOps){ 528 assert(!N->getName().empty() && "Operand not named!"); 529 530 // A reference to a complex pattern gets all of the results of the complex 531 // pattern's match. 532 if (const ComplexPattern *CP = N->getComplexPatternInfo(CGP)) { 533 unsigned SlotNo = 0; 534 for (unsigned i = 0, e = MatchedComplexPatterns.size(); i != e; ++i) 535 if (MatchedComplexPatterns[i].first->getName() == N->getName()) { 536 SlotNo = MatchedComplexPatterns[i].second; 537 break; 538 } 539 assert(SlotNo != 0 && "Didn't get a slot number assigned?"); 540 541 // The first slot entry is the node itself, the subsequent entries are the 542 // matched values. 543 for (unsigned i = 0, e = CP->getNumOperands(); i != e; ++i) 544 ResultOps.push_back(SlotNo+i); 545 return; 546 } 547 548 unsigned SlotNo = getNamedArgumentSlot(N->getName()); 549 550 // If this is an 'imm' or 'fpimm' node, make sure to convert it to the target 551 // version of the immediate so that it doesn't get selected due to some other 552 // node use. 553 if (!N->isLeaf()) { 554 StringRef OperatorName = N->getOperator()->getName(); 555 if (OperatorName == "imm" || OperatorName == "fpimm") { 556 AddMatcher(new EmitConvertToTargetMatcher(SlotNo)); 557 ResultOps.push_back(NextRecordedOperandNo++); 558 return; 559 } 560 } 561 562 ResultOps.push_back(SlotNo); 563} 564 565void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N, 566 SmallVectorImpl<unsigned> &ResultOps) { 567 assert(N->isLeaf() && "Must be a leaf"); 568 569 if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) { 570 AddMatcher(new EmitIntegerMatcher(II->getValue(), N->getType())); 571 ResultOps.push_back(NextRecordedOperandNo++); 572 return; 573 } 574 575 // If this is an explicit register reference, handle it. 576 if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) { 577 if (DI->getDef()->isSubClassOf("Register")) { 578 AddMatcher(new EmitRegisterMatcher(DI->getDef(), N->getType())); 579 ResultOps.push_back(NextRecordedOperandNo++); 580 return; 581 } 582 583 if (DI->getDef()->getName() == "zero_reg") { 584 AddMatcher(new EmitRegisterMatcher(0, N->getType())); 585 ResultOps.push_back(NextRecordedOperandNo++); 586 return; 587 } 588 589 // Handle a reference to a register class. This is used 590 // in COPY_TO_SUBREG instructions. 591 if (DI->getDef()->isSubClassOf("RegisterClass")) { 592 std::string Value = getQualifiedName(DI->getDef()) + "RegClassID"; 593 AddMatcher(new EmitStringIntegerMatcher(Value, MVT::i32)); 594 ResultOps.push_back(NextRecordedOperandNo++); 595 return; 596 } 597 } 598 599 errs() << "unhandled leaf node: \n"; 600 N->dump(); 601} 602 603/// GetInstPatternNode - Get the pattern for an instruction. 604/// 605const TreePatternNode *MatcherGen:: 606GetInstPatternNode(const DAGInstruction &Inst, const TreePatternNode *N) { 607 const TreePattern *InstPat = Inst.getPattern(); 608 609 // FIXME2?: Assume actual pattern comes before "implicit". 610 TreePatternNode *InstPatNode; 611 if (InstPat) 612 InstPatNode = InstPat->getTree(0); 613 else if (/*isRoot*/ N == Pattern.getDstPattern()) 614 InstPatNode = Pattern.getSrcPattern(); 615 else 616 return 0; 617 618 if (InstPatNode && !InstPatNode->isLeaf() && 619 InstPatNode->getOperator()->getName() == "set") 620 InstPatNode = InstPatNode->getChild(InstPatNode->getNumChildren()-1); 621 622 return InstPatNode; 623} 624 625void MatcherGen:: 626EmitResultInstructionAsOperand(const TreePatternNode *N, 627 SmallVectorImpl<unsigned> &OutputOps) { 628 Record *Op = N->getOperator(); 629 const CodeGenTarget &CGT = CGP.getTargetInfo(); 630 CodeGenInstruction &II = CGT.getInstruction(Op->getName()); 631 const DAGInstruction &Inst = CGP.getInstruction(Op); 632 633 // If we can, get the pattern for the instruction we're generating. We derive 634 // a variety of information from this pattern, such as whether it has a chain. 635 // 636 // FIXME2: This is extremely dubious for several reasons, not the least of 637 // which it gives special status to instructions with patterns that Pat<> 638 // nodes can't duplicate. 639 const TreePatternNode *InstPatNode = GetInstPatternNode(Inst, N); 640 641 // NodeHasChain - Whether the instruction node we're creating takes chains. 642 bool NodeHasChain = InstPatNode && 643 InstPatNode->TreeHasProperty(SDNPHasChain, CGP); 644 645 bool isRoot = N == Pattern.getDstPattern(); 646 647 // TreeHasOutFlag - True if this tree has a flag. 648 bool TreeHasInFlag = false, TreeHasOutFlag = false; 649 if (isRoot) { 650 const TreePatternNode *SrcPat = Pattern.getSrcPattern(); 651 TreeHasInFlag = SrcPat->TreeHasProperty(SDNPOptInFlag, CGP) || 652 SrcPat->TreeHasProperty(SDNPInFlag, CGP); 653 654 // FIXME2: this is checking the entire pattern, not just the node in 655 // question, doing this just for the root seems like a total hack. 656 TreeHasOutFlag = SrcPat->TreeHasProperty(SDNPOutFlag, CGP); 657 } 658 659 // NumResults - This is the number of results produced by the instruction in 660 // the "outs" list. 661 unsigned NumResults = Inst.getNumResults(); 662 663 // Loop over all of the operands of the instruction pattern, emitting code 664 // to fill them all in. The node 'N' usually has number children equal to 665 // the number of input operands of the instruction. However, in cases 666 // where there are predicate operands for an instruction, we need to fill 667 // in the 'execute always' values. Match up the node operands to the 668 // instruction operands to do this. 669 SmallVector<unsigned, 8> InstOps; 670 for (unsigned ChildNo = 0, InstOpNo = NumResults, e = II.OperandList.size(); 671 InstOpNo != e; ++InstOpNo) { 672 673 // Determine what to emit for this operand. 674 Record *OperandNode = II.OperandList[InstOpNo].Rec; 675 if ((OperandNode->isSubClassOf("PredicateOperand") || 676 OperandNode->isSubClassOf("OptionalDefOperand")) && 677 !CGP.getDefaultOperand(OperandNode).DefaultOps.empty()) { 678 // This is a predicate or optional def operand; emit the 679 // 'default ops' operands. 680 const DAGDefaultOperand &DefaultOp = 681 CGP.getDefaultOperand(II.OperandList[InstOpNo].Rec); 682 for (unsigned i = 0, e = DefaultOp.DefaultOps.size(); i != e; ++i) 683 EmitResultOperand(DefaultOp.DefaultOps[i], InstOps); 684 continue; 685 } 686 687 // Otherwise this is a normal operand or a predicate operand without 688 // 'execute always'; emit it. 689 EmitResultOperand(N->getChild(ChildNo), InstOps); 690 ++ChildNo; 691 } 692 693 // If this node has an input flag or explicitly specified input physregs, we 694 // need to add chained and flagged copyfromreg nodes and materialize the flag 695 // input. 696 if (isRoot && !PhysRegInputs.empty()) { 697 // Emit all of the CopyToReg nodes for the input physical registers. These 698 // occur in patterns like (mul:i8 AL:i8, GR8:i8:$src). 699 for (unsigned i = 0, e = PhysRegInputs.size(); i != e; ++i) 700 AddMatcher(new EmitCopyToRegMatcher(PhysRegInputs[i].second, 701 PhysRegInputs[i].first)); 702 // Even if the node has no other flag inputs, the resultant node must be 703 // flagged to the CopyFromReg nodes we just generated. 704 TreeHasInFlag = true; 705 } 706 707 // Result order: node results, chain, flags 708 709 // Determine the result types. 710 SmallVector<MVT::SimpleValueType, 4> ResultVTs; 711 if (NumResults != 0 && N->getType() != MVT::isVoid) { 712 // FIXME2: If the node has multiple results, we should add them. For now, 713 // preserve existing behavior?! 714 ResultVTs.push_back(N->getType()); 715 } 716 717 718 // If this is the root instruction of a pattern that has physical registers in 719 // its result pattern, add output VTs for them. For example, X86 has: 720 // (set AL, (mul ...)) 721 // This also handles implicit results like: 722 // (implicit EFLAGS) 723 if (isRoot && Pattern.getDstRegs().size() != 0) { 724 for (unsigned i = 0; i != Pattern.getDstRegs().size(); ++i) 725 if (Pattern.getDstRegs()[i]->isSubClassOf("Register")) 726 ResultVTs.push_back(getRegisterValueType(Pattern.getDstRegs()[i], CGT)); 727 } 728 729 // FIXME2: Instead of using the isVariadic flag on the instruction, we should 730 // have an SDNP that indicates variadicism. The TargetInstrInfo isVariadic 731 // property should be inferred from this when an instruction has a pattern. 732 int NumFixedArityOperands = -1; 733 if (isRoot && II.isVariadic) 734 NumFixedArityOperands = Pattern.getSrcPattern()->getNumChildren(); 735 736 // If this is the root node and any of the nodes matched nodes in the input 737 // pattern have MemRefs in them, have the interpreter collect them and plop 738 // them onto this node. 739 // 740 // FIXME3: This is actively incorrect for result patterns where the root of 741 // the pattern is not the memory reference and is also incorrect when the 742 // result pattern has multiple memory-referencing instructions. For example, 743 // in the X86 backend, this pattern causes the memrefs to get attached to the 744 // CVTSS2SDrr instead of the MOVSSrm: 745 // 746 // def : Pat<(extloadf32 addr:$src), 747 // (CVTSS2SDrr (MOVSSrm addr:$src))>; 748 // 749 bool NodeHasMemRefs = 750 isRoot && Pattern.getSrcPattern()->TreeHasProperty(SDNPMemOperand, CGP); 751 752 AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName(), 753 ResultVTs.data(), ResultVTs.size(), 754 InstOps.data(), InstOps.size(), 755 NodeHasChain, TreeHasInFlag, TreeHasOutFlag, 756 NodeHasMemRefs, NumFixedArityOperands, 757 NextRecordedOperandNo)); 758 759 // The non-chain and non-flag results of the newly emitted node get recorded. 760 for (unsigned i = 0, e = ResultVTs.size(); i != e; ++i) { 761 if (ResultVTs[i] == MVT::Other || ResultVTs[i] == MVT::Flag) break; 762 OutputOps.push_back(NextRecordedOperandNo++); 763 } 764} 765 766void MatcherGen:: 767EmitResultSDNodeXFormAsOperand(const TreePatternNode *N, 768 SmallVectorImpl<unsigned> &ResultOps) { 769 assert(N->getOperator()->isSubClassOf("SDNodeXForm") && "Not SDNodeXForm?"); 770 771 // Emit the operand. 772 SmallVector<unsigned, 8> InputOps; 773 774 // FIXME2: Could easily generalize this to support multiple inputs and outputs 775 // to the SDNodeXForm. For now we just support one input and one output like 776 // the old instruction selector. 777 assert(N->getNumChildren() == 1); 778 EmitResultOperand(N->getChild(0), InputOps); 779 780 // The input currently must have produced exactly one result. 781 assert(InputOps.size() == 1 && "Unexpected input to SDNodeXForm"); 782 783 AddMatcher(new EmitNodeXFormMatcher(InputOps[0], N->getOperator())); 784 ResultOps.push_back(NextRecordedOperandNo++); 785} 786 787void MatcherGen::EmitResultOperand(const TreePatternNode *N, 788 SmallVectorImpl<unsigned> &ResultOps) { 789 // This is something selected from the pattern we matched. 790 if (!N->getName().empty()) 791 return EmitResultOfNamedOperand(N, ResultOps); 792 793 if (N->isLeaf()) 794 return EmitResultLeafAsOperand(N, ResultOps); 795 796 Record *OpRec = N->getOperator(); 797 if (OpRec->isSubClassOf("Instruction")) 798 return EmitResultInstructionAsOperand(N, ResultOps); 799 if (OpRec->isSubClassOf("SDNodeXForm")) 800 return EmitResultSDNodeXFormAsOperand(N, ResultOps); 801 errs() << "Unknown result node to emit code for: " << *N << '\n'; 802 throw std::string("Unknown node in result pattern!"); 803} 804 805void MatcherGen::EmitResultCode() { 806 // Patterns that match nodes with (potentially multiple) chain inputs have to 807 // merge them together into a token factor. This informs the generated code 808 // what all the chained nodes are. 809 if (!MatchedChainNodes.empty()) 810 AddMatcher(new EmitMergeInputChainsMatcher 811 (MatchedChainNodes.data(), MatchedChainNodes.size())); 812 813 // Codegen the root of the result pattern, capturing the resulting values. 814 SmallVector<unsigned, 8> Ops; 815 EmitResultOperand(Pattern.getDstPattern(), Ops); 816 817 // At this point, we have however many values the result pattern produces. 818 // However, the input pattern might not need all of these. If there are 819 // excess values at the end (such as condition codes etc) just lop them off. 820 // This doesn't need to worry about flags or chains, just explicit results. 821 // 822 // FIXME2: This doesn't work because there is currently no way to get an 823 // accurate count of the # results the source pattern sets. This is because 824 // of the "parallel" construct in X86 land, which looks like this: 825 // 826 //def : Pat<(parallel (X86and_flag GR8:$src1, GR8:$src2), 827 // (implicit EFLAGS)), 828 // (AND8rr GR8:$src1, GR8:$src2)>; 829 // 830 // This idiom means to match the two-result node X86and_flag (which is 831 // declared as returning a single result, because we can't match multi-result 832 // nodes yet). In this case, we would have to know that the input has two 833 // results. However, mul8r is modelled exactly the same way, but without 834 // implicit defs included. The fix is to support multiple results directly 835 // and eliminate 'parallel'. 836 // 837 // FIXME2: When this is fixed, we should revert the terrible hack in the 838 // OPC_EmitNode code in the interpreter. 839#if 0 840 const TreePatternNode *Src = Pattern.getSrcPattern(); 841 unsigned NumSrcResults = Src->getTypeNum(0) != MVT::isVoid ? 1 : 0; 842 NumSrcResults += Pattern.getDstRegs().size(); 843 assert(Ops.size() >= NumSrcResults && "Didn't provide enough results"); 844 Ops.resize(NumSrcResults); 845#endif 846 847 // If the matched pattern covers nodes which define a flag result, emit a node 848 // that tells the matcher about them so that it can update their results. 849 if (!MatchedFlagResultNodes.empty()) 850 AddMatcher(new MarkFlagResultsMatcher(MatchedFlagResultNodes.data(), 851 MatchedFlagResultNodes.size())); 852 853 AddMatcher(new CompleteMatchMatcher(Ops.data(), Ops.size(), Pattern)); 854} 855 856 857/// ConvertPatternToMatcher - Create the matcher for the specified pattern with 858/// the specified variant. If the variant number is invalid, this returns null. 859Matcher *llvm::ConvertPatternToMatcher(const PatternToMatch &Pattern, 860 unsigned Variant, 861 const CodeGenDAGPatterns &CGP) { 862 MatcherGen Gen(Pattern, CGP); 863 864 // Generate the code for the matcher. 865 if (Gen.EmitMatcherCode(Variant)) 866 return 0; 867 868 // FIXME2: Kill extra MoveParent commands at the end of the matcher sequence. 869 // FIXME2: Split result code out to another table, and make the matcher end 870 // with an "Emit <index>" command. This allows result generation stuff to be 871 // shared and factored? 872 873 // If the match succeeds, then we generate Pattern. 874 Gen.EmitResultCode(); 875 876 // Unconditional match. 877 return Gen.GetMatcher(); 878} 879 880 881 882