X86TargetMachine.h revision 193323 
1//===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the X86 specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86TARGETMACHINE_H
15#define X86TARGETMACHINE_H
16
17#include "llvm/Target/TargetMachine.h"
18#include "llvm/Target/TargetData.h"
19#include "llvm/Target/TargetFrameInfo.h"
20#include "X86.h"
21#include "X86ELFWriterInfo.h"
22#include "X86InstrInfo.h"
23#include "X86JITInfo.h"
24#include "X86Subtarget.h"
25#include "X86ISelLowering.h"
26
27namespace llvm {
28
29class raw_ostream;
30
31class X86TargetMachine : public LLVMTargetMachine {
32  X86Subtarget      Subtarget;
33  const TargetData  DataLayout; // Calculates type size & alignment
34  TargetFrameInfo   FrameInfo;
35  X86InstrInfo      InstrInfo;
36  X86JITInfo        JITInfo;
37  X86TargetLowering TLInfo;
38  X86ELFWriterInfo  ELFWriterInfo;
39  Reloc::Model      DefRelocModel; // Reloc model before it's overridden.
40
41protected:
42  virtual const TargetAsmInfo *createTargetAsmInfo() const;
43
44  // To avoid having target depend on the asmprinter stuff libraries, asmprinter
45  // set this functions to ctor pointer at startup time if they are linked in.
46  typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
47                                            X86TargetMachine &tm,
48                                            CodeGenOpt::Level OptLevel,
49                                            bool verbose);
50  static AsmPrinterCtorFn AsmPrinterCtor;
51
52public:
53  X86TargetMachine(const Module &M, const std::string &FS, bool is64Bit);
54
55  virtual const X86InstrInfo     *getInstrInfo() const { return &InstrInfo; }
56  virtual const TargetFrameInfo  *getFrameInfo() const { return &FrameInfo; }
57  virtual       X86JITInfo       *getJITInfo()         { return &JITInfo; }
58  virtual const X86Subtarget     *getSubtargetImpl() const{ return &Subtarget; }
59  virtual       X86TargetLowering *getTargetLowering() const {
60    return const_cast<X86TargetLowering*>(&TLInfo);
61  }
62  virtual const X86RegisterInfo  *getRegisterInfo() const {
63    return &InstrInfo.getRegisterInfo();
64  }
65  virtual const TargetData       *getTargetData() const { return &DataLayout; }
66  virtual const X86ELFWriterInfo *getELFWriterInfo() const {
67    return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
68  }
69
70  static unsigned getModuleMatchQuality(const Module &M);
71  static unsigned getJITMatchQuality();
72
73  static void registerAsmPrinter(AsmPrinterCtorFn F) {
74    AsmPrinterCtor = F;
75  }
76
77  // Set up the pass pipeline.
78  virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
79  virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
80  virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
81  virtual bool addAssemblyEmitter(PassManagerBase &PM,
82                                  CodeGenOpt::Level OptLevel,
83                                  bool Verbose, raw_ostream &Out);
84  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
85                              bool DumpAsm, MachineCodeEmitter &MCE);
86  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
87                              bool DumpAsm, JITCodeEmitter &JCE);
88  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
89                                    CodeGenOpt::Level OptLevel,
90                                    bool DumpAsm, MachineCodeEmitter &MCE);
91  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
92                                    CodeGenOpt::Level OptLevel,
93                                    bool DumpAsm, JITCodeEmitter &JCE);
94
95  /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
96  /// RIP-relative on this machine, taking into consideration the relocation
97  /// model and subtarget. RIP-relative addresses cannot have a separate
98  /// base or index register.
99  bool symbolicAddressesAreRIPRel() const;
100};
101
102/// X86_32TargetMachine - X86 32-bit target machine.
103///
104class X86_32TargetMachine : public X86TargetMachine {
105public:
106  X86_32TargetMachine(const Module &M, const std::string &FS);
107
108  static unsigned getJITMatchQuality();
109  static unsigned getModuleMatchQuality(const Module &M);
110};
111
112/// X86_64TargetMachine - X86 64-bit target machine.
113///
114class X86_64TargetMachine : public X86TargetMachine {
115public:
116  X86_64TargetMachine(const Module &M, const std::string &FS);
117
118  static unsigned getJITMatchQuality();
119  static unsigned getModuleMatchQuality(const Module &M);
120};
121
122} // End llvm namespace
123
124#endif
125