X86InstrVMX.td revision 218885 
1//===- X86InstrVMX.td - VMX Instruction Set Extension ------*- tablegen -*-===//
2// 
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7// 
8//===----------------------------------------------------------------------===//
9//
10// This file describes the instructions that make up the Intel VMX instruction
11// set.
12//
13//===----------------------------------------------------------------------===//
14
15//===----------------------------------------------------------------------===//
16// VMX instructions
17
18// 66 0F 38 80
19def INVEPT : I<0x80, RawFrm, (outs), (ins), "invept", []>, OpSize, T8;
20// 66 0F 38 81
21def INVVPID : I<0x81, RawFrm, (outs), (ins), "invvpid", []>, OpSize, T8;
22// 0F 01 C1
23def VMCALL : I<0x01, MRM_C1, (outs), (ins), "vmcall", []>, TB;
24def VMCLEARm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs),
25  "vmclear\t$vmcs", []>, OpSize, TB;
26// 0F 01 C2
27def VMLAUNCH : I<0x01, MRM_C2, (outs), (ins), "vmlaunch", []>, TB;
28// 0F 01 C3
29def VMRESUME : I<0x01, MRM_C3, (outs), (ins), "vmresume", []>, TB;
30def VMPTRLDm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs),
31  "vmptrld\t$vmcs", []>, TB;
32def VMPTRSTm : I<0xC7, MRM7m, (outs i64mem:$vmcs), (ins),
33  "vmptrst\t$vmcs", []>, TB;
34def VMREAD64rm : I<0x78, MRMDestMem, (outs i64mem:$dst), (ins GR64:$src),
35  "vmread{q}\t{$src, $dst|$dst, $src}", []>, TB;
36def VMREAD64rr : I<0x78, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
37  "vmread{q}\t{$src, $dst|$dst, $src}", []>, TB;
38def VMREAD32rm : I<0x78, MRMDestMem, (outs i32mem:$dst), (ins GR32:$src),
39  "vmread{l}\t{$src, $dst|$dst, $src}", []>, TB;
40def VMREAD32rr : I<0x78, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
41  "vmread{l}\t{$src, $dst|$dst, $src}", []>, TB;
42def VMWRITE64rm : I<0x79, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
43  "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, TB;
44def VMWRITE64rr : I<0x79, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
45  "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, TB;
46def VMWRITE32rm : I<0x79, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
47  "vmwrite{l}\t{$src, $dst|$dst, $src}", []>, TB;
48def VMWRITE32rr : I<0x79, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
49  "vmwrite{l}\t{$src, $dst|$dst, $src}", []>, TB;
50// 0F 01 C4
51def VMXOFF : I<0x01, MRM_C4, (outs), (ins), "vmxoff", []>, TB;
52def VMXON : I<0xC7, MRM6m, (outs), (ins i64mem:$vmxon),
53  "vmxon\t{$vmxon}", []>, XS;
54
55