PPCTargetMachine.cpp revision 261991
1193323Sed//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// Top-level implementation for the PowerPC target. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14234353Sdim#include "PPCTargetMachine.h" 15193323Sed#include "PPC.h" 16249423Sdim#include "llvm/CodeGen/Passes.h" 17249423Sdim#include "llvm/MC/MCStreamer.h" 18193323Sed#include "llvm/PassManager.h" 19239462Sdim#include "llvm/Support/CommandLine.h" 20198090Srdivacky#include "llvm/Support/FormattedStream.h" 21226633Sdim#include "llvm/Support/TargetRegistry.h" 22249423Sdim#include "llvm/Target/TargetOptions.h" 23193323Sedusing namespace llvm; 24193323Sed 25239462Sdimstatic cl:: 26239462Sdimopt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, 27239462Sdim cl::desc("Disable CTR loops for PPC")); 28239462Sdim 29198090Srdivackyextern "C" void LLVMInitializePowerPCTarget() { 30198090Srdivacky // Register the targets 31234353Sdim RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target); 32198090Srdivacky RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target); 33261991Sdim RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget); 34193323Sed} 35193323Sed 36226633SdimPPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, 37226633Sdim StringRef CPU, StringRef FS, 38234353Sdim const TargetOptions &Options, 39226633Sdim Reloc::Model RM, CodeModel::Model CM, 40234353Sdim CodeGenOpt::Level OL, 41226633Sdim bool is64Bit) 42234353Sdim : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 43224145Sdim Subtarget(TT, CPU, FS, is64Bit), 44243830Sdim DL(Subtarget.getDataLayoutString()), InstrInfo(*this), 45218893Sdim FrameLowering(Subtarget), JITInfo(*this, is64Bit), 46208599Srdivacky TLInfo(*this), TSInfo(*this), 47249423Sdim InstrItins(Subtarget.getInstrItineraryData()) { 48234353Sdim 49234353Sdim // The binutils for the BG/P are too old for CFI. 50234353Sdim if (Subtarget.isBGP()) 51234353Sdim setMCUseCFI(false); 52261991Sdim initAsmInfo(); 53193323Sed} 54193323Sed 55234353Sdimvoid PPC32TargetMachine::anchor() { } 56193323Sed 57234353SdimPPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, 58226633Sdim StringRef CPU, StringRef FS, 59234353Sdim const TargetOptions &Options, 60234353Sdim Reloc::Model RM, CodeModel::Model CM, 61234353Sdim CodeGenOpt::Level OL) 62234353Sdim : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 63193323Sed} 64193323Sed 65234353Sdimvoid PPC64TargetMachine::anchor() { } 66193323Sed 67234353SdimPPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT, 68226633Sdim StringRef CPU, StringRef FS, 69234353Sdim const TargetOptions &Options, 70234353Sdim Reloc::Model RM, CodeModel::Model CM, 71234353Sdim CodeGenOpt::Level OL) 72234353Sdim : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { 73193323Sed} 74193323Sed 75193323Sed 76193323Sed//===----------------------------------------------------------------------===// 77193323Sed// Pass Pipeline Configuration 78193323Sed//===----------------------------------------------------------------------===// 79193323Sed 80234353Sdimnamespace { 81234353Sdim/// PPC Code Generator Pass Configuration Options. 82234353Sdimclass PPCPassConfig : public TargetPassConfig { 83234353Sdimpublic: 84234353Sdim PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM) 85234353Sdim : TargetPassConfig(TM, PM) {} 86234353Sdim 87234353Sdim PPCTargetMachine &getPPCTargetMachine() const { 88234353Sdim return getTM<PPCTargetMachine>(); 89234353Sdim } 90234353Sdim 91251662Sdim const PPCSubtarget &getPPCSubtarget() const { 92251662Sdim return *getPPCTargetMachine().getSubtargetImpl(); 93251662Sdim } 94251662Sdim 95261991Sdim virtual bool addPreISel(); 96251662Sdim virtual bool addILPOpts(); 97234353Sdim virtual bool addInstSelector(); 98251662Sdim virtual bool addPreSched2(); 99234353Sdim virtual bool addPreEmitPass(); 100234353Sdim}; 101234353Sdim} // namespace 102234353Sdim 103234353SdimTargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) { 104239462Sdim return new PPCPassConfig(this, PM); 105239462Sdim} 106234353Sdim 107261991Sdimbool PPCPassConfig::addPreISel() { 108239462Sdim if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) 109261991Sdim addPass(createPPCCTRLoops(getPPCTargetMachine())); 110234353Sdim 111239462Sdim return false; 112234353Sdim} 113234353Sdim 114251662Sdimbool PPCPassConfig::addILPOpts() { 115251662Sdim if (getPPCSubtarget().hasISEL()) { 116251662Sdim addPass(&EarlyIfConverterID); 117251662Sdim return true; 118251662Sdim } 119251662Sdim 120251662Sdim return false; 121251662Sdim} 122251662Sdim 123234353Sdimbool PPCPassConfig::addInstSelector() { 124193323Sed // Install an instruction selector. 125239462Sdim addPass(createPPCISelDag(getPPCTargetMachine())); 126261991Sdim 127261991Sdim#ifndef NDEBUG 128261991Sdim if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) 129261991Sdim addPass(createPPCCTRLoopsVerify()); 130261991Sdim#endif 131261991Sdim 132193323Sed return false; 133193323Sed} 134193323Sed 135251662Sdimbool PPCPassConfig::addPreSched2() { 136251662Sdim if (getOptLevel() != CodeGenOpt::None) 137251662Sdim addPass(&IfConverterID); 138251662Sdim 139251662Sdim return true; 140251662Sdim} 141251662Sdim 142234353Sdimbool PPCPassConfig::addPreEmitPass() { 143251662Sdim if (getOptLevel() != CodeGenOpt::None) 144251662Sdim addPass(createPPCEarlyReturnPass()); 145193323Sed // Must run branch selection immediately preceding the asm printer. 146239462Sdim addPass(createPPCBranchSelectionPass()); 147193323Sed return false; 148193323Sed} 149193323Sed 150198090Srdivackybool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, 151198090Srdivacky JITCodeEmitter &JCE) { 152193323Sed // Inform the subtarget that we are in JIT mode. FIXME: does this break macho 153193323Sed // writing? 154193323Sed Subtarget.SetJITMode(); 155234353Sdim 156193323Sed // Machine code emitter pass for PowerPC. 157198090Srdivacky PM.add(createPPCJITCodeEmitterPass(*this, JCE)); 158193323Sed 159193323Sed return false; 160193323Sed} 161249423Sdim 162249423Sdimvoid PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) { 163249423Sdim // Add first the target-independent BasicTTI pass, then our PPC pass. This 164249423Sdim // allows the PPC pass to delegate to the target independent layer when 165249423Sdim // appropriate. 166261991Sdim PM.add(createBasicTargetTransformInfoPass(this)); 167249423Sdim PM.add(createPPCTargetTransformInfoPass(this)); 168249423Sdim} 169249423Sdim 170