PPCSubtarget.cpp revision 302408 
1//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the PPC specific subclass of TargetSubtargetInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPCSubtarget.h"
15#include "PPC.h"
16#include "PPCRegisterInfo.h"
17#include "PPCTargetMachine.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/MachineScheduler.h"
20#include "llvm/IR/Attributes.h"
21#include "llvm/IR/Function.h"
22#include "llvm/IR/GlobalValue.h"
23#include "llvm/Support/CommandLine.h"
24#include "llvm/Support/TargetRegistry.h"
25#include "llvm/Target/TargetMachine.h"
26#include <cstdlib>
27
28using namespace llvm;
29
30#define DEBUG_TYPE "ppc-subtarget"
31
32#define GET_SUBTARGETINFO_TARGET_DESC
33#define GET_SUBTARGETINFO_CTOR
34#include "PPCGenSubtargetInfo.inc"
35
36static cl::opt<bool> UseSubRegLiveness("ppc-track-subreg-liveness",
37cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden);
38
39static cl::opt<bool> QPXStackUnaligned("qpx-stack-unaligned",
40  cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"),
41  cl::Hidden);
42
43PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
44                                                            StringRef FS) {
45  initializeEnvironment();
46  initSubtargetFeatures(CPU, FS);
47  return *this;
48}
49
50PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
51                           const std::string &FS, const PPCTargetMachine &TM)
52    : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
53      IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
54              TargetTriple.getArch() == Triple::ppc64le),
55      TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, FS)),
56      InstrInfo(*this), TLInfo(TM, *this) {}
57
58void PPCSubtarget::initializeEnvironment() {
59  StackAlignment = 16;
60  DarwinDirective = PPC::DIR_NONE;
61  HasMFOCRF = false;
62  Has64BitSupport = false;
63  Use64BitRegs = false;
64  UseCRBits = false;
65  UseSoftFloat = false;
66  HasAltivec = false;
67  HasSPE = false;
68  HasQPX = false;
69  HasVSX = false;
70  HasP8Vector = false;
71  HasP8Altivec = false;
72  HasP8Crypto = false;
73  HasFCPSGN = false;
74  HasFSQRT = false;
75  HasFRE = false;
76  HasFRES = false;
77  HasFRSQRTE = false;
78  HasFRSQRTES = false;
79  HasRecipPrec = false;
80  HasSTFIWX = false;
81  HasLFIWAX = false;
82  HasFPRND = false;
83  HasFPCVT = false;
84  HasISEL = false;
85  HasPOPCNTD = false;
86  HasBPERMD = false;
87  HasExtDiv = false;
88  HasCMPB = false;
89  HasLDBRX = false;
90  IsBookE = false;
91  HasOnlyMSYNC = false;
92  IsPPC4xx = false;
93  IsPPC6xx = false;
94  IsE500 = false;
95  FeatureMFTB = false;
96  DeprecatedDST = false;
97  HasLazyResolverStubs = false;
98  HasICBT = false;
99  HasInvariantFunctionDescriptors = false;
100  HasPartwordAtomics = false;
101  HasDirectMove = false;
102  IsQPXStackUnaligned = false;
103  HasHTM = false;
104  HasFusion = false;
105  HasFloat128 = false;
106}
107
108void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
109  // Determine default and user specified characteristics
110  std::string CPUName = CPU;
111  if (CPUName.empty()) {
112    // If cross-compiling with -march=ppc64le without -mcpu
113    if (TargetTriple.getArch() == Triple::ppc64le)
114      CPUName = "ppc64le";
115    else
116      CPUName = "generic";
117  }
118
119  // Initialize scheduling itinerary for the specified CPU.
120  InstrItins = getInstrItineraryForCPU(CPUName);
121
122  // Parse features string.
123  ParseSubtargetFeatures(CPUName, FS);
124
125  // If the user requested use of 64-bit regs, but the cpu selected doesn't
126  // support it, ignore.
127  if (IsPPC64 && has64BitSupport())
128    Use64BitRegs = true;
129
130  // Set up darwin-specific properties.
131  if (isDarwin())
132    HasLazyResolverStubs = true;
133
134  // QPX requires a 32-byte aligned stack. Note that we need to do this if
135  // we're compiling for a BG/Q system regardless of whether or not QPX
136  // is enabled because external functions will assume this alignment.
137  IsQPXStackUnaligned = QPXStackUnaligned;
138  StackAlignment = getPlatformStackAlignment();
139
140  // Determine endianness.
141  // FIXME: Part of the TargetMachine.
142  IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
143}
144
145/// hasLazyResolverStub - Return true if accesses to the specified global have
146/// to go through a dyld lazy resolution stub.  This means that an extra load
147/// is required to get the address of the global.
148bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
149  // We never have stubs if HasLazyResolverStubs=false or if in static mode.
150  if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
151    return false;
152  bool isDecl = GV->isDeclaration();
153  if (GV->hasHiddenVisibility() && !isDecl && !GV->hasCommonLinkage())
154    return false;
155  return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
156         GV->hasCommonLinkage() || isDecl;
157}
158
159// Embedded cores need aggressive scheduling (and some others also benefit).
160static bool needsAggressiveScheduling(unsigned Directive) {
161  switch (Directive) {
162  default: return false;
163  case PPC::DIR_440:
164  case PPC::DIR_A2:
165  case PPC::DIR_E500mc:
166  case PPC::DIR_E5500:
167  case PPC::DIR_PWR7:
168  case PPC::DIR_PWR8:
169    return true;
170  }
171}
172
173bool PPCSubtarget::enableMachineScheduler() const {
174  // Enable MI scheduling for the embedded cores.
175  // FIXME: Enable this for all cores (some additional modeling
176  // may be necessary).
177  return needsAggressiveScheduling(DarwinDirective);
178}
179
180// This overrides the PostRAScheduler bit in the SchedModel for each CPU.
181bool PPCSubtarget::enablePostRAScheduler() const { return true; }
182
183PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
184  return TargetSubtargetInfo::ANTIDEP_ALL;
185}
186
187void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
188  CriticalPathRCs.clear();
189  CriticalPathRCs.push_back(isPPC64() ?
190                            &PPC::G8RCRegClass : &PPC::GPRCRegClass);
191}
192
193void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
194                                       MachineInstr *begin,
195                                       MachineInstr *end,
196                                       unsigned NumRegionInstrs) const {
197  if (needsAggressiveScheduling(DarwinDirective)) {
198    Policy.OnlyTopDown = false;
199    Policy.OnlyBottomUp = false;
200  }
201
202  // Spilling is generally expensive on all PPC cores, so always enable
203  // register-pressure tracking.
204  Policy.ShouldTrackPressure = true;
205}
206
207bool PPCSubtarget::useAA() const {
208  // Use AA during code generation for the embedded cores.
209  return needsAggressiveScheduling(DarwinDirective);
210}
211
212bool PPCSubtarget::enableSubRegLiveness() const {
213  return UseSubRegLiveness;
214}
215
216unsigned char PPCSubtarget::classifyGlobalReference(
217    const GlobalValue *GV) const {
218  // Note that currently we don't generate non-pic references.
219  // If a caller wants that, this will have to be updated.
220
221  // Large code model always uses the TOC even for local symbols.
222  if (TM.getCodeModel() == CodeModel::Large)
223    return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
224
225  unsigned char flags = PPCII::MO_PIC_FLAG;
226
227  // Only if the relocation mode is PIC do we have to worry about
228  // interposition. In all other cases we can use a slightly looser standard to
229  // decide how to access the symbol.
230  if (TM.getRelocationModel() == Reloc::PIC_) {
231    // If it's local, or it's non-default, it can't be interposed.
232    if (!GV->hasLocalLinkage() &&
233        GV->hasDefaultVisibility()) {
234      flags |= PPCII::MO_NLP_FLAG;
235    }
236    return flags;
237  }
238
239  if (GV->isStrongDefinitionForLinker())
240    return flags;
241  return flags | PPCII::MO_NLP_FLAG;
242}
243
244bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
245bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
246