PPCInstrAltivec.td revision 261991
1234353Sdim//===-- PPCInstrAltivec.td - The PowerPC Altivec Extension -*- tablegen -*-===// 2234353Sdim// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7234353Sdim// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file describes the Altivec extension to the PowerPC instruction set. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed//===----------------------------------------------------------------------===// 15193323Sed// Altivec transformation functions and pattern fragments. 16193323Sed// 17193323Sed 18206083Srdivacky// Since we canonicalize buildvectors to v16i8, all vnots "-1" operands will be 19206083Srdivacky// of that type. 20206083Srdivackydef vnot_ppc : PatFrag<(ops node:$in), 21206083Srdivacky (xor node:$in, (bitconvert (v16i8 immAllOnesV)))>; 22193323Sed 23193323Seddef vpkuhum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 24193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 25193323Sed return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), false); 26193323Sed}]>; 27193323Seddef vpkuwum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 28193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 29193323Sed return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), false); 30193323Sed}]>; 31193323Seddef vpkuhum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 32193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 33193323Sed return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), true); 34193323Sed}]>; 35193323Seddef vpkuwum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 36193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 37193323Sed return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), true); 38193323Sed}]>; 39193323Sed 40193323Sed 41193323Seddef vmrglb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 42204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 43193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, false); 44193323Sed}]>; 45193323Seddef vmrglh_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 46204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 47193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, false); 48193323Sed}]>; 49193323Seddef vmrglw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 50204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 51193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, false); 52193323Sed}]>; 53193323Seddef vmrghb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 54204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 55193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, false); 56193323Sed}]>; 57193323Seddef vmrghh_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 58204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 59193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, false); 60193323Sed}]>; 61193323Seddef vmrghw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 62204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 63193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, false); 64193323Sed}]>; 65193323Sed 66193323Sed 67193323Seddef vmrglb_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 68204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 69193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, true); 70193323Sed}]>; 71193323Seddef vmrglh_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 72193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 73193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, true); 74193323Sed}]>; 75193323Seddef vmrglw_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 76193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 77193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, true); 78193323Sed}]>; 79193323Seddef vmrghb_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 80193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 81193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, true); 82193323Sed}]>; 83193323Seddef vmrghh_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 84193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 85193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, true); 86193323Sed}]>; 87193323Seddef vmrghw_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 88193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 89193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, true); 90193323Sed}]>; 91193323Sed 92193323Sed 93193323Seddef VSLDOI_get_imm : SDNodeXForm<vector_shuffle, [{ 94193323Sed return getI32Imm(PPC::isVSLDOIShuffleMask(N, false)); 95193323Sed}]>; 96193323Seddef vsldoi_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 97193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 98193323Sed return PPC::isVSLDOIShuffleMask(N, false) != -1; 99193323Sed}], VSLDOI_get_imm>; 100193323Sed 101193323Sed 102193323Sed/// VSLDOI_unary* - These are used to match vsldoi(X,X), which is turned into 103193323Sed/// vector_shuffle(X,undef,mask) by the dag combiner. 104193323Seddef VSLDOI_unary_get_imm : SDNodeXForm<vector_shuffle, [{ 105193323Sed return getI32Imm(PPC::isVSLDOIShuffleMask(N, true)); 106193323Sed}]>; 107193323Seddef vsldoi_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 108193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 109193323Sed return PPC::isVSLDOIShuffleMask(N, true) != -1; 110193323Sed}], VSLDOI_unary_get_imm>; 111193323Sed 112193323Sed 113193323Sed// VSPLT*_get_imm xform function: convert vector_shuffle mask to VSPLT* imm. 114193323Seddef VSPLTB_get_imm : SDNodeXForm<vector_shuffle, [{ 115193323Sed return getI32Imm(PPC::getVSPLTImmediate(N, 1)); 116193323Sed}]>; 117193323Seddef vspltb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 118193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 119193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 1); 120193323Sed}], VSPLTB_get_imm>; 121193323Seddef VSPLTH_get_imm : SDNodeXForm<vector_shuffle, [{ 122193323Sed return getI32Imm(PPC::getVSPLTImmediate(N, 2)); 123193323Sed}]>; 124193323Seddef vsplth_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 125193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 126193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 2); 127193323Sed}], VSPLTH_get_imm>; 128193323Seddef VSPLTW_get_imm : SDNodeXForm<vector_shuffle, [{ 129193323Sed return getI32Imm(PPC::getVSPLTImmediate(N, 4)); 130193323Sed}]>; 131193323Seddef vspltw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 132193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 133193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 4); 134193323Sed}], VSPLTW_get_imm>; 135193323Sed 136193323Sed 137193323Sed// VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm. 138193323Seddef VSPLTISB_get_imm : SDNodeXForm<build_vector, [{ 139193323Sed return PPC::get_VSPLTI_elt(N, 1, *CurDAG); 140193323Sed}]>; 141193323Seddef vecspltisb : PatLeaf<(build_vector), [{ 142193323Sed return PPC::get_VSPLTI_elt(N, 1, *CurDAG).getNode() != 0; 143193323Sed}], VSPLTISB_get_imm>; 144193323Sed 145193323Sed// VSPLTISH_get_imm xform function: convert build_vector to VSPLTISH imm. 146193323Seddef VSPLTISH_get_imm : SDNodeXForm<build_vector, [{ 147193323Sed return PPC::get_VSPLTI_elt(N, 2, *CurDAG); 148193323Sed}]>; 149193323Seddef vecspltish : PatLeaf<(build_vector), [{ 150193323Sed return PPC::get_VSPLTI_elt(N, 2, *CurDAG).getNode() != 0; 151193323Sed}], VSPLTISH_get_imm>; 152193323Sed 153193323Sed// VSPLTISW_get_imm xform function: convert build_vector to VSPLTISW imm. 154193323Seddef VSPLTISW_get_imm : SDNodeXForm<build_vector, [{ 155193323Sed return PPC::get_VSPLTI_elt(N, 4, *CurDAG); 156193323Sed}]>; 157193323Seddef vecspltisw : PatLeaf<(build_vector), [{ 158193323Sed return PPC::get_VSPLTI_elt(N, 4, *CurDAG).getNode() != 0; 159193323Sed}], VSPLTISW_get_imm>; 160193323Sed 161193323Sed//===----------------------------------------------------------------------===// 162193323Sed// Helpers for defining instructions that directly correspond to intrinsics. 163193323Sed 164249423Sdim// VA1a_Int_Ty - A VAForm_1a intrinsic definition of specific type. 165249423Sdimclass VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty> 166251662Sdim : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC), 167193323Sed !strconcat(opc, " $vD, $vA, $vB, $vC"), VecFP, 168249423Sdim [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>; 169193323Sed 170249423Sdim// VA1a_Int_Ty2 - A VAForm_1a intrinsic definition where the type of the 171249423Sdim// inputs doesn't match the type of the output. 172249423Sdimclass VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy, 173249423Sdim ValueType InTy> 174251662Sdim : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC), 175249423Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), VecFP, 176249423Sdim [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>; 177249423Sdim 178249423Sdim// VA1a_Int_Ty3 - A VAForm_1a intrinsic definition where there are two 179249423Sdim// input types and an output type. 180249423Sdimclass VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy, 181249423Sdim ValueType In1Ty, ValueType In2Ty> 182251662Sdim : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC), 183249423Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), VecFP, 184249423Sdim [(set OutTy:$vD, 185249423Sdim (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>; 186249423Sdim 187249423Sdim// VX1_Int_Ty - A VXForm_1 intrinsic definition of specific type. 188249423Sdimclass VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty> 189251662Sdim : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 190193323Sed !strconcat(opc, " $vD, $vA, $vB"), VecFP, 191249423Sdim [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>; 192193323Sed 193249423Sdim// VX1_Int_Ty2 - A VXForm_1 intrinsic definition where the type of the 194249423Sdim// inputs doesn't match the type of the output. 195249423Sdimclass VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 196249423Sdim ValueType InTy> 197251662Sdim : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 198249423Sdim !strconcat(opc, " $vD, $vA, $vB"), VecFP, 199249423Sdim [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>; 200249423Sdim 201249423Sdim// VX1_Int_Ty3 - A VXForm_1 intrinsic definition where there are two 202249423Sdim// input types and an output type. 203249423Sdimclass VX1_Int_Ty3<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 204249423Sdim ValueType In1Ty, ValueType In2Ty> 205251662Sdim : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 206249423Sdim !strconcat(opc, " $vD, $vA, $vB"), VecFP, 207249423Sdim [(set OutTy:$vD, (IntID In1Ty:$vA, In2Ty:$vB))]>; 208249423Sdim 209249423Sdim// VX2_Int_SP - A VXForm_2 intrinsic definition of vector single-precision type. 210249423Sdimclass VX2_Int_SP<bits<11> xo, string opc, Intrinsic IntID> 211251662Sdim : VXForm_2<xo, (outs vrrc:$vD), (ins vrrc:$vB), 212193323Sed !strconcat(opc, " $vD, $vB"), VecFP, 213249423Sdim [(set v4f32:$vD, (IntID v4f32:$vB))]>; 214193323Sed 215249423Sdim// VX2_Int_Ty2 - A VXForm_2 intrinsic definition where the type of the 216249423Sdim// inputs doesn't match the type of the output. 217249423Sdimclass VX2_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 218249423Sdim ValueType InTy> 219251662Sdim : VXForm_2<xo, (outs vrrc:$vD), (ins vrrc:$vB), 220249423Sdim !strconcat(opc, " $vD, $vB"), VecFP, 221249423Sdim [(set OutTy:$vD, (IntID InTy:$vB))]>; 222249423Sdim 223193323Sed//===----------------------------------------------------------------------===// 224193323Sed// Instruction Definitions. 225193323Sed 226249423Sdimdef HasAltivec : Predicate<"PPCSubTarget.hasAltivec()">; 227249423Sdimlet Predicates = [HasAltivec] in { 228249423Sdim 229249423Sdimlet isCodeGenOnly = 1 in { 230193323Seddef DSS : DSS_Form<822, (outs), 231193323Sed (ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2), 232261991Sdim "dss $STRM", LdStLoad /*FIXME*/, []>, 233261991Sdim Deprecated<DeprecatedDST>; 234193323Seddef DSSALL : DSS_Form<822, (outs), 235193323Sed (ins u5imm:$ONE, u5imm:$ZERO0,u5imm:$ZERO1,u5imm:$ZERO2), 236261991Sdim "dssall", LdStLoad /*FIXME*/, []>, 237261991Sdim Deprecated<DeprecatedDST>; 238193323Seddef DST : DSS_Form<342, (outs), 239251662Sdim (ins u5imm:$ZERO, u5imm:$STRM, gprc:$rA, gprc:$rB), 240261991Sdim "dst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 241261991Sdim Deprecated<DeprecatedDST>; 242193323Seddef DSTT : DSS_Form<342, (outs), 243251662Sdim (ins u5imm:$ONE, u5imm:$STRM, gprc:$rA, gprc:$rB), 244261991Sdim "dstt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 245261991Sdim Deprecated<DeprecatedDST>; 246193323Seddef DSTST : DSS_Form<374, (outs), 247251662Sdim (ins u5imm:$ZERO, u5imm:$STRM, gprc:$rA, gprc:$rB), 248261991Sdim "dstst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 249261991Sdim Deprecated<DeprecatedDST>; 250193323Seddef DSTSTT : DSS_Form<374, (outs), 251251662Sdim (ins u5imm:$ONE, u5imm:$STRM, gprc:$rA, gprc:$rB), 252261991Sdim "dststt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 253261991Sdim Deprecated<DeprecatedDST>; 254193323Sed 255193323Seddef DST64 : DSS_Form<342, (outs), 256251662Sdim (ins u5imm:$ZERO, u5imm:$STRM, g8rc:$rA, gprc:$rB), 257261991Sdim "dst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 258261991Sdim Deprecated<DeprecatedDST>; 259193323Seddef DSTT64 : DSS_Form<342, (outs), 260251662Sdim (ins u5imm:$ONE, u5imm:$STRM, g8rc:$rA, gprc:$rB), 261261991Sdim "dstt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 262261991Sdim Deprecated<DeprecatedDST>; 263193323Seddef DSTST64 : DSS_Form<374, (outs), 264251662Sdim (ins u5imm:$ZERO, u5imm:$STRM, g8rc:$rA, gprc:$rB), 265261991Sdim "dstst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 266261991Sdim Deprecated<DeprecatedDST>; 267193323Seddef DSTSTT64 : DSS_Form<374, (outs), 268251662Sdim (ins u5imm:$ONE, u5imm:$STRM, g8rc:$rA, gprc:$rB), 269261991Sdim "dststt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>, 270261991Sdim Deprecated<DeprecatedDST>; 271249423Sdim} 272193323Sed 273251662Sdimdef MFVSCR : VXForm_4<1540, (outs vrrc:$vD), (ins), 274234353Sdim "mfvscr $vD", LdStStore, 275249423Sdim [(set v8i16:$vD, (int_ppc_altivec_mfvscr))]>; 276251662Sdimdef MTVSCR : VXForm_5<1604, (outs), (ins vrrc:$vB), 277234353Sdim "mtvscr $vB", LdStLoad, 278249423Sdim [(int_ppc_altivec_mtvscr v4i32:$vB)]>; 279193323Sed 280193323Sedlet canFoldAsLoad = 1, PPC970_Unit = 2 in { // Loads. 281251662Sdimdef LVEBX: XForm_1<31, 7, (outs vrrc:$vD), (ins memrr:$src), 282234353Sdim "lvebx $vD, $src", LdStLoad, 283249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvebx xoaddr:$src))]>; 284251662Sdimdef LVEHX: XForm_1<31, 39, (outs vrrc:$vD), (ins memrr:$src), 285234353Sdim "lvehx $vD, $src", LdStLoad, 286249423Sdim [(set v8i16:$vD, (int_ppc_altivec_lvehx xoaddr:$src))]>; 287251662Sdimdef LVEWX: XForm_1<31, 71, (outs vrrc:$vD), (ins memrr:$src), 288234353Sdim "lvewx $vD, $src", LdStLoad, 289249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvewx xoaddr:$src))]>; 290251662Sdimdef LVX : XForm_1<31, 103, (outs vrrc:$vD), (ins memrr:$src), 291234353Sdim "lvx $vD, $src", LdStLoad, 292249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvx xoaddr:$src))]>; 293251662Sdimdef LVXL : XForm_1<31, 359, (outs vrrc:$vD), (ins memrr:$src), 294234353Sdim "lvxl $vD, $src", LdStLoad, 295249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvxl xoaddr:$src))]>; 296193323Sed} 297193323Sed 298251662Sdimdef LVSL : XForm_1<31, 6, (outs vrrc:$vD), (ins memrr:$src), 299234353Sdim "lvsl $vD, $src", LdStLoad, 300249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvsl xoaddr:$src))]>, 301193323Sed PPC970_Unit_LSU; 302251662Sdimdef LVSR : XForm_1<31, 38, (outs vrrc:$vD), (ins memrr:$src), 303234353Sdim "lvsr $vD, $src", LdStLoad, 304249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvsr xoaddr:$src))]>, 305193323Sed PPC970_Unit_LSU; 306193323Sed 307193323Sedlet PPC970_Unit = 2 in { // Stores. 308251662Sdimdef STVEBX: XForm_8<31, 135, (outs), (ins vrrc:$rS, memrr:$dst), 309234353Sdim "stvebx $rS, $dst", LdStStore, 310249423Sdim [(int_ppc_altivec_stvebx v16i8:$rS, xoaddr:$dst)]>; 311251662Sdimdef STVEHX: XForm_8<31, 167, (outs), (ins vrrc:$rS, memrr:$dst), 312234353Sdim "stvehx $rS, $dst", LdStStore, 313249423Sdim [(int_ppc_altivec_stvehx v8i16:$rS, xoaddr:$dst)]>; 314251662Sdimdef STVEWX: XForm_8<31, 199, (outs), (ins vrrc:$rS, memrr:$dst), 315234353Sdim "stvewx $rS, $dst", LdStStore, 316249423Sdim [(int_ppc_altivec_stvewx v4i32:$rS, xoaddr:$dst)]>; 317251662Sdimdef STVX : XForm_8<31, 231, (outs), (ins vrrc:$rS, memrr:$dst), 318234353Sdim "stvx $rS, $dst", LdStStore, 319249423Sdim [(int_ppc_altivec_stvx v4i32:$rS, xoaddr:$dst)]>; 320251662Sdimdef STVXL : XForm_8<31, 487, (outs), (ins vrrc:$rS, memrr:$dst), 321234353Sdim "stvxl $rS, $dst", LdStStore, 322249423Sdim [(int_ppc_altivec_stvxl v4i32:$rS, xoaddr:$dst)]>; 323193323Sed} 324193323Sed 325193323Sedlet PPC970_Unit = 5 in { // VALU Operations. 326193323Sed// VA-Form instructions. 3-input AltiVec ops. 327251662Sdimdef VMADDFP : VAForm_1<46, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB), 328193323Sed "vmaddfp $vD, $vA, $vC, $vB", VecFP, 329249423Sdim [(set v4f32:$vD, 330249423Sdim (fma v4f32:$vA, v4f32:$vC, v4f32:$vB))]>; 331249423Sdim 332249423Sdim// FIXME: The fma+fneg pattern won't match because fneg is not legal. 333251662Sdimdef VNMSUBFP: VAForm_1<47, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB), 334193323Sed "vnmsubfp $vD, $vA, $vC, $vB", VecFP, 335249423Sdim [(set v4f32:$vD, (fneg (fma v4f32:$vA, v4f32:$vC, 336249423Sdim (fneg v4f32:$vB))))]>; 337193323Sed 338249423Sdimdef VMHADDSHS : VA1a_Int_Ty<32, "vmhaddshs", int_ppc_altivec_vmhaddshs, v8i16>; 339249423Sdimdef VMHRADDSHS : VA1a_Int_Ty<33, "vmhraddshs", int_ppc_altivec_vmhraddshs, 340249423Sdim v8i16>; 341249423Sdimdef VMLADDUHM : VA1a_Int_Ty<34, "vmladduhm", int_ppc_altivec_vmladduhm, v8i16>; 342193323Sed 343249423Sdimdef VPERM : VA1a_Int_Ty3<43, "vperm", int_ppc_altivec_vperm, 344249423Sdim v4i32, v4i32, v16i8>; 345249423Sdimdef VSEL : VA1a_Int_Ty<42, "vsel", int_ppc_altivec_vsel, v4i32>; 346249423Sdim 347193323Sed// Shuffles. 348251662Sdimdef VSLDOI : VAForm_2<44, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, u5imm:$SH), 349193323Sed "vsldoi $vD, $vA, $vB, $SH", VecFP, 350249423Sdim [(set v16i8:$vD, 351249423Sdim (vsldoi_shuffle:$SH v16i8:$vA, v16i8:$vB))]>; 352193323Sed 353193323Sed// VX-Form instructions. AltiVec arithmetic ops. 354251662Sdimdef VADDFP : VXForm_1<10, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 355193323Sed "vaddfp $vD, $vA, $vB", VecFP, 356249423Sdim [(set v4f32:$vD, (fadd v4f32:$vA, v4f32:$vB))]>; 357193323Sed 358251662Sdimdef VADDUBM : VXForm_1<0, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 359193323Sed "vaddubm $vD, $vA, $vB", VecGeneral, 360249423Sdim [(set v16i8:$vD, (add v16i8:$vA, v16i8:$vB))]>; 361251662Sdimdef VADDUHM : VXForm_1<64, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 362193323Sed "vadduhm $vD, $vA, $vB", VecGeneral, 363249423Sdim [(set v8i16:$vD, (add v8i16:$vA, v8i16:$vB))]>; 364251662Sdimdef VADDUWM : VXForm_1<128, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 365193323Sed "vadduwm $vD, $vA, $vB", VecGeneral, 366249423Sdim [(set v4i32:$vD, (add v4i32:$vA, v4i32:$vB))]>; 367193323Sed 368249423Sdimdef VADDCUW : VX1_Int_Ty<384, "vaddcuw", int_ppc_altivec_vaddcuw, v4i32>; 369249423Sdimdef VADDSBS : VX1_Int_Ty<768, "vaddsbs", int_ppc_altivec_vaddsbs, v16i8>; 370249423Sdimdef VADDSHS : VX1_Int_Ty<832, "vaddshs", int_ppc_altivec_vaddshs, v8i16>; 371249423Sdimdef VADDSWS : VX1_Int_Ty<896, "vaddsws", int_ppc_altivec_vaddsws, v4i32>; 372249423Sdimdef VADDUBS : VX1_Int_Ty<512, "vaddubs", int_ppc_altivec_vaddubs, v16i8>; 373249423Sdimdef VADDUHS : VX1_Int_Ty<576, "vadduhs", int_ppc_altivec_vadduhs, v8i16>; 374249423Sdimdef VADDUWS : VX1_Int_Ty<640, "vadduws", int_ppc_altivec_vadduws, v4i32>; 375193323Sed 376193323Sed 377251662Sdimdef VAND : VXForm_1<1028, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 378193323Sed "vand $vD, $vA, $vB", VecFP, 379249423Sdim [(set v4i32:$vD, (and v4i32:$vA, v4i32:$vB))]>; 380251662Sdimdef VANDC : VXForm_1<1092, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 381193323Sed "vandc $vD, $vA, $vB", VecFP, 382249423Sdim [(set v4i32:$vD, (and v4i32:$vA, 383249423Sdim (vnot_ppc v4i32:$vB)))]>; 384193323Sed 385251662Sdimdef VCFSX : VXForm_1<842, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 386193323Sed "vcfsx $vD, $vB, $UIMM", VecFP, 387249423Sdim [(set v4f32:$vD, 388249423Sdim (int_ppc_altivec_vcfsx v4i32:$vB, imm:$UIMM))]>; 389251662Sdimdef VCFUX : VXForm_1<778, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 390193323Sed "vcfux $vD, $vB, $UIMM", VecFP, 391249423Sdim [(set v4f32:$vD, 392249423Sdim (int_ppc_altivec_vcfux v4i32:$vB, imm:$UIMM))]>; 393251662Sdimdef VCTSXS : VXForm_1<970, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 394193323Sed "vctsxs $vD, $vB, $UIMM", VecFP, 395249423Sdim [(set v4i32:$vD, 396249423Sdim (int_ppc_altivec_vctsxs v4f32:$vB, imm:$UIMM))]>; 397251662Sdimdef VCTUXS : VXForm_1<906, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 398193323Sed "vctuxs $vD, $vB, $UIMM", VecFP, 399249423Sdim [(set v4i32:$vD, 400249423Sdim (int_ppc_altivec_vctuxs v4f32:$vB, imm:$UIMM))]>; 401243830Sdim 402243830Sdim// Defines with the UIM field set to 0 for floating-point 403243830Sdim// to integer (fp_to_sint/fp_to_uint) conversions and integer 404243830Sdim// to floating-point (sint_to_fp/uint_to_fp) conversions. 405261991Sdimlet isCodeGenOnly = 1, VA = 0 in { 406251662Sdimdef VCFSX_0 : VXForm_1<842, (outs vrrc:$vD), (ins vrrc:$vB), 407243830Sdim "vcfsx $vD, $vB, 0", VecFP, 408249423Sdim [(set v4f32:$vD, 409249423Sdim (int_ppc_altivec_vcfsx v4i32:$vB, 0))]>; 410251662Sdimdef VCTUXS_0 : VXForm_1<906, (outs vrrc:$vD), (ins vrrc:$vB), 411243830Sdim "vctuxs $vD, $vB, 0", VecFP, 412249423Sdim [(set v4i32:$vD, 413249423Sdim (int_ppc_altivec_vctuxs v4f32:$vB, 0))]>; 414251662Sdimdef VCFUX_0 : VXForm_1<778, (outs vrrc:$vD), (ins vrrc:$vB), 415243830Sdim "vcfux $vD, $vB, 0", VecFP, 416249423Sdim [(set v4f32:$vD, 417249423Sdim (int_ppc_altivec_vcfux v4i32:$vB, 0))]>; 418251662Sdimdef VCTSXS_0 : VXForm_1<970, (outs vrrc:$vD), (ins vrrc:$vB), 419243830Sdim "vctsxs $vD, $vB, 0", VecFP, 420249423Sdim [(set v4i32:$vD, 421249423Sdim (int_ppc_altivec_vctsxs v4f32:$vB, 0))]>; 422243830Sdim} 423249423Sdimdef VEXPTEFP : VX2_Int_SP<394, "vexptefp", int_ppc_altivec_vexptefp>; 424249423Sdimdef VLOGEFP : VX2_Int_SP<458, "vlogefp", int_ppc_altivec_vlogefp>; 425193323Sed 426249423Sdimdef VAVGSB : VX1_Int_Ty<1282, "vavgsb", int_ppc_altivec_vavgsb, v16i8>; 427249423Sdimdef VAVGSH : VX1_Int_Ty<1346, "vavgsh", int_ppc_altivec_vavgsh, v8i16>; 428249423Sdimdef VAVGSW : VX1_Int_Ty<1410, "vavgsw", int_ppc_altivec_vavgsw, v4i32>; 429249423Sdimdef VAVGUB : VX1_Int_Ty<1026, "vavgub", int_ppc_altivec_vavgub, v16i8>; 430249423Sdimdef VAVGUH : VX1_Int_Ty<1090, "vavguh", int_ppc_altivec_vavguh, v8i16>; 431249423Sdimdef VAVGUW : VX1_Int_Ty<1154, "vavguw", int_ppc_altivec_vavguw, v4i32>; 432193323Sed 433249423Sdimdef VMAXFP : VX1_Int_Ty<1034, "vmaxfp", int_ppc_altivec_vmaxfp, v4f32>; 434249423Sdimdef VMAXSB : VX1_Int_Ty< 258, "vmaxsb", int_ppc_altivec_vmaxsb, v16i8>; 435249423Sdimdef VMAXSH : VX1_Int_Ty< 322, "vmaxsh", int_ppc_altivec_vmaxsh, v8i16>; 436249423Sdimdef VMAXSW : VX1_Int_Ty< 386, "vmaxsw", int_ppc_altivec_vmaxsw, v4i32>; 437249423Sdimdef VMAXUB : VX1_Int_Ty< 2, "vmaxub", int_ppc_altivec_vmaxub, v16i8>; 438249423Sdimdef VMAXUH : VX1_Int_Ty< 66, "vmaxuh", int_ppc_altivec_vmaxuh, v8i16>; 439249423Sdimdef VMAXUW : VX1_Int_Ty< 130, "vmaxuw", int_ppc_altivec_vmaxuw, v4i32>; 440249423Sdimdef VMINFP : VX1_Int_Ty<1098, "vminfp", int_ppc_altivec_vminfp, v4f32>; 441249423Sdimdef VMINSB : VX1_Int_Ty< 770, "vminsb", int_ppc_altivec_vminsb, v16i8>; 442249423Sdimdef VMINSH : VX1_Int_Ty< 834, "vminsh", int_ppc_altivec_vminsh, v8i16>; 443249423Sdimdef VMINSW : VX1_Int_Ty< 898, "vminsw", int_ppc_altivec_vminsw, v4i32>; 444249423Sdimdef VMINUB : VX1_Int_Ty< 514, "vminub", int_ppc_altivec_vminub, v16i8>; 445249423Sdimdef VMINUH : VX1_Int_Ty< 578, "vminuh", int_ppc_altivec_vminuh, v8i16>; 446249423Sdimdef VMINUW : VX1_Int_Ty< 642, "vminuw", int_ppc_altivec_vminuw, v4i32>; 447193323Sed 448251662Sdimdef VMRGHB : VXForm_1< 12, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 449193323Sed "vmrghb $vD, $vA, $vB", VecFP, 450249423Sdim [(set v16i8:$vD, (vmrghb_shuffle v16i8:$vA, v16i8:$vB))]>; 451251662Sdimdef VMRGHH : VXForm_1< 76, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 452193323Sed "vmrghh $vD, $vA, $vB", VecFP, 453249423Sdim [(set v16i8:$vD, (vmrghh_shuffle v16i8:$vA, v16i8:$vB))]>; 454251662Sdimdef VMRGHW : VXForm_1<140, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 455193323Sed "vmrghw $vD, $vA, $vB", VecFP, 456249423Sdim [(set v16i8:$vD, (vmrghw_shuffle v16i8:$vA, v16i8:$vB))]>; 457251662Sdimdef VMRGLB : VXForm_1<268, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 458193323Sed "vmrglb $vD, $vA, $vB", VecFP, 459249423Sdim [(set v16i8:$vD, (vmrglb_shuffle v16i8:$vA, v16i8:$vB))]>; 460251662Sdimdef VMRGLH : VXForm_1<332, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 461193323Sed "vmrglh $vD, $vA, $vB", VecFP, 462249423Sdim [(set v16i8:$vD, (vmrglh_shuffle v16i8:$vA, v16i8:$vB))]>; 463251662Sdimdef VMRGLW : VXForm_1<396, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 464193323Sed "vmrglw $vD, $vA, $vB", VecFP, 465249423Sdim [(set v16i8:$vD, (vmrglw_shuffle v16i8:$vA, v16i8:$vB))]>; 466193323Sed 467249423Sdimdef VMSUMMBM : VA1a_Int_Ty3<37, "vmsummbm", int_ppc_altivec_vmsummbm, 468249423Sdim v4i32, v16i8, v4i32>; 469249423Sdimdef VMSUMSHM : VA1a_Int_Ty3<40, "vmsumshm", int_ppc_altivec_vmsumshm, 470249423Sdim v4i32, v8i16, v4i32>; 471249423Sdimdef VMSUMSHS : VA1a_Int_Ty3<41, "vmsumshs", int_ppc_altivec_vmsumshs, 472249423Sdim v4i32, v8i16, v4i32>; 473249423Sdimdef VMSUMUBM : VA1a_Int_Ty3<36, "vmsumubm", int_ppc_altivec_vmsumubm, 474249423Sdim v4i32, v16i8, v4i32>; 475249423Sdimdef VMSUMUHM : VA1a_Int_Ty3<38, "vmsumuhm", int_ppc_altivec_vmsumuhm, 476249423Sdim v4i32, v8i16, v4i32>; 477249423Sdimdef VMSUMUHS : VA1a_Int_Ty3<39, "vmsumuhs", int_ppc_altivec_vmsumuhs, 478249423Sdim v4i32, v8i16, v4i32>; 479193323Sed 480249423Sdimdef VMULESB : VX1_Int_Ty2<776, "vmulesb", int_ppc_altivec_vmulesb, 481249423Sdim v8i16, v16i8>; 482249423Sdimdef VMULESH : VX1_Int_Ty2<840, "vmulesh", int_ppc_altivec_vmulesh, 483249423Sdim v4i32, v8i16>; 484249423Sdimdef VMULEUB : VX1_Int_Ty2<520, "vmuleub", int_ppc_altivec_vmuleub, 485249423Sdim v8i16, v16i8>; 486249423Sdimdef VMULEUH : VX1_Int_Ty2<584, "vmuleuh", int_ppc_altivec_vmuleuh, 487249423Sdim v4i32, v8i16>; 488249423Sdimdef VMULOSB : VX1_Int_Ty2<264, "vmulosb", int_ppc_altivec_vmulosb, 489249423Sdim v8i16, v16i8>; 490249423Sdimdef VMULOSH : VX1_Int_Ty2<328, "vmulosh", int_ppc_altivec_vmulosh, 491249423Sdim v4i32, v8i16>; 492249423Sdimdef VMULOUB : VX1_Int_Ty2< 8, "vmuloub", int_ppc_altivec_vmuloub, 493249423Sdim v8i16, v16i8>; 494249423Sdimdef VMULOUH : VX1_Int_Ty2< 72, "vmulouh", int_ppc_altivec_vmulouh, 495249423Sdim v4i32, v8i16>; 496193323Sed 497249423Sdimdef VREFP : VX2_Int_SP<266, "vrefp", int_ppc_altivec_vrefp>; 498249423Sdimdef VRFIM : VX2_Int_SP<714, "vrfim", int_ppc_altivec_vrfim>; 499249423Sdimdef VRFIN : VX2_Int_SP<522, "vrfin", int_ppc_altivec_vrfin>; 500249423Sdimdef VRFIP : VX2_Int_SP<650, "vrfip", int_ppc_altivec_vrfip>; 501249423Sdimdef VRFIZ : VX2_Int_SP<586, "vrfiz", int_ppc_altivec_vrfiz>; 502249423Sdimdef VRSQRTEFP : VX2_Int_SP<330, "vrsqrtefp", int_ppc_altivec_vrsqrtefp>; 503193323Sed 504251662Sdimdef VSUBCUW : VX1_Int_Ty<1408, "vsubcuw", int_ppc_altivec_vsubcuw, v4i32>; 505193323Sed 506251662Sdimdef VSUBFP : VXForm_1<74, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 507193323Sed "vsubfp $vD, $vA, $vB", VecGeneral, 508249423Sdim [(set v4f32:$vD, (fsub v4f32:$vA, v4f32:$vB))]>; 509251662Sdimdef VSUBUBM : VXForm_1<1024, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 510193323Sed "vsububm $vD, $vA, $vB", VecGeneral, 511249423Sdim [(set v16i8:$vD, (sub v16i8:$vA, v16i8:$vB))]>; 512251662Sdimdef VSUBUHM : VXForm_1<1088, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 513193323Sed "vsubuhm $vD, $vA, $vB", VecGeneral, 514249423Sdim [(set v8i16:$vD, (sub v8i16:$vA, v8i16:$vB))]>; 515251662Sdimdef VSUBUWM : VXForm_1<1152, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 516193323Sed "vsubuwm $vD, $vA, $vB", VecGeneral, 517249423Sdim [(set v4i32:$vD, (sub v4i32:$vA, v4i32:$vB))]>; 518193323Sed 519249423Sdimdef VSUBSBS : VX1_Int_Ty<1792, "vsubsbs" , int_ppc_altivec_vsubsbs, v16i8>; 520249423Sdimdef VSUBSHS : VX1_Int_Ty<1856, "vsubshs" , int_ppc_altivec_vsubshs, v8i16>; 521249423Sdimdef VSUBSWS : VX1_Int_Ty<1920, "vsubsws" , int_ppc_altivec_vsubsws, v4i32>; 522249423Sdimdef VSUBUBS : VX1_Int_Ty<1536, "vsububs" , int_ppc_altivec_vsububs, v16i8>; 523249423Sdimdef VSUBUHS : VX1_Int_Ty<1600, "vsubuhs" , int_ppc_altivec_vsubuhs, v8i16>; 524249423Sdimdef VSUBUWS : VX1_Int_Ty<1664, "vsubuws" , int_ppc_altivec_vsubuws, v4i32>; 525193323Sed 526249423Sdimdef VSUMSWS : VX1_Int_Ty<1928, "vsumsws" , int_ppc_altivec_vsumsws, v4i32>; 527249423Sdimdef VSUM2SWS: VX1_Int_Ty<1672, "vsum2sws", int_ppc_altivec_vsum2sws, v4i32>; 528249423Sdim 529251662Sdimdef VSUM4SBS: VX1_Int_Ty3<1800, "vsum4sbs", int_ppc_altivec_vsum4sbs, 530249423Sdim v4i32, v16i8, v4i32>; 531249423Sdimdef VSUM4SHS: VX1_Int_Ty3<1608, "vsum4shs", int_ppc_altivec_vsum4shs, 532249423Sdim v4i32, v8i16, v4i32>; 533249423Sdimdef VSUM4UBS: VX1_Int_Ty3<1544, "vsum4ubs", int_ppc_altivec_vsum4ubs, 534249423Sdim v4i32, v16i8, v4i32>; 535249423Sdim 536251662Sdimdef VNOR : VXForm_1<1284, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 537193323Sed "vnor $vD, $vA, $vB", VecFP, 538249423Sdim [(set v4i32:$vD, (vnot_ppc (or v4i32:$vA, 539249423Sdim v4i32:$vB)))]>; 540251662Sdimdef VOR : VXForm_1<1156, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 541193323Sed "vor $vD, $vA, $vB", VecFP, 542249423Sdim [(set v4i32:$vD, (or v4i32:$vA, v4i32:$vB))]>; 543251662Sdimdef VXOR : VXForm_1<1220, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 544193323Sed "vxor $vD, $vA, $vB", VecFP, 545249423Sdim [(set v4i32:$vD, (xor v4i32:$vA, v4i32:$vB))]>; 546193323Sed 547249423Sdimdef VRLB : VX1_Int_Ty< 4, "vrlb", int_ppc_altivec_vrlb, v16i8>; 548249423Sdimdef VRLH : VX1_Int_Ty< 68, "vrlh", int_ppc_altivec_vrlh, v8i16>; 549249423Sdimdef VRLW : VX1_Int_Ty< 132, "vrlw", int_ppc_altivec_vrlw, v4i32>; 550193323Sed 551249423Sdimdef VSL : VX1_Int_Ty< 452, "vsl" , int_ppc_altivec_vsl, v4i32 >; 552249423Sdimdef VSLO : VX1_Int_Ty<1036, "vslo", int_ppc_altivec_vslo, v4i32>; 553193323Sed 554249423Sdimdef VSLB : VX1_Int_Ty< 260, "vslb", int_ppc_altivec_vslb, v16i8>; 555249423Sdimdef VSLH : VX1_Int_Ty< 324, "vslh", int_ppc_altivec_vslh, v8i16>; 556249423Sdimdef VSLW : VX1_Int_Ty< 388, "vslw", int_ppc_altivec_vslw, v4i32>; 557249423Sdim 558251662Sdimdef VSPLTB : VXForm_1<524, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 559193323Sed "vspltb $vD, $vB, $UIMM", VecPerm, 560249423Sdim [(set v16i8:$vD, 561249423Sdim (vspltb_shuffle:$UIMM v16i8:$vB, (undef)))]>; 562251662Sdimdef VSPLTH : VXForm_1<588, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 563193323Sed "vsplth $vD, $vB, $UIMM", VecPerm, 564249423Sdim [(set v16i8:$vD, 565249423Sdim (vsplth_shuffle:$UIMM v16i8:$vB, (undef)))]>; 566251662Sdimdef VSPLTW : VXForm_1<652, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 567193323Sed "vspltw $vD, $vB, $UIMM", VecPerm, 568249423Sdim [(set v16i8:$vD, 569249423Sdim (vspltw_shuffle:$UIMM v16i8:$vB, (undef)))]>; 570193323Sed 571249423Sdimdef VSR : VX1_Int_Ty< 708, "vsr" , int_ppc_altivec_vsr, v4i32>; 572249423Sdimdef VSRO : VX1_Int_Ty<1100, "vsro" , int_ppc_altivec_vsro, v4i32>; 573193323Sed 574249423Sdimdef VSRAB : VX1_Int_Ty< 772, "vsrab", int_ppc_altivec_vsrab, v16i8>; 575249423Sdimdef VSRAH : VX1_Int_Ty< 836, "vsrah", int_ppc_altivec_vsrah, v8i16>; 576249423Sdimdef VSRAW : VX1_Int_Ty< 900, "vsraw", int_ppc_altivec_vsraw, v4i32>; 577249423Sdimdef VSRB : VX1_Int_Ty< 516, "vsrb" , int_ppc_altivec_vsrb , v16i8>; 578249423Sdimdef VSRH : VX1_Int_Ty< 580, "vsrh" , int_ppc_altivec_vsrh , v8i16>; 579249423Sdimdef VSRW : VX1_Int_Ty< 644, "vsrw" , int_ppc_altivec_vsrw , v4i32>; 580193323Sed 581249423Sdim 582251662Sdimdef VSPLTISB : VXForm_3<780, (outs vrrc:$vD), (ins s5imm:$SIMM), 583193323Sed "vspltisb $vD, $SIMM", VecPerm, 584249423Sdim [(set v16i8:$vD, (v16i8 vecspltisb:$SIMM))]>; 585251662Sdimdef VSPLTISH : VXForm_3<844, (outs vrrc:$vD), (ins s5imm:$SIMM), 586193323Sed "vspltish $vD, $SIMM", VecPerm, 587249423Sdim [(set v8i16:$vD, (v8i16 vecspltish:$SIMM))]>; 588251662Sdimdef VSPLTISW : VXForm_3<908, (outs vrrc:$vD), (ins s5imm:$SIMM), 589193323Sed "vspltisw $vD, $SIMM", VecPerm, 590249423Sdim [(set v4i32:$vD, (v4i32 vecspltisw:$SIMM))]>; 591193323Sed 592193323Sed// Vector Pack. 593249423Sdimdef VPKPX : VX1_Int_Ty2<782, "vpkpx", int_ppc_altivec_vpkpx, 594249423Sdim v8i16, v4i32>; 595249423Sdimdef VPKSHSS : VX1_Int_Ty2<398, "vpkshss", int_ppc_altivec_vpkshss, 596249423Sdim v16i8, v8i16>; 597249423Sdimdef VPKSHUS : VX1_Int_Ty2<270, "vpkshus", int_ppc_altivec_vpkshus, 598249423Sdim v16i8, v8i16>; 599249423Sdimdef VPKSWSS : VX1_Int_Ty2<462, "vpkswss", int_ppc_altivec_vpkswss, 600249423Sdim v16i8, v4i32>; 601249423Sdimdef VPKSWUS : VX1_Int_Ty2<334, "vpkswus", int_ppc_altivec_vpkswus, 602249423Sdim v8i16, v4i32>; 603251662Sdimdef VPKUHUM : VXForm_1<14, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 604193323Sed "vpkuhum $vD, $vA, $vB", VecFP, 605249423Sdim [(set v16i8:$vD, 606249423Sdim (vpkuhum_shuffle v16i8:$vA, v16i8:$vB))]>; 607249423Sdimdef VPKUHUS : VX1_Int_Ty2<142, "vpkuhus", int_ppc_altivec_vpkuhus, 608249423Sdim v16i8, v8i16>; 609251662Sdimdef VPKUWUM : VXForm_1<78, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 610193323Sed "vpkuwum $vD, $vA, $vB", VecFP, 611249423Sdim [(set v16i8:$vD, 612249423Sdim (vpkuwum_shuffle v16i8:$vA, v16i8:$vB))]>; 613249423Sdimdef VPKUWUS : VX1_Int_Ty2<206, "vpkuwus", int_ppc_altivec_vpkuwus, 614249423Sdim v8i16, v4i32>; 615193323Sed 616193323Sed// Vector Unpack. 617249423Sdimdef VUPKHPX : VX2_Int_Ty2<846, "vupkhpx", int_ppc_altivec_vupkhpx, 618249423Sdim v4i32, v8i16>; 619249423Sdimdef VUPKHSB : VX2_Int_Ty2<526, "vupkhsb", int_ppc_altivec_vupkhsb, 620249423Sdim v8i16, v16i8>; 621249423Sdimdef VUPKHSH : VX2_Int_Ty2<590, "vupkhsh", int_ppc_altivec_vupkhsh, 622249423Sdim v4i32, v8i16>; 623249423Sdimdef VUPKLPX : VX2_Int_Ty2<974, "vupklpx", int_ppc_altivec_vupklpx, 624249423Sdim v4i32, v8i16>; 625249423Sdimdef VUPKLSB : VX2_Int_Ty2<654, "vupklsb", int_ppc_altivec_vupklsb, 626249423Sdim v8i16, v16i8>; 627249423Sdimdef VUPKLSH : VX2_Int_Ty2<718, "vupklsh", int_ppc_altivec_vupklsh, 628249423Sdim v4i32, v8i16>; 629193323Sed 630193323Sed 631193323Sed// Altivec Comparisons. 632193323Sed 633193323Sedclass VCMP<bits<10> xo, string asmstr, ValueType Ty> 634251662Sdim : VXRForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),asmstr,VecFPCompare, 635249423Sdim [(set Ty:$vD, (Ty (PPCvcmp Ty:$vA, Ty:$vB, xo)))]>; 636193323Sedclass VCMPo<bits<10> xo, string asmstr, ValueType Ty> 637251662Sdim : VXRForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),asmstr,VecFPCompare, 638249423Sdim [(set Ty:$vD, (Ty (PPCvcmp_o Ty:$vA, Ty:$vB, xo)))]> { 639193323Sed let Defs = [CR6]; 640193323Sed let RC = 1; 641193323Sed} 642193323Sed 643193323Sed// f32 element comparisons.0 644193323Seddef VCMPBFP : VCMP <966, "vcmpbfp $vD, $vA, $vB" , v4f32>; 645193323Seddef VCMPBFPo : VCMPo<966, "vcmpbfp. $vD, $vA, $vB" , v4f32>; 646193323Seddef VCMPEQFP : VCMP <198, "vcmpeqfp $vD, $vA, $vB" , v4f32>; 647193323Seddef VCMPEQFPo : VCMPo<198, "vcmpeqfp. $vD, $vA, $vB", v4f32>; 648193323Seddef VCMPGEFP : VCMP <454, "vcmpgefp $vD, $vA, $vB" , v4f32>; 649193323Seddef VCMPGEFPo : VCMPo<454, "vcmpgefp. $vD, $vA, $vB", v4f32>; 650193323Seddef VCMPGTFP : VCMP <710, "vcmpgtfp $vD, $vA, $vB" , v4f32>; 651193323Seddef VCMPGTFPo : VCMPo<710, "vcmpgtfp. $vD, $vA, $vB", v4f32>; 652193323Sed 653193323Sed// i8 element comparisons. 654193323Seddef VCMPEQUB : VCMP < 6, "vcmpequb $vD, $vA, $vB" , v16i8>; 655193323Seddef VCMPEQUBo : VCMPo< 6, "vcmpequb. $vD, $vA, $vB", v16i8>; 656193323Seddef VCMPGTSB : VCMP <774, "vcmpgtsb $vD, $vA, $vB" , v16i8>; 657193323Seddef VCMPGTSBo : VCMPo<774, "vcmpgtsb. $vD, $vA, $vB", v16i8>; 658193323Seddef VCMPGTUB : VCMP <518, "vcmpgtub $vD, $vA, $vB" , v16i8>; 659193323Seddef VCMPGTUBo : VCMPo<518, "vcmpgtub. $vD, $vA, $vB", v16i8>; 660193323Sed 661193323Sed// i16 element comparisons. 662193323Seddef VCMPEQUH : VCMP < 70, "vcmpequh $vD, $vA, $vB" , v8i16>; 663193323Seddef VCMPEQUHo : VCMPo< 70, "vcmpequh. $vD, $vA, $vB", v8i16>; 664193323Seddef VCMPGTSH : VCMP <838, "vcmpgtsh $vD, $vA, $vB" , v8i16>; 665193323Seddef VCMPGTSHo : VCMPo<838, "vcmpgtsh. $vD, $vA, $vB", v8i16>; 666193323Seddef VCMPGTUH : VCMP <582, "vcmpgtuh $vD, $vA, $vB" , v8i16>; 667193323Seddef VCMPGTUHo : VCMPo<582, "vcmpgtuh. $vD, $vA, $vB", v8i16>; 668193323Sed 669193323Sed// i32 element comparisons. 670193323Seddef VCMPEQUW : VCMP <134, "vcmpequw $vD, $vA, $vB" , v4i32>; 671193323Seddef VCMPEQUWo : VCMPo<134, "vcmpequw. $vD, $vA, $vB", v4i32>; 672193323Seddef VCMPGTSW : VCMP <902, "vcmpgtsw $vD, $vA, $vB" , v4i32>; 673193323Seddef VCMPGTSWo : VCMPo<902, "vcmpgtsw. $vD, $vA, $vB", v4i32>; 674193323Seddef VCMPGTUW : VCMP <646, "vcmpgtuw $vD, $vA, $vB" , v4i32>; 675193323Seddef VCMPGTUWo : VCMPo<646, "vcmpgtuw. $vD, $vA, $vB", v4i32>; 676193323Sed 677261991Sdimlet isCodeGenOnly = 1 in { 678261991Sdimdef V_SET0B : VXForm_setzero<1220, (outs vrrc:$vD), (ins), 679193323Sed "vxor $vD, $vD, $vD", VecFP, 680261991Sdim [(set v16i8:$vD, (v16i8 immAllZerosV))]>; 681261991Sdimdef V_SET0H : VXForm_setzero<1220, (outs vrrc:$vD), (ins), 682261991Sdim "vxor $vD, $vD, $vD", VecFP, 683261991Sdim [(set v8i16:$vD, (v8i16 immAllZerosV))]>; 684261991Sdimdef V_SET0 : VXForm_setzero<1220, (outs vrrc:$vD), (ins), 685261991Sdim "vxor $vD, $vD, $vD", VecFP, 686249423Sdim [(set v4i32:$vD, (v4i32 immAllZerosV))]>; 687261991Sdim 688249423Sdimlet IMM=-1 in { 689261991Sdimdef V_SETALLONESB : VXForm_3<908, (outs vrrc:$vD), (ins), 690249423Sdim "vspltisw $vD, -1", VecFP, 691261991Sdim [(set v16i8:$vD, (v16i8 immAllOnesV))]>; 692261991Sdimdef V_SETALLONESH : VXForm_3<908, (outs vrrc:$vD), (ins), 693261991Sdim "vspltisw $vD, -1", VecFP, 694261991Sdim [(set v8i16:$vD, (v8i16 immAllOnesV))]>; 695261991Sdimdef V_SETALLONES : VXForm_3<908, (outs vrrc:$vD), (ins), 696261991Sdim "vspltisw $vD, -1", VecFP, 697249423Sdim [(set v4i32:$vD, (v4i32 immAllOnesV))]>; 698193323Sed} 699261991Sdim} 700249423Sdim} // VALU Operations. 701193323Sed 702193323Sed//===----------------------------------------------------------------------===// 703193323Sed// Additional Altivec Patterns 704193323Sed// 705193323Sed 706193323Sed// DS* intrinsics 707193323Seddef : Pat<(int_ppc_altivec_dssall), (DSSALL 1, 0, 0, 0)>; 708193323Seddef : Pat<(int_ppc_altivec_dss imm:$STRM), (DSS 0, imm:$STRM, 0, 0)>; 709193323Sed 710193323Sed// * 32-bit 711249423Sdimdef : Pat<(int_ppc_altivec_dst i32:$rA, i32:$rB, imm:$STRM), 712249423Sdim (DST 0, imm:$STRM, $rA, $rB)>; 713249423Sdimdef : Pat<(int_ppc_altivec_dstt i32:$rA, i32:$rB, imm:$STRM), 714249423Sdim (DSTT 1, imm:$STRM, $rA, $rB)>; 715249423Sdimdef : Pat<(int_ppc_altivec_dstst i32:$rA, i32:$rB, imm:$STRM), 716249423Sdim (DSTST 0, imm:$STRM, $rA, $rB)>; 717249423Sdimdef : Pat<(int_ppc_altivec_dststt i32:$rA, i32:$rB, imm:$STRM), 718249423Sdim (DSTSTT 1, imm:$STRM, $rA, $rB)>; 719193323Sed 720193323Sed// * 64-bit 721249423Sdimdef : Pat<(int_ppc_altivec_dst i64:$rA, i32:$rB, imm:$STRM), 722249423Sdim (DST64 0, imm:$STRM, $rA, $rB)>; 723249423Sdimdef : Pat<(int_ppc_altivec_dstt i64:$rA, i32:$rB, imm:$STRM), 724249423Sdim (DSTT64 1, imm:$STRM, $rA, $rB)>; 725249423Sdimdef : Pat<(int_ppc_altivec_dstst i64:$rA, i32:$rB, imm:$STRM), 726249423Sdim (DSTST64 0, imm:$STRM, $rA, $rB)>; 727249423Sdimdef : Pat<(int_ppc_altivec_dststt i64:$rA, i32:$rB, imm:$STRM), 728249423Sdim (DSTSTT64 1, imm:$STRM, $rA, $rB)>; 729193323Sed 730193323Sed// Loads. 731193323Seddef : Pat<(v4i32 (load xoaddr:$src)), (LVX xoaddr:$src)>; 732193323Sed 733193323Sed// Stores. 734249423Sdimdef : Pat<(store v4i32:$rS, xoaddr:$dst), 735249423Sdim (STVX $rS, xoaddr:$dst)>; 736193323Sed 737193323Sed// Bit conversions. 738193323Seddef : Pat<(v16i8 (bitconvert (v8i16 VRRC:$src))), (v16i8 VRRC:$src)>; 739193323Seddef : Pat<(v16i8 (bitconvert (v4i32 VRRC:$src))), (v16i8 VRRC:$src)>; 740193323Seddef : Pat<(v16i8 (bitconvert (v4f32 VRRC:$src))), (v16i8 VRRC:$src)>; 741193323Sed 742193323Seddef : Pat<(v8i16 (bitconvert (v16i8 VRRC:$src))), (v8i16 VRRC:$src)>; 743193323Seddef : Pat<(v8i16 (bitconvert (v4i32 VRRC:$src))), (v8i16 VRRC:$src)>; 744193323Seddef : Pat<(v8i16 (bitconvert (v4f32 VRRC:$src))), (v8i16 VRRC:$src)>; 745193323Sed 746193323Seddef : Pat<(v4i32 (bitconvert (v16i8 VRRC:$src))), (v4i32 VRRC:$src)>; 747193323Seddef : Pat<(v4i32 (bitconvert (v8i16 VRRC:$src))), (v4i32 VRRC:$src)>; 748193323Seddef : Pat<(v4i32 (bitconvert (v4f32 VRRC:$src))), (v4i32 VRRC:$src)>; 749193323Sed 750193323Seddef : Pat<(v4f32 (bitconvert (v16i8 VRRC:$src))), (v4f32 VRRC:$src)>; 751193323Seddef : Pat<(v4f32 (bitconvert (v8i16 VRRC:$src))), (v4f32 VRRC:$src)>; 752193323Seddef : Pat<(v4f32 (bitconvert (v4i32 VRRC:$src))), (v4f32 VRRC:$src)>; 753193323Sed 754193323Sed// Shuffles. 755193323Sed 756193323Sed// Match vsldoi(x,x), vpkuwum(x,x), vpkuhum(x,x) 757249423Sdimdef:Pat<(vsldoi_unary_shuffle:$in v16i8:$vA, undef), 758249423Sdim (VSLDOI $vA, $vA, (VSLDOI_unary_get_imm $in))>; 759249423Sdimdef:Pat<(vpkuwum_unary_shuffle v16i8:$vA, undef), 760249423Sdim (VPKUWUM $vA, $vA)>; 761249423Sdimdef:Pat<(vpkuhum_unary_shuffle v16i8:$vA, undef), 762249423Sdim (VPKUHUM $vA, $vA)>; 763193323Sed 764193323Sed// Match vmrg*(x,x) 765249423Sdimdef:Pat<(vmrglb_unary_shuffle v16i8:$vA, undef), 766249423Sdim (VMRGLB $vA, $vA)>; 767249423Sdimdef:Pat<(vmrglh_unary_shuffle v16i8:$vA, undef), 768249423Sdim (VMRGLH $vA, $vA)>; 769249423Sdimdef:Pat<(vmrglw_unary_shuffle v16i8:$vA, undef), 770249423Sdim (VMRGLW $vA, $vA)>; 771249423Sdimdef:Pat<(vmrghb_unary_shuffle v16i8:$vA, undef), 772249423Sdim (VMRGHB $vA, $vA)>; 773249423Sdimdef:Pat<(vmrghh_unary_shuffle v16i8:$vA, undef), 774249423Sdim (VMRGHH $vA, $vA)>; 775249423Sdimdef:Pat<(vmrghw_unary_shuffle v16i8:$vA, undef), 776249423Sdim (VMRGHW $vA, $vA)>; 777193323Sed 778193323Sed// Logical Operations 779249423Sdimdef : Pat<(vnot_ppc v4i32:$vA), (VNOR $vA, $vA)>; 780193323Sed 781249423Sdimdef : Pat<(vnot_ppc (or v4i32:$A, v4i32:$B)), 782249423Sdim (VNOR $A, $B)>; 783249423Sdimdef : Pat<(and v4i32:$A, (vnot_ppc v4i32:$B)), 784249423Sdim (VANDC $A, $B)>; 785193323Sed 786249423Sdimdef : Pat<(fmul v4f32:$vA, v4f32:$vB), 787249423Sdim (VMADDFP $vA, $vB, 788249423Sdim (v4i32 (VSLW (V_SETALLONES), (V_SETALLONES))))>; 789193323Sed 790193323Sed// Fused multiply add and multiply sub for packed float. These are represented 791193323Sed// separately from the real instructions above, for operations that must have 792193323Sed// the additional precision, such as Newton-Rhapson (used by divide, sqrt) 793249423Sdimdef : Pat<(PPCvmaddfp v4f32:$A, v4f32:$B, v4f32:$C), 794249423Sdim (VMADDFP $A, $B, $C)>; 795249423Sdimdef : Pat<(PPCvnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), 796249423Sdim (VNMSUBFP $A, $B, $C)>; 797193323Sed 798249423Sdimdef : Pat<(int_ppc_altivec_vmaddfp v4f32:$A, v4f32:$B, v4f32:$C), 799249423Sdim (VMADDFP $A, $B, $C)>; 800249423Sdimdef : Pat<(int_ppc_altivec_vnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), 801249423Sdim (VNMSUBFP $A, $B, $C)>; 802193323Sed 803249423Sdimdef : Pat<(PPCvperm v16i8:$vA, v16i8:$vB, v16i8:$vC), 804249423Sdim (VPERM $vA, $vB, $vC)>; 805193630Sed 806249423Sdimdef : Pat<(PPCfre v4f32:$A), (VREFP $A)>; 807249423Sdimdef : Pat<(PPCfrsqrte v4f32:$A), (VRSQRTEFP $A)>; 808249423Sdim 809193630Sed// Vector shifts 810249423Sdimdef : Pat<(v16i8 (shl v16i8:$vA, v16i8:$vB)), 811249423Sdim (v16i8 (VSLB $vA, $vB))>; 812249423Sdimdef : Pat<(v8i16 (shl v8i16:$vA, v8i16:$vB)), 813249423Sdim (v8i16 (VSLH $vA, $vB))>; 814249423Sdimdef : Pat<(v4i32 (shl v4i32:$vA, v4i32:$vB)), 815249423Sdim (v4i32 (VSLW $vA, $vB))>; 816193630Sed 817249423Sdimdef : Pat<(v16i8 (srl v16i8:$vA, v16i8:$vB)), 818249423Sdim (v16i8 (VSRB $vA, $vB))>; 819249423Sdimdef : Pat<(v8i16 (srl v8i16:$vA, v8i16:$vB)), 820249423Sdim (v8i16 (VSRH $vA, $vB))>; 821249423Sdimdef : Pat<(v4i32 (srl v4i32:$vA, v4i32:$vB)), 822249423Sdim (v4i32 (VSRW $vA, $vB))>; 823193630Sed 824249423Sdimdef : Pat<(v16i8 (sra v16i8:$vA, v16i8:$vB)), 825249423Sdim (v16i8 (VSRAB $vA, $vB))>; 826249423Sdimdef : Pat<(v8i16 (sra v8i16:$vA, v8i16:$vB)), 827249423Sdim (v8i16 (VSRAH $vA, $vB))>; 828249423Sdimdef : Pat<(v4i32 (sra v4i32:$vA, v4i32:$vB)), 829249423Sdim (v4i32 (VSRAW $vA, $vB))>; 830243830Sdim 831243830Sdim// Float to integer and integer to float conversions 832249423Sdimdef : Pat<(v4i32 (fp_to_sint v4f32:$vA)), 833249423Sdim (VCTSXS_0 $vA)>; 834249423Sdimdef : Pat<(v4i32 (fp_to_uint v4f32:$vA)), 835249423Sdim (VCTUXS_0 $vA)>; 836249423Sdimdef : Pat<(v4f32 (sint_to_fp v4i32:$vA)), 837249423Sdim (VCFSX_0 $vA)>; 838249423Sdimdef : Pat<(v4f32 (uint_to_fp v4i32:$vA)), 839249423Sdim (VCFUX_0 $vA)>; 840249423Sdim 841249423Sdim// Floating-point rounding 842249423Sdimdef : Pat<(v4f32 (ffloor v4f32:$vA)), 843249423Sdim (VRFIM $vA)>; 844249423Sdimdef : Pat<(v4f32 (fceil v4f32:$vA)), 845249423Sdim (VRFIP $vA)>; 846249423Sdimdef : Pat<(v4f32 (ftrunc v4f32:$vA)), 847249423Sdim (VRFIZ $vA)>; 848249423Sdimdef : Pat<(v4f32 (fnearbyint v4f32:$vA)), 849249423Sdim (VRFIN $vA)>; 850249423Sdim 851249423Sdim} // end HasAltivec 852249423Sdim 853