PPCInstrAltivec.td revision 249423
1234353Sdim//===-- PPCInstrAltivec.td - The PowerPC Altivec Extension -*- tablegen -*-===// 2234353Sdim// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7234353Sdim// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file describes the Altivec extension to the PowerPC instruction set. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14193323Sed//===----------------------------------------------------------------------===// 15193323Sed// Altivec transformation functions and pattern fragments. 16193323Sed// 17193323Sed 18206083Srdivacky// Since we canonicalize buildvectors to v16i8, all vnots "-1" operands will be 19206083Srdivacky// of that type. 20206083Srdivackydef vnot_ppc : PatFrag<(ops node:$in), 21206083Srdivacky (xor node:$in, (bitconvert (v16i8 immAllOnesV)))>; 22193323Sed 23193323Seddef vpkuhum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 24193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 25193323Sed return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), false); 26193323Sed}]>; 27193323Seddef vpkuwum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 28193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 29193323Sed return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), false); 30193323Sed}]>; 31193323Seddef vpkuhum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 32193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 33193323Sed return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), true); 34193323Sed}]>; 35193323Seddef vpkuwum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 36193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 37193323Sed return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), true); 38193323Sed}]>; 39193323Sed 40193323Sed 41193323Seddef vmrglb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 42204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 43193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, false); 44193323Sed}]>; 45193323Seddef vmrglh_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 46204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 47193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, false); 48193323Sed}]>; 49193323Seddef vmrglw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 50204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 51193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, false); 52193323Sed}]>; 53193323Seddef vmrghb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 54204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 55193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, false); 56193323Sed}]>; 57193323Seddef vmrghh_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 58204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 59193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, false); 60193323Sed}]>; 61193323Seddef vmrghw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 62204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 63193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, false); 64193323Sed}]>; 65193323Sed 66193323Sed 67193323Seddef vmrglb_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 68204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 69193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, true); 70193323Sed}]>; 71193323Seddef vmrglh_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 72193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 73193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, true); 74193323Sed}]>; 75193323Seddef vmrglw_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 76193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 77193323Sed return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, true); 78193323Sed}]>; 79193323Seddef vmrghb_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 80193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 81193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, true); 82193323Sed}]>; 83193323Seddef vmrghh_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 84193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 85193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, true); 86193323Sed}]>; 87193323Seddef vmrghw_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 88193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 89193323Sed return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, true); 90193323Sed}]>; 91193323Sed 92193323Sed 93193323Seddef VSLDOI_get_imm : SDNodeXForm<vector_shuffle, [{ 94193323Sed return getI32Imm(PPC::isVSLDOIShuffleMask(N, false)); 95193323Sed}]>; 96193323Seddef vsldoi_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 97193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 98193323Sed return PPC::isVSLDOIShuffleMask(N, false) != -1; 99193323Sed}], VSLDOI_get_imm>; 100193323Sed 101193323Sed 102193323Sed/// VSLDOI_unary* - These are used to match vsldoi(X,X), which is turned into 103193323Sed/// vector_shuffle(X,undef,mask) by the dag combiner. 104193323Seddef VSLDOI_unary_get_imm : SDNodeXForm<vector_shuffle, [{ 105193323Sed return getI32Imm(PPC::isVSLDOIShuffleMask(N, true)); 106193323Sed}]>; 107193323Seddef vsldoi_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 108193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 109193323Sed return PPC::isVSLDOIShuffleMask(N, true) != -1; 110193323Sed}], VSLDOI_unary_get_imm>; 111193323Sed 112193323Sed 113193323Sed// VSPLT*_get_imm xform function: convert vector_shuffle mask to VSPLT* imm. 114193323Seddef VSPLTB_get_imm : SDNodeXForm<vector_shuffle, [{ 115193323Sed return getI32Imm(PPC::getVSPLTImmediate(N, 1)); 116193323Sed}]>; 117193323Seddef vspltb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 118193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 119193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 1); 120193323Sed}], VSPLTB_get_imm>; 121193323Seddef VSPLTH_get_imm : SDNodeXForm<vector_shuffle, [{ 122193323Sed return getI32Imm(PPC::getVSPLTImmediate(N, 2)); 123193323Sed}]>; 124193323Seddef vsplth_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 125193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 126193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 2); 127193323Sed}], VSPLTH_get_imm>; 128193323Seddef VSPLTW_get_imm : SDNodeXForm<vector_shuffle, [{ 129193323Sed return getI32Imm(PPC::getVSPLTImmediate(N, 4)); 130193323Sed}]>; 131193323Seddef vspltw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 132193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 133193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 4); 134193323Sed}], VSPLTW_get_imm>; 135193323Sed 136193323Sed 137193323Sed// VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm. 138193323Seddef VSPLTISB_get_imm : SDNodeXForm<build_vector, [{ 139193323Sed return PPC::get_VSPLTI_elt(N, 1, *CurDAG); 140193323Sed}]>; 141193323Seddef vecspltisb : PatLeaf<(build_vector), [{ 142193323Sed return PPC::get_VSPLTI_elt(N, 1, *CurDAG).getNode() != 0; 143193323Sed}], VSPLTISB_get_imm>; 144193323Sed 145193323Sed// VSPLTISH_get_imm xform function: convert build_vector to VSPLTISH imm. 146193323Seddef VSPLTISH_get_imm : SDNodeXForm<build_vector, [{ 147193323Sed return PPC::get_VSPLTI_elt(N, 2, *CurDAG); 148193323Sed}]>; 149193323Seddef vecspltish : PatLeaf<(build_vector), [{ 150193323Sed return PPC::get_VSPLTI_elt(N, 2, *CurDAG).getNode() != 0; 151193323Sed}], VSPLTISH_get_imm>; 152193323Sed 153193323Sed// VSPLTISW_get_imm xform function: convert build_vector to VSPLTISW imm. 154193323Seddef VSPLTISW_get_imm : SDNodeXForm<build_vector, [{ 155193323Sed return PPC::get_VSPLTI_elt(N, 4, *CurDAG); 156193323Sed}]>; 157193323Seddef vecspltisw : PatLeaf<(build_vector), [{ 158193323Sed return PPC::get_VSPLTI_elt(N, 4, *CurDAG).getNode() != 0; 159193323Sed}], VSPLTISW_get_imm>; 160193323Sed 161193323Sed//===----------------------------------------------------------------------===// 162193323Sed// Helpers for defining instructions that directly correspond to intrinsics. 163193323Sed 164249423Sdim// VA1a_Int_Ty - A VAForm_1a intrinsic definition of specific type. 165249423Sdimclass VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty> 166193323Sed : VAForm_1a<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB, VRRC:$vC), 167193323Sed !strconcat(opc, " $vD, $vA, $vB, $vC"), VecFP, 168249423Sdim [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>; 169193323Sed 170249423Sdim// VA1a_Int_Ty2 - A VAForm_1a intrinsic definition where the type of the 171249423Sdim// inputs doesn't match the type of the output. 172249423Sdimclass VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy, 173249423Sdim ValueType InTy> 174249423Sdim : VAForm_1a<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB, VRRC:$vC), 175249423Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), VecFP, 176249423Sdim [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>; 177249423Sdim 178249423Sdim// VA1a_Int_Ty3 - A VAForm_1a intrinsic definition where there are two 179249423Sdim// input types and an output type. 180249423Sdimclass VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy, 181249423Sdim ValueType In1Ty, ValueType In2Ty> 182249423Sdim : VAForm_1a<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB, VRRC:$vC), 183249423Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), VecFP, 184249423Sdim [(set OutTy:$vD, 185249423Sdim (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>; 186249423Sdim 187249423Sdim// VX1_Int_Ty - A VXForm_1 intrinsic definition of specific type. 188249423Sdimclass VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty> 189193323Sed : VXForm_1<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 190193323Sed !strconcat(opc, " $vD, $vA, $vB"), VecFP, 191249423Sdim [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>; 192193323Sed 193249423Sdim// VX1_Int_Ty2 - A VXForm_1 intrinsic definition where the type of the 194249423Sdim// inputs doesn't match the type of the output. 195249423Sdimclass VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 196249423Sdim ValueType InTy> 197249423Sdim : VXForm_1<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 198249423Sdim !strconcat(opc, " $vD, $vA, $vB"), VecFP, 199249423Sdim [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>; 200249423Sdim 201249423Sdim// VX1_Int_Ty3 - A VXForm_1 intrinsic definition where there are two 202249423Sdim// input types and an output type. 203249423Sdimclass VX1_Int_Ty3<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 204249423Sdim ValueType In1Ty, ValueType In2Ty> 205249423Sdim : VXForm_1<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 206249423Sdim !strconcat(opc, " $vD, $vA, $vB"), VecFP, 207249423Sdim [(set OutTy:$vD, (IntID In1Ty:$vA, In2Ty:$vB))]>; 208249423Sdim 209249423Sdim// VX2_Int_SP - A VXForm_2 intrinsic definition of vector single-precision type. 210249423Sdimclass VX2_Int_SP<bits<11> xo, string opc, Intrinsic IntID> 211193323Sed : VXForm_2<xo, (outs VRRC:$vD), (ins VRRC:$vB), 212193323Sed !strconcat(opc, " $vD, $vB"), VecFP, 213249423Sdim [(set v4f32:$vD, (IntID v4f32:$vB))]>; 214193323Sed 215249423Sdim// VX2_Int_Ty2 - A VXForm_2 intrinsic definition where the type of the 216249423Sdim// inputs doesn't match the type of the output. 217249423Sdimclass VX2_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 218249423Sdim ValueType InTy> 219249423Sdim : VXForm_2<xo, (outs VRRC:$vD), (ins VRRC:$vB), 220249423Sdim !strconcat(opc, " $vD, $vB"), VecFP, 221249423Sdim [(set OutTy:$vD, (IntID InTy:$vB))]>; 222249423Sdim 223193323Sed//===----------------------------------------------------------------------===// 224193323Sed// Instruction Definitions. 225193323Sed 226249423Sdimdef HasAltivec : Predicate<"PPCSubTarget.hasAltivec()">; 227249423Sdimlet Predicates = [HasAltivec] in { 228249423Sdim 229249423Sdimlet isCodeGenOnly = 1 in { 230193323Seddef DSS : DSS_Form<822, (outs), 231193323Sed (ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2), 232234353Sdim "dss $STRM", LdStLoad /*FIXME*/, []>; 233193323Seddef DSSALL : DSS_Form<822, (outs), 234193323Sed (ins u5imm:$ONE, u5imm:$ZERO0,u5imm:$ZERO1,u5imm:$ZERO2), 235234353Sdim "dssall", LdStLoad /*FIXME*/, []>; 236193323Seddef DST : DSS_Form<342, (outs), 237193323Sed (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB), 238234353Sdim "dst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 239193323Seddef DSTT : DSS_Form<342, (outs), 240193323Sed (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB), 241234353Sdim "dstt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 242193323Seddef DSTST : DSS_Form<374, (outs), 243193323Sed (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB), 244234353Sdim "dstst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 245193323Seddef DSTSTT : DSS_Form<374, (outs), 246193323Sed (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB), 247234353Sdim "dststt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 248193323Sed 249193323Seddef DST64 : DSS_Form<342, (outs), 250193323Sed (ins u5imm:$ZERO, u5imm:$STRM, G8RC:$rA, GPRC:$rB), 251234353Sdim "dst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 252193323Seddef DSTT64 : DSS_Form<342, (outs), 253193323Sed (ins u5imm:$ONE, u5imm:$STRM, G8RC:$rA, GPRC:$rB), 254234353Sdim "dstt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 255193323Seddef DSTST64 : DSS_Form<374, (outs), 256193323Sed (ins u5imm:$ZERO, u5imm:$STRM, G8RC:$rA, GPRC:$rB), 257234353Sdim "dstst $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 258193323Seddef DSTSTT64 : DSS_Form<374, (outs), 259193323Sed (ins u5imm:$ONE, u5imm:$STRM, G8RC:$rA, GPRC:$rB), 260234353Sdim "dststt $rA, $rB, $STRM", LdStLoad /*FIXME*/, []>; 261249423Sdim} 262193323Sed 263193323Seddef MFVSCR : VXForm_4<1540, (outs VRRC:$vD), (ins), 264234353Sdim "mfvscr $vD", LdStStore, 265249423Sdim [(set v8i16:$vD, (int_ppc_altivec_mfvscr))]>; 266193323Seddef MTVSCR : VXForm_5<1604, (outs), (ins VRRC:$vB), 267234353Sdim "mtvscr $vB", LdStLoad, 268249423Sdim [(int_ppc_altivec_mtvscr v4i32:$vB)]>; 269193323Sed 270193323Sedlet canFoldAsLoad = 1, PPC970_Unit = 2 in { // Loads. 271193323Seddef LVEBX: XForm_1<31, 7, (outs VRRC:$vD), (ins memrr:$src), 272234353Sdim "lvebx $vD, $src", LdStLoad, 273249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvebx xoaddr:$src))]>; 274193323Seddef LVEHX: XForm_1<31, 39, (outs VRRC:$vD), (ins memrr:$src), 275234353Sdim "lvehx $vD, $src", LdStLoad, 276249423Sdim [(set v8i16:$vD, (int_ppc_altivec_lvehx xoaddr:$src))]>; 277193323Seddef LVEWX: XForm_1<31, 71, (outs VRRC:$vD), (ins memrr:$src), 278234353Sdim "lvewx $vD, $src", LdStLoad, 279249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvewx xoaddr:$src))]>; 280193323Seddef LVX : XForm_1<31, 103, (outs VRRC:$vD), (ins memrr:$src), 281234353Sdim "lvx $vD, $src", LdStLoad, 282249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvx xoaddr:$src))]>; 283193323Seddef LVXL : XForm_1<31, 359, (outs VRRC:$vD), (ins memrr:$src), 284234353Sdim "lvxl $vD, $src", LdStLoad, 285249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvxl xoaddr:$src))]>; 286193323Sed} 287193323Sed 288193323Seddef LVSL : XForm_1<31, 6, (outs VRRC:$vD), (ins memrr:$src), 289234353Sdim "lvsl $vD, $src", LdStLoad, 290249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvsl xoaddr:$src))]>, 291193323Sed PPC970_Unit_LSU; 292193323Seddef LVSR : XForm_1<31, 38, (outs VRRC:$vD), (ins memrr:$src), 293234353Sdim "lvsr $vD, $src", LdStLoad, 294249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvsr xoaddr:$src))]>, 295193323Sed PPC970_Unit_LSU; 296193323Sed 297193323Sedlet PPC970_Unit = 2 in { // Stores. 298193323Seddef STVEBX: XForm_8<31, 135, (outs), (ins VRRC:$rS, memrr:$dst), 299234353Sdim "stvebx $rS, $dst", LdStStore, 300249423Sdim [(int_ppc_altivec_stvebx v16i8:$rS, xoaddr:$dst)]>; 301193323Seddef STVEHX: XForm_8<31, 167, (outs), (ins VRRC:$rS, memrr:$dst), 302234353Sdim "stvehx $rS, $dst", LdStStore, 303249423Sdim [(int_ppc_altivec_stvehx v8i16:$rS, xoaddr:$dst)]>; 304193323Seddef STVEWX: XForm_8<31, 199, (outs), (ins VRRC:$rS, memrr:$dst), 305234353Sdim "stvewx $rS, $dst", LdStStore, 306249423Sdim [(int_ppc_altivec_stvewx v4i32:$rS, xoaddr:$dst)]>; 307193323Seddef STVX : XForm_8<31, 231, (outs), (ins VRRC:$rS, memrr:$dst), 308234353Sdim "stvx $rS, $dst", LdStStore, 309249423Sdim [(int_ppc_altivec_stvx v4i32:$rS, xoaddr:$dst)]>; 310193323Seddef STVXL : XForm_8<31, 487, (outs), (ins VRRC:$rS, memrr:$dst), 311234353Sdim "stvxl $rS, $dst", LdStStore, 312249423Sdim [(int_ppc_altivec_stvxl v4i32:$rS, xoaddr:$dst)]>; 313193323Sed} 314193323Sed 315193323Sedlet PPC970_Unit = 5 in { // VALU Operations. 316193323Sed// VA-Form instructions. 3-input AltiVec ops. 317193323Seddef VMADDFP : VAForm_1<46, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB), 318193323Sed "vmaddfp $vD, $vA, $vC, $vB", VecFP, 319249423Sdim [(set v4f32:$vD, 320249423Sdim (fma v4f32:$vA, v4f32:$vC, v4f32:$vB))]>; 321249423Sdim 322249423Sdim// FIXME: The fma+fneg pattern won't match because fneg is not legal. 323193323Seddef VNMSUBFP: VAForm_1<47, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB), 324193323Sed "vnmsubfp $vD, $vA, $vC, $vB", VecFP, 325249423Sdim [(set v4f32:$vD, (fneg (fma v4f32:$vA, v4f32:$vC, 326249423Sdim (fneg v4f32:$vB))))]>; 327193323Sed 328249423Sdimdef VMHADDSHS : VA1a_Int_Ty<32, "vmhaddshs", int_ppc_altivec_vmhaddshs, v8i16>; 329249423Sdimdef VMHRADDSHS : VA1a_Int_Ty<33, "vmhraddshs", int_ppc_altivec_vmhraddshs, 330249423Sdim v8i16>; 331249423Sdimdef VMLADDUHM : VA1a_Int_Ty<34, "vmladduhm", int_ppc_altivec_vmladduhm, v8i16>; 332193323Sed 333249423Sdimdef VPERM : VA1a_Int_Ty3<43, "vperm", int_ppc_altivec_vperm, 334249423Sdim v4i32, v4i32, v16i8>; 335249423Sdimdef VSEL : VA1a_Int_Ty<42, "vsel", int_ppc_altivec_vsel, v4i32>; 336249423Sdim 337193323Sed// Shuffles. 338193323Seddef VSLDOI : VAForm_2<44, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB, u5imm:$SH), 339193323Sed "vsldoi $vD, $vA, $vB, $SH", VecFP, 340249423Sdim [(set v16i8:$vD, 341249423Sdim (vsldoi_shuffle:$SH v16i8:$vA, v16i8:$vB))]>; 342193323Sed 343193323Sed// VX-Form instructions. AltiVec arithmetic ops. 344193323Seddef VADDFP : VXForm_1<10, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 345193323Sed "vaddfp $vD, $vA, $vB", VecFP, 346249423Sdim [(set v4f32:$vD, (fadd v4f32:$vA, v4f32:$vB))]>; 347193323Sed 348193323Seddef VADDUBM : VXForm_1<0, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 349193323Sed "vaddubm $vD, $vA, $vB", VecGeneral, 350249423Sdim [(set v16i8:$vD, (add v16i8:$vA, v16i8:$vB))]>; 351193323Seddef VADDUHM : VXForm_1<64, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 352193323Sed "vadduhm $vD, $vA, $vB", VecGeneral, 353249423Sdim [(set v8i16:$vD, (add v8i16:$vA, v8i16:$vB))]>; 354193323Seddef VADDUWM : VXForm_1<128, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 355193323Sed "vadduwm $vD, $vA, $vB", VecGeneral, 356249423Sdim [(set v4i32:$vD, (add v4i32:$vA, v4i32:$vB))]>; 357193323Sed 358249423Sdimdef VADDCUW : VX1_Int_Ty<384, "vaddcuw", int_ppc_altivec_vaddcuw, v4i32>; 359249423Sdimdef VADDSBS : VX1_Int_Ty<768, "vaddsbs", int_ppc_altivec_vaddsbs, v16i8>; 360249423Sdimdef VADDSHS : VX1_Int_Ty<832, "vaddshs", int_ppc_altivec_vaddshs, v8i16>; 361249423Sdimdef VADDSWS : VX1_Int_Ty<896, "vaddsws", int_ppc_altivec_vaddsws, v4i32>; 362249423Sdimdef VADDUBS : VX1_Int_Ty<512, "vaddubs", int_ppc_altivec_vaddubs, v16i8>; 363249423Sdimdef VADDUHS : VX1_Int_Ty<576, "vadduhs", int_ppc_altivec_vadduhs, v8i16>; 364249423Sdimdef VADDUWS : VX1_Int_Ty<640, "vadduws", int_ppc_altivec_vadduws, v4i32>; 365193323Sed 366193323Sed 367193323Seddef VAND : VXForm_1<1028, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 368193323Sed "vand $vD, $vA, $vB", VecFP, 369249423Sdim [(set v4i32:$vD, (and v4i32:$vA, v4i32:$vB))]>; 370193323Seddef VANDC : VXForm_1<1092, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 371193323Sed "vandc $vD, $vA, $vB", VecFP, 372249423Sdim [(set v4i32:$vD, (and v4i32:$vA, 373249423Sdim (vnot_ppc v4i32:$vB)))]>; 374193323Sed 375193323Seddef VCFSX : VXForm_1<842, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 376193323Sed "vcfsx $vD, $vB, $UIMM", VecFP, 377249423Sdim [(set v4f32:$vD, 378249423Sdim (int_ppc_altivec_vcfsx v4i32:$vB, imm:$UIMM))]>; 379193323Seddef VCFUX : VXForm_1<778, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 380193323Sed "vcfux $vD, $vB, $UIMM", VecFP, 381249423Sdim [(set v4f32:$vD, 382249423Sdim (int_ppc_altivec_vcfux v4i32:$vB, imm:$UIMM))]>; 383193323Seddef VCTSXS : VXForm_1<970, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 384193323Sed "vctsxs $vD, $vB, $UIMM", VecFP, 385249423Sdim [(set v4i32:$vD, 386249423Sdim (int_ppc_altivec_vctsxs v4f32:$vB, imm:$UIMM))]>; 387193323Seddef VCTUXS : VXForm_1<906, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 388193323Sed "vctuxs $vD, $vB, $UIMM", VecFP, 389249423Sdim [(set v4i32:$vD, 390249423Sdim (int_ppc_altivec_vctuxs v4f32:$vB, imm:$UIMM))]>; 391243830Sdim 392243830Sdim// Defines with the UIM field set to 0 for floating-point 393243830Sdim// to integer (fp_to_sint/fp_to_uint) conversions and integer 394243830Sdim// to floating-point (sint_to_fp/uint_to_fp) conversions. 395243830Sdimlet VA = 0 in { 396243830Sdimdef VCFSX_0 : VXForm_1<842, (outs VRRC:$vD), (ins VRRC:$vB), 397243830Sdim "vcfsx $vD, $vB, 0", VecFP, 398249423Sdim [(set v4f32:$vD, 399249423Sdim (int_ppc_altivec_vcfsx v4i32:$vB, 0))]>; 400243830Sdimdef VCTUXS_0 : VXForm_1<906, (outs VRRC:$vD), (ins VRRC:$vB), 401243830Sdim "vctuxs $vD, $vB, 0", VecFP, 402249423Sdim [(set v4i32:$vD, 403249423Sdim (int_ppc_altivec_vctuxs v4f32:$vB, 0))]>; 404243830Sdimdef VCFUX_0 : VXForm_1<778, (outs VRRC:$vD), (ins VRRC:$vB), 405243830Sdim "vcfux $vD, $vB, 0", VecFP, 406249423Sdim [(set v4f32:$vD, 407249423Sdim (int_ppc_altivec_vcfux v4i32:$vB, 0))]>; 408243830Sdimdef VCTSXS_0 : VXForm_1<970, (outs VRRC:$vD), (ins VRRC:$vB), 409243830Sdim "vctsxs $vD, $vB, 0", VecFP, 410249423Sdim [(set v4i32:$vD, 411249423Sdim (int_ppc_altivec_vctsxs v4f32:$vB, 0))]>; 412243830Sdim} 413249423Sdimdef VEXPTEFP : VX2_Int_SP<394, "vexptefp", int_ppc_altivec_vexptefp>; 414249423Sdimdef VLOGEFP : VX2_Int_SP<458, "vlogefp", int_ppc_altivec_vlogefp>; 415193323Sed 416249423Sdimdef VAVGSB : VX1_Int_Ty<1282, "vavgsb", int_ppc_altivec_vavgsb, v16i8>; 417249423Sdimdef VAVGSH : VX1_Int_Ty<1346, "vavgsh", int_ppc_altivec_vavgsh, v8i16>; 418249423Sdimdef VAVGSW : VX1_Int_Ty<1410, "vavgsw", int_ppc_altivec_vavgsw, v4i32>; 419249423Sdimdef VAVGUB : VX1_Int_Ty<1026, "vavgub", int_ppc_altivec_vavgub, v16i8>; 420249423Sdimdef VAVGUH : VX1_Int_Ty<1090, "vavguh", int_ppc_altivec_vavguh, v8i16>; 421249423Sdimdef VAVGUW : VX1_Int_Ty<1154, "vavguw", int_ppc_altivec_vavguw, v4i32>; 422193323Sed 423249423Sdimdef VMAXFP : VX1_Int_Ty<1034, "vmaxfp", int_ppc_altivec_vmaxfp, v4f32>; 424249423Sdimdef VMAXSB : VX1_Int_Ty< 258, "vmaxsb", int_ppc_altivec_vmaxsb, v16i8>; 425249423Sdimdef VMAXSH : VX1_Int_Ty< 322, "vmaxsh", int_ppc_altivec_vmaxsh, v8i16>; 426249423Sdimdef VMAXSW : VX1_Int_Ty< 386, "vmaxsw", int_ppc_altivec_vmaxsw, v4i32>; 427249423Sdimdef VMAXUB : VX1_Int_Ty< 2, "vmaxub", int_ppc_altivec_vmaxub, v16i8>; 428249423Sdimdef VMAXUH : VX1_Int_Ty< 66, "vmaxuh", int_ppc_altivec_vmaxuh, v8i16>; 429249423Sdimdef VMAXUW : VX1_Int_Ty< 130, "vmaxuw", int_ppc_altivec_vmaxuw, v4i32>; 430249423Sdimdef VMINFP : VX1_Int_Ty<1098, "vminfp", int_ppc_altivec_vminfp, v4f32>; 431249423Sdimdef VMINSB : VX1_Int_Ty< 770, "vminsb", int_ppc_altivec_vminsb, v16i8>; 432249423Sdimdef VMINSH : VX1_Int_Ty< 834, "vminsh", int_ppc_altivec_vminsh, v8i16>; 433249423Sdimdef VMINSW : VX1_Int_Ty< 898, "vminsw", int_ppc_altivec_vminsw, v4i32>; 434249423Sdimdef VMINUB : VX1_Int_Ty< 514, "vminub", int_ppc_altivec_vminub, v16i8>; 435249423Sdimdef VMINUH : VX1_Int_Ty< 578, "vminuh", int_ppc_altivec_vminuh, v8i16>; 436249423Sdimdef VMINUW : VX1_Int_Ty< 642, "vminuw", int_ppc_altivec_vminuw, v4i32>; 437193323Sed 438193323Seddef VMRGHB : VXForm_1< 12, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 439193323Sed "vmrghb $vD, $vA, $vB", VecFP, 440249423Sdim [(set v16i8:$vD, (vmrghb_shuffle v16i8:$vA, v16i8:$vB))]>; 441193323Seddef VMRGHH : VXForm_1< 76, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 442193323Sed "vmrghh $vD, $vA, $vB", VecFP, 443249423Sdim [(set v16i8:$vD, (vmrghh_shuffle v16i8:$vA, v16i8:$vB))]>; 444193323Seddef VMRGHW : VXForm_1<140, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 445193323Sed "vmrghw $vD, $vA, $vB", VecFP, 446249423Sdim [(set v16i8:$vD, (vmrghw_shuffle v16i8:$vA, v16i8:$vB))]>; 447193323Seddef VMRGLB : VXForm_1<268, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 448193323Sed "vmrglb $vD, $vA, $vB", VecFP, 449249423Sdim [(set v16i8:$vD, (vmrglb_shuffle v16i8:$vA, v16i8:$vB))]>; 450193323Seddef VMRGLH : VXForm_1<332, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 451193323Sed "vmrglh $vD, $vA, $vB", VecFP, 452249423Sdim [(set v16i8:$vD, (vmrglh_shuffle v16i8:$vA, v16i8:$vB))]>; 453193323Seddef VMRGLW : VXForm_1<396, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 454193323Sed "vmrglw $vD, $vA, $vB", VecFP, 455249423Sdim [(set v16i8:$vD, (vmrglw_shuffle v16i8:$vA, v16i8:$vB))]>; 456193323Sed 457249423Sdimdef VMSUMMBM : VA1a_Int_Ty3<37, "vmsummbm", int_ppc_altivec_vmsummbm, 458249423Sdim v4i32, v16i8, v4i32>; 459249423Sdimdef VMSUMSHM : VA1a_Int_Ty3<40, "vmsumshm", int_ppc_altivec_vmsumshm, 460249423Sdim v4i32, v8i16, v4i32>; 461249423Sdimdef VMSUMSHS : VA1a_Int_Ty3<41, "vmsumshs", int_ppc_altivec_vmsumshs, 462249423Sdim v4i32, v8i16, v4i32>; 463249423Sdimdef VMSUMUBM : VA1a_Int_Ty3<36, "vmsumubm", int_ppc_altivec_vmsumubm, 464249423Sdim v4i32, v16i8, v4i32>; 465249423Sdimdef VMSUMUHM : VA1a_Int_Ty3<38, "vmsumuhm", int_ppc_altivec_vmsumuhm, 466249423Sdim v4i32, v8i16, v4i32>; 467249423Sdimdef VMSUMUHS : VA1a_Int_Ty3<39, "vmsumuhs", int_ppc_altivec_vmsumuhs, 468249423Sdim v4i32, v8i16, v4i32>; 469193323Sed 470249423Sdimdef VMULESB : VX1_Int_Ty2<776, "vmulesb", int_ppc_altivec_vmulesb, 471249423Sdim v8i16, v16i8>; 472249423Sdimdef VMULESH : VX1_Int_Ty2<840, "vmulesh", int_ppc_altivec_vmulesh, 473249423Sdim v4i32, v8i16>; 474249423Sdimdef VMULEUB : VX1_Int_Ty2<520, "vmuleub", int_ppc_altivec_vmuleub, 475249423Sdim v8i16, v16i8>; 476249423Sdimdef VMULEUH : VX1_Int_Ty2<584, "vmuleuh", int_ppc_altivec_vmuleuh, 477249423Sdim v4i32, v8i16>; 478249423Sdimdef VMULOSB : VX1_Int_Ty2<264, "vmulosb", int_ppc_altivec_vmulosb, 479249423Sdim v8i16, v16i8>; 480249423Sdimdef VMULOSH : VX1_Int_Ty2<328, "vmulosh", int_ppc_altivec_vmulosh, 481249423Sdim v4i32, v8i16>; 482249423Sdimdef VMULOUB : VX1_Int_Ty2< 8, "vmuloub", int_ppc_altivec_vmuloub, 483249423Sdim v8i16, v16i8>; 484249423Sdimdef VMULOUH : VX1_Int_Ty2< 72, "vmulouh", int_ppc_altivec_vmulouh, 485249423Sdim v4i32, v8i16>; 486193323Sed 487249423Sdimdef VREFP : VX2_Int_SP<266, "vrefp", int_ppc_altivec_vrefp>; 488249423Sdimdef VRFIM : VX2_Int_SP<714, "vrfim", int_ppc_altivec_vrfim>; 489249423Sdimdef VRFIN : VX2_Int_SP<522, "vrfin", int_ppc_altivec_vrfin>; 490249423Sdimdef VRFIP : VX2_Int_SP<650, "vrfip", int_ppc_altivec_vrfip>; 491249423Sdimdef VRFIZ : VX2_Int_SP<586, "vrfiz", int_ppc_altivec_vrfiz>; 492249423Sdimdef VRSQRTEFP : VX2_Int_SP<330, "vrsqrtefp", int_ppc_altivec_vrsqrtefp>; 493193323Sed 494249423Sdimdef VSUBCUW : VX1_Int_Ty<74, "vsubcuw", int_ppc_altivec_vsubcuw, v4i32>; 495193323Sed 496193323Seddef VSUBFP : VXForm_1<74, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 497193323Sed "vsubfp $vD, $vA, $vB", VecGeneral, 498249423Sdim [(set v4f32:$vD, (fsub v4f32:$vA, v4f32:$vB))]>; 499193323Seddef VSUBUBM : VXForm_1<1024, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 500193323Sed "vsububm $vD, $vA, $vB", VecGeneral, 501249423Sdim [(set v16i8:$vD, (sub v16i8:$vA, v16i8:$vB))]>; 502193323Seddef VSUBUHM : VXForm_1<1088, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 503193323Sed "vsubuhm $vD, $vA, $vB", VecGeneral, 504249423Sdim [(set v8i16:$vD, (sub v8i16:$vA, v8i16:$vB))]>; 505193323Seddef VSUBUWM : VXForm_1<1152, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 506193323Sed "vsubuwm $vD, $vA, $vB", VecGeneral, 507249423Sdim [(set v4i32:$vD, (sub v4i32:$vA, v4i32:$vB))]>; 508193323Sed 509249423Sdimdef VSUBSBS : VX1_Int_Ty<1792, "vsubsbs" , int_ppc_altivec_vsubsbs, v16i8>; 510249423Sdimdef VSUBSHS : VX1_Int_Ty<1856, "vsubshs" , int_ppc_altivec_vsubshs, v8i16>; 511249423Sdimdef VSUBSWS : VX1_Int_Ty<1920, "vsubsws" , int_ppc_altivec_vsubsws, v4i32>; 512249423Sdimdef VSUBUBS : VX1_Int_Ty<1536, "vsububs" , int_ppc_altivec_vsububs, v16i8>; 513249423Sdimdef VSUBUHS : VX1_Int_Ty<1600, "vsubuhs" , int_ppc_altivec_vsubuhs, v8i16>; 514249423Sdimdef VSUBUWS : VX1_Int_Ty<1664, "vsubuws" , int_ppc_altivec_vsubuws, v4i32>; 515193323Sed 516249423Sdimdef VSUMSWS : VX1_Int_Ty<1928, "vsumsws" , int_ppc_altivec_vsumsws, v4i32>; 517249423Sdimdef VSUM2SWS: VX1_Int_Ty<1672, "vsum2sws", int_ppc_altivec_vsum2sws, v4i32>; 518249423Sdim 519249423Sdimdef VSUM4SBS: VX1_Int_Ty3<1672, "vsum4sbs", int_ppc_altivec_vsum4sbs, 520249423Sdim v4i32, v16i8, v4i32>; 521249423Sdimdef VSUM4SHS: VX1_Int_Ty3<1608, "vsum4shs", int_ppc_altivec_vsum4shs, 522249423Sdim v4i32, v8i16, v4i32>; 523249423Sdimdef VSUM4UBS: VX1_Int_Ty3<1544, "vsum4ubs", int_ppc_altivec_vsum4ubs, 524249423Sdim v4i32, v16i8, v4i32>; 525249423Sdim 526193323Seddef VNOR : VXForm_1<1284, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 527193323Sed "vnor $vD, $vA, $vB", VecFP, 528249423Sdim [(set v4i32:$vD, (vnot_ppc (or v4i32:$vA, 529249423Sdim v4i32:$vB)))]>; 530193323Seddef VOR : VXForm_1<1156, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 531193323Sed "vor $vD, $vA, $vB", VecFP, 532249423Sdim [(set v4i32:$vD, (or v4i32:$vA, v4i32:$vB))]>; 533193323Seddef VXOR : VXForm_1<1220, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 534193323Sed "vxor $vD, $vA, $vB", VecFP, 535249423Sdim [(set v4i32:$vD, (xor v4i32:$vA, v4i32:$vB))]>; 536193323Sed 537249423Sdimdef VRLB : VX1_Int_Ty< 4, "vrlb", int_ppc_altivec_vrlb, v16i8>; 538249423Sdimdef VRLH : VX1_Int_Ty< 68, "vrlh", int_ppc_altivec_vrlh, v8i16>; 539249423Sdimdef VRLW : VX1_Int_Ty< 132, "vrlw", int_ppc_altivec_vrlw, v4i32>; 540193323Sed 541249423Sdimdef VSL : VX1_Int_Ty< 452, "vsl" , int_ppc_altivec_vsl, v4i32 >; 542249423Sdimdef VSLO : VX1_Int_Ty<1036, "vslo", int_ppc_altivec_vslo, v4i32>; 543193323Sed 544249423Sdimdef VSLB : VX1_Int_Ty< 260, "vslb", int_ppc_altivec_vslb, v16i8>; 545249423Sdimdef VSLH : VX1_Int_Ty< 324, "vslh", int_ppc_altivec_vslh, v8i16>; 546249423Sdimdef VSLW : VX1_Int_Ty< 388, "vslw", int_ppc_altivec_vslw, v4i32>; 547249423Sdim 548193323Seddef VSPLTB : VXForm_1<524, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 549193323Sed "vspltb $vD, $vB, $UIMM", VecPerm, 550249423Sdim [(set v16i8:$vD, 551249423Sdim (vspltb_shuffle:$UIMM v16i8:$vB, (undef)))]>; 552193323Seddef VSPLTH : VXForm_1<588, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 553193323Sed "vsplth $vD, $vB, $UIMM", VecPerm, 554249423Sdim [(set v16i8:$vD, 555249423Sdim (vsplth_shuffle:$UIMM v16i8:$vB, (undef)))]>; 556193323Seddef VSPLTW : VXForm_1<652, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB), 557193323Sed "vspltw $vD, $vB, $UIMM", VecPerm, 558249423Sdim [(set v16i8:$vD, 559249423Sdim (vspltw_shuffle:$UIMM v16i8:$vB, (undef)))]>; 560193323Sed 561249423Sdimdef VSR : VX1_Int_Ty< 708, "vsr" , int_ppc_altivec_vsr, v4i32>; 562249423Sdimdef VSRO : VX1_Int_Ty<1100, "vsro" , int_ppc_altivec_vsro, v4i32>; 563193323Sed 564249423Sdimdef VSRAB : VX1_Int_Ty< 772, "vsrab", int_ppc_altivec_vsrab, v16i8>; 565249423Sdimdef VSRAH : VX1_Int_Ty< 836, "vsrah", int_ppc_altivec_vsrah, v8i16>; 566249423Sdimdef VSRAW : VX1_Int_Ty< 900, "vsraw", int_ppc_altivec_vsraw, v4i32>; 567249423Sdimdef VSRB : VX1_Int_Ty< 516, "vsrb" , int_ppc_altivec_vsrb , v16i8>; 568249423Sdimdef VSRH : VX1_Int_Ty< 580, "vsrh" , int_ppc_altivec_vsrh , v8i16>; 569249423Sdimdef VSRW : VX1_Int_Ty< 644, "vsrw" , int_ppc_altivec_vsrw , v4i32>; 570193323Sed 571249423Sdim 572193323Seddef VSPLTISB : VXForm_3<780, (outs VRRC:$vD), (ins s5imm:$SIMM), 573193323Sed "vspltisb $vD, $SIMM", VecPerm, 574249423Sdim [(set v16i8:$vD, (v16i8 vecspltisb:$SIMM))]>; 575193323Seddef VSPLTISH : VXForm_3<844, (outs VRRC:$vD), (ins s5imm:$SIMM), 576193323Sed "vspltish $vD, $SIMM", VecPerm, 577249423Sdim [(set v8i16:$vD, (v8i16 vecspltish:$SIMM))]>; 578193323Seddef VSPLTISW : VXForm_3<908, (outs VRRC:$vD), (ins s5imm:$SIMM), 579193323Sed "vspltisw $vD, $SIMM", VecPerm, 580249423Sdim [(set v4i32:$vD, (v4i32 vecspltisw:$SIMM))]>; 581193323Sed 582193323Sed// Vector Pack. 583249423Sdimdef VPKPX : VX1_Int_Ty2<782, "vpkpx", int_ppc_altivec_vpkpx, 584249423Sdim v8i16, v4i32>; 585249423Sdimdef VPKSHSS : VX1_Int_Ty2<398, "vpkshss", int_ppc_altivec_vpkshss, 586249423Sdim v16i8, v8i16>; 587249423Sdimdef VPKSHUS : VX1_Int_Ty2<270, "vpkshus", int_ppc_altivec_vpkshus, 588249423Sdim v16i8, v8i16>; 589249423Sdimdef VPKSWSS : VX1_Int_Ty2<462, "vpkswss", int_ppc_altivec_vpkswss, 590249423Sdim v16i8, v4i32>; 591249423Sdimdef VPKSWUS : VX1_Int_Ty2<334, "vpkswus", int_ppc_altivec_vpkswus, 592249423Sdim v8i16, v4i32>; 593193323Seddef VPKUHUM : VXForm_1<14, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 594193323Sed "vpkuhum $vD, $vA, $vB", VecFP, 595249423Sdim [(set v16i8:$vD, 596249423Sdim (vpkuhum_shuffle v16i8:$vA, v16i8:$vB))]>; 597249423Sdimdef VPKUHUS : VX1_Int_Ty2<142, "vpkuhus", int_ppc_altivec_vpkuhus, 598249423Sdim v16i8, v8i16>; 599193323Seddef VPKUWUM : VXForm_1<78, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB), 600193323Sed "vpkuwum $vD, $vA, $vB", VecFP, 601249423Sdim [(set v16i8:$vD, 602249423Sdim (vpkuwum_shuffle v16i8:$vA, v16i8:$vB))]>; 603249423Sdimdef VPKUWUS : VX1_Int_Ty2<206, "vpkuwus", int_ppc_altivec_vpkuwus, 604249423Sdim v8i16, v4i32>; 605193323Sed 606193323Sed// Vector Unpack. 607249423Sdimdef VUPKHPX : VX2_Int_Ty2<846, "vupkhpx", int_ppc_altivec_vupkhpx, 608249423Sdim v4i32, v8i16>; 609249423Sdimdef VUPKHSB : VX2_Int_Ty2<526, "vupkhsb", int_ppc_altivec_vupkhsb, 610249423Sdim v8i16, v16i8>; 611249423Sdimdef VUPKHSH : VX2_Int_Ty2<590, "vupkhsh", int_ppc_altivec_vupkhsh, 612249423Sdim v4i32, v8i16>; 613249423Sdimdef VUPKLPX : VX2_Int_Ty2<974, "vupklpx", int_ppc_altivec_vupklpx, 614249423Sdim v4i32, v8i16>; 615249423Sdimdef VUPKLSB : VX2_Int_Ty2<654, "vupklsb", int_ppc_altivec_vupklsb, 616249423Sdim v8i16, v16i8>; 617249423Sdimdef VUPKLSH : VX2_Int_Ty2<718, "vupklsh", int_ppc_altivec_vupklsh, 618249423Sdim v4i32, v8i16>; 619193323Sed 620193323Sed 621193323Sed// Altivec Comparisons. 622193323Sed 623193323Sedclass VCMP<bits<10> xo, string asmstr, ValueType Ty> 624193323Sed : VXRForm_1<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB),asmstr,VecFPCompare, 625249423Sdim [(set Ty:$vD, (Ty (PPCvcmp Ty:$vA, Ty:$vB, xo)))]>; 626193323Sedclass VCMPo<bits<10> xo, string asmstr, ValueType Ty> 627193323Sed : VXRForm_1<xo, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vB),asmstr,VecFPCompare, 628249423Sdim [(set Ty:$vD, (Ty (PPCvcmp_o Ty:$vA, Ty:$vB, xo)))]> { 629193323Sed let Defs = [CR6]; 630193323Sed let RC = 1; 631193323Sed} 632193323Sed 633193323Sed// f32 element comparisons.0 634193323Seddef VCMPBFP : VCMP <966, "vcmpbfp $vD, $vA, $vB" , v4f32>; 635193323Seddef VCMPBFPo : VCMPo<966, "vcmpbfp. $vD, $vA, $vB" , v4f32>; 636193323Seddef VCMPEQFP : VCMP <198, "vcmpeqfp $vD, $vA, $vB" , v4f32>; 637193323Seddef VCMPEQFPo : VCMPo<198, "vcmpeqfp. $vD, $vA, $vB", v4f32>; 638193323Seddef VCMPGEFP : VCMP <454, "vcmpgefp $vD, $vA, $vB" , v4f32>; 639193323Seddef VCMPGEFPo : VCMPo<454, "vcmpgefp. $vD, $vA, $vB", v4f32>; 640193323Seddef VCMPGTFP : VCMP <710, "vcmpgtfp $vD, $vA, $vB" , v4f32>; 641193323Seddef VCMPGTFPo : VCMPo<710, "vcmpgtfp. $vD, $vA, $vB", v4f32>; 642193323Sed 643193323Sed// i8 element comparisons. 644193323Seddef VCMPEQUB : VCMP < 6, "vcmpequb $vD, $vA, $vB" , v16i8>; 645193323Seddef VCMPEQUBo : VCMPo< 6, "vcmpequb. $vD, $vA, $vB", v16i8>; 646193323Seddef VCMPGTSB : VCMP <774, "vcmpgtsb $vD, $vA, $vB" , v16i8>; 647193323Seddef VCMPGTSBo : VCMPo<774, "vcmpgtsb. $vD, $vA, $vB", v16i8>; 648193323Seddef VCMPGTUB : VCMP <518, "vcmpgtub $vD, $vA, $vB" , v16i8>; 649193323Seddef VCMPGTUBo : VCMPo<518, "vcmpgtub. $vD, $vA, $vB", v16i8>; 650193323Sed 651193323Sed// i16 element comparisons. 652193323Seddef VCMPEQUH : VCMP < 70, "vcmpequh $vD, $vA, $vB" , v8i16>; 653193323Seddef VCMPEQUHo : VCMPo< 70, "vcmpequh. $vD, $vA, $vB", v8i16>; 654193323Seddef VCMPGTSH : VCMP <838, "vcmpgtsh $vD, $vA, $vB" , v8i16>; 655193323Seddef VCMPGTSHo : VCMPo<838, "vcmpgtsh. $vD, $vA, $vB", v8i16>; 656193323Seddef VCMPGTUH : VCMP <582, "vcmpgtuh $vD, $vA, $vB" , v8i16>; 657193323Seddef VCMPGTUHo : VCMPo<582, "vcmpgtuh. $vD, $vA, $vB", v8i16>; 658193323Sed 659193323Sed// i32 element comparisons. 660193323Seddef VCMPEQUW : VCMP <134, "vcmpequw $vD, $vA, $vB" , v4i32>; 661193323Seddef VCMPEQUWo : VCMPo<134, "vcmpequw. $vD, $vA, $vB", v4i32>; 662193323Seddef VCMPGTSW : VCMP <902, "vcmpgtsw $vD, $vA, $vB" , v4i32>; 663193323Seddef VCMPGTSWo : VCMPo<902, "vcmpgtsw. $vD, $vA, $vB", v4i32>; 664193323Seddef VCMPGTUW : VCMP <646, "vcmpgtuw $vD, $vA, $vB" , v4i32>; 665193323Seddef VCMPGTUWo : VCMPo<646, "vcmpgtuw. $vD, $vA, $vB", v4i32>; 666193323Sed 667249423Sdimlet isCodeGenOnly = 1 in 668193323Seddef V_SET0 : VXForm_setzero<1220, (outs VRRC:$vD), (ins), 669193323Sed "vxor $vD, $vD, $vD", VecFP, 670249423Sdim [(set v4i32:$vD, (v4i32 immAllZerosV))]>; 671249423Sdimlet IMM=-1 in { 672249423Sdimdef V_SETALLONES : VXForm_3<908, (outs VRRC:$vD), (ins), 673249423Sdim "vspltisw $vD, -1", VecFP, 674249423Sdim [(set v4i32:$vD, (v4i32 immAllOnesV))]>; 675193323Sed} 676249423Sdim} // VALU Operations. 677193323Sed 678193323Sed//===----------------------------------------------------------------------===// 679193323Sed// Additional Altivec Patterns 680193323Sed// 681193323Sed 682193323Sed// DS* intrinsics 683193323Seddef : Pat<(int_ppc_altivec_dssall), (DSSALL 1, 0, 0, 0)>; 684193323Seddef : Pat<(int_ppc_altivec_dss imm:$STRM), (DSS 0, imm:$STRM, 0, 0)>; 685193323Sed 686193323Sed// * 32-bit 687249423Sdimdef : Pat<(int_ppc_altivec_dst i32:$rA, i32:$rB, imm:$STRM), 688249423Sdim (DST 0, imm:$STRM, $rA, $rB)>; 689249423Sdimdef : Pat<(int_ppc_altivec_dstt i32:$rA, i32:$rB, imm:$STRM), 690249423Sdim (DSTT 1, imm:$STRM, $rA, $rB)>; 691249423Sdimdef : Pat<(int_ppc_altivec_dstst i32:$rA, i32:$rB, imm:$STRM), 692249423Sdim (DSTST 0, imm:$STRM, $rA, $rB)>; 693249423Sdimdef : Pat<(int_ppc_altivec_dststt i32:$rA, i32:$rB, imm:$STRM), 694249423Sdim (DSTSTT 1, imm:$STRM, $rA, $rB)>; 695193323Sed 696193323Sed// * 64-bit 697249423Sdimdef : Pat<(int_ppc_altivec_dst i64:$rA, i32:$rB, imm:$STRM), 698249423Sdim (DST64 0, imm:$STRM, $rA, $rB)>; 699249423Sdimdef : Pat<(int_ppc_altivec_dstt i64:$rA, i32:$rB, imm:$STRM), 700249423Sdim (DSTT64 1, imm:$STRM, $rA, $rB)>; 701249423Sdimdef : Pat<(int_ppc_altivec_dstst i64:$rA, i32:$rB, imm:$STRM), 702249423Sdim (DSTST64 0, imm:$STRM, $rA, $rB)>; 703249423Sdimdef : Pat<(int_ppc_altivec_dststt i64:$rA, i32:$rB, imm:$STRM), 704249423Sdim (DSTSTT64 1, imm:$STRM, $rA, $rB)>; 705193323Sed 706193323Sed// Loads. 707193323Seddef : Pat<(v4i32 (load xoaddr:$src)), (LVX xoaddr:$src)>; 708193323Sed 709193323Sed// Stores. 710249423Sdimdef : Pat<(store v4i32:$rS, xoaddr:$dst), 711249423Sdim (STVX $rS, xoaddr:$dst)>; 712193323Sed 713193323Sed// Bit conversions. 714193323Seddef : Pat<(v16i8 (bitconvert (v8i16 VRRC:$src))), (v16i8 VRRC:$src)>; 715193323Seddef : Pat<(v16i8 (bitconvert (v4i32 VRRC:$src))), (v16i8 VRRC:$src)>; 716193323Seddef : Pat<(v16i8 (bitconvert (v4f32 VRRC:$src))), (v16i8 VRRC:$src)>; 717193323Sed 718193323Seddef : Pat<(v8i16 (bitconvert (v16i8 VRRC:$src))), (v8i16 VRRC:$src)>; 719193323Seddef : Pat<(v8i16 (bitconvert (v4i32 VRRC:$src))), (v8i16 VRRC:$src)>; 720193323Seddef : Pat<(v8i16 (bitconvert (v4f32 VRRC:$src))), (v8i16 VRRC:$src)>; 721193323Sed 722193323Seddef : Pat<(v4i32 (bitconvert (v16i8 VRRC:$src))), (v4i32 VRRC:$src)>; 723193323Seddef : Pat<(v4i32 (bitconvert (v8i16 VRRC:$src))), (v4i32 VRRC:$src)>; 724193323Seddef : Pat<(v4i32 (bitconvert (v4f32 VRRC:$src))), (v4i32 VRRC:$src)>; 725193323Sed 726193323Seddef : Pat<(v4f32 (bitconvert (v16i8 VRRC:$src))), (v4f32 VRRC:$src)>; 727193323Seddef : Pat<(v4f32 (bitconvert (v8i16 VRRC:$src))), (v4f32 VRRC:$src)>; 728193323Seddef : Pat<(v4f32 (bitconvert (v4i32 VRRC:$src))), (v4f32 VRRC:$src)>; 729193323Sed 730193323Sed// Shuffles. 731193323Sed 732193323Sed// Match vsldoi(x,x), vpkuwum(x,x), vpkuhum(x,x) 733249423Sdimdef:Pat<(vsldoi_unary_shuffle:$in v16i8:$vA, undef), 734249423Sdim (VSLDOI $vA, $vA, (VSLDOI_unary_get_imm $in))>; 735249423Sdimdef:Pat<(vpkuwum_unary_shuffle v16i8:$vA, undef), 736249423Sdim (VPKUWUM $vA, $vA)>; 737249423Sdimdef:Pat<(vpkuhum_unary_shuffle v16i8:$vA, undef), 738249423Sdim (VPKUHUM $vA, $vA)>; 739193323Sed 740193323Sed// Match vmrg*(x,x) 741249423Sdimdef:Pat<(vmrglb_unary_shuffle v16i8:$vA, undef), 742249423Sdim (VMRGLB $vA, $vA)>; 743249423Sdimdef:Pat<(vmrglh_unary_shuffle v16i8:$vA, undef), 744249423Sdim (VMRGLH $vA, $vA)>; 745249423Sdimdef:Pat<(vmrglw_unary_shuffle v16i8:$vA, undef), 746249423Sdim (VMRGLW $vA, $vA)>; 747249423Sdimdef:Pat<(vmrghb_unary_shuffle v16i8:$vA, undef), 748249423Sdim (VMRGHB $vA, $vA)>; 749249423Sdimdef:Pat<(vmrghh_unary_shuffle v16i8:$vA, undef), 750249423Sdim (VMRGHH $vA, $vA)>; 751249423Sdimdef:Pat<(vmrghw_unary_shuffle v16i8:$vA, undef), 752249423Sdim (VMRGHW $vA, $vA)>; 753193323Sed 754193323Sed// Logical Operations 755249423Sdimdef : Pat<(vnot_ppc v4i32:$vA), (VNOR $vA, $vA)>; 756193323Sed 757249423Sdimdef : Pat<(vnot_ppc (or v4i32:$A, v4i32:$B)), 758249423Sdim (VNOR $A, $B)>; 759249423Sdimdef : Pat<(and v4i32:$A, (vnot_ppc v4i32:$B)), 760249423Sdim (VANDC $A, $B)>; 761193323Sed 762249423Sdimdef : Pat<(fmul v4f32:$vA, v4f32:$vB), 763249423Sdim (VMADDFP $vA, $vB, 764249423Sdim (v4i32 (VSLW (V_SETALLONES), (V_SETALLONES))))>; 765193323Sed 766193323Sed// Fused multiply add and multiply sub for packed float. These are represented 767193323Sed// separately from the real instructions above, for operations that must have 768193323Sed// the additional precision, such as Newton-Rhapson (used by divide, sqrt) 769249423Sdimdef : Pat<(PPCvmaddfp v4f32:$A, v4f32:$B, v4f32:$C), 770249423Sdim (VMADDFP $A, $B, $C)>; 771249423Sdimdef : Pat<(PPCvnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), 772249423Sdim (VNMSUBFP $A, $B, $C)>; 773193323Sed 774249423Sdimdef : Pat<(int_ppc_altivec_vmaddfp v4f32:$A, v4f32:$B, v4f32:$C), 775249423Sdim (VMADDFP $A, $B, $C)>; 776249423Sdimdef : Pat<(int_ppc_altivec_vnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), 777249423Sdim (VNMSUBFP $A, $B, $C)>; 778193323Sed 779249423Sdimdef : Pat<(PPCvperm v16i8:$vA, v16i8:$vB, v16i8:$vC), 780249423Sdim (VPERM $vA, $vB, $vC)>; 781193630Sed 782249423Sdimdef : Pat<(PPCfre v4f32:$A), (VREFP $A)>; 783249423Sdimdef : Pat<(PPCfrsqrte v4f32:$A), (VRSQRTEFP $A)>; 784249423Sdim 785193630Sed// Vector shifts 786249423Sdimdef : Pat<(v16i8 (shl v16i8:$vA, v16i8:$vB)), 787249423Sdim (v16i8 (VSLB $vA, $vB))>; 788249423Sdimdef : Pat<(v8i16 (shl v8i16:$vA, v8i16:$vB)), 789249423Sdim (v8i16 (VSLH $vA, $vB))>; 790249423Sdimdef : Pat<(v4i32 (shl v4i32:$vA, v4i32:$vB)), 791249423Sdim (v4i32 (VSLW $vA, $vB))>; 792193630Sed 793249423Sdimdef : Pat<(v16i8 (srl v16i8:$vA, v16i8:$vB)), 794249423Sdim (v16i8 (VSRB $vA, $vB))>; 795249423Sdimdef : Pat<(v8i16 (srl v8i16:$vA, v8i16:$vB)), 796249423Sdim (v8i16 (VSRH $vA, $vB))>; 797249423Sdimdef : Pat<(v4i32 (srl v4i32:$vA, v4i32:$vB)), 798249423Sdim (v4i32 (VSRW $vA, $vB))>; 799193630Sed 800249423Sdimdef : Pat<(v16i8 (sra v16i8:$vA, v16i8:$vB)), 801249423Sdim (v16i8 (VSRAB $vA, $vB))>; 802249423Sdimdef : Pat<(v8i16 (sra v8i16:$vA, v8i16:$vB)), 803249423Sdim (v8i16 (VSRAH $vA, $vB))>; 804249423Sdimdef : Pat<(v4i32 (sra v4i32:$vA, v4i32:$vB)), 805249423Sdim (v4i32 (VSRAW $vA, $vB))>; 806243830Sdim 807243830Sdim// Float to integer and integer to float conversions 808249423Sdimdef : Pat<(v4i32 (fp_to_sint v4f32:$vA)), 809249423Sdim (VCTSXS_0 $vA)>; 810249423Sdimdef : Pat<(v4i32 (fp_to_uint v4f32:$vA)), 811249423Sdim (VCTUXS_0 $vA)>; 812249423Sdimdef : Pat<(v4f32 (sint_to_fp v4i32:$vA)), 813249423Sdim (VCFSX_0 $vA)>; 814249423Sdimdef : Pat<(v4f32 (uint_to_fp v4i32:$vA)), 815249423Sdim (VCFUX_0 $vA)>; 816249423Sdim 817249423Sdim// Floating-point rounding 818249423Sdimdef : Pat<(v4f32 (ffloor v4f32:$vA)), 819249423Sdim (VRFIM $vA)>; 820249423Sdimdef : Pat<(v4f32 (fceil v4f32:$vA)), 821249423Sdim (VRFIP $vA)>; 822249423Sdimdef : Pat<(v4f32 (ftrunc v4f32:$vA)), 823249423Sdim (VRFIZ $vA)>; 824249423Sdimdef : Pat<(v4f32 (fnearbyint v4f32:$vA)), 825249423Sdim (VRFIN $vA)>; 826249423Sdim 827249423Sdim} // end HasAltivec 828249423Sdim 829