1234353Sdim//===-- PPCInstrAltivec.td - The PowerPC Altivec Extension -*- tablegen -*-===// 2234353Sdim// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7234353Sdim// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file describes the Altivec extension to the PowerPC instruction set. 11193323Sed// 12193323Sed//===----------------------------------------------------------------------===// 13193323Sed 14288943Sdim// *********************************** NOTE *********************************** 15288943Sdim// ** For POWER8 Little Endian, the VSX swap optimization relies on knowing ** 16288943Sdim// ** which VMX and VSX instructions are lane-sensitive and which are not. ** 17288943Sdim// ** A lane-sensitive instruction relies, implicitly or explicitly, on ** 18288943Sdim// ** whether lanes are numbered from left to right. An instruction like ** 19288943Sdim// ** VADDFP is not lane-sensitive, because each lane of the result vector ** 20288943Sdim// ** relies only on the corresponding lane of the source vectors. However, ** 21288943Sdim// ** an instruction like VMULESB is lane-sensitive, because "even" and ** 22288943Sdim// ** "odd" lanes are different for big-endian and little-endian numbering. ** 23288943Sdim// ** ** 24288943Sdim// ** When adding new VMX and VSX instructions, please consider whether they ** 25288943Sdim// ** are lane-sensitive. If so, they must be added to a switch statement ** 26288943Sdim// ** in PPCVSXSwapRemoval::gatherVectorInstructions(). ** 27288943Sdim// **************************************************************************** 28288943Sdim 29193323Sed//===----------------------------------------------------------------------===// 30193323Sed// Altivec transformation functions and pattern fragments. 31193323Sed// 32193323Sed 33206083Srdivacky// Since we canonicalize buildvectors to v16i8, all vnots "-1" operands will be 34206083Srdivacky// of that type. 35206083Srdivackydef vnot_ppc : PatFrag<(ops node:$in), 36206083Srdivacky (xor node:$in, (bitconvert (v16i8 immAllOnesV)))>; 37193323Sed 38193323Seddef vpkuhum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 39193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 40276479Sdim return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), 0, *CurDAG); 41193323Sed}]>; 42193323Seddef vpkuwum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 43193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 44276479Sdim return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), 0, *CurDAG); 45193323Sed}]>; 46288943Sdimdef vpkudum_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 47288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 48288943Sdim return PPC::isVPKUDUMShuffleMask(cast<ShuffleVectorSDNode>(N), 0, *CurDAG); 49288943Sdim}]>; 50193323Seddef vpkuhum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 51193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 52276479Sdim return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), 1, *CurDAG); 53193323Sed}]>; 54193323Seddef vpkuwum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 55193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 56276479Sdim return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), 1, *CurDAG); 57193323Sed}]>; 58288943Sdimdef vpkudum_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 59288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 60288943Sdim return PPC::isVPKUDUMShuffleMask(cast<ShuffleVectorSDNode>(N), 1, *CurDAG); 61288943Sdim}]>; 62193323Sed 63276479Sdim// These fragments are provided for little-endian, where the inputs must be 64276479Sdim// swapped for correct semantics. 65276479Sdimdef vpkuhum_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 66276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 67276479Sdim return PPC::isVPKUHUMShuffleMask(cast<ShuffleVectorSDNode>(N), 2, *CurDAG); 68276479Sdim}]>; 69276479Sdimdef vpkuwum_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 70276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 71276479Sdim return PPC::isVPKUWUMShuffleMask(cast<ShuffleVectorSDNode>(N), 2, *CurDAG); 72276479Sdim}]>; 73288943Sdimdef vpkudum_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 74288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 75288943Sdim return PPC::isVPKUDUMShuffleMask(cast<ShuffleVectorSDNode>(N), 2, *CurDAG); 76288943Sdim}]>; 77193323Sed 78193323Seddef vmrglb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 79204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 80276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, 0, *CurDAG); 81193323Sed}]>; 82193323Seddef vmrglh_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 83204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 84276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, 0, *CurDAG); 85193323Sed}]>; 86193323Seddef vmrglw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 87204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 88276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, 0, *CurDAG); 89193323Sed}]>; 90193323Seddef vmrghb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 91204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 92276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, 0, *CurDAG); 93193323Sed}]>; 94193323Seddef vmrghh_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 95204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 96276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, 0, *CurDAG); 97193323Sed}]>; 98193323Seddef vmrghw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 99204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 100276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, 0, *CurDAG); 101193323Sed}]>; 102193323Sed 103193323Sed 104193323Seddef vmrglb_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 105204961Srdivacky (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 106276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, 1, *CurDAG); 107193323Sed}]>; 108193323Seddef vmrglh_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 109193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 110276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, 1, *CurDAG); 111193323Sed}]>; 112193323Seddef vmrglw_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 113193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 114276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, 1, *CurDAG); 115193323Sed}]>; 116193323Seddef vmrghb_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 117193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 118276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, 1, *CurDAG); 119193323Sed}]>; 120193323Seddef vmrghh_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 121193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 122276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, 1, *CurDAG); 123193323Sed}]>; 124193323Seddef vmrghw_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 125193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 126276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, 1, *CurDAG); 127193323Sed}]>; 128193323Sed 129193323Sed 130276479Sdim// These fragments are provided for little-endian, where the inputs must be 131276479Sdim// swapped for correct semantics. 132276479Sdimdef vmrglb_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 133276479Sdim (vector_shuffle (v16i8 node:$lhs), node:$rhs), [{ 134276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 1, 2, *CurDAG); 135276479Sdim}]>; 136276479Sdimdef vmrglh_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 137276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 138276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 2, 2, *CurDAG); 139276479Sdim}]>; 140276479Sdimdef vmrglw_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 141276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 142276479Sdim return PPC::isVMRGLShuffleMask(cast<ShuffleVectorSDNode>(N), 4, 2, *CurDAG); 143276479Sdim}]>; 144276479Sdimdef vmrghb_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 145276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 146276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 1, 2, *CurDAG); 147276479Sdim}]>; 148276479Sdimdef vmrghh_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 149276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 150276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 2, 2, *CurDAG); 151276479Sdim}]>; 152276479Sdimdef vmrghw_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 153276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 154276479Sdim return PPC::isVMRGHShuffleMask(cast<ShuffleVectorSDNode>(N), 4, 2, *CurDAG); 155276479Sdim}]>; 156276479Sdim 157276479Sdim 158288943Sdimdef vmrgew_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 159288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 160288943Sdim return PPC::isVMRGEOShuffleMask(cast<ShuffleVectorSDNode>(N), true, 0, *CurDAG); 161288943Sdim}]>; 162288943Sdimdef vmrgow_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 163288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 164288943Sdim return PPC::isVMRGEOShuffleMask(cast<ShuffleVectorSDNode>(N), false, 0, *CurDAG); 165288943Sdim}]>; 166288943Sdimdef vmrgew_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 167288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 168288943Sdim return PPC::isVMRGEOShuffleMask(cast<ShuffleVectorSDNode>(N), true, 1, *CurDAG); 169288943Sdim}]>; 170288943Sdimdef vmrgow_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 171288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 172288943Sdim return PPC::isVMRGEOShuffleMask(cast<ShuffleVectorSDNode>(N), false, 1, *CurDAG); 173288943Sdim}]>; 174288943Sdimdef vmrgew_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 175288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 176288943Sdim return PPC::isVMRGEOShuffleMask(cast<ShuffleVectorSDNode>(N), true, 2, *CurDAG); 177288943Sdim}]>; 178288943Sdimdef vmrgow_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 179288943Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 180288943Sdim return PPC::isVMRGEOShuffleMask(cast<ShuffleVectorSDNode>(N), false, 2, *CurDAG); 181288943Sdim}]>; 182288943Sdim 183288943Sdim 184288943Sdim 185193323Seddef VSLDOI_get_imm : SDNodeXForm<vector_shuffle, [{ 186288943Sdim return getI32Imm(PPC::isVSLDOIShuffleMask(N, 0, *CurDAG), SDLoc(N)); 187193323Sed}]>; 188193323Seddef vsldoi_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 189193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 190276479Sdim return PPC::isVSLDOIShuffleMask(N, 0, *CurDAG) != -1; 191193323Sed}], VSLDOI_get_imm>; 192193323Sed 193193323Sed 194193323Sed/// VSLDOI_unary* - These are used to match vsldoi(X,X), which is turned into 195193323Sed/// vector_shuffle(X,undef,mask) by the dag combiner. 196193323Seddef VSLDOI_unary_get_imm : SDNodeXForm<vector_shuffle, [{ 197288943Sdim return getI32Imm(PPC::isVSLDOIShuffleMask(N, 1, *CurDAG), SDLoc(N)); 198193323Sed}]>; 199193323Seddef vsldoi_unary_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 200193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 201276479Sdim return PPC::isVSLDOIShuffleMask(N, 1, *CurDAG) != -1; 202193323Sed}], VSLDOI_unary_get_imm>; 203193323Sed 204193323Sed 205276479Sdim/// VSLDOI_swapped* - These fragments are provided for little-endian, where 206276479Sdim/// the inputs must be swapped for correct semantics. 207276479Sdimdef VSLDOI_swapped_get_imm : SDNodeXForm<vector_shuffle, [{ 208288943Sdim return getI32Imm(PPC::isVSLDOIShuffleMask(N, 2, *CurDAG), SDLoc(N)); 209276479Sdim}]>; 210276479Sdimdef vsldoi_swapped_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 211276479Sdim (vector_shuffle node:$lhs, node:$rhs), [{ 212276479Sdim return PPC::isVSLDOIShuffleMask(N, 2, *CurDAG) != -1; 213276479Sdim}], VSLDOI_get_imm>; 214276479Sdim 215276479Sdim 216193323Sed// VSPLT*_get_imm xform function: convert vector_shuffle mask to VSPLT* imm. 217193323Seddef VSPLTB_get_imm : SDNodeXForm<vector_shuffle, [{ 218288943Sdim return getI32Imm(PPC::getVSPLTImmediate(N, 1, *CurDAG), SDLoc(N)); 219193323Sed}]>; 220193323Seddef vspltb_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 221193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 222193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 1); 223193323Sed}], VSPLTB_get_imm>; 224193323Seddef VSPLTH_get_imm : SDNodeXForm<vector_shuffle, [{ 225288943Sdim return getI32Imm(PPC::getVSPLTImmediate(N, 2, *CurDAG), SDLoc(N)); 226193323Sed}]>; 227193323Seddef vsplth_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 228193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 229193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 2); 230193323Sed}], VSPLTH_get_imm>; 231193323Seddef VSPLTW_get_imm : SDNodeXForm<vector_shuffle, [{ 232288943Sdim return getI32Imm(PPC::getVSPLTImmediate(N, 4, *CurDAG), SDLoc(N)); 233193323Sed}]>; 234193323Seddef vspltw_shuffle : PatFrag<(ops node:$lhs, node:$rhs), 235193323Sed (vector_shuffle node:$lhs, node:$rhs), [{ 236193323Sed return PPC::isSplatShuffleMask(cast<ShuffleVectorSDNode>(N), 4); 237193323Sed}], VSPLTW_get_imm>; 238193323Sed 239193323Sed 240193323Sed// VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm. 241193323Seddef VSPLTISB_get_imm : SDNodeXForm<build_vector, [{ 242193323Sed return PPC::get_VSPLTI_elt(N, 1, *CurDAG); 243193323Sed}]>; 244193323Seddef vecspltisb : PatLeaf<(build_vector), [{ 245193323Sed return PPC::get_VSPLTI_elt(N, 1, *CurDAG).getNode() != 0; 246193323Sed}], VSPLTISB_get_imm>; 247193323Sed 248193323Sed// VSPLTISH_get_imm xform function: convert build_vector to VSPLTISH imm. 249193323Seddef VSPLTISH_get_imm : SDNodeXForm<build_vector, [{ 250193323Sed return PPC::get_VSPLTI_elt(N, 2, *CurDAG); 251193323Sed}]>; 252193323Seddef vecspltish : PatLeaf<(build_vector), [{ 253193323Sed return PPC::get_VSPLTI_elt(N, 2, *CurDAG).getNode() != 0; 254193323Sed}], VSPLTISH_get_imm>; 255193323Sed 256193323Sed// VSPLTISW_get_imm xform function: convert build_vector to VSPLTISW imm. 257193323Seddef VSPLTISW_get_imm : SDNodeXForm<build_vector, [{ 258193323Sed return PPC::get_VSPLTI_elt(N, 4, *CurDAG); 259193323Sed}]>; 260193323Seddef vecspltisw : PatLeaf<(build_vector), [{ 261193323Sed return PPC::get_VSPLTI_elt(N, 4, *CurDAG).getNode() != 0; 262193323Sed}], VSPLTISW_get_imm>; 263193323Sed 264193323Sed//===----------------------------------------------------------------------===// 265193323Sed// Helpers for defining instructions that directly correspond to intrinsics. 266193323Sed 267249423Sdim// VA1a_Int_Ty - A VAForm_1a intrinsic definition of specific type. 268249423Sdimclass VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty> 269251662Sdim : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC), 270276479Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP, 271249423Sdim [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>; 272193323Sed 273249423Sdim// VA1a_Int_Ty2 - A VAForm_1a intrinsic definition where the type of the 274249423Sdim// inputs doesn't match the type of the output. 275249423Sdimclass VA1a_Int_Ty2<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy, 276249423Sdim ValueType InTy> 277251662Sdim : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC), 278276479Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP, 279249423Sdim [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>; 280249423Sdim 281249423Sdim// VA1a_Int_Ty3 - A VAForm_1a intrinsic definition where there are two 282249423Sdim// input types and an output type. 283249423Sdimclass VA1a_Int_Ty3<bits<6> xo, string opc, Intrinsic IntID, ValueType OutTy, 284249423Sdim ValueType In1Ty, ValueType In2Ty> 285251662Sdim : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC), 286276479Sdim !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP, 287249423Sdim [(set OutTy:$vD, 288249423Sdim (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>; 289249423Sdim 290249423Sdim// VX1_Int_Ty - A VXForm_1 intrinsic definition of specific type. 291249423Sdimclass VX1_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty> 292251662Sdim : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 293276479Sdim !strconcat(opc, " $vD, $vA, $vB"), IIC_VecFP, 294249423Sdim [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>; 295193323Sed 296249423Sdim// VX1_Int_Ty2 - A VXForm_1 intrinsic definition where the type of the 297249423Sdim// inputs doesn't match the type of the output. 298249423Sdimclass VX1_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 299249423Sdim ValueType InTy> 300251662Sdim : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 301276479Sdim !strconcat(opc, " $vD, $vA, $vB"), IIC_VecFP, 302249423Sdim [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>; 303249423Sdim 304249423Sdim// VX1_Int_Ty3 - A VXForm_1 intrinsic definition where there are two 305249423Sdim// input types and an output type. 306249423Sdimclass VX1_Int_Ty3<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 307249423Sdim ValueType In1Ty, ValueType In2Ty> 308251662Sdim : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 309276479Sdim !strconcat(opc, " $vD, $vA, $vB"), IIC_VecFP, 310249423Sdim [(set OutTy:$vD, (IntID In1Ty:$vA, In2Ty:$vB))]>; 311249423Sdim 312249423Sdim// VX2_Int_SP - A VXForm_2 intrinsic definition of vector single-precision type. 313249423Sdimclass VX2_Int_SP<bits<11> xo, string opc, Intrinsic IntID> 314251662Sdim : VXForm_2<xo, (outs vrrc:$vD), (ins vrrc:$vB), 315276479Sdim !strconcat(opc, " $vD, $vB"), IIC_VecFP, 316249423Sdim [(set v4f32:$vD, (IntID v4f32:$vB))]>; 317193323Sed 318249423Sdim// VX2_Int_Ty2 - A VXForm_2 intrinsic definition where the type of the 319249423Sdim// inputs doesn't match the type of the output. 320249423Sdimclass VX2_Int_Ty2<bits<11> xo, string opc, Intrinsic IntID, ValueType OutTy, 321249423Sdim ValueType InTy> 322251662Sdim : VXForm_2<xo, (outs vrrc:$vD), (ins vrrc:$vB), 323276479Sdim !strconcat(opc, " $vD, $vB"), IIC_VecFP, 324249423Sdim [(set OutTy:$vD, (IntID InTy:$vB))]>; 325249423Sdim 326288943Sdimclass VXBX_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty> 327288943Sdim : VXForm_BX<xo, (outs vrrc:$vD), (ins vrrc:$vA), 328288943Sdim !strconcat(opc, " $vD, $vA"), IIC_VecFP, 329288943Sdim [(set Ty:$vD, (IntID Ty:$vA))]>; 330288943Sdim 331288943Sdimclass VXCR_Int_Ty<bits<11> xo, string opc, Intrinsic IntID, ValueType Ty> 332288943Sdim : VXForm_CR<xo, (outs vrrc:$vD), (ins vrrc:$vA, u1imm:$ST, u4imm:$SIX), 333288943Sdim !strconcat(opc, " $vD, $vA, $ST, $SIX"), IIC_VecFP, 334288943Sdim [(set Ty:$vD, (IntID Ty:$vA, imm:$ST, imm:$SIX))]>; 335288943Sdim 336193323Sed//===----------------------------------------------------------------------===// 337193323Sed// Instruction Definitions. 338193323Sed 339276479Sdimdef HasAltivec : Predicate<"PPCSubTarget->hasAltivec()">; 340249423Sdimlet Predicates = [HasAltivec] in { 341249423Sdim 342280031Sdimdef DSS : DSS_Form<0, 822, (outs), (ins u5imm:$STRM), 343280031Sdim "dss $STRM", IIC_LdStLoad /*FIXME*/, [(int_ppc_altivec_dss imm:$STRM)]>, 344280031Sdim Deprecated<DeprecatedDST> { 345280031Sdim let A = 0; 346280031Sdim let B = 0; 347280031Sdim} 348280031Sdim 349280031Sdimdef DSSALL : DSS_Form<1, 822, (outs), (ins), 350280031Sdim "dssall", IIC_LdStLoad /*FIXME*/, [(int_ppc_altivec_dssall)]>, 351280031Sdim Deprecated<DeprecatedDST> { 352280031Sdim let STRM = 0; 353280031Sdim let A = 0; 354280031Sdim let B = 0; 355280031Sdim} 356280031Sdim 357280031Sdimdef DST : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB), 358280031Sdim "dst $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 359280031Sdim [(int_ppc_altivec_dst i32:$rA, i32:$rB, imm:$STRM)]>, 360261991Sdim Deprecated<DeprecatedDST>; 361280031Sdim 362280031Sdimdef DSTT : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB), 363280031Sdim "dstt $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 364280031Sdim [(int_ppc_altivec_dstt i32:$rA, i32:$rB, imm:$STRM)]>, 365261991Sdim Deprecated<DeprecatedDST>; 366280031Sdim 367280031Sdimdef DSTST : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB), 368280031Sdim "dstst $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 369280031Sdim [(int_ppc_altivec_dstst i32:$rA, i32:$rB, imm:$STRM)]>, 370261991Sdim Deprecated<DeprecatedDST>; 371280031Sdim 372280031Sdimdef DSTSTT : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB), 373280031Sdim "dststt $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 374280031Sdim [(int_ppc_altivec_dststt i32:$rA, i32:$rB, imm:$STRM)]>, 375261991Sdim Deprecated<DeprecatedDST>; 376193323Sed 377280031Sdimlet isCodeGenOnly = 1 in { 378280031Sdim // The very same instructions as above, but formally matching 64bit registers. 379280031Sdim def DST64 : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB), 380280031Sdim "dst $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 381280031Sdim [(int_ppc_altivec_dst i64:$rA, i32:$rB, imm:$STRM)]>, 382280031Sdim Deprecated<DeprecatedDST>; 383280031Sdim 384280031Sdim def DSTT64 : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB), 385280031Sdim "dstt $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 386280031Sdim [(int_ppc_altivec_dstt i64:$rA, i32:$rB, imm:$STRM)]>, 387280031Sdim Deprecated<DeprecatedDST>; 388280031Sdim 389280031Sdim def DSTST64 : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB), 390280031Sdim "dstst $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 391280031Sdim [(int_ppc_altivec_dstst i64:$rA, i32:$rB, 392280031Sdim imm:$STRM)]>, 393280031Sdim Deprecated<DeprecatedDST>; 394280031Sdim 395280031Sdim def DSTSTT64 : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB), 396280031Sdim "dststt $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/, 397280031Sdim [(int_ppc_altivec_dststt i64:$rA, i32:$rB, 398280031Sdim imm:$STRM)]>, 399280031Sdim Deprecated<DeprecatedDST>; 400249423Sdim} 401193323Sed 402251662Sdimdef MFVSCR : VXForm_4<1540, (outs vrrc:$vD), (ins), 403276479Sdim "mfvscr $vD", IIC_LdStStore, 404249423Sdim [(set v8i16:$vD, (int_ppc_altivec_mfvscr))]>; 405251662Sdimdef MTVSCR : VXForm_5<1604, (outs), (ins vrrc:$vB), 406276479Sdim "mtvscr $vB", IIC_LdStLoad, 407249423Sdim [(int_ppc_altivec_mtvscr v4i32:$vB)]>; 408193323Sed 409288943Sdimlet PPC970_Unit = 2 in { // Loads. 410251662Sdimdef LVEBX: XForm_1<31, 7, (outs vrrc:$vD), (ins memrr:$src), 411276479Sdim "lvebx $vD, $src", IIC_LdStLoad, 412249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvebx xoaddr:$src))]>; 413251662Sdimdef LVEHX: XForm_1<31, 39, (outs vrrc:$vD), (ins memrr:$src), 414276479Sdim "lvehx $vD, $src", IIC_LdStLoad, 415249423Sdim [(set v8i16:$vD, (int_ppc_altivec_lvehx xoaddr:$src))]>; 416251662Sdimdef LVEWX: XForm_1<31, 71, (outs vrrc:$vD), (ins memrr:$src), 417276479Sdim "lvewx $vD, $src", IIC_LdStLoad, 418249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvewx xoaddr:$src))]>; 419251662Sdimdef LVX : XForm_1<31, 103, (outs vrrc:$vD), (ins memrr:$src), 420276479Sdim "lvx $vD, $src", IIC_LdStLoad, 421249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvx xoaddr:$src))]>; 422251662Sdimdef LVXL : XForm_1<31, 359, (outs vrrc:$vD), (ins memrr:$src), 423276479Sdim "lvxl $vD, $src", IIC_LdStLoad, 424249423Sdim [(set v4i32:$vD, (int_ppc_altivec_lvxl xoaddr:$src))]>; 425193323Sed} 426193323Sed 427251662Sdimdef LVSL : XForm_1<31, 6, (outs vrrc:$vD), (ins memrr:$src), 428276479Sdim "lvsl $vD, $src", IIC_LdStLoad, 429249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvsl xoaddr:$src))]>, 430193323Sed PPC970_Unit_LSU; 431251662Sdimdef LVSR : XForm_1<31, 38, (outs vrrc:$vD), (ins memrr:$src), 432276479Sdim "lvsr $vD, $src", IIC_LdStLoad, 433249423Sdim [(set v16i8:$vD, (int_ppc_altivec_lvsr xoaddr:$src))]>, 434193323Sed PPC970_Unit_LSU; 435193323Sed 436193323Sedlet PPC970_Unit = 2 in { // Stores. 437251662Sdimdef STVEBX: XForm_8<31, 135, (outs), (ins vrrc:$rS, memrr:$dst), 438276479Sdim "stvebx $rS, $dst", IIC_LdStStore, 439249423Sdim [(int_ppc_altivec_stvebx v16i8:$rS, xoaddr:$dst)]>; 440251662Sdimdef STVEHX: XForm_8<31, 167, (outs), (ins vrrc:$rS, memrr:$dst), 441276479Sdim "stvehx $rS, $dst", IIC_LdStStore, 442249423Sdim [(int_ppc_altivec_stvehx v8i16:$rS, xoaddr:$dst)]>; 443251662Sdimdef STVEWX: XForm_8<31, 199, (outs), (ins vrrc:$rS, memrr:$dst), 444276479Sdim "stvewx $rS, $dst", IIC_LdStStore, 445249423Sdim [(int_ppc_altivec_stvewx v4i32:$rS, xoaddr:$dst)]>; 446251662Sdimdef STVX : XForm_8<31, 231, (outs), (ins vrrc:$rS, memrr:$dst), 447276479Sdim "stvx $rS, $dst", IIC_LdStStore, 448249423Sdim [(int_ppc_altivec_stvx v4i32:$rS, xoaddr:$dst)]>; 449251662Sdimdef STVXL : XForm_8<31, 487, (outs), (ins vrrc:$rS, memrr:$dst), 450276479Sdim "stvxl $rS, $dst", IIC_LdStStore, 451249423Sdim [(int_ppc_altivec_stvxl v4i32:$rS, xoaddr:$dst)]>; 452193323Sed} 453193323Sed 454193323Sedlet PPC970_Unit = 5 in { // VALU Operations. 455193323Sed// VA-Form instructions. 3-input AltiVec ops. 456276479Sdimlet isCommutable = 1 in { 457251662Sdimdef VMADDFP : VAForm_1<46, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB), 458276479Sdim "vmaddfp $vD, $vA, $vC, $vB", IIC_VecFP, 459249423Sdim [(set v4f32:$vD, 460249423Sdim (fma v4f32:$vA, v4f32:$vC, v4f32:$vB))]>; 461249423Sdim 462249423Sdim// FIXME: The fma+fneg pattern won't match because fneg is not legal. 463251662Sdimdef VNMSUBFP: VAForm_1<47, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB), 464276479Sdim "vnmsubfp $vD, $vA, $vC, $vB", IIC_VecFP, 465249423Sdim [(set v4f32:$vD, (fneg (fma v4f32:$vA, v4f32:$vC, 466276479Sdim (fneg v4f32:$vB))))]>; 467193323Sed 468249423Sdimdef VMHADDSHS : VA1a_Int_Ty<32, "vmhaddshs", int_ppc_altivec_vmhaddshs, v8i16>; 469249423Sdimdef VMHRADDSHS : VA1a_Int_Ty<33, "vmhraddshs", int_ppc_altivec_vmhraddshs, 470249423Sdim v8i16>; 471249423Sdimdef VMLADDUHM : VA1a_Int_Ty<34, "vmladduhm", int_ppc_altivec_vmladduhm, v8i16>; 472276479Sdim} // isCommutable 473193323Sed 474249423Sdimdef VPERM : VA1a_Int_Ty3<43, "vperm", int_ppc_altivec_vperm, 475249423Sdim v4i32, v4i32, v16i8>; 476249423Sdimdef VSEL : VA1a_Int_Ty<42, "vsel", int_ppc_altivec_vsel, v4i32>; 477249423Sdim 478193323Sed// Shuffles. 479251662Sdimdef VSLDOI : VAForm_2<44, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, u5imm:$SH), 480276479Sdim "vsldoi $vD, $vA, $vB, $SH", IIC_VecFP, 481249423Sdim [(set v16i8:$vD, 482249423Sdim (vsldoi_shuffle:$SH v16i8:$vA, v16i8:$vB))]>; 483193323Sed 484193323Sed// VX-Form instructions. AltiVec arithmetic ops. 485276479Sdimlet isCommutable = 1 in { 486251662Sdimdef VADDFP : VXForm_1<10, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 487276479Sdim "vaddfp $vD, $vA, $vB", IIC_VecFP, 488249423Sdim [(set v4f32:$vD, (fadd v4f32:$vA, v4f32:$vB))]>; 489193323Sed 490251662Sdimdef VADDUBM : VXForm_1<0, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 491276479Sdim "vaddubm $vD, $vA, $vB", IIC_VecGeneral, 492249423Sdim [(set v16i8:$vD, (add v16i8:$vA, v16i8:$vB))]>; 493251662Sdimdef VADDUHM : VXForm_1<64, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 494276479Sdim "vadduhm $vD, $vA, $vB", IIC_VecGeneral, 495249423Sdim [(set v8i16:$vD, (add v8i16:$vA, v8i16:$vB))]>; 496251662Sdimdef VADDUWM : VXForm_1<128, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 497276479Sdim "vadduwm $vD, $vA, $vB", IIC_VecGeneral, 498249423Sdim [(set v4i32:$vD, (add v4i32:$vA, v4i32:$vB))]>; 499193323Sed 500249423Sdimdef VADDCUW : VX1_Int_Ty<384, "vaddcuw", int_ppc_altivec_vaddcuw, v4i32>; 501249423Sdimdef VADDSBS : VX1_Int_Ty<768, "vaddsbs", int_ppc_altivec_vaddsbs, v16i8>; 502249423Sdimdef VADDSHS : VX1_Int_Ty<832, "vaddshs", int_ppc_altivec_vaddshs, v8i16>; 503249423Sdimdef VADDSWS : VX1_Int_Ty<896, "vaddsws", int_ppc_altivec_vaddsws, v4i32>; 504249423Sdimdef VADDUBS : VX1_Int_Ty<512, "vaddubs", int_ppc_altivec_vaddubs, v16i8>; 505249423Sdimdef VADDUHS : VX1_Int_Ty<576, "vadduhs", int_ppc_altivec_vadduhs, v8i16>; 506249423Sdimdef VADDUWS : VX1_Int_Ty<640, "vadduws", int_ppc_altivec_vadduws, v4i32>; 507276479Sdim} // isCommutable 508276479Sdim 509276479Sdimlet isCommutable = 1 in 510251662Sdimdef VAND : VXForm_1<1028, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 511276479Sdim "vand $vD, $vA, $vB", IIC_VecFP, 512249423Sdim [(set v4i32:$vD, (and v4i32:$vA, v4i32:$vB))]>; 513251662Sdimdef VANDC : VXForm_1<1092, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 514276479Sdim "vandc $vD, $vA, $vB", IIC_VecFP, 515249423Sdim [(set v4i32:$vD, (and v4i32:$vA, 516249423Sdim (vnot_ppc v4i32:$vB)))]>; 517193323Sed 518251662Sdimdef VCFSX : VXForm_1<842, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 519276479Sdim "vcfsx $vD, $vB, $UIMM", IIC_VecFP, 520249423Sdim [(set v4f32:$vD, 521249423Sdim (int_ppc_altivec_vcfsx v4i32:$vB, imm:$UIMM))]>; 522251662Sdimdef VCFUX : VXForm_1<778, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 523276479Sdim "vcfux $vD, $vB, $UIMM", IIC_VecFP, 524249423Sdim [(set v4f32:$vD, 525249423Sdim (int_ppc_altivec_vcfux v4i32:$vB, imm:$UIMM))]>; 526251662Sdimdef VCTSXS : VXForm_1<970, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 527276479Sdim "vctsxs $vD, $vB, $UIMM", IIC_VecFP, 528249423Sdim [(set v4i32:$vD, 529249423Sdim (int_ppc_altivec_vctsxs v4f32:$vB, imm:$UIMM))]>; 530251662Sdimdef VCTUXS : VXForm_1<906, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 531276479Sdim "vctuxs $vD, $vB, $UIMM", IIC_VecFP, 532249423Sdim [(set v4i32:$vD, 533249423Sdim (int_ppc_altivec_vctuxs v4f32:$vB, imm:$UIMM))]>; 534243830Sdim 535243830Sdim// Defines with the UIM field set to 0 for floating-point 536243830Sdim// to integer (fp_to_sint/fp_to_uint) conversions and integer 537243830Sdim// to floating-point (sint_to_fp/uint_to_fp) conversions. 538261991Sdimlet isCodeGenOnly = 1, VA = 0 in { 539251662Sdimdef VCFSX_0 : VXForm_1<842, (outs vrrc:$vD), (ins vrrc:$vB), 540276479Sdim "vcfsx $vD, $vB, 0", IIC_VecFP, 541249423Sdim [(set v4f32:$vD, 542249423Sdim (int_ppc_altivec_vcfsx v4i32:$vB, 0))]>; 543251662Sdimdef VCTUXS_0 : VXForm_1<906, (outs vrrc:$vD), (ins vrrc:$vB), 544276479Sdim "vctuxs $vD, $vB, 0", IIC_VecFP, 545249423Sdim [(set v4i32:$vD, 546249423Sdim (int_ppc_altivec_vctuxs v4f32:$vB, 0))]>; 547251662Sdimdef VCFUX_0 : VXForm_1<778, (outs vrrc:$vD), (ins vrrc:$vB), 548276479Sdim "vcfux $vD, $vB, 0", IIC_VecFP, 549249423Sdim [(set v4f32:$vD, 550249423Sdim (int_ppc_altivec_vcfux v4i32:$vB, 0))]>; 551251662Sdimdef VCTSXS_0 : VXForm_1<970, (outs vrrc:$vD), (ins vrrc:$vB), 552276479Sdim "vctsxs $vD, $vB, 0", IIC_VecFP, 553249423Sdim [(set v4i32:$vD, 554249423Sdim (int_ppc_altivec_vctsxs v4f32:$vB, 0))]>; 555243830Sdim} 556249423Sdimdef VEXPTEFP : VX2_Int_SP<394, "vexptefp", int_ppc_altivec_vexptefp>; 557249423Sdimdef VLOGEFP : VX2_Int_SP<458, "vlogefp", int_ppc_altivec_vlogefp>; 558193323Sed 559276479Sdimlet isCommutable = 1 in { 560249423Sdimdef VAVGSB : VX1_Int_Ty<1282, "vavgsb", int_ppc_altivec_vavgsb, v16i8>; 561249423Sdimdef VAVGSH : VX1_Int_Ty<1346, "vavgsh", int_ppc_altivec_vavgsh, v8i16>; 562249423Sdimdef VAVGSW : VX1_Int_Ty<1410, "vavgsw", int_ppc_altivec_vavgsw, v4i32>; 563249423Sdimdef VAVGUB : VX1_Int_Ty<1026, "vavgub", int_ppc_altivec_vavgub, v16i8>; 564249423Sdimdef VAVGUH : VX1_Int_Ty<1090, "vavguh", int_ppc_altivec_vavguh, v8i16>; 565249423Sdimdef VAVGUW : VX1_Int_Ty<1154, "vavguw", int_ppc_altivec_vavguw, v4i32>; 566193323Sed 567249423Sdimdef VMAXFP : VX1_Int_Ty<1034, "vmaxfp", int_ppc_altivec_vmaxfp, v4f32>; 568249423Sdimdef VMAXSB : VX1_Int_Ty< 258, "vmaxsb", int_ppc_altivec_vmaxsb, v16i8>; 569249423Sdimdef VMAXSH : VX1_Int_Ty< 322, "vmaxsh", int_ppc_altivec_vmaxsh, v8i16>; 570249423Sdimdef VMAXSW : VX1_Int_Ty< 386, "vmaxsw", int_ppc_altivec_vmaxsw, v4i32>; 571249423Sdimdef VMAXUB : VX1_Int_Ty< 2, "vmaxub", int_ppc_altivec_vmaxub, v16i8>; 572249423Sdimdef VMAXUH : VX1_Int_Ty< 66, "vmaxuh", int_ppc_altivec_vmaxuh, v8i16>; 573249423Sdimdef VMAXUW : VX1_Int_Ty< 130, "vmaxuw", int_ppc_altivec_vmaxuw, v4i32>; 574249423Sdimdef VMINFP : VX1_Int_Ty<1098, "vminfp", int_ppc_altivec_vminfp, v4f32>; 575249423Sdimdef VMINSB : VX1_Int_Ty< 770, "vminsb", int_ppc_altivec_vminsb, v16i8>; 576249423Sdimdef VMINSH : VX1_Int_Ty< 834, "vminsh", int_ppc_altivec_vminsh, v8i16>; 577249423Sdimdef VMINSW : VX1_Int_Ty< 898, "vminsw", int_ppc_altivec_vminsw, v4i32>; 578249423Sdimdef VMINUB : VX1_Int_Ty< 514, "vminub", int_ppc_altivec_vminub, v16i8>; 579249423Sdimdef VMINUH : VX1_Int_Ty< 578, "vminuh", int_ppc_altivec_vminuh, v8i16>; 580249423Sdimdef VMINUW : VX1_Int_Ty< 642, "vminuw", int_ppc_altivec_vminuw, v4i32>; 581276479Sdim} // isCommutable 582193323Sed 583251662Sdimdef VMRGHB : VXForm_1< 12, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 584276479Sdim "vmrghb $vD, $vA, $vB", IIC_VecFP, 585249423Sdim [(set v16i8:$vD, (vmrghb_shuffle v16i8:$vA, v16i8:$vB))]>; 586251662Sdimdef VMRGHH : VXForm_1< 76, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 587276479Sdim "vmrghh $vD, $vA, $vB", IIC_VecFP, 588249423Sdim [(set v16i8:$vD, (vmrghh_shuffle v16i8:$vA, v16i8:$vB))]>; 589251662Sdimdef VMRGHW : VXForm_1<140, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 590276479Sdim "vmrghw $vD, $vA, $vB", IIC_VecFP, 591249423Sdim [(set v16i8:$vD, (vmrghw_shuffle v16i8:$vA, v16i8:$vB))]>; 592251662Sdimdef VMRGLB : VXForm_1<268, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 593276479Sdim "vmrglb $vD, $vA, $vB", IIC_VecFP, 594249423Sdim [(set v16i8:$vD, (vmrglb_shuffle v16i8:$vA, v16i8:$vB))]>; 595251662Sdimdef VMRGLH : VXForm_1<332, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 596276479Sdim "vmrglh $vD, $vA, $vB", IIC_VecFP, 597249423Sdim [(set v16i8:$vD, (vmrglh_shuffle v16i8:$vA, v16i8:$vB))]>; 598251662Sdimdef VMRGLW : VXForm_1<396, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 599276479Sdim "vmrglw $vD, $vA, $vB", IIC_VecFP, 600249423Sdim [(set v16i8:$vD, (vmrglw_shuffle v16i8:$vA, v16i8:$vB))]>; 601193323Sed 602249423Sdimdef VMSUMMBM : VA1a_Int_Ty3<37, "vmsummbm", int_ppc_altivec_vmsummbm, 603249423Sdim v4i32, v16i8, v4i32>; 604249423Sdimdef VMSUMSHM : VA1a_Int_Ty3<40, "vmsumshm", int_ppc_altivec_vmsumshm, 605249423Sdim v4i32, v8i16, v4i32>; 606249423Sdimdef VMSUMSHS : VA1a_Int_Ty3<41, "vmsumshs", int_ppc_altivec_vmsumshs, 607249423Sdim v4i32, v8i16, v4i32>; 608249423Sdimdef VMSUMUBM : VA1a_Int_Ty3<36, "vmsumubm", int_ppc_altivec_vmsumubm, 609249423Sdim v4i32, v16i8, v4i32>; 610249423Sdimdef VMSUMUHM : VA1a_Int_Ty3<38, "vmsumuhm", int_ppc_altivec_vmsumuhm, 611249423Sdim v4i32, v8i16, v4i32>; 612249423Sdimdef VMSUMUHS : VA1a_Int_Ty3<39, "vmsumuhs", int_ppc_altivec_vmsumuhs, 613249423Sdim v4i32, v8i16, v4i32>; 614193323Sed 615276479Sdimlet isCommutable = 1 in { 616249423Sdimdef VMULESB : VX1_Int_Ty2<776, "vmulesb", int_ppc_altivec_vmulesb, 617249423Sdim v8i16, v16i8>; 618249423Sdimdef VMULESH : VX1_Int_Ty2<840, "vmulesh", int_ppc_altivec_vmulesh, 619249423Sdim v4i32, v8i16>; 620249423Sdimdef VMULEUB : VX1_Int_Ty2<520, "vmuleub", int_ppc_altivec_vmuleub, 621249423Sdim v8i16, v16i8>; 622249423Sdimdef VMULEUH : VX1_Int_Ty2<584, "vmuleuh", int_ppc_altivec_vmuleuh, 623249423Sdim v4i32, v8i16>; 624249423Sdimdef VMULOSB : VX1_Int_Ty2<264, "vmulosb", int_ppc_altivec_vmulosb, 625249423Sdim v8i16, v16i8>; 626249423Sdimdef VMULOSH : VX1_Int_Ty2<328, "vmulosh", int_ppc_altivec_vmulosh, 627249423Sdim v4i32, v8i16>; 628249423Sdimdef VMULOUB : VX1_Int_Ty2< 8, "vmuloub", int_ppc_altivec_vmuloub, 629249423Sdim v8i16, v16i8>; 630249423Sdimdef VMULOUH : VX1_Int_Ty2< 72, "vmulouh", int_ppc_altivec_vmulouh, 631249423Sdim v4i32, v8i16>; 632276479Sdim} // isCommutable 633193323Sed 634249423Sdimdef VREFP : VX2_Int_SP<266, "vrefp", int_ppc_altivec_vrefp>; 635249423Sdimdef VRFIM : VX2_Int_SP<714, "vrfim", int_ppc_altivec_vrfim>; 636249423Sdimdef VRFIN : VX2_Int_SP<522, "vrfin", int_ppc_altivec_vrfin>; 637249423Sdimdef VRFIP : VX2_Int_SP<650, "vrfip", int_ppc_altivec_vrfip>; 638249423Sdimdef VRFIZ : VX2_Int_SP<586, "vrfiz", int_ppc_altivec_vrfiz>; 639249423Sdimdef VRSQRTEFP : VX2_Int_SP<330, "vrsqrtefp", int_ppc_altivec_vrsqrtefp>; 640193323Sed 641251662Sdimdef VSUBCUW : VX1_Int_Ty<1408, "vsubcuw", int_ppc_altivec_vsubcuw, v4i32>; 642193323Sed 643251662Sdimdef VSUBFP : VXForm_1<74, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 644276479Sdim "vsubfp $vD, $vA, $vB", IIC_VecGeneral, 645249423Sdim [(set v4f32:$vD, (fsub v4f32:$vA, v4f32:$vB))]>; 646251662Sdimdef VSUBUBM : VXForm_1<1024, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 647276479Sdim "vsububm $vD, $vA, $vB", IIC_VecGeneral, 648249423Sdim [(set v16i8:$vD, (sub v16i8:$vA, v16i8:$vB))]>; 649251662Sdimdef VSUBUHM : VXForm_1<1088, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 650276479Sdim "vsubuhm $vD, $vA, $vB", IIC_VecGeneral, 651249423Sdim [(set v8i16:$vD, (sub v8i16:$vA, v8i16:$vB))]>; 652251662Sdimdef VSUBUWM : VXForm_1<1152, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 653276479Sdim "vsubuwm $vD, $vA, $vB", IIC_VecGeneral, 654249423Sdim [(set v4i32:$vD, (sub v4i32:$vA, v4i32:$vB))]>; 655193323Sed 656249423Sdimdef VSUBSBS : VX1_Int_Ty<1792, "vsubsbs" , int_ppc_altivec_vsubsbs, v16i8>; 657249423Sdimdef VSUBSHS : VX1_Int_Ty<1856, "vsubshs" , int_ppc_altivec_vsubshs, v8i16>; 658249423Sdimdef VSUBSWS : VX1_Int_Ty<1920, "vsubsws" , int_ppc_altivec_vsubsws, v4i32>; 659249423Sdimdef VSUBUBS : VX1_Int_Ty<1536, "vsububs" , int_ppc_altivec_vsububs, v16i8>; 660249423Sdimdef VSUBUHS : VX1_Int_Ty<1600, "vsubuhs" , int_ppc_altivec_vsubuhs, v8i16>; 661249423Sdimdef VSUBUWS : VX1_Int_Ty<1664, "vsubuws" , int_ppc_altivec_vsubuws, v4i32>; 662193323Sed 663249423Sdimdef VSUMSWS : VX1_Int_Ty<1928, "vsumsws" , int_ppc_altivec_vsumsws, v4i32>; 664249423Sdimdef VSUM2SWS: VX1_Int_Ty<1672, "vsum2sws", int_ppc_altivec_vsum2sws, v4i32>; 665249423Sdim 666251662Sdimdef VSUM4SBS: VX1_Int_Ty3<1800, "vsum4sbs", int_ppc_altivec_vsum4sbs, 667249423Sdim v4i32, v16i8, v4i32>; 668249423Sdimdef VSUM4SHS: VX1_Int_Ty3<1608, "vsum4shs", int_ppc_altivec_vsum4shs, 669249423Sdim v4i32, v8i16, v4i32>; 670249423Sdimdef VSUM4UBS: VX1_Int_Ty3<1544, "vsum4ubs", int_ppc_altivec_vsum4ubs, 671249423Sdim v4i32, v16i8, v4i32>; 672249423Sdim 673251662Sdimdef VNOR : VXForm_1<1284, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 674276479Sdim "vnor $vD, $vA, $vB", IIC_VecFP, 675249423Sdim [(set v4i32:$vD, (vnot_ppc (or v4i32:$vA, 676249423Sdim v4i32:$vB)))]>; 677276479Sdimlet isCommutable = 1 in { 678251662Sdimdef VOR : VXForm_1<1156, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 679276479Sdim "vor $vD, $vA, $vB", IIC_VecFP, 680249423Sdim [(set v4i32:$vD, (or v4i32:$vA, v4i32:$vB))]>; 681251662Sdimdef VXOR : VXForm_1<1220, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 682276479Sdim "vxor $vD, $vA, $vB", IIC_VecFP, 683249423Sdim [(set v4i32:$vD, (xor v4i32:$vA, v4i32:$vB))]>; 684276479Sdim} // isCommutable 685193323Sed 686249423Sdimdef VRLB : VX1_Int_Ty< 4, "vrlb", int_ppc_altivec_vrlb, v16i8>; 687249423Sdimdef VRLH : VX1_Int_Ty< 68, "vrlh", int_ppc_altivec_vrlh, v8i16>; 688249423Sdimdef VRLW : VX1_Int_Ty< 132, "vrlw", int_ppc_altivec_vrlw, v4i32>; 689193323Sed 690249423Sdimdef VSL : VX1_Int_Ty< 452, "vsl" , int_ppc_altivec_vsl, v4i32 >; 691249423Sdimdef VSLO : VX1_Int_Ty<1036, "vslo", int_ppc_altivec_vslo, v4i32>; 692193323Sed 693249423Sdimdef VSLB : VX1_Int_Ty< 260, "vslb", int_ppc_altivec_vslb, v16i8>; 694249423Sdimdef VSLH : VX1_Int_Ty< 324, "vslh", int_ppc_altivec_vslh, v8i16>; 695249423Sdimdef VSLW : VX1_Int_Ty< 388, "vslw", int_ppc_altivec_vslw, v4i32>; 696249423Sdim 697251662Sdimdef VSPLTB : VXForm_1<524, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 698276479Sdim "vspltb $vD, $vB, $UIMM", IIC_VecPerm, 699249423Sdim [(set v16i8:$vD, 700249423Sdim (vspltb_shuffle:$UIMM v16i8:$vB, (undef)))]>; 701251662Sdimdef VSPLTH : VXForm_1<588, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 702276479Sdim "vsplth $vD, $vB, $UIMM", IIC_VecPerm, 703249423Sdim [(set v16i8:$vD, 704249423Sdim (vsplth_shuffle:$UIMM v16i8:$vB, (undef)))]>; 705251662Sdimdef VSPLTW : VXForm_1<652, (outs vrrc:$vD), (ins u5imm:$UIMM, vrrc:$vB), 706276479Sdim "vspltw $vD, $vB, $UIMM", IIC_VecPerm, 707249423Sdim [(set v16i8:$vD, 708249423Sdim (vspltw_shuffle:$UIMM v16i8:$vB, (undef)))]>; 709193323Sed 710249423Sdimdef VSR : VX1_Int_Ty< 708, "vsr" , int_ppc_altivec_vsr, v4i32>; 711249423Sdimdef VSRO : VX1_Int_Ty<1100, "vsro" , int_ppc_altivec_vsro, v4i32>; 712193323Sed 713249423Sdimdef VSRAB : VX1_Int_Ty< 772, "vsrab", int_ppc_altivec_vsrab, v16i8>; 714249423Sdimdef VSRAH : VX1_Int_Ty< 836, "vsrah", int_ppc_altivec_vsrah, v8i16>; 715249423Sdimdef VSRAW : VX1_Int_Ty< 900, "vsraw", int_ppc_altivec_vsraw, v4i32>; 716249423Sdimdef VSRB : VX1_Int_Ty< 516, "vsrb" , int_ppc_altivec_vsrb , v16i8>; 717249423Sdimdef VSRH : VX1_Int_Ty< 580, "vsrh" , int_ppc_altivec_vsrh , v8i16>; 718249423Sdimdef VSRW : VX1_Int_Ty< 644, "vsrw" , int_ppc_altivec_vsrw , v4i32>; 719193323Sed 720249423Sdim 721251662Sdimdef VSPLTISB : VXForm_3<780, (outs vrrc:$vD), (ins s5imm:$SIMM), 722276479Sdim "vspltisb $vD, $SIMM", IIC_VecPerm, 723249423Sdim [(set v16i8:$vD, (v16i8 vecspltisb:$SIMM))]>; 724251662Sdimdef VSPLTISH : VXForm_3<844, (outs vrrc:$vD), (ins s5imm:$SIMM), 725276479Sdim "vspltish $vD, $SIMM", IIC_VecPerm, 726249423Sdim [(set v8i16:$vD, (v8i16 vecspltish:$SIMM))]>; 727251662Sdimdef VSPLTISW : VXForm_3<908, (outs vrrc:$vD), (ins s5imm:$SIMM), 728276479Sdim "vspltisw $vD, $SIMM", IIC_VecPerm, 729249423Sdim [(set v4i32:$vD, (v4i32 vecspltisw:$SIMM))]>; 730193323Sed 731193323Sed// Vector Pack. 732249423Sdimdef VPKPX : VX1_Int_Ty2<782, "vpkpx", int_ppc_altivec_vpkpx, 733249423Sdim v8i16, v4i32>; 734249423Sdimdef VPKSHSS : VX1_Int_Ty2<398, "vpkshss", int_ppc_altivec_vpkshss, 735249423Sdim v16i8, v8i16>; 736249423Sdimdef VPKSHUS : VX1_Int_Ty2<270, "vpkshus", int_ppc_altivec_vpkshus, 737249423Sdim v16i8, v8i16>; 738249423Sdimdef VPKSWSS : VX1_Int_Ty2<462, "vpkswss", int_ppc_altivec_vpkswss, 739296417Sdim v8i16, v4i32>; 740249423Sdimdef VPKSWUS : VX1_Int_Ty2<334, "vpkswus", int_ppc_altivec_vpkswus, 741249423Sdim v8i16, v4i32>; 742251662Sdimdef VPKUHUM : VXForm_1<14, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 743276479Sdim "vpkuhum $vD, $vA, $vB", IIC_VecFP, 744249423Sdim [(set v16i8:$vD, 745249423Sdim (vpkuhum_shuffle v16i8:$vA, v16i8:$vB))]>; 746249423Sdimdef VPKUHUS : VX1_Int_Ty2<142, "vpkuhus", int_ppc_altivec_vpkuhus, 747249423Sdim v16i8, v8i16>; 748251662Sdimdef VPKUWUM : VXForm_1<78, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 749276479Sdim "vpkuwum $vD, $vA, $vB", IIC_VecFP, 750249423Sdim [(set v16i8:$vD, 751249423Sdim (vpkuwum_shuffle v16i8:$vA, v16i8:$vB))]>; 752249423Sdimdef VPKUWUS : VX1_Int_Ty2<206, "vpkuwus", int_ppc_altivec_vpkuwus, 753249423Sdim v8i16, v4i32>; 754193323Sed 755193323Sed// Vector Unpack. 756249423Sdimdef VUPKHPX : VX2_Int_Ty2<846, "vupkhpx", int_ppc_altivec_vupkhpx, 757249423Sdim v4i32, v8i16>; 758249423Sdimdef VUPKHSB : VX2_Int_Ty2<526, "vupkhsb", int_ppc_altivec_vupkhsb, 759249423Sdim v8i16, v16i8>; 760249423Sdimdef VUPKHSH : VX2_Int_Ty2<590, "vupkhsh", int_ppc_altivec_vupkhsh, 761249423Sdim v4i32, v8i16>; 762249423Sdimdef VUPKLPX : VX2_Int_Ty2<974, "vupklpx", int_ppc_altivec_vupklpx, 763249423Sdim v4i32, v8i16>; 764249423Sdimdef VUPKLSB : VX2_Int_Ty2<654, "vupklsb", int_ppc_altivec_vupklsb, 765249423Sdim v8i16, v16i8>; 766249423Sdimdef VUPKLSH : VX2_Int_Ty2<718, "vupklsh", int_ppc_altivec_vupklsh, 767249423Sdim v4i32, v8i16>; 768193323Sed 769193323Sed 770193323Sed// Altivec Comparisons. 771193323Sed 772193323Sedclass VCMP<bits<10> xo, string asmstr, ValueType Ty> 773276479Sdim : VXRForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), asmstr, 774276479Sdim IIC_VecFPCompare, 775249423Sdim [(set Ty:$vD, (Ty (PPCvcmp Ty:$vA, Ty:$vB, xo)))]>; 776193323Sedclass VCMPo<bits<10> xo, string asmstr, ValueType Ty> 777276479Sdim : VXRForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), asmstr, 778276479Sdim IIC_VecFPCompare, 779249423Sdim [(set Ty:$vD, (Ty (PPCvcmp_o Ty:$vA, Ty:$vB, xo)))]> { 780193323Sed let Defs = [CR6]; 781193323Sed let RC = 1; 782193323Sed} 783193323Sed 784193323Sed// f32 element comparisons.0 785193323Seddef VCMPBFP : VCMP <966, "vcmpbfp $vD, $vA, $vB" , v4f32>; 786193323Seddef VCMPBFPo : VCMPo<966, "vcmpbfp. $vD, $vA, $vB" , v4f32>; 787193323Seddef VCMPEQFP : VCMP <198, "vcmpeqfp $vD, $vA, $vB" , v4f32>; 788193323Seddef VCMPEQFPo : VCMPo<198, "vcmpeqfp. $vD, $vA, $vB", v4f32>; 789193323Seddef VCMPGEFP : VCMP <454, "vcmpgefp $vD, $vA, $vB" , v4f32>; 790193323Seddef VCMPGEFPo : VCMPo<454, "vcmpgefp. $vD, $vA, $vB", v4f32>; 791193323Seddef VCMPGTFP : VCMP <710, "vcmpgtfp $vD, $vA, $vB" , v4f32>; 792193323Seddef VCMPGTFPo : VCMPo<710, "vcmpgtfp. $vD, $vA, $vB", v4f32>; 793193323Sed 794193323Sed// i8 element comparisons. 795193323Seddef VCMPEQUB : VCMP < 6, "vcmpequb $vD, $vA, $vB" , v16i8>; 796193323Seddef VCMPEQUBo : VCMPo< 6, "vcmpequb. $vD, $vA, $vB", v16i8>; 797193323Seddef VCMPGTSB : VCMP <774, "vcmpgtsb $vD, $vA, $vB" , v16i8>; 798193323Seddef VCMPGTSBo : VCMPo<774, "vcmpgtsb. $vD, $vA, $vB", v16i8>; 799193323Seddef VCMPGTUB : VCMP <518, "vcmpgtub $vD, $vA, $vB" , v16i8>; 800193323Seddef VCMPGTUBo : VCMPo<518, "vcmpgtub. $vD, $vA, $vB", v16i8>; 801193323Sed 802193323Sed// i16 element comparisons. 803193323Seddef VCMPEQUH : VCMP < 70, "vcmpequh $vD, $vA, $vB" , v8i16>; 804193323Seddef VCMPEQUHo : VCMPo< 70, "vcmpequh. $vD, $vA, $vB", v8i16>; 805193323Seddef VCMPGTSH : VCMP <838, "vcmpgtsh $vD, $vA, $vB" , v8i16>; 806193323Seddef VCMPGTSHo : VCMPo<838, "vcmpgtsh. $vD, $vA, $vB", v8i16>; 807193323Seddef VCMPGTUH : VCMP <582, "vcmpgtuh $vD, $vA, $vB" , v8i16>; 808193323Seddef VCMPGTUHo : VCMPo<582, "vcmpgtuh. $vD, $vA, $vB", v8i16>; 809193323Sed 810193323Sed// i32 element comparisons. 811193323Seddef VCMPEQUW : VCMP <134, "vcmpequw $vD, $vA, $vB" , v4i32>; 812193323Seddef VCMPEQUWo : VCMPo<134, "vcmpequw. $vD, $vA, $vB", v4i32>; 813193323Seddef VCMPGTSW : VCMP <902, "vcmpgtsw $vD, $vA, $vB" , v4i32>; 814193323Seddef VCMPGTSWo : VCMPo<902, "vcmpgtsw. $vD, $vA, $vB", v4i32>; 815193323Seddef VCMPGTUW : VCMP <646, "vcmpgtuw $vD, $vA, $vB" , v4i32>; 816193323Seddef VCMPGTUWo : VCMPo<646, "vcmpgtuw. $vD, $vA, $vB", v4i32>; 817288943Sdim 818261991Sdimlet isCodeGenOnly = 1 in { 819261991Sdimdef V_SET0B : VXForm_setzero<1220, (outs vrrc:$vD), (ins), 820276479Sdim "vxor $vD, $vD, $vD", IIC_VecFP, 821261991Sdim [(set v16i8:$vD, (v16i8 immAllZerosV))]>; 822261991Sdimdef V_SET0H : VXForm_setzero<1220, (outs vrrc:$vD), (ins), 823276479Sdim "vxor $vD, $vD, $vD", IIC_VecFP, 824261991Sdim [(set v8i16:$vD, (v8i16 immAllZerosV))]>; 825261991Sdimdef V_SET0 : VXForm_setzero<1220, (outs vrrc:$vD), (ins), 826276479Sdim "vxor $vD, $vD, $vD", IIC_VecFP, 827249423Sdim [(set v4i32:$vD, (v4i32 immAllZerosV))]>; 828261991Sdim 829249423Sdimlet IMM=-1 in { 830261991Sdimdef V_SETALLONESB : VXForm_3<908, (outs vrrc:$vD), (ins), 831276479Sdim "vspltisw $vD, -1", IIC_VecFP, 832261991Sdim [(set v16i8:$vD, (v16i8 immAllOnesV))]>; 833261991Sdimdef V_SETALLONESH : VXForm_3<908, (outs vrrc:$vD), (ins), 834276479Sdim "vspltisw $vD, -1", IIC_VecFP, 835261991Sdim [(set v8i16:$vD, (v8i16 immAllOnesV))]>; 836261991Sdimdef V_SETALLONES : VXForm_3<908, (outs vrrc:$vD), (ins), 837276479Sdim "vspltisw $vD, -1", IIC_VecFP, 838249423Sdim [(set v4i32:$vD, (v4i32 immAllOnesV))]>; 839193323Sed} 840261991Sdim} 841249423Sdim} // VALU Operations. 842193323Sed 843193323Sed//===----------------------------------------------------------------------===// 844193323Sed// Additional Altivec Patterns 845193323Sed// 846193323Sed 847193323Sed// Loads. 848193323Seddef : Pat<(v4i32 (load xoaddr:$src)), (LVX xoaddr:$src)>; 849193323Sed 850193323Sed// Stores. 851249423Sdimdef : Pat<(store v4i32:$rS, xoaddr:$dst), 852249423Sdim (STVX $rS, xoaddr:$dst)>; 853193323Sed 854193323Sed// Bit conversions. 855193323Seddef : Pat<(v16i8 (bitconvert (v8i16 VRRC:$src))), (v16i8 VRRC:$src)>; 856193323Seddef : Pat<(v16i8 (bitconvert (v4i32 VRRC:$src))), (v16i8 VRRC:$src)>; 857193323Seddef : Pat<(v16i8 (bitconvert (v4f32 VRRC:$src))), (v16i8 VRRC:$src)>; 858288943Sdimdef : Pat<(v16i8 (bitconvert (v2i64 VRRC:$src))), (v16i8 VRRC:$src)>; 859288943Sdimdef : Pat<(v16i8 (bitconvert (v1i128 VRRC:$src))), (v16i8 VRRC:$src)>; 860193323Sed 861193323Seddef : Pat<(v8i16 (bitconvert (v16i8 VRRC:$src))), (v8i16 VRRC:$src)>; 862193323Seddef : Pat<(v8i16 (bitconvert (v4i32 VRRC:$src))), (v8i16 VRRC:$src)>; 863193323Seddef : Pat<(v8i16 (bitconvert (v4f32 VRRC:$src))), (v8i16 VRRC:$src)>; 864288943Sdimdef : Pat<(v8i16 (bitconvert (v2i64 VRRC:$src))), (v8i16 VRRC:$src)>; 865288943Sdimdef : Pat<(v8i16 (bitconvert (v1i128 VRRC:$src))), (v8i16 VRRC:$src)>; 866193323Sed 867193323Seddef : Pat<(v4i32 (bitconvert (v16i8 VRRC:$src))), (v4i32 VRRC:$src)>; 868193323Seddef : Pat<(v4i32 (bitconvert (v8i16 VRRC:$src))), (v4i32 VRRC:$src)>; 869193323Seddef : Pat<(v4i32 (bitconvert (v4f32 VRRC:$src))), (v4i32 VRRC:$src)>; 870288943Sdimdef : Pat<(v4i32 (bitconvert (v2i64 VRRC:$src))), (v4i32 VRRC:$src)>; 871288943Sdimdef : Pat<(v4i32 (bitconvert (v1i128 VRRC:$src))), (v4i32 VRRC:$src)>; 872193323Sed 873193323Seddef : Pat<(v4f32 (bitconvert (v16i8 VRRC:$src))), (v4f32 VRRC:$src)>; 874193323Seddef : Pat<(v4f32 (bitconvert (v8i16 VRRC:$src))), (v4f32 VRRC:$src)>; 875193323Seddef : Pat<(v4f32 (bitconvert (v4i32 VRRC:$src))), (v4f32 VRRC:$src)>; 876288943Sdimdef : Pat<(v4f32 (bitconvert (v2i64 VRRC:$src))), (v4f32 VRRC:$src)>; 877288943Sdimdef : Pat<(v4f32 (bitconvert (v1i128 VRRC:$src))), (v4f32 VRRC:$src)>; 878193323Sed 879288943Sdimdef : Pat<(v2i64 (bitconvert (v16i8 VRRC:$src))), (v2i64 VRRC:$src)>; 880288943Sdimdef : Pat<(v2i64 (bitconvert (v8i16 VRRC:$src))), (v2i64 VRRC:$src)>; 881288943Sdimdef : Pat<(v2i64 (bitconvert (v4i32 VRRC:$src))), (v2i64 VRRC:$src)>; 882288943Sdimdef : Pat<(v2i64 (bitconvert (v4f32 VRRC:$src))), (v2i64 VRRC:$src)>; 883288943Sdimdef : Pat<(v2i64 (bitconvert (v1i128 VRRC:$src))), (v2i64 VRRC:$src)>; 884288943Sdim 885288943Sdimdef : Pat<(v1i128 (bitconvert (v16i8 VRRC:$src))), (v1i128 VRRC:$src)>; 886288943Sdimdef : Pat<(v1i128 (bitconvert (v8i16 VRRC:$src))), (v1i128 VRRC:$src)>; 887288943Sdimdef : Pat<(v1i128 (bitconvert (v4i32 VRRC:$src))), (v1i128 VRRC:$src)>; 888288943Sdimdef : Pat<(v1i128 (bitconvert (v4f32 VRRC:$src))), (v1i128 VRRC:$src)>; 889288943Sdimdef : Pat<(v1i128 (bitconvert (v2i64 VRRC:$src))), (v1i128 VRRC:$src)>; 890288943Sdim 891193323Sed// Shuffles. 892193323Sed 893193323Sed// Match vsldoi(x,x), vpkuwum(x,x), vpkuhum(x,x) 894249423Sdimdef:Pat<(vsldoi_unary_shuffle:$in v16i8:$vA, undef), 895249423Sdim (VSLDOI $vA, $vA, (VSLDOI_unary_get_imm $in))>; 896249423Sdimdef:Pat<(vpkuwum_unary_shuffle v16i8:$vA, undef), 897249423Sdim (VPKUWUM $vA, $vA)>; 898249423Sdimdef:Pat<(vpkuhum_unary_shuffle v16i8:$vA, undef), 899249423Sdim (VPKUHUM $vA, $vA)>; 900193323Sed 901276479Sdim// Match vsldoi(y,x), vpkuwum(y,x), vpkuhum(y,x), i.e., swapped operands. 902276479Sdim// These fragments are matched for little-endian, where the inputs must 903276479Sdim// be swapped for correct semantics. 904276479Sdimdef:Pat<(vsldoi_swapped_shuffle:$in v16i8:$vA, v16i8:$vB), 905276479Sdim (VSLDOI $vB, $vA, (VSLDOI_swapped_get_imm $in))>; 906276479Sdimdef:Pat<(vpkuwum_swapped_shuffle v16i8:$vA, v16i8:$vB), 907276479Sdim (VPKUWUM $vB, $vA)>; 908276479Sdimdef:Pat<(vpkuhum_swapped_shuffle v16i8:$vA, v16i8:$vB), 909276479Sdim (VPKUHUM $vB, $vA)>; 910276479Sdim 911193323Sed// Match vmrg*(x,x) 912249423Sdimdef:Pat<(vmrglb_unary_shuffle v16i8:$vA, undef), 913249423Sdim (VMRGLB $vA, $vA)>; 914249423Sdimdef:Pat<(vmrglh_unary_shuffle v16i8:$vA, undef), 915249423Sdim (VMRGLH $vA, $vA)>; 916249423Sdimdef:Pat<(vmrglw_unary_shuffle v16i8:$vA, undef), 917249423Sdim (VMRGLW $vA, $vA)>; 918249423Sdimdef:Pat<(vmrghb_unary_shuffle v16i8:$vA, undef), 919249423Sdim (VMRGHB $vA, $vA)>; 920249423Sdimdef:Pat<(vmrghh_unary_shuffle v16i8:$vA, undef), 921249423Sdim (VMRGHH $vA, $vA)>; 922249423Sdimdef:Pat<(vmrghw_unary_shuffle v16i8:$vA, undef), 923249423Sdim (VMRGHW $vA, $vA)>; 924193323Sed 925276479Sdim// Match vmrg*(y,x), i.e., swapped operands. These fragments 926276479Sdim// are matched for little-endian, where the inputs must be 927276479Sdim// swapped for correct semantics. 928276479Sdimdef:Pat<(vmrglb_swapped_shuffle v16i8:$vA, v16i8:$vB), 929276479Sdim (VMRGLB $vB, $vA)>; 930276479Sdimdef:Pat<(vmrglh_swapped_shuffle v16i8:$vA, v16i8:$vB), 931276479Sdim (VMRGLH $vB, $vA)>; 932276479Sdimdef:Pat<(vmrglw_swapped_shuffle v16i8:$vA, v16i8:$vB), 933276479Sdim (VMRGLW $vB, $vA)>; 934276479Sdimdef:Pat<(vmrghb_swapped_shuffle v16i8:$vA, v16i8:$vB), 935276479Sdim (VMRGHB $vB, $vA)>; 936276479Sdimdef:Pat<(vmrghh_swapped_shuffle v16i8:$vA, v16i8:$vB), 937276479Sdim (VMRGHH $vB, $vA)>; 938276479Sdimdef:Pat<(vmrghw_swapped_shuffle v16i8:$vA, v16i8:$vB), 939276479Sdim (VMRGHW $vB, $vA)>; 940276479Sdim 941193323Sed// Logical Operations 942249423Sdimdef : Pat<(vnot_ppc v4i32:$vA), (VNOR $vA, $vA)>; 943193323Sed 944249423Sdimdef : Pat<(vnot_ppc (or v4i32:$A, v4i32:$B)), 945249423Sdim (VNOR $A, $B)>; 946249423Sdimdef : Pat<(and v4i32:$A, (vnot_ppc v4i32:$B)), 947249423Sdim (VANDC $A, $B)>; 948193323Sed 949249423Sdimdef : Pat<(fmul v4f32:$vA, v4f32:$vB), 950249423Sdim (VMADDFP $vA, $vB, 951249423Sdim (v4i32 (VSLW (V_SETALLONES), (V_SETALLONES))))>; 952193323Sed 953193323Sed// Fused multiply add and multiply sub for packed float. These are represented 954193323Sed// separately from the real instructions above, for operations that must have 955193323Sed// the additional precision, such as Newton-Rhapson (used by divide, sqrt) 956249423Sdimdef : Pat<(PPCvmaddfp v4f32:$A, v4f32:$B, v4f32:$C), 957249423Sdim (VMADDFP $A, $B, $C)>; 958249423Sdimdef : Pat<(PPCvnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), 959249423Sdim (VNMSUBFP $A, $B, $C)>; 960193323Sed 961249423Sdimdef : Pat<(int_ppc_altivec_vmaddfp v4f32:$A, v4f32:$B, v4f32:$C), 962249423Sdim (VMADDFP $A, $B, $C)>; 963249423Sdimdef : Pat<(int_ppc_altivec_vnmsubfp v4f32:$A, v4f32:$B, v4f32:$C), 964249423Sdim (VNMSUBFP $A, $B, $C)>; 965193323Sed 966249423Sdimdef : Pat<(PPCvperm v16i8:$vA, v16i8:$vB, v16i8:$vC), 967249423Sdim (VPERM $vA, $vB, $vC)>; 968193630Sed 969249423Sdimdef : Pat<(PPCfre v4f32:$A), (VREFP $A)>; 970249423Sdimdef : Pat<(PPCfrsqrte v4f32:$A), (VRSQRTEFP $A)>; 971249423Sdim 972193630Sed// Vector shifts 973249423Sdimdef : Pat<(v16i8 (shl v16i8:$vA, v16i8:$vB)), 974249423Sdim (v16i8 (VSLB $vA, $vB))>; 975249423Sdimdef : Pat<(v8i16 (shl v8i16:$vA, v8i16:$vB)), 976249423Sdim (v8i16 (VSLH $vA, $vB))>; 977249423Sdimdef : Pat<(v4i32 (shl v4i32:$vA, v4i32:$vB)), 978249423Sdim (v4i32 (VSLW $vA, $vB))>; 979193630Sed 980249423Sdimdef : Pat<(v16i8 (srl v16i8:$vA, v16i8:$vB)), 981249423Sdim (v16i8 (VSRB $vA, $vB))>; 982249423Sdimdef : Pat<(v8i16 (srl v8i16:$vA, v8i16:$vB)), 983249423Sdim (v8i16 (VSRH $vA, $vB))>; 984249423Sdimdef : Pat<(v4i32 (srl v4i32:$vA, v4i32:$vB)), 985249423Sdim (v4i32 (VSRW $vA, $vB))>; 986193630Sed 987249423Sdimdef : Pat<(v16i8 (sra v16i8:$vA, v16i8:$vB)), 988249423Sdim (v16i8 (VSRAB $vA, $vB))>; 989249423Sdimdef : Pat<(v8i16 (sra v8i16:$vA, v8i16:$vB)), 990249423Sdim (v8i16 (VSRAH $vA, $vB))>; 991249423Sdimdef : Pat<(v4i32 (sra v4i32:$vA, v4i32:$vB)), 992249423Sdim (v4i32 (VSRAW $vA, $vB))>; 993243830Sdim 994243830Sdim// Float to integer and integer to float conversions 995249423Sdimdef : Pat<(v4i32 (fp_to_sint v4f32:$vA)), 996249423Sdim (VCTSXS_0 $vA)>; 997249423Sdimdef : Pat<(v4i32 (fp_to_uint v4f32:$vA)), 998249423Sdim (VCTUXS_0 $vA)>; 999249423Sdimdef : Pat<(v4f32 (sint_to_fp v4i32:$vA)), 1000249423Sdim (VCFSX_0 $vA)>; 1001249423Sdimdef : Pat<(v4f32 (uint_to_fp v4i32:$vA)), 1002249423Sdim (VCFUX_0 $vA)>; 1003249423Sdim 1004249423Sdim// Floating-point rounding 1005249423Sdimdef : Pat<(v4f32 (ffloor v4f32:$vA)), 1006249423Sdim (VRFIM $vA)>; 1007249423Sdimdef : Pat<(v4f32 (fceil v4f32:$vA)), 1008249423Sdim (VRFIP $vA)>; 1009249423Sdimdef : Pat<(v4f32 (ftrunc v4f32:$vA)), 1010249423Sdim (VRFIZ $vA)>; 1011249423Sdimdef : Pat<(v4f32 (fnearbyint v4f32:$vA)), 1012249423Sdim (VRFIN $vA)>; 1013249423Sdim 1014249423Sdim} // end HasAltivec 1015249423Sdim 1016288943Sdimdef HasP8Altivec : Predicate<"PPCSubTarget->hasP8Altivec()">; 1017288943Sdimdef HasP8Crypto : Predicate<"PPCSubTarget->hasP8Crypto()">; 1018288943Sdimlet Predicates = [HasP8Altivec] in { 1019288943Sdim 1020288943Sdimlet isCommutable = 1 in { 1021288943Sdimdef VMULESW : VX1_Int_Ty2<904, "vmulesw", int_ppc_altivec_vmulesw, 1022288943Sdim v2i64, v4i32>; 1023288943Sdimdef VMULEUW : VX1_Int_Ty2<648, "vmuleuw", int_ppc_altivec_vmuleuw, 1024288943Sdim v2i64, v4i32>; 1025288943Sdimdef VMULOSW : VX1_Int_Ty2<392, "vmulosw", int_ppc_altivec_vmulosw, 1026288943Sdim v2i64, v4i32>; 1027288943Sdimdef VMULOUW : VX1_Int_Ty2<136, "vmulouw", int_ppc_altivec_vmulouw, 1028288943Sdim v2i64, v4i32>; 1029288943Sdimdef VMULUWM : VXForm_1<137, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1030288943Sdim "vmuluwm $vD, $vA, $vB", IIC_VecGeneral, 1031288943Sdim [(set v4i32:$vD, (mul v4i32:$vA, v4i32:$vB))]>; 1032288943Sdimdef VMAXSD : VX1_Int_Ty<450, "vmaxsd", int_ppc_altivec_vmaxsd, v2i64>; 1033288943Sdimdef VMAXUD : VX1_Int_Ty<194, "vmaxud", int_ppc_altivec_vmaxud, v2i64>; 1034288943Sdimdef VMINSD : VX1_Int_Ty<962, "vminsd", int_ppc_altivec_vminsd, v2i64>; 1035288943Sdimdef VMINUD : VX1_Int_Ty<706, "vminud", int_ppc_altivec_vminud, v2i64>; 1036288943Sdim} // isCommutable 1037288943Sdim 1038288943Sdim// Vector merge 1039288943Sdimdef VMRGEW : VXForm_1<1932, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1040288943Sdim "vmrgew $vD, $vA, $vB", IIC_VecFP, 1041288943Sdim [(set v16i8:$vD, (vmrgew_shuffle v16i8:$vA, v16i8:$vB))]>; 1042288943Sdimdef VMRGOW : VXForm_1<1676, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1043288943Sdim "vmrgow $vD, $vA, $vB", IIC_VecFP, 1044288943Sdim [(set v16i8:$vD, (vmrgow_shuffle v16i8:$vA, v16i8:$vB))]>; 1045288943Sdim 1046288943Sdim// Match vmrgew(x,x) and vmrgow(x,x) 1047288943Sdimdef:Pat<(vmrgew_unary_shuffle v16i8:$vA, undef), 1048288943Sdim (VMRGEW $vA, $vA)>; 1049288943Sdimdef:Pat<(vmrgow_unary_shuffle v16i8:$vA, undef), 1050288943Sdim (VMRGOW $vA, $vA)>; 1051288943Sdim 1052288943Sdim// Match vmrgew(y,x) and vmrgow(y,x), i.e., swapped operands. These fragments 1053288943Sdim// are matched for little-endian, where the inputs must be swapped for correct 1054288943Sdim// semantics.w 1055288943Sdimdef:Pat<(vmrgew_swapped_shuffle v16i8:$vA, v16i8:$vB), 1056288943Sdim (VMRGEW $vB, $vA)>; 1057288943Sdimdef:Pat<(vmrgow_swapped_shuffle v16i8:$vA, v16i8:$vB), 1058288943Sdim (VMRGOW $vB, $vA)>; 1059288943Sdim 1060288943Sdim 1061288943Sdim// Vector shifts 1062288943Sdimdef VRLD : VX1_Int_Ty<196, "vrld", int_ppc_altivec_vrld, v2i64>; 1063288943Sdimdef VSLD : VXForm_1<1476, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1064288943Sdim "vsld $vD, $vA, $vB", IIC_VecGeneral, 1065288943Sdim [(set v2i64:$vD, (shl v2i64:$vA, v2i64:$vB))]>; 1066288943Sdimdef VSRD : VXForm_1<1732, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1067288943Sdim "vsrd $vD, $vA, $vB", IIC_VecGeneral, 1068288943Sdim [(set v2i64:$vD, (srl v2i64:$vA, v2i64:$vB))]>; 1069288943Sdimdef VSRAD : VXForm_1<964, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1070288943Sdim "vsrad $vD, $vA, $vB", IIC_VecGeneral, 1071288943Sdim [(set v2i64:$vD, (sra v2i64:$vA, v2i64:$vB))]>; 1072288943Sdim 1073288943Sdim// Vector Integer Arithmetic Instructions 1074288943Sdimlet isCommutable = 1 in { 1075288943Sdimdef VADDUDM : VXForm_1<192, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1076288943Sdim "vaddudm $vD, $vA, $vB", IIC_VecGeneral, 1077288943Sdim [(set v2i64:$vD, (add v2i64:$vA, v2i64:$vB))]>; 1078288943Sdimdef VADDUQM : VXForm_1<256, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1079288943Sdim "vadduqm $vD, $vA, $vB", IIC_VecGeneral, 1080288943Sdim [(set v1i128:$vD, (add v1i128:$vA, v1i128:$vB))]>; 1081288943Sdim} // isCommutable 1082288943Sdim 1083288943Sdim// Vector Quadword Add 1084288943Sdimdef VADDEUQM : VA1a_Int_Ty<60, "vaddeuqm", int_ppc_altivec_vaddeuqm, v1i128>; 1085288943Sdimdef VADDCUQ : VX1_Int_Ty<320, "vaddcuq", int_ppc_altivec_vaddcuq, v1i128>; 1086288943Sdimdef VADDECUQ : VA1a_Int_Ty<61, "vaddecuq", int_ppc_altivec_vaddecuq, v1i128>; 1087288943Sdim 1088288943Sdim// Vector Doubleword Subtract 1089288943Sdimdef VSUBUDM : VXForm_1<1216, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1090288943Sdim "vsubudm $vD, $vA, $vB", IIC_VecGeneral, 1091288943Sdim [(set v2i64:$vD, (sub v2i64:$vA, v2i64:$vB))]>; 1092288943Sdim 1093288943Sdim// Vector Quadword Subtract 1094288943Sdimdef VSUBUQM : VXForm_1<1280, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1095288943Sdim "vsubuqm $vD, $vA, $vB", IIC_VecGeneral, 1096288943Sdim [(set v1i128:$vD, (sub v1i128:$vA, v1i128:$vB))]>; 1097288943Sdimdef VSUBEUQM : VA1a_Int_Ty<62, "vsubeuqm", int_ppc_altivec_vsubeuqm, v1i128>; 1098288943Sdimdef VSUBCUQ : VX1_Int_Ty<1344, "vsubcuq", int_ppc_altivec_vsubcuq, v1i128>; 1099288943Sdimdef VSUBECUQ : VA1a_Int_Ty<63, "vsubecuq", int_ppc_altivec_vsubecuq, v1i128>; 1100288943Sdim 1101288943Sdim// Count Leading Zeros 1102288943Sdimdef VCLZB : VXForm_2<1794, (outs vrrc:$vD), (ins vrrc:$vB), 1103288943Sdim "vclzb $vD, $vB", IIC_VecGeneral, 1104288943Sdim [(set v16i8:$vD, (ctlz v16i8:$vB))]>; 1105288943Sdimdef VCLZH : VXForm_2<1858, (outs vrrc:$vD), (ins vrrc:$vB), 1106288943Sdim "vclzh $vD, $vB", IIC_VecGeneral, 1107288943Sdim [(set v8i16:$vD, (ctlz v8i16:$vB))]>; 1108288943Sdimdef VCLZW : VXForm_2<1922, (outs vrrc:$vD), (ins vrrc:$vB), 1109288943Sdim "vclzw $vD, $vB", IIC_VecGeneral, 1110288943Sdim [(set v4i32:$vD, (ctlz v4i32:$vB))]>; 1111288943Sdimdef VCLZD : VXForm_2<1986, (outs vrrc:$vD), (ins vrrc:$vB), 1112288943Sdim "vclzd $vD, $vB", IIC_VecGeneral, 1113288943Sdim [(set v2i64:$vD, (ctlz v2i64:$vB))]>; 1114288943Sdim 1115288943Sdim// Population Count 1116288943Sdimdef VPOPCNTB : VXForm_2<1795, (outs vrrc:$vD), (ins vrrc:$vB), 1117288943Sdim "vpopcntb $vD, $vB", IIC_VecGeneral, 1118288943Sdim [(set v16i8:$vD, (ctpop v16i8:$vB))]>; 1119288943Sdimdef VPOPCNTH : VXForm_2<1859, (outs vrrc:$vD), (ins vrrc:$vB), 1120288943Sdim "vpopcnth $vD, $vB", IIC_VecGeneral, 1121288943Sdim [(set v8i16:$vD, (ctpop v8i16:$vB))]>; 1122288943Sdimdef VPOPCNTW : VXForm_2<1923, (outs vrrc:$vD), (ins vrrc:$vB), 1123288943Sdim "vpopcntw $vD, $vB", IIC_VecGeneral, 1124288943Sdim [(set v4i32:$vD, (ctpop v4i32:$vB))]>; 1125288943Sdimdef VPOPCNTD : VXForm_2<1987, (outs vrrc:$vD), (ins vrrc:$vB), 1126288943Sdim "vpopcntd $vD, $vB", IIC_VecGeneral, 1127288943Sdim [(set v2i64:$vD, (ctpop v2i64:$vB))]>; 1128288943Sdim 1129288943Sdimlet isCommutable = 1 in { 1130288943Sdim// FIXME: Use AddedComplexity > 400 to ensure these patterns match before the 1131288943Sdim// VSX equivalents. We need to fix this up at some point. Two possible 1132288943Sdim// solutions for this problem: 1133288943Sdim// 1. Disable Altivec patterns that compete with VSX patterns using the 1134288943Sdim// !HasVSX predicate. This essentially favours VSX over Altivec, in 1135288943Sdim// hopes of reducing register pressure (larger register set using VSX 1136288943Sdim// instructions than VMX instructions) 1137288943Sdim// 2. Employ a more disciplined use of AddedComplexity, which would provide 1138288943Sdim// more fine-grained control than option 1. This would be beneficial 1139288943Sdim// if we find situations where Altivec is really preferred over VSX. 1140288943Sdimdef VEQV : VXForm_1<1668, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1141288943Sdim "veqv $vD, $vA, $vB", IIC_VecGeneral, 1142288943Sdim [(set v4i32:$vD, (vnot_ppc (xor v4i32:$vA, v4i32:$vB)))]>; 1143288943Sdimdef VNAND : VXForm_1<1412, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1144288943Sdim "vnand $vD, $vA, $vB", IIC_VecGeneral, 1145288943Sdim [(set v4i32:$vD, (vnot_ppc (and v4i32:$vA, v4i32:$vB)))]>; 1146288943Sdim} // isCommutable 1147288943Sdim 1148288943Sdimdef VORC : VXForm_1<1348, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1149288943Sdim "vorc $vD, $vA, $vB", IIC_VecGeneral, 1150288943Sdim [(set v4i32:$vD, (or v4i32:$vA, 1151288943Sdim (vnot_ppc v4i32:$vB)))]>; 1152288943Sdim 1153288943Sdim// i64 element comparisons. 1154288943Sdimdef VCMPEQUD : VCMP <199, "vcmpequd $vD, $vA, $vB" , v2i64>; 1155288943Sdimdef VCMPEQUDo : VCMPo<199, "vcmpequd. $vD, $vA, $vB", v2i64>; 1156288943Sdimdef VCMPGTSD : VCMP <967, "vcmpgtsd $vD, $vA, $vB" , v2i64>; 1157288943Sdimdef VCMPGTSDo : VCMPo<967, "vcmpgtsd. $vD, $vA, $vB", v2i64>; 1158288943Sdimdef VCMPGTUD : VCMP <711, "vcmpgtud $vD, $vA, $vB" , v2i64>; 1159288943Sdimdef VCMPGTUDo : VCMPo<711, "vcmpgtud. $vD, $vA, $vB", v2i64>; 1160288943Sdim 1161288943Sdim// The cryptography instructions that do not require Category:Vector.Crypto 1162288943Sdimdef VPMSUMB : VX1_Int_Ty<1032, "vpmsumb", 1163288943Sdim int_ppc_altivec_crypto_vpmsumb, v16i8>; 1164288943Sdimdef VPMSUMH : VX1_Int_Ty<1096, "vpmsumh", 1165288943Sdim int_ppc_altivec_crypto_vpmsumh, v8i16>; 1166288943Sdimdef VPMSUMW : VX1_Int_Ty<1160, "vpmsumw", 1167288943Sdim int_ppc_altivec_crypto_vpmsumw, v4i32>; 1168288943Sdimdef VPMSUMD : VX1_Int_Ty<1224, "vpmsumd", 1169288943Sdim int_ppc_altivec_crypto_vpmsumd, v2i64>; 1170288943Sdimdef VPERMXOR : VA1a_Int_Ty<45, "vpermxor", 1171288943Sdim int_ppc_altivec_crypto_vpermxor, v16i8>; 1172288943Sdim 1173288943Sdim// Vector doubleword integer pack and unpack. 1174288943Sdimdef VPKSDSS : VX1_Int_Ty2<1486, "vpksdss", int_ppc_altivec_vpksdss, 1175288943Sdim v4i32, v2i64>; 1176288943Sdimdef VPKSDUS : VX1_Int_Ty2<1358, "vpksdus", int_ppc_altivec_vpksdus, 1177288943Sdim v4i32, v2i64>; 1178288943Sdimdef VPKUDUM : VXForm_1<1102, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), 1179288943Sdim "vpkudum $vD, $vA, $vB", IIC_VecFP, 1180288943Sdim [(set v16i8:$vD, 1181288943Sdim (vpkudum_shuffle v16i8:$vA, v16i8:$vB))]>; 1182288943Sdimdef VPKUDUS : VX1_Int_Ty2<1230, "vpkudus", int_ppc_altivec_vpkudus, 1183288943Sdim v4i32, v2i64>; 1184288943Sdimdef VUPKHSW : VX2_Int_Ty2<1614, "vupkhsw", int_ppc_altivec_vupkhsw, 1185288943Sdim v2i64, v4i32>; 1186288943Sdimdef VUPKLSW : VX2_Int_Ty2<1742, "vupklsw", int_ppc_altivec_vupklsw, 1187288943Sdim v2i64, v4i32>; 1188288943Sdim 1189288943Sdim// Shuffle patterns for unary and swapped (LE) vector pack modulo. 1190288943Sdimdef:Pat<(vpkudum_unary_shuffle v16i8:$vA, undef), 1191288943Sdim (VPKUDUM $vA, $vA)>; 1192288943Sdimdef:Pat<(vpkudum_swapped_shuffle v16i8:$vA, v16i8:$vB), 1193288943Sdim (VPKUDUM $vB, $vA)>; 1194288943Sdim 1195288943Sdimdef VGBBD : VX2_Int_Ty2<1292, "vgbbd", int_ppc_altivec_vgbbd, v16i8, v16i8>; 1196288943Sdimdef VBPERMQ : VX1_Int_Ty2<1356, "vbpermq", int_ppc_altivec_vbpermq, 1197288943Sdim v2i64, v16i8>; 1198288943Sdim} // end HasP8Altivec 1199288943Sdim 1200288943Sdim// Crypto instructions (from builtins) 1201288943Sdimlet Predicates = [HasP8Crypto] in { 1202288943Sdimdef VSHASIGMAW : VXCR_Int_Ty<1666, "vshasigmaw", 1203288943Sdim int_ppc_altivec_crypto_vshasigmaw, v4i32>; 1204288943Sdimdef VSHASIGMAD : VXCR_Int_Ty<1730, "vshasigmad", 1205288943Sdim int_ppc_altivec_crypto_vshasigmad, v2i64>; 1206288943Sdimdef VCIPHER : VX1_Int_Ty<1288, "vcipher", int_ppc_altivec_crypto_vcipher, 1207288943Sdim v2i64>; 1208288943Sdimdef VCIPHERLAST : VX1_Int_Ty<1289, "vcipherlast", 1209288943Sdim int_ppc_altivec_crypto_vcipherlast, v2i64>; 1210288943Sdimdef VNCIPHER : VX1_Int_Ty<1352, "vncipher", 1211288943Sdim int_ppc_altivec_crypto_vncipher, v2i64>; 1212288943Sdimdef VNCIPHERLAST : VX1_Int_Ty<1353, "vncipherlast", 1213288943Sdim int_ppc_altivec_crypto_vncipherlast, v2i64>; 1214288943Sdimdef VSBOX : VXBX_Int_Ty<1480, "vsbox", int_ppc_altivec_crypto_vsbox, v2i64>; 1215288943Sdim} // HasP8Crypto 1216