NVPTXTargetMachine.h revision 239310
1239310Sdim//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
2239310Sdim//
3239310Sdim//                     The LLVM Compiler Infrastructure
4239310Sdim//
5239310Sdim// This file is distributed under the University of Illinois Open Source
6239310Sdim// License. See LICENSE.TXT for details.
7239310Sdim//
8239310Sdim//===----------------------------------------------------------------------===//
9239310Sdim//
10239310Sdim// This file declares the NVPTX specific subclass of TargetMachine.
11239310Sdim//
12239310Sdim//===----------------------------------------------------------------------===//
13239310Sdim
14239310Sdim
15239310Sdim#ifndef NVPTX_TARGETMACHINE_H
16239310Sdim#define NVPTX_TARGETMACHINE_H
17239310Sdim
18239310Sdim#include "NVPTXInstrInfo.h"
19239310Sdim#include "NVPTXISelLowering.h"
20239310Sdim#include "NVPTXRegisterInfo.h"
21239310Sdim#include "NVPTXSubtarget.h"
22239310Sdim#include "NVPTXFrameLowering.h"
23239310Sdim#include "ManagedStringPool.h"
24239310Sdim#include "llvm/Target/TargetData.h"
25239310Sdim#include "llvm/Target/TargetFrameLowering.h"
26239310Sdim#include "llvm/Target/TargetMachine.h"
27239310Sdim#include "llvm/Target/TargetSelectionDAGInfo.h"
28239310Sdim
29239310Sdimnamespace llvm {
30239310Sdim
31239310Sdim/// NVPTXTargetMachine
32239310Sdim///
33239310Sdimclass NVPTXTargetMachine : public LLVMTargetMachine {
34239310Sdim  NVPTXSubtarget        Subtarget;
35239310Sdim  const TargetData      DataLayout;       // Calculates type size & alignment
36239310Sdim  NVPTXInstrInfo        InstrInfo;
37239310Sdim  NVPTXTargetLowering   TLInfo;
38239310Sdim  TargetSelectionDAGInfo   TSInfo;
39239310Sdim
40239310Sdim  // NVPTX does not have any call stack frame, but need a NVPTX specific
41239310Sdim  // FrameLowering class because TargetFrameLowering is abstract.
42239310Sdim  NVPTXFrameLowering       FrameLowering;
43239310Sdim
44239310Sdim  // Hold Strings that can be free'd all together with NVPTXTargetMachine
45239310Sdim  ManagedStringPool     ManagedStrPool;
46239310Sdim
47239310Sdim  //bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
48239310Sdim  //                            bool DisableVerify, MCContext *&OutCtx);
49239310Sdim
50239310Sdimpublic:
51239310Sdim  NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU,
52239310Sdim                     StringRef FS, const TargetOptions &Options,
53239310Sdim                     Reloc::Model RM, CodeModel::Model CM,
54239310Sdim                     CodeGenOpt::Level OP,
55239310Sdim                     bool is64bit);
56239310Sdim
57239310Sdim  virtual const TargetFrameLowering *getFrameLowering() const {
58239310Sdim    return &FrameLowering;
59239310Sdim  }
60239310Sdim  virtual const NVPTXInstrInfo *getInstrInfo() const  { return &InstrInfo; }
61239310Sdim  virtual const TargetData *getTargetData() const     { return &DataLayout;}
62239310Sdim  virtual const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget;}
63239310Sdim
64239310Sdim  virtual const NVPTXRegisterInfo *getRegisterInfo() const {
65239310Sdim    return &(InstrInfo.getRegisterInfo());
66239310Sdim  }
67239310Sdim
68239310Sdim  virtual NVPTXTargetLowering *getTargetLowering() const {
69239310Sdim    return const_cast<NVPTXTargetLowering*>(&TLInfo);
70239310Sdim  }
71239310Sdim
72239310Sdim  virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
73239310Sdim    return &TSInfo;
74239310Sdim  }
75239310Sdim
76239310Sdim  //virtual bool addInstSelector(PassManagerBase &PM,
77239310Sdim  //                             CodeGenOpt::Level OptLevel);
78239310Sdim
79239310Sdim  //virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level);
80239310Sdim
81239310Sdim  ManagedStringPool *getManagedStrPool() const {
82239310Sdim    return const_cast<ManagedStringPool*>(&ManagedStrPool);
83239310Sdim  }
84239310Sdim
85239310Sdim  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
86239310Sdim
87239310Sdim  // Emission of machine code through JITCodeEmitter is not supported.
88239310Sdim  virtual bool addPassesToEmitMachineCode(PassManagerBase &,
89239310Sdim                                          JITCodeEmitter &,
90239310Sdim                                          bool = true) {
91239310Sdim    return true;
92239310Sdim  }
93239310Sdim
94239310Sdim  // Emission of machine code through MCJIT is not supported.
95239310Sdim  virtual bool addPassesToEmitMC(PassManagerBase &,
96239310Sdim                                 MCContext *&,
97239310Sdim                                 raw_ostream &,
98239310Sdim                                 bool = true) {
99239310Sdim    return true;
100239310Sdim  }
101239310Sdim
102239310Sdim}; // NVPTXTargetMachine.
103239310Sdim
104239310Sdimclass NVPTXTargetMachine32 : public NVPTXTargetMachine {
105239310Sdim  virtual void anchor();
106239310Sdimpublic:
107239310Sdim  NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU,
108239310Sdim                       StringRef FS, const TargetOptions &Options,
109239310Sdim                       Reloc::Model RM, CodeModel::Model CM,
110239310Sdim                       CodeGenOpt::Level OL);
111239310Sdim};
112239310Sdim
113239310Sdimclass NVPTXTargetMachine64 : public NVPTXTargetMachine {
114239310Sdim  virtual void anchor();
115239310Sdimpublic:
116239310Sdim  NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
117239310Sdim                       StringRef FS, const TargetOptions &Options,
118239310Sdim                       Reloc::Model RM, CodeModel::Model CM,
119239310Sdim                       CodeGenOpt::Level OL);
120239310Sdim};
121239310Sdim
122239310Sdim
123239310Sdim} // end namespace llvm
124239310Sdim
125239310Sdim#endif
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