1239310Sdim//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
2239310Sdim//
3239310Sdim//                     The LLVM Compiler Infrastructure
4239310Sdim//
5239310Sdim// This file is distributed under the University of Illinois Open Source
6239310Sdim// License. See LICENSE.TXT for details.
7239310Sdim//
8239310Sdim//===----------------------------------------------------------------------===//
9239310Sdim//
10239310Sdim// This file declares the NVPTX specific subclass of TargetMachine.
11239310Sdim//
12239310Sdim//===----------------------------------------------------------------------===//
13239310Sdim
14280031Sdim#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
15280031Sdim#define LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
16239310Sdim
17280031Sdim#include "ManagedStringPool.h"
18276479Sdim#include "NVPTXSubtarget.h"
19239310Sdim#include "llvm/Target/TargetFrameLowering.h"
20239310Sdim#include "llvm/Target/TargetMachine.h"
21239310Sdim#include "llvm/Target/TargetSelectionDAGInfo.h"
22239310Sdim
23239310Sdimnamespace llvm {
24239310Sdim
25239310Sdim/// NVPTXTargetMachine
26239310Sdim///
27239310Sdimclass NVPTXTargetMachine : public LLVMTargetMachine {
28288943Sdim  bool is64bit;
29280031Sdim  std::unique_ptr<TargetLoweringObjectFile> TLOF;
30288943Sdim  NVPTX::DrvInterface drvInterface;
31249423Sdim  NVPTXSubtarget Subtarget;
32239310Sdim
33239310Sdim  // Hold Strings that can be free'd all together with NVPTXTargetMachine
34249423Sdim  ManagedStringPool ManagedStrPool;
35239310Sdim
36239310Sdimpublic:
37288943Sdim  NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
38288943Sdim                     StringRef FS, const TargetOptions &Options,
39288943Sdim                     Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OP,
40288943Sdim                     bool is64bit);
41239310Sdim
42280031Sdim  ~NVPTXTargetMachine() override;
43288943Sdim  const NVPTXSubtarget *getSubtargetImpl(const Function &) const override {
44288943Sdim    return &Subtarget;
45288943Sdim  }
46288943Sdim  const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget; }
47288943Sdim  bool is64Bit() const { return is64bit; }
48288943Sdim  NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
49239310Sdim  ManagedStringPool *getManagedStrPool() const {
50249423Sdim    return const_cast<ManagedStringPool *>(&ManagedStrPool);
51239310Sdim  }
52239310Sdim
53276479Sdim  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
54239310Sdim
55239310Sdim  // Emission of machine code through MCJIT is not supported.
56288943Sdim  bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_pwrite_stream &,
57276479Sdim                         bool = true) override {
58239310Sdim    return true;
59239310Sdim  }
60280031Sdim  TargetLoweringObjectFile *getObjFileLowering() const override {
61280031Sdim    return TLOF.get();
62280031Sdim  }
63239310Sdim
64288943Sdim  TargetIRAnalysis getTargetIRAnalysis() override;
65280031Sdim
66239310Sdim}; // NVPTXTargetMachine.
67239310Sdim
68239310Sdimclass NVPTXTargetMachine32 : public NVPTXTargetMachine {
69239310Sdim  virtual void anchor();
70239310Sdimpublic:
71288943Sdim  NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
72239310Sdim                       StringRef FS, const TargetOptions &Options,
73239310Sdim                       Reloc::Model RM, CodeModel::Model CM,
74239310Sdim                       CodeGenOpt::Level OL);
75239310Sdim};
76239310Sdim
77239310Sdimclass NVPTXTargetMachine64 : public NVPTXTargetMachine {
78239310Sdim  virtual void anchor();
79239310Sdimpublic:
80288943Sdim  NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
81239310Sdim                       StringRef FS, const TargetOptions &Options,
82239310Sdim                       Reloc::Model RM, CodeModel::Model CM,
83239310Sdim                       CodeGenOpt::Level OL);
84239310Sdim};
85239310Sdim
86239310Sdim} // end namespace llvm
87239310Sdim
88239310Sdim#endif
89