NVPTXTargetMachine.cpp revision 249423 
1//===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the NVPTX target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "NVPTXTargetMachine.h"
15#include "MCTargetDesc/NVPTXMCAsmInfo.h"
16#include "NVPTX.h"
17#include "NVPTXAllocaHoisting.h"
18#include "NVPTXLowerAggrCopies.h"
19#include "NVPTXSplitBBatBar.h"
20#include "llvm/ADT/OwningPtr.h"
21#include "llvm/Analysis/Passes.h"
22#include "llvm/Analysis/Verifier.h"
23#include "llvm/Assembly/PrintModulePass.h"
24#include "llvm/CodeGen/AsmPrinter.h"
25#include "llvm/CodeGen/MachineFunctionAnalysis.h"
26#include "llvm/CodeGen/MachineModuleInfo.h"
27#include "llvm/CodeGen/Passes.h"
28#include "llvm/IR/DataLayout.h"
29#include "llvm/MC/MCAsmInfo.h"
30#include "llvm/MC/MCInstrInfo.h"
31#include "llvm/MC/MCStreamer.h"
32#include "llvm/MC/MCSubtargetInfo.h"
33#include "llvm/PassManager.h"
34#include "llvm/Support/CommandLine.h"
35#include "llvm/Support/Debug.h"
36#include "llvm/Support/FormattedStream.h"
37#include "llvm/Support/TargetRegistry.h"
38#include "llvm/Support/raw_ostream.h"
39#include "llvm/Target/TargetInstrInfo.h"
40#include "llvm/Target/TargetLowering.h"
41#include "llvm/Target/TargetLoweringObjectFile.h"
42#include "llvm/Target/TargetMachine.h"
43#include "llvm/Target/TargetOptions.h"
44#include "llvm/Target/TargetRegisterInfo.h"
45#include "llvm/Target/TargetSubtargetInfo.h"
46#include "llvm/Transforms/Scalar.h"
47
48using namespace llvm;
49
50namespace llvm {
51void initializeNVVMReflectPass(PassRegistry&);
52}
53
54extern "C" void LLVMInitializeNVPTXTarget() {
55  // Register the target.
56  RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32);
57  RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64);
58
59  RegisterMCAsmInfo<NVPTXMCAsmInfo> A(TheNVPTXTarget32);
60  RegisterMCAsmInfo<NVPTXMCAsmInfo> B(TheNVPTXTarget64);
61
62  // FIXME: This pass is really intended to be invoked during IR optimization,
63  // but it's very NVPTX-specific.
64  initializeNVVMReflectPass(*PassRegistry::getPassRegistry());
65}
66
67NVPTXTargetMachine::NVPTXTargetMachine(
68    const Target &T, StringRef TT, StringRef CPU, StringRef FS,
69    const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
70    CodeGenOpt::Level OL, bool is64bit)
71    : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
72      Subtarget(TT, CPU, FS, is64bit), DL(Subtarget.getDataLayout()),
73      InstrInfo(*this), TLInfo(*this), TSInfo(*this),
74      FrameLowering(
75          *this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {}
76
77void NVPTXTargetMachine32::anchor() {}
78
79NVPTXTargetMachine32::NVPTXTargetMachine32(
80    const Target &T, StringRef TT, StringRef CPU, StringRef FS,
81    const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
82    CodeGenOpt::Level OL)
83    : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
84
85void NVPTXTargetMachine64::anchor() {}
86
87NVPTXTargetMachine64::NVPTXTargetMachine64(
88    const Target &T, StringRef TT, StringRef CPU, StringRef FS,
89    const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
90    CodeGenOpt::Level OL)
91    : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
92
93namespace llvm {
94class NVPTXPassConfig : public TargetPassConfig {
95public:
96  NVPTXPassConfig(NVPTXTargetMachine *TM, PassManagerBase &PM)
97      : TargetPassConfig(TM, PM) {}
98
99  NVPTXTargetMachine &getNVPTXTargetMachine() const {
100    return getTM<NVPTXTargetMachine>();
101  }
102
103  virtual bool addInstSelector();
104  virtual bool addPreRegAlloc();
105};
106}
107
108TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
109  NVPTXPassConfig *PassConfig = new NVPTXPassConfig(this, PM);
110  return PassConfig;
111}
112
113bool NVPTXPassConfig::addInstSelector() {
114  addPass(createLowerAggrCopies());
115  addPass(createSplitBBatBarPass());
116  addPass(createAllocaHoisting());
117  addPass(createNVPTXISelDag(getNVPTXTargetMachine(), getOptLevel()));
118  return false;
119}
120
121bool NVPTXPassConfig::addPreRegAlloc() { return false; }
122