NVPTXTargetMachine.cpp revision 239462
1292934Sdim//===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===//
2280461Sdim//
3353358Sdim//                     The LLVM Compiler Infrastructure
4353358Sdim//
5353358Sdim// This file is distributed under the University of Illinois Open Source
6280461Sdim// License. See LICENSE.TXT for details.
7280461Sdim//
8280461Sdim//===----------------------------------------------------------------------===//
9280461Sdim//
10280461Sdim// Top-level implementation for the NVPTX target.
11280461Sdim//
12280461Sdim//===----------------------------------------------------------------------===//
13314564Sdim
14280461Sdim#include "NVPTXTargetMachine.h"
15280461Sdim#include "NVPTX.h"
16280461Sdim#include "NVPTXSplitBBatBar.h"
17303239Sdim#include "NVPTXLowerAggrCopies.h"
18280461Sdim#include "MCTargetDesc/NVPTXMCAsmInfo.h"
19314564Sdim#include "NVPTXAllocaHoisting.h"
20280461Sdim#include "llvm/PassManager.h"
21280461Sdim#include "llvm/Analysis/Passes.h"
22280461Sdim#include "llvm/Analysis/Verifier.h"
23280461Sdim#include "llvm/Assembly/PrintModulePass.h"
24280461Sdim#include "llvm/ADT/OwningPtr.h"
25280461Sdim#include "llvm/CodeGen/AsmPrinter.h"
26280461Sdim#include "llvm/CodeGen/MachineFunctionAnalysis.h"
27280461Sdim#include "llvm/CodeGen/MachineModuleInfo.h"
28280461Sdim#include "llvm/CodeGen/Passes.h"
29314564Sdim#include "llvm/MC/MCAsmInfo.h"
30314564Sdim#include "llvm/MC/MCInstrInfo.h"
31280461Sdim#include "llvm/MC/MCStreamer.h"
32303239Sdim#include "llvm/MC/MCSubtargetInfo.h"
33303239Sdim#include "llvm/Support/TargetRegistry.h"
34280461Sdim#include "llvm/Support/raw_ostream.h"
35314564Sdim#include "llvm/Target/TargetData.h"
36314564Sdim#include "llvm/Target/TargetInstrInfo.h"
37314564Sdim#include "llvm/Target/TargetLowering.h"
38280461Sdim#include "llvm/Target/TargetLoweringObjectFile.h"
39280461Sdim#include "llvm/Target/TargetMachine.h"
40280461Sdim#include "llvm/Target/TargetOptions.h"
41280461Sdim#include "llvm/Target/TargetRegisterInfo.h"
42280461Sdim#include "llvm/Target/TargetSubtargetInfo.h"
43280461Sdim#include "llvm/Transforms/Scalar.h"
44280461Sdim#include "llvm/Support/CommandLine.h"
45280461Sdim#include "llvm/Support/Debug.h"
46280461Sdim#include "llvm/Support/FormattedStream.h"
47280461Sdim#include "llvm/Support/TargetRegistry.h"
48280461Sdim
49280461Sdim
50280461Sdimusing namespace llvm;
51280461Sdim
52280461Sdim
53280461Sdimextern "C" void LLVMInitializeNVPTXTarget() {
54292934Sdim  // Register the target.
55292934Sdim  RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32);
56280461Sdim  RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64);
57280461Sdim
58280461Sdim  RegisterMCAsmInfo<NVPTXMCAsmInfo> A(TheNVPTXTarget32);
59280461Sdim  RegisterMCAsmInfo<NVPTXMCAsmInfo> B(TheNVPTXTarget64);
60280461Sdim
61280461Sdim}
62280461Sdim
63280461SdimNVPTXTargetMachine::NVPTXTargetMachine(const Target &T,
64280461Sdim                                       StringRef TT,
65280461Sdim                                       StringRef CPU,
66280461Sdim                                       StringRef FS,
67280461Sdim                                       const TargetOptions& Options,
68280461Sdim                                       Reloc::Model RM,
69280461Sdim                                       CodeModel::Model CM,
70280461Sdim                                       CodeGenOpt::Level OL,
71280461Sdim                                       bool is64bit)
72280461Sdim: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
73280461Sdim  Subtarget(TT, CPU, FS, is64bit),
74280461Sdim  DataLayout(Subtarget.getDataLayout()),
75280461Sdim  InstrInfo(*this), TLInfo(*this), TSInfo(*this), FrameLowering(*this,is64bit)
76280461Sdim/*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {
77292934Sdim}
78292934Sdim
79280461Sdim
80280461Sdim
81280461Sdimvoid NVPTXTargetMachine32::anchor() {}
82280461Sdim
83280461SdimNVPTXTargetMachine32::NVPTXTargetMachine32(const Target &T, StringRef TT,
84280461Sdim                                           StringRef CPU, StringRef FS,
85280461Sdim                                           const TargetOptions &Options,
86280461Sdim                                           Reloc::Model RM, CodeModel::Model CM,
87280461Sdim                                           CodeGenOpt::Level OL)
88280461Sdim: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
89280461Sdim}
90280461Sdim
91280461Sdimvoid NVPTXTargetMachine64::anchor() {}
92280461Sdim
93280461SdimNVPTXTargetMachine64::NVPTXTargetMachine64(const Target &T, StringRef TT,
94280461Sdim                                           StringRef CPU, StringRef FS,
95280461Sdim                                           const TargetOptions &Options,
96292934Sdim                                           Reloc::Model RM, CodeModel::Model CM,
97292934Sdim                                           CodeGenOpt::Level OL)
98292934Sdim: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
99292934Sdim}
100292934Sdim
101292934Sdim
102292934Sdimnamespace llvm {
103292934Sdimclass NVPTXPassConfig : public TargetPassConfig {
104292934Sdimpublic:
105292934Sdim  NVPTXPassConfig(NVPTXTargetMachine *TM, PassManagerBase &PM)
106292934Sdim  : TargetPassConfig(TM, PM) {}
107292934Sdim
108292934Sdim  NVPTXTargetMachine &getNVPTXTargetMachine() const {
109292934Sdim    return getTM<NVPTXTargetMachine>();
110292934Sdim  }
111292934Sdim
112292934Sdim  virtual bool addInstSelector();
113280461Sdim  virtual bool addPreRegAlloc();
114280461Sdim};
115280461Sdim}
116280461Sdim
117280461SdimTargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
118280461Sdim  NVPTXPassConfig *PassConfig = new NVPTXPassConfig(this, PM);
119280461Sdim  return PassConfig;
120280461Sdim}
121292934Sdim
122280461Sdimbool NVPTXPassConfig::addInstSelector() {
123280461Sdim  addPass(createLowerAggrCopies());
124280461Sdim  addPass(createSplitBBatBarPass());
125280461Sdim  addPass(createAllocaHoisting());
126280461Sdim  addPass(createNVPTXISelDag(getNVPTXTargetMachine(), getOptLevel()));
127280461Sdim  addPass(createVectorElementizePass(getNVPTXTargetMachine()));
128280461Sdim  return false;
129280461Sdim}
130280461Sdim
131280461Sdimbool NVPTXPassConfig::addPreRegAlloc() {
132292934Sdim  return false;
133280461Sdim}
134280461Sdim