1239310Sdim//=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====// 2239310Sdim// 3239310Sdim// The LLVM Compiler Infrastructure 4239310Sdim// 5239310Sdim// This file is distributed under the University of Illinois Open Source 6239310Sdim// License. See LICENSE.TXT for details. 7239310Sdim// 8239310Sdim//===----------------------------------------------------------------------===// 9239310Sdim// 10239310Sdim// This file contains the NVPTX implementation of TargetFrameLowering class. 11239310Sdim// 12239310Sdim//===----------------------------------------------------------------------===// 13239310Sdim 14239310Sdim#include "NVPTXFrameLowering.h" 15239310Sdim#include "NVPTX.h" 16239310Sdim#include "NVPTXRegisterInfo.h" 17239310Sdim#include "NVPTXSubtarget.h" 18239310Sdim#include "NVPTXTargetMachine.h" 19239310Sdim#include "llvm/ADT/BitVector.h" 20249423Sdim#include "llvm/CodeGen/MachineFrameInfo.h" 21249423Sdim#include "llvm/CodeGen/MachineFunction.h" 22239310Sdim#include "llvm/CodeGen/MachineInstrBuilder.h" 23261991Sdim#include "llvm/CodeGen/MachineRegisterInfo.h" 24239310Sdim#include "llvm/MC/MachineLocation.h" 25239310Sdim#include "llvm/Target/TargetInstrInfo.h" 26239310Sdim 27239310Sdimusing namespace llvm; 28239310Sdim 29288943SdimNVPTXFrameLowering::NVPTXFrameLowering() 30288943Sdim : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {} 31276479Sdim 32249423Sdimbool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; } 33239310Sdim 34288943Sdimvoid NVPTXFrameLowering::emitPrologue(MachineFunction &MF, 35288943Sdim MachineBasicBlock &MBB) const { 36239310Sdim if (MF.getFrameInfo()->hasStackObjects()) { 37288943Sdim assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); 38288943Sdim MachineInstr *MI = MBB.begin(); 39288943Sdim MachineRegisterInfo &MR = MF.getRegInfo(); 40288943Sdim 41239310Sdim // This instruction really occurs before first instruction 42239310Sdim // in the BB, so giving it no debug location. 43239310Sdim DebugLoc dl = DebugLoc(); 44239310Sdim 45288943Sdim // Emits 46288943Sdim // mov %SPL, %depot; 47288943Sdim // cvta.local %SP, %SPL; 48288943Sdim // for local address accesses in MF. 49288943Sdim bool Is64Bit = 50288943Sdim static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit(); 51288943Sdim unsigned CvtaLocalOpcode = 52288943Sdim (Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes); 53288943Sdim unsigned MovDepotOpcode = 54288943Sdim (Is64Bit ? NVPTX::MOV_DEPOT_ADDR_64 : NVPTX::MOV_DEPOT_ADDR); 55288943Sdim if (!MR.use_empty(NVPTX::VRFrame)) { 56288943Sdim // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL". 57288943Sdim MI = BuildMI(MBB, MI, dl, 58288943Sdim MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode), 59288943Sdim NVPTX::VRFrame) 60288943Sdim .addReg(NVPTX::VRFrameLocal); 61239310Sdim } 62288943Sdim BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode), 63288943Sdim NVPTX::VRFrameLocal) 64288943Sdim .addImm(MF.getFunctionNumber()); 65239310Sdim } 66239310Sdim} 67239310Sdim 68239310Sdimvoid NVPTXFrameLowering::emitEpilogue(MachineFunction &MF, 69249423Sdim MachineBasicBlock &MBB) const {} 70249423Sdim 71249423Sdim// This function eliminates ADJCALLSTACKDOWN, 72249423Sdim// ADJCALLSTACKUP pseudo instructions 73249423Sdimvoid NVPTXFrameLowering::eliminateCallFramePseudoInstr( 74249423Sdim MachineFunction &MF, MachineBasicBlock &MBB, 75249423Sdim MachineBasicBlock::iterator I) const { 76249423Sdim // Simply discard ADJCALLSTACKDOWN, 77249423Sdim // ADJCALLSTACKUP instructions. 78249423Sdim MBB.erase(I); 79239310Sdim} 80