MipsTargetMachine.cpp revision 221345
1133819Stjr//===-- MipsTargetMachine.cpp - Define TargetMachine for Mips -------------===//
2133819Stjr//
3133819Stjr//                     The LLVM Compiler Infrastructure
4133819Stjr//
5133819Stjr// This file is distributed under the University of Illinois Open Source
6276811Sdchagin// License. See LICENSE.TXT for details.
7133819Stjr//
8133819Stjr//===----------------------------------------------------------------------===//
9156875Sru//
10133819Stjr// Implements the info about Mips target spec.
11133819Stjr//
12133819Stjr//===----------------------------------------------------------------------===//
13143198Ssobomax
14133819Stjr#include "Mips.h"
15133819Stjr#include "MipsMCAsmInfo.h"
16133819Stjr#include "MipsTargetMachine.h"
17133819Stjr#include "llvm/PassManager.h"
18133819Stjr#include "llvm/Target/TargetRegistry.h"
19133819Stjrusing namespace llvm;
20133819Stjr
21143198Ssobomaxextern "C" void LLVMInitializeMipsTarget() {
22209581Skib  // Register the target.
23225618Skmacy  RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
24209581Skib  RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
25225618Skmacy  RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget);
26225618Skmacy  RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget);
27209581Skib}
28225618Skmacy
29209581Skib// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
30209581Skib// The stack is always 8 byte aligned
31209581Skib// On function prologue, the stack is created by decrementing
32209581Skib// its pointer. Once decremented, all references are done with positive
33209581Skib// offset from the stack/frame pointer, using StackGrowsUp enables
34209581Skib// an easier handling.
35209581Skib// Using CodeModel::Large enables different CALL behavior.
36209581SkibMipsTargetMachine::
37209581SkibMipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
38209581Skib                  bool isLittle=false):
39209581Skib  LLVMTargetMachine(T, TT),
40209581Skib  Subtarget(TT, FS, isLittle),
41209581Skib  DataLayout(isLittle ? std::string("e-p:32:32:32-i8:8:32-i16:16:32-n32") :
42209581Skib                        std::string("E-p:32:32:32-i8:8:32-i16:16:32-n32")),
43209581Skib  InstrInfo(*this),
44209581Skib  FrameLowering(Subtarget),
45209581Skib  TLInfo(*this), TSInfo(*this) {
46209581Skib  // Abicall enables PIC by default
47209581Skib  if (getRelocationModel() == Reloc::Default) {
48209581Skib    if (Subtarget.isABI_O32())
49209581Skib      setRelocationModel(Reloc::PIC_);
50209581Skib    else
51209581Skib      setRelocationModel(Reloc::Static);
52209581Skib  }
53209581Skib}
54209581Skib
55209581SkibMipselTargetMachine::
56209581SkibMipselTargetMachine(const Target &T, const std::string &TT,
57209581Skib                    const std::string &FS) :
58225618Skmacy  MipsTargetMachine(T, TT, FS, true) {}
59209581Skib
60209581Skib// Install an instruction selector pass using
61209581Skib// the ISelDag to gen Mips code.
62209581Skibbool MipsTargetMachine::
63225618SkmacyaddInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
64209581Skib{
65209581Skib  PM.add(createMipsISelDag(*this));
66209581Skib  return false;
67209581Skib}
68209581Skib
69209581Skib// Implemented by targets that want to run passes immediately before
70209581Skib// machine code is emitted. return true if -print-machineinstrs should
71209581Skib// print out the code after the passes.
72209581Skibbool MipsTargetMachine::
73225618SkmacyaddPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
74209581Skib{
75209581Skib  PM.add(createMipsDelaySlotFillerPass(*this));
76209581Skib  return true;
77209581Skib}
78209581Skib
79225618Skmacybool MipsTargetMachine::
80209581SkibaddPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
81209581Skib  PM.add(createMipsExpandPseudoPass(*this));
82225618Skmacy  return true;
83225618Skmacy}
84209581Skib