MipsMCTargetDesc.h revision 239462
159191Skris//===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
259191Skris//
359191Skris//                     The LLVM Compiler Infrastructure
459191Skris//
559191Skris// This file is distributed under the University of Illinois Open Source
659191Skris// License. See LICENSE.TXT for details.
759191Skris//
859191Skris//===----------------------------------------------------------------------===//
959191Skris//
1059191Skris// This file provides Mips specific target descriptions.
1159191Skris//
1259191Skris//===----------------------------------------------------------------------===//
1359191Skris
1459191Skris#ifndef MIPSMCTARGETDESC_H
1559191Skris#define MIPSMCTARGETDESC_H
1659191Skris
1759191Skris#include "llvm/Support/DataTypes.h"
1859191Skris
1959191Skrisnamespace llvm {
2059191Skrisclass MCAsmBackend;
2159191Skrisclass MCCodeEmitter;
2259191Skrisclass MCContext;
2359191Skrisclass MCInstrInfo;
2459191Skrisclass MCObjectWriter;
2559191Skrisclass MCRegisterInfo;
2659191Skrisclass MCSubtargetInfo;
2759191Skrisclass StringRef;
2859191Skrisclass Target;
2959191Skrisclass raw_ostream;
3059191Skris
3159191Skrisextern Target TheMipsTarget;
3259191Skrisextern Target TheMipselTarget;
3359191Skrisextern Target TheMips64Target;
3459191Skrisextern Target TheMips64elTarget;
3559191Skris
3659191SkrisMCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
3759191Skris                                         const MCRegisterInfo &MRI,
3859191Skris                                         const MCSubtargetInfo &STI,
3959191Skris                                         MCContext &Ctx);
4059191SkrisMCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
4159191Skris                                         const MCRegisterInfo &MRI,
4259191Skris                                         const MCSubtargetInfo &STI,
4359191Skris                                         MCContext &Ctx);
4459191Skris
4559191SkrisMCAsmBackend *createMipsAsmBackendEB32(const Target &T, StringRef TT);
4659191SkrisMCAsmBackend *createMipsAsmBackendEL32(const Target &T, StringRef TT);
4759191SkrisMCAsmBackend *createMipsAsmBackendEB64(const Target &T, StringRef TT);
4859191SkrisMCAsmBackend *createMipsAsmBackendEL64(const Target &T, StringRef TT);
4959191Skris
5059191SkrisMCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
5159191Skris                                          uint8_t OSABI,
5259191Skris                                          bool IsLittleEndian,
5359191Skris                                          bool Is64Bit);
5459191Skris} // End llvm namespace
5559191Skris
5659191Skris// Defines symbolic names for Mips registers.  This defines a mapping from
5759191Skris// register name to register number.
5859191Skris#define GET_REGINFO_ENUM
5959191Skris#include "MipsGenRegisterInfo.inc"
6059191Skris
6159191Skris// Defines symbolic names for the Mips instructions.
6259191Skris#define GET_INSTRINFO_ENUM
6359191Skris#include "MipsGenInstrInfo.inc"
6459191Skris
6559191Skris#define GET_SUBTARGETINFO_ENUM
6659191Skris#include "MipsGenSubtargetInfo.inc"
6759191Skris
6859191Skris#endif
6959191Skris