ARMMachineFunctionInfo.h revision 296417 
1//===-- ARMMachineFunctionInfo.h - ARM machine function info ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares ARM-specific per-machine-function information.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
15#define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
16
17#include "ARMSubtarget.h"
18#include "llvm/ADT/BitVector.h"
19#include "llvm/ADT/DenseMap.h"
20#include "llvm/CodeGen/MachineFunction.h"
21#include "llvm/Target/TargetMachine.h"
22#include "llvm/Target/TargetRegisterInfo.h"
23
24namespace llvm {
25
26/// ARMFunctionInfo - This class is derived from MachineFunctionInfo and
27/// contains private ARM-specific information for each MachineFunction.
28class ARMFunctionInfo : public MachineFunctionInfo {
29  virtual void anchor();
30
31  /// isThumb - True if this function is compiled under Thumb mode.
32  /// Used to initialized Align, so must precede it.
33  bool isThumb;
34
35  /// hasThumb2 - True if the target architecture supports Thumb2. Do not use
36  /// to determine if function is compiled under Thumb mode, for that use
37  /// 'isThumb'.
38  bool hasThumb2;
39
40  /// StByValParamsPadding - For parameter that is split between
41  /// GPRs and memory; while recovering GPRs part, when
42  /// StackAlignment > 4, and GPRs-part-size mod StackAlignment != 0,
43  /// we need to insert gap before parameter start address. It allows to
44  /// "attach" GPR-part to the part that was passed via stack.
45  unsigned StByValParamsPadding;
46
47  /// VarArgsRegSaveSize - Size of the register save area for vararg functions.
48  ///
49  unsigned ArgRegsSaveSize;
50
51  /// ReturnRegsCount - Number of registers used up in the return.
52  unsigned ReturnRegsCount;
53
54  /// HasStackFrame - True if this function has a stack frame. Set by
55  /// determineCalleeSaves().
56  bool HasStackFrame;
57
58  /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by
59  /// emitPrologue.
60  bool RestoreSPFromFP;
61
62  /// LRSpilledForFarJump - True if the LR register has been for spilled to
63  /// enable far jump.
64  bool LRSpilledForFarJump;
65
66  /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer
67  /// spill stack offset.
68  unsigned FramePtrSpillOffset;
69
70  /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved
71  /// register spills areas. For Mac OS X:
72  ///
73  /// GPR callee-saved (1) : r4, r5, r6, r7, lr
74  /// --------------------------------------------
75  /// GPR callee-saved (2) : r8, r10, r11
76  /// --------------------------------------------
77  /// DPR callee-saved : d8 - d15
78  ///
79  /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3.
80  /// Some may be spilled after the stack has been realigned.
81  unsigned GPRCS1Offset;
82  unsigned GPRCS2Offset;
83  unsigned DPRCSOffset;
84
85  /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills
86  /// areas.
87  unsigned GPRCS1Size;
88  unsigned GPRCS2Size;
89  unsigned DPRCSAlignGapSize;
90  unsigned DPRCSSize;
91
92  /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in
93  /// the aligned portion of the stack frame.  This is always a contiguous
94  /// sequence of D-registers starting from d8.
95  ///
96  /// We do not keep track of the frame indices used for these registers - they
97  /// behave like any other frame index in the aligned stack frame.  These
98  /// registers also aren't included in DPRCSSize above.
99  unsigned NumAlignedDPRCS2Regs;
100
101  unsigned PICLabelUId;
102
103  /// VarArgsFrameIndex - FrameIndex for start of varargs area.
104  int VarArgsFrameIndex;
105
106  /// HasITBlocks - True if IT blocks have been inserted.
107  bool HasITBlocks;
108
109  /// CPEClones - Track constant pool entries clones created by Constant Island
110  /// pass.
111  DenseMap<unsigned, unsigned> CPEClones;
112
113  /// ArgumentStackSize - amount of bytes on stack consumed by the arguments
114  /// being passed on the stack
115  unsigned ArgumentStackSize;
116
117  /// CoalescedWeights - mapping of basic blocks to the rolling counter of
118  /// coalesced weights.
119  DenseMap<const MachineBasicBlock*, unsigned> CoalescedWeights;
120
121  /// True if this function has a subset of CSRs that is handled explicitly via
122  /// copies.
123  bool IsSplitCSR;
124
125public:
126  ARMFunctionInfo() :
127    isThumb(false),
128    hasThumb2(false),
129    ArgRegsSaveSize(0), ReturnRegsCount(0), HasStackFrame(false),
130    RestoreSPFromFP(false),
131    LRSpilledForFarJump(false),
132    FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
133    GPRCS1Size(0), GPRCS2Size(0), DPRCSAlignGapSize(0), DPRCSSize(0),
134    NumAlignedDPRCS2Regs(0), PICLabelUId(0),
135    VarArgsFrameIndex(0), HasITBlocks(false), IsSplitCSR(false) {}
136
137  explicit ARMFunctionInfo(MachineFunction &MF);
138
139  bool isThumbFunction() const { return isThumb; }
140  bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
141  bool isThumb2Function() const { return isThumb && hasThumb2; }
142
143  unsigned getStoredByValParamsPadding() const { return StByValParamsPadding; }
144  void setStoredByValParamsPadding(unsigned p) { StByValParamsPadding = p; }
145
146  unsigned getArgRegsSaveSize() const { return ArgRegsSaveSize; }
147  void setArgRegsSaveSize(unsigned s) { ArgRegsSaveSize = s; }
148
149  unsigned getReturnRegsCount() const { return ReturnRegsCount; }
150  void setReturnRegsCount(unsigned s) { ReturnRegsCount = s; }
151
152  bool hasStackFrame() const { return HasStackFrame; }
153  void setHasStackFrame(bool s) { HasStackFrame = s; }
154
155  bool shouldRestoreSPFromFP() const { return RestoreSPFromFP; }
156  void setShouldRestoreSPFromFP(bool s) { RestoreSPFromFP = s; }
157
158  bool isLRSpilledForFarJump() const { return LRSpilledForFarJump; }
159  void setLRIsSpilledForFarJump(bool s) { LRSpilledForFarJump = s; }
160
161  unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; }
162  void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; }
163
164  unsigned getNumAlignedDPRCS2Regs() const { return NumAlignedDPRCS2Regs; }
165  void setNumAlignedDPRCS2Regs(unsigned n) { NumAlignedDPRCS2Regs = n; }
166
167  unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; }
168  unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; }
169  unsigned getDPRCalleeSavedAreaOffset()  const { return DPRCSOffset; }
170
171  void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; }
172  void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; }
173  void setDPRCalleeSavedAreaOffset(unsigned o)  { DPRCSOffset = o; }
174
175  unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; }
176  unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; }
177  unsigned getDPRCalleeSavedGapSize() const   { return DPRCSAlignGapSize; }
178  unsigned getDPRCalleeSavedAreaSize()  const { return DPRCSSize; }
179
180  void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; }
181  void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; }
182  void setDPRCalleeSavedGapSize(unsigned s)   { DPRCSAlignGapSize = s; }
183  void setDPRCalleeSavedAreaSize(unsigned s)  { DPRCSSize = s; }
184
185  unsigned getArgumentStackSize() const { return ArgumentStackSize; }
186  void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; }
187
188  void initPICLabelUId(unsigned UId) {
189    PICLabelUId = UId;
190  }
191
192  unsigned getNumPICLabels() const {
193    return PICLabelUId;
194  }
195
196  unsigned createPICLabelUId() {
197    return PICLabelUId++;
198  }
199
200  int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
201  void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
202
203  bool hasITBlocks() const { return HasITBlocks; }
204  void setHasITBlocks(bool h) { HasITBlocks = h; }
205
206  bool isSplitCSR() const { return IsSplitCSR; }
207  void setIsSplitCSR(bool s) { IsSplitCSR = s; }
208
209  void recordCPEClone(unsigned CPIdx, unsigned CPCloneIdx) {
210    if (!CPEClones.insert(std::make_pair(CPCloneIdx, CPIdx)).second)
211      llvm_unreachable("Duplicate entries!");
212  }
213
214  unsigned getOriginalCPIdx(unsigned CloneIdx) const {
215    DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx);
216    if (I != CPEClones.end())
217      return I->second;
218    else
219      return -1U;
220  }
221
222  DenseMap<const MachineBasicBlock*, unsigned>::iterator getCoalescedWeight(
223                                                  MachineBasicBlock* MBB) {
224    auto It = CoalescedWeights.find(MBB);
225    if (It == CoalescedWeights.end()) {
226      It = CoalescedWeights.insert(std::make_pair(MBB, 0)).first;
227    }
228    return It;
229  }
230};
231} // End llvm namespace
232
233#endif
234