SIDefines.h revision 296417
1193323Sed//===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed/// \file 9193323Sed//===----------------------------------------------------------------------===// 10193323Sed 11193323Sed#include "llvm/MC/MCInstrDesc.h" 12193323Sed 13193323Sed#ifndef LLVM_LIB_TARGET_R600_SIDEFINES_H 14193323Sed#define LLVM_LIB_TARGET_R600_SIDEFINES_H 15193323Sed 16193323Sednamespace SIInstrFlags { 17193323Sed// This needs to be kept in sync with the field bits in InstSI. 18193323Sedenum { 19193323Sed SALU = 1 << 3, 20193323Sed VALU = 1 << 4, 21193323Sed 22193323Sed SOP1 = 1 << 5, 23193323Sed SOP2 = 1 << 6, 24193323Sed SOPC = 1 << 7, 25193323Sed SOPK = 1 << 8, 26193323Sed SOPP = 1 << 9, 27193323Sed 28193323Sed VOP1 = 1 << 10, 29193323Sed VOP2 = 1 << 11, 30193323Sed VOP3 = 1 << 12, 31193323Sed VOPC = 1 << 13, 32218893Sdim 33205407Srdivacky MUBUF = 1 << 14, 34193323Sed MTBUF = 1 << 15, 35206083Srdivacky SMRD = 1 << 16, 36218893Sdim DS = 1 << 17, 37193323Sed MIMG = 1 << 18, 38204642Srdivacky FLAT = 1 << 19, 39204642Srdivacky WQM = 1 << 20, 40204642Srdivacky VGPRSpill = 1 << 21, 41204642Srdivacky VOPAsmPrefer32Bit = 1 << 22 42204642Srdivacky}; 43204642Srdivacky} 44204642Srdivacky 45204642Srdivackynamespace llvm { 46204642Srdivackynamespace AMDGPU { 47193323Sed enum OperandType { 48193323Sed /// Operand with register or 32-bit immediate 49193323Sed OPERAND_REG_IMM32 = llvm::MCOI::OPERAND_FIRST_TARGET, 50193323Sed /// Operand with register or inline constant 51193323Sed OPERAND_REG_INLINE_C 52193323Sed }; 53193323Sed} 54193323Sed} 55193323Sed 56193323Sednamespace SIInstrFlags { 57193323Sed enum Flags { 58193323Sed // First 4 bits are the instruction encoding 59193323Sed VM_CNT = 1 << 0, 60193323Sed EXP_CNT = 1 << 1, 61193323Sed LGKM_CNT = 1 << 2 62193323Sed }; 63193323Sed 64193323Sed // v_cmp_class_* etc. use a 10-bit mask for what operation is checked. 65193323Sed // The result is true if any of these tests are true. 66193323Sed enum ClassFlags { 67193323Sed S_NAN = 1 << 0, // Signaling NaN 68193323Sed Q_NAN = 1 << 1, // Quiet NaN 69218893Sdim N_INFINITY = 1 << 2, // Negative infinity 70193323Sed N_NORMAL = 1 << 3, // Negative normal 71218893Sdim N_SUBNORMAL = 1 << 4, // Negative subnormal 72193323Sed N_ZERO = 1 << 5, // Negative zero 73193323Sed P_ZERO = 1 << 6, // Positive zero 74193323Sed P_SUBNORMAL = 1 << 7, // Positive subnormal 75193323Sed P_NORMAL = 1 << 8, // Positive normal 76193323Sed P_INFINITY = 1 << 9 // Positive infinity 77193323Sed }; 78193323Sed} 79193323Sed 80193323Sednamespace SISrcMods { 81193323Sed enum { 82193323Sed NEG = 1 << 0, 83193323Sed ABS = 1 << 1 84193323Sed }; 85193323Sed} 86193323Sed 87193323Sednamespace SIOutMods { 88193323Sed enum { 89193323Sed NONE = 0, 90193323Sed MUL2 = 1, 91193323Sed MUL4 = 2, 92193323Sed DIV2 = 3 93193323Sed }; 94193323Sed} 95193323Sed 96198090Srdivacky#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 97198090Srdivacky#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C 98198090Srdivacky#define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8) 99198090Srdivacky#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 100198090Srdivacky#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 101198090Srdivacky#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 102193323Sed#define S_00B028_VGPRS(x) (((x) & 0x3F) << 0) 103193323Sed#define S_00B028_SGPRS(x) (((x) & 0x0F) << 6) 104193323Sed 105193323Sed#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C 106193323Sed#define S_00B84C_SCRATCH_EN(x) (((x) & 0x1) << 0) 107193323Sed#define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1) 108193323Sed#define C_00B84C_SCRATCH_EN 0xFFFFFFFE 109193323Sed#define S_00B84C_USER_SGPR(x) (((x) & 0x1F) << 1) 110193323Sed#define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F) 111193323Sed#define C_00B84C_USER_SGPR 0xFFFFFFC1 112193323Sed#define S_00B84C_TGID_X_EN(x) (((x) & 0x1) << 7) 113193323Sed#define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1) 114193323Sed#define C_00B84C_TGID_X_EN 0xFFFFFF7F 115193323Sed#define S_00B84C_TGID_Y_EN(x) (((x) & 0x1) << 8) 116193323Sed#define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1) 117193323Sed#define C_00B84C_TGID_Y_EN 0xFFFFFEFF 118193323Sed#define S_00B84C_TGID_Z_EN(x) (((x) & 0x1) << 9) 119193323Sed#define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1) 120193323Sed#define C_00B84C_TGID_Z_EN 0xFFFFFDFF 121193323Sed#define S_00B84C_TG_SIZE_EN(x) (((x) & 0x1) << 10) 122193323Sed#define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1) 123193323Sed#define C_00B84C_TG_SIZE_EN 0xFFFFFBFF 124193323Sed#define S_00B84C_TIDIG_COMP_CNT(x) (((x) & 0x03) << 11) 125193323Sed#define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03) 126193323Sed#define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF 127193323Sed/* CIK */ 128193323Sed#define S_00B84C_EXCP_EN_MSB(x) (((x) & 0x03) << 13) 129193323Sed#define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03) 130193323Sed#define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF 131193323Sed/* */ 132193323Sed#define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15) 133193323Sed#define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF) 134193323Sed#define C_00B84C_LDS_SIZE 0xFF007FFF 135193323Sed#define S_00B84C_EXCP_EN(x) (((x) & 0x7F) << 24) 136193323Sed#define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F) 137193323Sed#define C_00B84C_EXCP_EN 138193323Sed 139193323Sed#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC 140193323Sed#define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0 141193323Sed 142193323Sed#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 143212904Sdim#define S_00B848_VGPRS(x) (((x) & 0x3F) << 0) 144193323Sed#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) 145193323Sed#define C_00B848_VGPRS 0xFFFFFFC0 146193323Sed#define S_00B848_SGPRS(x) (((x) & 0x0F) << 6) 147193323Sed#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F) 148193323Sed#define C_00B848_SGPRS 0xFFFFFC3F 149193323Sed#define S_00B848_PRIORITY(x) (((x) & 0x03) << 10) 150193323Sed#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03) 151193323Sed#define C_00B848_PRIORITY 0xFFFFF3FF 152193323Sed#define S_00B848_FLOAT_MODE(x) (((x) & 0xFF) << 12) 153198090Srdivacky#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) 154198090Srdivacky#define C_00B848_FLOAT_MODE 0xFFF00FFF 155198090Srdivacky#define S_00B848_PRIV(x) (((x) & 0x1) << 20) 156198090Srdivacky#define G_00B848_PRIV(x) (((x) >> 20) & 0x1) 157198090Srdivacky#define C_00B848_PRIV 0xFFEFFFFF 158198090Srdivacky#define S_00B848_DX10_CLAMP(x) (((x) & 0x1) << 21) 159198090Srdivacky#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) 160198090Srdivacky#define C_00B848_DX10_CLAMP 0xFFDFFFFF 161193323Sed#define S_00B848_DEBUG_MODE(x) (((x) & 0x1) << 22) 162193323Sed#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) 163193323Sed#define C_00B848_DEBUG_MODE 0xFFBFFFFF 164193323Sed#define S_00B848_IEEE_MODE(x) (((x) & 0x1) << 23) 165193323Sed#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) 166193323Sed#define C_00B848_IEEE_MODE 0xFF7FFFFF 167193323Sed 168193323Sed 169193323Sed// Helpers for setting FLOAT_MODE 170193323Sed#define FP_ROUND_ROUND_TO_NEAREST 0 171193323Sed#define FP_ROUND_ROUND_TO_INF 1 172193323Sed#define FP_ROUND_ROUND_TO_NEGINF 2 173193323Sed#define FP_ROUND_ROUND_TO_ZERO 3 174193323Sed 175193323Sed// Bits 3:0 control rounding mode. 1:0 control single precision, 3:2 double 176193323Sed// precision. 177193323Sed#define FP_ROUND_MODE_SP(x) ((x) & 0x3) 178193323Sed#define FP_ROUND_MODE_DP(x) (((x) & 0x3) << 2) 179193323Sed 180193323Sed#define FP_DENORM_FLUSH_IN_FLUSH_OUT 0 181193323Sed#define FP_DENORM_FLUSH_OUT 1 182193323Sed#define FP_DENORM_FLUSH_IN 2 183193323Sed#define FP_DENORM_FLUSH_NONE 3 184193323Sed 185193323Sed 186193323Sed// Bits 7:4 control denormal handling. 5:4 control single precision, 6:7 double 187193323Sed// precision. 188204642Srdivacky#define FP_DENORM_MODE_SP(x) (((x) & 0x3) << 4) 189204642Srdivacky#define FP_DENORM_MODE_DP(x) (((x) & 0x3) << 6) 190204642Srdivacky 191204642Srdivacky#define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 192204642Srdivacky#define S_00B860_WAVESIZE(x) (((x) & 0x1FFF) << 12) 193204642Srdivacky 194204642Srdivacky#define R_0286E8_SPI_TMPRING_SIZE 0x0286E8 195204642Srdivacky#define S_0286E8_WAVESIZE(x) (((x) & 0x1FFF) << 12) 196204642Srdivacky 197193323Sed 198193323Sed#endif 199193323Sed