AArch64BaseInfo.cpp revision 280031
1249259Sdim//===-- AArch64BaseInfo.cpp - AArch64 Base encoding information------------===// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim//===----------------------------------------------------------------------===// 9249259Sdim// 10249259Sdim// This file provides basic encoding and assembly information for AArch64. 11249259Sdim// 12249259Sdim//===----------------------------------------------------------------------===// 13249259Sdim#include "AArch64BaseInfo.h" 14249259Sdim#include "llvm/ADT/APFloat.h" 15249259Sdim#include "llvm/ADT/SmallVector.h" 16249259Sdim#include "llvm/ADT/StringExtras.h" 17249259Sdim#include "llvm/Support/Regex.h" 18249259Sdim 19249259Sdimusing namespace llvm; 20249259Sdim 21276479SdimStringRef AArch64NamedImmMapper::toString(uint32_t Value, bool &Valid) const { 22249259Sdim for (unsigned i = 0; i < NumPairs; ++i) { 23249259Sdim if (Pairs[i].Value == Value) { 24249259Sdim Valid = true; 25249259Sdim return Pairs[i].Name; 26249259Sdim } 27249259Sdim } 28249259Sdim 29249259Sdim Valid = false; 30249259Sdim return StringRef(); 31249259Sdim} 32249259Sdim 33276479Sdimuint32_t AArch64NamedImmMapper::fromString(StringRef Name, bool &Valid) const { 34249259Sdim std::string LowerCaseName = Name.lower(); 35249259Sdim for (unsigned i = 0; i < NumPairs; ++i) { 36249259Sdim if (Pairs[i].Name == LowerCaseName) { 37249259Sdim Valid = true; 38249259Sdim return Pairs[i].Value; 39249259Sdim } 40249259Sdim } 41249259Sdim 42249259Sdim Valid = false; 43249259Sdim return -1; 44249259Sdim} 45249259Sdim 46276479Sdimbool AArch64NamedImmMapper::validImm(uint32_t Value) const { 47249259Sdim return Value < TooBigImm; 48249259Sdim} 49249259Sdim 50276479Sdimconst AArch64NamedImmMapper::Mapping AArch64AT::ATMapper::ATPairs[] = { 51249259Sdim {"s1e1r", S1E1R}, 52249259Sdim {"s1e2r", S1E2R}, 53249259Sdim {"s1e3r", S1E3R}, 54249259Sdim {"s1e1w", S1E1W}, 55249259Sdim {"s1e2w", S1E2W}, 56249259Sdim {"s1e3w", S1E3W}, 57249259Sdim {"s1e0r", S1E0R}, 58249259Sdim {"s1e0w", S1E0W}, 59249259Sdim {"s12e1r", S12E1R}, 60249259Sdim {"s12e1w", S12E1W}, 61249259Sdim {"s12e0r", S12E0R}, 62249259Sdim {"s12e0w", S12E0W}, 63249259Sdim}; 64249259Sdim 65276479SdimAArch64AT::ATMapper::ATMapper() 66276479Sdim : AArch64NamedImmMapper(ATPairs, 0) {} 67249259Sdim 68276479Sdimconst AArch64NamedImmMapper::Mapping AArch64DB::DBarrierMapper::DBarrierPairs[] = { 69249259Sdim {"oshld", OSHLD}, 70249259Sdim {"oshst", OSHST}, 71249259Sdim {"osh", OSH}, 72249259Sdim {"nshld", NSHLD}, 73249259Sdim {"nshst", NSHST}, 74249259Sdim {"nsh", NSH}, 75249259Sdim {"ishld", ISHLD}, 76249259Sdim {"ishst", ISHST}, 77249259Sdim {"ish", ISH}, 78249259Sdim {"ld", LD}, 79249259Sdim {"st", ST}, 80249259Sdim {"sy", SY} 81249259Sdim}; 82249259Sdim 83276479SdimAArch64DB::DBarrierMapper::DBarrierMapper() 84276479Sdim : AArch64NamedImmMapper(DBarrierPairs, 16u) {} 85249259Sdim 86276479Sdimconst AArch64NamedImmMapper::Mapping AArch64DC::DCMapper::DCPairs[] = { 87249259Sdim {"zva", ZVA}, 88249259Sdim {"ivac", IVAC}, 89249259Sdim {"isw", ISW}, 90249259Sdim {"cvac", CVAC}, 91249259Sdim {"csw", CSW}, 92249259Sdim {"cvau", CVAU}, 93249259Sdim {"civac", CIVAC}, 94249259Sdim {"cisw", CISW} 95249259Sdim}; 96249259Sdim 97276479SdimAArch64DC::DCMapper::DCMapper() 98276479Sdim : AArch64NamedImmMapper(DCPairs, 0) {} 99249259Sdim 100276479Sdimconst AArch64NamedImmMapper::Mapping AArch64IC::ICMapper::ICPairs[] = { 101249259Sdim {"ialluis", IALLUIS}, 102249259Sdim {"iallu", IALLU}, 103249259Sdim {"ivau", IVAU} 104249259Sdim}; 105249259Sdim 106276479SdimAArch64IC::ICMapper::ICMapper() 107276479Sdim : AArch64NamedImmMapper(ICPairs, 0) {} 108249259Sdim 109276479Sdimconst AArch64NamedImmMapper::Mapping AArch64ISB::ISBMapper::ISBPairs[] = { 110249259Sdim {"sy", SY}, 111249259Sdim}; 112249259Sdim 113276479SdimAArch64ISB::ISBMapper::ISBMapper() 114276479Sdim : AArch64NamedImmMapper(ISBPairs, 16) {} 115249259Sdim 116276479Sdimconst AArch64NamedImmMapper::Mapping AArch64PRFM::PRFMMapper::PRFMPairs[] = { 117249259Sdim {"pldl1keep", PLDL1KEEP}, 118249259Sdim {"pldl1strm", PLDL1STRM}, 119249259Sdim {"pldl2keep", PLDL2KEEP}, 120249259Sdim {"pldl2strm", PLDL2STRM}, 121249259Sdim {"pldl3keep", PLDL3KEEP}, 122249259Sdim {"pldl3strm", PLDL3STRM}, 123249259Sdim {"plil1keep", PLIL1KEEP}, 124249259Sdim {"plil1strm", PLIL1STRM}, 125249259Sdim {"plil2keep", PLIL2KEEP}, 126249259Sdim {"plil2strm", PLIL2STRM}, 127249259Sdim {"plil3keep", PLIL3KEEP}, 128249259Sdim {"plil3strm", PLIL3STRM}, 129249259Sdim {"pstl1keep", PSTL1KEEP}, 130249259Sdim {"pstl1strm", PSTL1STRM}, 131249259Sdim {"pstl2keep", PSTL2KEEP}, 132249259Sdim {"pstl2strm", PSTL2STRM}, 133249259Sdim {"pstl3keep", PSTL3KEEP}, 134249259Sdim {"pstl3strm", PSTL3STRM} 135249259Sdim}; 136249259Sdim 137276479SdimAArch64PRFM::PRFMMapper::PRFMMapper() 138276479Sdim : AArch64NamedImmMapper(PRFMPairs, 32) {} 139249259Sdim 140276479Sdimconst AArch64NamedImmMapper::Mapping AArch64PState::PStateMapper::PStatePairs[] = { 141249259Sdim {"spsel", SPSel}, 142249259Sdim {"daifset", DAIFSet}, 143249259Sdim {"daifclr", DAIFClr} 144249259Sdim}; 145249259Sdim 146276479SdimAArch64PState::PStateMapper::PStateMapper() 147276479Sdim : AArch64NamedImmMapper(PStatePairs, 0) {} 148249259Sdim 149276479Sdimconst AArch64NamedImmMapper::Mapping AArch64SysReg::MRSMapper::MRSPairs[] = { 150249259Sdim {"mdccsr_el0", MDCCSR_EL0}, 151249259Sdim {"dbgdtrrx_el0", DBGDTRRX_EL0}, 152249259Sdim {"mdrar_el1", MDRAR_EL1}, 153249259Sdim {"oslsr_el1", OSLSR_EL1}, 154249259Sdim {"dbgauthstatus_el1", DBGAUTHSTATUS_EL1}, 155249259Sdim {"pmceid0_el0", PMCEID0_EL0}, 156249259Sdim {"pmceid1_el0", PMCEID1_EL0}, 157249259Sdim {"midr_el1", MIDR_EL1}, 158249259Sdim {"ccsidr_el1", CCSIDR_EL1}, 159249259Sdim {"clidr_el1", CLIDR_EL1}, 160249259Sdim {"ctr_el0", CTR_EL0}, 161249259Sdim {"mpidr_el1", MPIDR_EL1}, 162249259Sdim {"revidr_el1", REVIDR_EL1}, 163249259Sdim {"aidr_el1", AIDR_EL1}, 164249259Sdim {"dczid_el0", DCZID_EL0}, 165249259Sdim {"id_pfr0_el1", ID_PFR0_EL1}, 166249259Sdim {"id_pfr1_el1", ID_PFR1_EL1}, 167249259Sdim {"id_dfr0_el1", ID_DFR0_EL1}, 168249259Sdim {"id_afr0_el1", ID_AFR0_EL1}, 169249259Sdim {"id_mmfr0_el1", ID_MMFR0_EL1}, 170249259Sdim {"id_mmfr1_el1", ID_MMFR1_EL1}, 171249259Sdim {"id_mmfr2_el1", ID_MMFR2_EL1}, 172249259Sdim {"id_mmfr3_el1", ID_MMFR3_EL1}, 173249259Sdim {"id_isar0_el1", ID_ISAR0_EL1}, 174249259Sdim {"id_isar1_el1", ID_ISAR1_EL1}, 175249259Sdim {"id_isar2_el1", ID_ISAR2_EL1}, 176249259Sdim {"id_isar3_el1", ID_ISAR3_EL1}, 177249259Sdim {"id_isar4_el1", ID_ISAR4_EL1}, 178249259Sdim {"id_isar5_el1", ID_ISAR5_EL1}, 179276479Sdim {"id_aa64pfr0_el1", ID_A64PFR0_EL1}, 180276479Sdim {"id_aa64pfr1_el1", ID_A64PFR1_EL1}, 181276479Sdim {"id_aa64dfr0_el1", ID_A64DFR0_EL1}, 182276479Sdim {"id_aa64dfr1_el1", ID_A64DFR1_EL1}, 183276479Sdim {"id_aa64afr0_el1", ID_A64AFR0_EL1}, 184276479Sdim {"id_aa64afr1_el1", ID_A64AFR1_EL1}, 185276479Sdim {"id_aa64isar0_el1", ID_A64ISAR0_EL1}, 186276479Sdim {"id_aa64isar1_el1", ID_A64ISAR1_EL1}, 187276479Sdim {"id_aa64mmfr0_el1", ID_A64MMFR0_EL1}, 188276479Sdim {"id_aa64mmfr1_el1", ID_A64MMFR1_EL1}, 189249259Sdim {"mvfr0_el1", MVFR0_EL1}, 190249259Sdim {"mvfr1_el1", MVFR1_EL1}, 191249259Sdim {"mvfr2_el1", MVFR2_EL1}, 192249259Sdim {"rvbar_el1", RVBAR_EL1}, 193249259Sdim {"rvbar_el2", RVBAR_EL2}, 194249259Sdim {"rvbar_el3", RVBAR_EL3}, 195249259Sdim {"isr_el1", ISR_EL1}, 196249259Sdim {"cntpct_el0", CNTPCT_EL0}, 197249259Sdim {"cntvct_el0", CNTVCT_EL0}, 198249259Sdim 199249259Sdim // Trace registers 200249259Sdim {"trcstatr", TRCSTATR}, 201249259Sdim {"trcidr8", TRCIDR8}, 202249259Sdim {"trcidr9", TRCIDR9}, 203249259Sdim {"trcidr10", TRCIDR10}, 204249259Sdim {"trcidr11", TRCIDR11}, 205249259Sdim {"trcidr12", TRCIDR12}, 206249259Sdim {"trcidr13", TRCIDR13}, 207249259Sdim {"trcidr0", TRCIDR0}, 208249259Sdim {"trcidr1", TRCIDR1}, 209249259Sdim {"trcidr2", TRCIDR2}, 210249259Sdim {"trcidr3", TRCIDR3}, 211249259Sdim {"trcidr4", TRCIDR4}, 212249259Sdim {"trcidr5", TRCIDR5}, 213249259Sdim {"trcidr6", TRCIDR6}, 214249259Sdim {"trcidr7", TRCIDR7}, 215249259Sdim {"trcoslsr", TRCOSLSR}, 216249259Sdim {"trcpdsr", TRCPDSR}, 217249259Sdim {"trcdevaff0", TRCDEVAFF0}, 218249259Sdim {"trcdevaff1", TRCDEVAFF1}, 219249259Sdim {"trclsr", TRCLSR}, 220249259Sdim {"trcauthstatus", TRCAUTHSTATUS}, 221249259Sdim {"trcdevarch", TRCDEVARCH}, 222249259Sdim {"trcdevid", TRCDEVID}, 223249259Sdim {"trcdevtype", TRCDEVTYPE}, 224249259Sdim {"trcpidr4", TRCPIDR4}, 225249259Sdim {"trcpidr5", TRCPIDR5}, 226249259Sdim {"trcpidr6", TRCPIDR6}, 227249259Sdim {"trcpidr7", TRCPIDR7}, 228249259Sdim {"trcpidr0", TRCPIDR0}, 229249259Sdim {"trcpidr1", TRCPIDR1}, 230249259Sdim {"trcpidr2", TRCPIDR2}, 231249259Sdim {"trcpidr3", TRCPIDR3}, 232249259Sdim {"trccidr0", TRCCIDR0}, 233249259Sdim {"trccidr1", TRCCIDR1}, 234249259Sdim {"trccidr2", TRCCIDR2}, 235249259Sdim {"trccidr3", TRCCIDR3}, 236249259Sdim 237249259Sdim // GICv3 registers 238249259Sdim {"icc_iar1_el1", ICC_IAR1_EL1}, 239249259Sdim {"icc_iar0_el1", ICC_IAR0_EL1}, 240249259Sdim {"icc_hppir1_el1", ICC_HPPIR1_EL1}, 241249259Sdim {"icc_hppir0_el1", ICC_HPPIR0_EL1}, 242249259Sdim {"icc_rpr_el1", ICC_RPR_EL1}, 243249259Sdim {"ich_vtr_el2", ICH_VTR_EL2}, 244249259Sdim {"ich_eisr_el2", ICH_EISR_EL2}, 245249259Sdim {"ich_elsr_el2", ICH_ELSR_EL2} 246249259Sdim}; 247249259Sdim 248276479SdimAArch64SysReg::MRSMapper::MRSMapper(uint64_t FeatureBits) 249276479Sdim : SysRegMapper(FeatureBits) { 250249259Sdim InstPairs = &MRSPairs[0]; 251249259Sdim NumInstPairs = llvm::array_lengthof(MRSPairs); 252249259Sdim} 253249259Sdim 254276479Sdimconst AArch64NamedImmMapper::Mapping AArch64SysReg::MSRMapper::MSRPairs[] = { 255249259Sdim {"dbgdtrtx_el0", DBGDTRTX_EL0}, 256249259Sdim {"oslar_el1", OSLAR_EL1}, 257249259Sdim {"pmswinc_el0", PMSWINC_EL0}, 258249259Sdim 259249259Sdim // Trace registers 260249259Sdim {"trcoslar", TRCOSLAR}, 261249259Sdim {"trclar", TRCLAR}, 262249259Sdim 263249259Sdim // GICv3 registers 264249259Sdim {"icc_eoir1_el1", ICC_EOIR1_EL1}, 265249259Sdim {"icc_eoir0_el1", ICC_EOIR0_EL1}, 266249259Sdim {"icc_dir_el1", ICC_DIR_EL1}, 267249259Sdim {"icc_sgi1r_el1", ICC_SGI1R_EL1}, 268249259Sdim {"icc_asgi1r_el1", ICC_ASGI1R_EL1}, 269249259Sdim {"icc_sgi0r_el1", ICC_SGI0R_EL1} 270249259Sdim}; 271249259Sdim 272276479SdimAArch64SysReg::MSRMapper::MSRMapper(uint64_t FeatureBits) 273276479Sdim : SysRegMapper(FeatureBits) { 274249259Sdim InstPairs = &MSRPairs[0]; 275249259Sdim NumInstPairs = llvm::array_lengthof(MSRPairs); 276249259Sdim} 277249259Sdim 278249259Sdim 279276479Sdimconst AArch64NamedImmMapper::Mapping AArch64SysReg::SysRegMapper::SysRegPairs[] = { 280249259Sdim {"osdtrrx_el1", OSDTRRX_EL1}, 281249259Sdim {"osdtrtx_el1", OSDTRTX_EL1}, 282249259Sdim {"teecr32_el1", TEECR32_EL1}, 283249259Sdim {"mdccint_el1", MDCCINT_EL1}, 284249259Sdim {"mdscr_el1", MDSCR_EL1}, 285249259Sdim {"dbgdtr_el0", DBGDTR_EL0}, 286249259Sdim {"oseccr_el1", OSECCR_EL1}, 287249259Sdim {"dbgvcr32_el2", DBGVCR32_EL2}, 288249259Sdim {"dbgbvr0_el1", DBGBVR0_EL1}, 289249259Sdim {"dbgbvr1_el1", DBGBVR1_EL1}, 290249259Sdim {"dbgbvr2_el1", DBGBVR2_EL1}, 291249259Sdim {"dbgbvr3_el1", DBGBVR3_EL1}, 292249259Sdim {"dbgbvr4_el1", DBGBVR4_EL1}, 293249259Sdim {"dbgbvr5_el1", DBGBVR5_EL1}, 294249259Sdim {"dbgbvr6_el1", DBGBVR6_EL1}, 295249259Sdim {"dbgbvr7_el1", DBGBVR7_EL1}, 296249259Sdim {"dbgbvr8_el1", DBGBVR8_EL1}, 297249259Sdim {"dbgbvr9_el1", DBGBVR9_EL1}, 298249259Sdim {"dbgbvr10_el1", DBGBVR10_EL1}, 299249259Sdim {"dbgbvr11_el1", DBGBVR11_EL1}, 300249259Sdim {"dbgbvr12_el1", DBGBVR12_EL1}, 301249259Sdim {"dbgbvr13_el1", DBGBVR13_EL1}, 302249259Sdim {"dbgbvr14_el1", DBGBVR14_EL1}, 303249259Sdim {"dbgbvr15_el1", DBGBVR15_EL1}, 304249259Sdim {"dbgbcr0_el1", DBGBCR0_EL1}, 305249259Sdim {"dbgbcr1_el1", DBGBCR1_EL1}, 306249259Sdim {"dbgbcr2_el1", DBGBCR2_EL1}, 307249259Sdim {"dbgbcr3_el1", DBGBCR3_EL1}, 308249259Sdim {"dbgbcr4_el1", DBGBCR4_EL1}, 309249259Sdim {"dbgbcr5_el1", DBGBCR5_EL1}, 310249259Sdim {"dbgbcr6_el1", DBGBCR6_EL1}, 311249259Sdim {"dbgbcr7_el1", DBGBCR7_EL1}, 312249259Sdim {"dbgbcr8_el1", DBGBCR8_EL1}, 313249259Sdim {"dbgbcr9_el1", DBGBCR9_EL1}, 314249259Sdim {"dbgbcr10_el1", DBGBCR10_EL1}, 315249259Sdim {"dbgbcr11_el1", DBGBCR11_EL1}, 316249259Sdim {"dbgbcr12_el1", DBGBCR12_EL1}, 317249259Sdim {"dbgbcr13_el1", DBGBCR13_EL1}, 318249259Sdim {"dbgbcr14_el1", DBGBCR14_EL1}, 319249259Sdim {"dbgbcr15_el1", DBGBCR15_EL1}, 320249259Sdim {"dbgwvr0_el1", DBGWVR0_EL1}, 321249259Sdim {"dbgwvr1_el1", DBGWVR1_EL1}, 322249259Sdim {"dbgwvr2_el1", DBGWVR2_EL1}, 323249259Sdim {"dbgwvr3_el1", DBGWVR3_EL1}, 324249259Sdim {"dbgwvr4_el1", DBGWVR4_EL1}, 325249259Sdim {"dbgwvr5_el1", DBGWVR5_EL1}, 326249259Sdim {"dbgwvr6_el1", DBGWVR6_EL1}, 327249259Sdim {"dbgwvr7_el1", DBGWVR7_EL1}, 328249259Sdim {"dbgwvr8_el1", DBGWVR8_EL1}, 329249259Sdim {"dbgwvr9_el1", DBGWVR9_EL1}, 330249259Sdim {"dbgwvr10_el1", DBGWVR10_EL1}, 331249259Sdim {"dbgwvr11_el1", DBGWVR11_EL1}, 332249259Sdim {"dbgwvr12_el1", DBGWVR12_EL1}, 333249259Sdim {"dbgwvr13_el1", DBGWVR13_EL1}, 334249259Sdim {"dbgwvr14_el1", DBGWVR14_EL1}, 335249259Sdim {"dbgwvr15_el1", DBGWVR15_EL1}, 336249259Sdim {"dbgwcr0_el1", DBGWCR0_EL1}, 337249259Sdim {"dbgwcr1_el1", DBGWCR1_EL1}, 338249259Sdim {"dbgwcr2_el1", DBGWCR2_EL1}, 339249259Sdim {"dbgwcr3_el1", DBGWCR3_EL1}, 340249259Sdim {"dbgwcr4_el1", DBGWCR4_EL1}, 341249259Sdim {"dbgwcr5_el1", DBGWCR5_EL1}, 342249259Sdim {"dbgwcr6_el1", DBGWCR6_EL1}, 343249259Sdim {"dbgwcr7_el1", DBGWCR7_EL1}, 344249259Sdim {"dbgwcr8_el1", DBGWCR8_EL1}, 345249259Sdim {"dbgwcr9_el1", DBGWCR9_EL1}, 346249259Sdim {"dbgwcr10_el1", DBGWCR10_EL1}, 347249259Sdim {"dbgwcr11_el1", DBGWCR11_EL1}, 348249259Sdim {"dbgwcr12_el1", DBGWCR12_EL1}, 349249259Sdim {"dbgwcr13_el1", DBGWCR13_EL1}, 350249259Sdim {"dbgwcr14_el1", DBGWCR14_EL1}, 351249259Sdim {"dbgwcr15_el1", DBGWCR15_EL1}, 352249259Sdim {"teehbr32_el1", TEEHBR32_EL1}, 353249259Sdim {"osdlr_el1", OSDLR_EL1}, 354249259Sdim {"dbgprcr_el1", DBGPRCR_EL1}, 355249259Sdim {"dbgclaimset_el1", DBGCLAIMSET_EL1}, 356249259Sdim {"dbgclaimclr_el1", DBGCLAIMCLR_EL1}, 357249259Sdim {"csselr_el1", CSSELR_EL1}, 358249259Sdim {"vpidr_el2", VPIDR_EL2}, 359249259Sdim {"vmpidr_el2", VMPIDR_EL2}, 360249259Sdim {"sctlr_el1", SCTLR_EL1}, 361249259Sdim {"sctlr_el2", SCTLR_EL2}, 362249259Sdim {"sctlr_el3", SCTLR_EL3}, 363249259Sdim {"actlr_el1", ACTLR_EL1}, 364249259Sdim {"actlr_el2", ACTLR_EL2}, 365249259Sdim {"actlr_el3", ACTLR_EL3}, 366249259Sdim {"cpacr_el1", CPACR_EL1}, 367249259Sdim {"hcr_el2", HCR_EL2}, 368249259Sdim {"scr_el3", SCR_EL3}, 369249259Sdim {"mdcr_el2", MDCR_EL2}, 370249259Sdim {"sder32_el3", SDER32_EL3}, 371249259Sdim {"cptr_el2", CPTR_EL2}, 372249259Sdim {"cptr_el3", CPTR_EL3}, 373249259Sdim {"hstr_el2", HSTR_EL2}, 374249259Sdim {"hacr_el2", HACR_EL2}, 375249259Sdim {"mdcr_el3", MDCR_EL3}, 376249259Sdim {"ttbr0_el1", TTBR0_EL1}, 377249259Sdim {"ttbr0_el2", TTBR0_EL2}, 378249259Sdim {"ttbr0_el3", TTBR0_EL3}, 379249259Sdim {"ttbr1_el1", TTBR1_EL1}, 380249259Sdim {"tcr_el1", TCR_EL1}, 381249259Sdim {"tcr_el2", TCR_EL2}, 382249259Sdim {"tcr_el3", TCR_EL3}, 383249259Sdim {"vttbr_el2", VTTBR_EL2}, 384249259Sdim {"vtcr_el2", VTCR_EL2}, 385249259Sdim {"dacr32_el2", DACR32_EL2}, 386249259Sdim {"spsr_el1", SPSR_EL1}, 387249259Sdim {"spsr_el2", SPSR_EL2}, 388249259Sdim {"spsr_el3", SPSR_EL3}, 389249259Sdim {"elr_el1", ELR_EL1}, 390249259Sdim {"elr_el2", ELR_EL2}, 391249259Sdim {"elr_el3", ELR_EL3}, 392249259Sdim {"sp_el0", SP_EL0}, 393249259Sdim {"sp_el1", SP_EL1}, 394249259Sdim {"sp_el2", SP_EL2}, 395249259Sdim {"spsel", SPSel}, 396249259Sdim {"nzcv", NZCV}, 397249259Sdim {"daif", DAIF}, 398249259Sdim {"currentel", CurrentEL}, 399249259Sdim {"spsr_irq", SPSR_irq}, 400249259Sdim {"spsr_abt", SPSR_abt}, 401249259Sdim {"spsr_und", SPSR_und}, 402249259Sdim {"spsr_fiq", SPSR_fiq}, 403249259Sdim {"fpcr", FPCR}, 404249259Sdim {"fpsr", FPSR}, 405249259Sdim {"dspsr_el0", DSPSR_EL0}, 406249259Sdim {"dlr_el0", DLR_EL0}, 407249259Sdim {"ifsr32_el2", IFSR32_EL2}, 408249259Sdim {"afsr0_el1", AFSR0_EL1}, 409249259Sdim {"afsr0_el2", AFSR0_EL2}, 410249259Sdim {"afsr0_el3", AFSR0_EL3}, 411249259Sdim {"afsr1_el1", AFSR1_EL1}, 412249259Sdim {"afsr1_el2", AFSR1_EL2}, 413249259Sdim {"afsr1_el3", AFSR1_EL3}, 414249259Sdim {"esr_el1", ESR_EL1}, 415249259Sdim {"esr_el2", ESR_EL2}, 416249259Sdim {"esr_el3", ESR_EL3}, 417249259Sdim {"fpexc32_el2", FPEXC32_EL2}, 418249259Sdim {"far_el1", FAR_EL1}, 419249259Sdim {"far_el2", FAR_EL2}, 420249259Sdim {"far_el3", FAR_EL3}, 421249259Sdim {"hpfar_el2", HPFAR_EL2}, 422249259Sdim {"par_el1", PAR_EL1}, 423249259Sdim {"pmcr_el0", PMCR_EL0}, 424249259Sdim {"pmcntenset_el0", PMCNTENSET_EL0}, 425249259Sdim {"pmcntenclr_el0", PMCNTENCLR_EL0}, 426249259Sdim {"pmovsclr_el0", PMOVSCLR_EL0}, 427249259Sdim {"pmselr_el0", PMSELR_EL0}, 428249259Sdim {"pmccntr_el0", PMCCNTR_EL0}, 429249259Sdim {"pmxevtyper_el0", PMXEVTYPER_EL0}, 430249259Sdim {"pmxevcntr_el0", PMXEVCNTR_EL0}, 431249259Sdim {"pmuserenr_el0", PMUSERENR_EL0}, 432249259Sdim {"pmintenset_el1", PMINTENSET_EL1}, 433249259Sdim {"pmintenclr_el1", PMINTENCLR_EL1}, 434249259Sdim {"pmovsset_el0", PMOVSSET_EL0}, 435249259Sdim {"mair_el1", MAIR_EL1}, 436249259Sdim {"mair_el2", MAIR_EL2}, 437249259Sdim {"mair_el3", MAIR_EL3}, 438249259Sdim {"amair_el1", AMAIR_EL1}, 439249259Sdim {"amair_el2", AMAIR_EL2}, 440249259Sdim {"amair_el3", AMAIR_EL3}, 441249259Sdim {"vbar_el1", VBAR_EL1}, 442249259Sdim {"vbar_el2", VBAR_EL2}, 443249259Sdim {"vbar_el3", VBAR_EL3}, 444249259Sdim {"rmr_el1", RMR_EL1}, 445249259Sdim {"rmr_el2", RMR_EL2}, 446249259Sdim {"rmr_el3", RMR_EL3}, 447249259Sdim {"contextidr_el1", CONTEXTIDR_EL1}, 448249259Sdim {"tpidr_el0", TPIDR_EL0}, 449249259Sdim {"tpidr_el2", TPIDR_EL2}, 450249259Sdim {"tpidr_el3", TPIDR_EL3}, 451249259Sdim {"tpidrro_el0", TPIDRRO_EL0}, 452249259Sdim {"tpidr_el1", TPIDR_EL1}, 453249259Sdim {"cntfrq_el0", CNTFRQ_EL0}, 454249259Sdim {"cntvoff_el2", CNTVOFF_EL2}, 455249259Sdim {"cntkctl_el1", CNTKCTL_EL1}, 456249259Sdim {"cnthctl_el2", CNTHCTL_EL2}, 457249259Sdim {"cntp_tval_el0", CNTP_TVAL_EL0}, 458249259Sdim {"cnthp_tval_el2", CNTHP_TVAL_EL2}, 459249259Sdim {"cntps_tval_el1", CNTPS_TVAL_EL1}, 460249259Sdim {"cntp_ctl_el0", CNTP_CTL_EL0}, 461249259Sdim {"cnthp_ctl_el2", CNTHP_CTL_EL2}, 462249259Sdim {"cntps_ctl_el1", CNTPS_CTL_EL1}, 463249259Sdim {"cntp_cval_el0", CNTP_CVAL_EL0}, 464249259Sdim {"cnthp_cval_el2", CNTHP_CVAL_EL2}, 465249259Sdim {"cntps_cval_el1", CNTPS_CVAL_EL1}, 466249259Sdim {"cntv_tval_el0", CNTV_TVAL_EL0}, 467249259Sdim {"cntv_ctl_el0", CNTV_CTL_EL0}, 468249259Sdim {"cntv_cval_el0", CNTV_CVAL_EL0}, 469249259Sdim {"pmevcntr0_el0", PMEVCNTR0_EL0}, 470249259Sdim {"pmevcntr1_el0", PMEVCNTR1_EL0}, 471249259Sdim {"pmevcntr2_el0", PMEVCNTR2_EL0}, 472249259Sdim {"pmevcntr3_el0", PMEVCNTR3_EL0}, 473249259Sdim {"pmevcntr4_el0", PMEVCNTR4_EL0}, 474249259Sdim {"pmevcntr5_el0", PMEVCNTR5_EL0}, 475249259Sdim {"pmevcntr6_el0", PMEVCNTR6_EL0}, 476249259Sdim {"pmevcntr7_el0", PMEVCNTR7_EL0}, 477249259Sdim {"pmevcntr8_el0", PMEVCNTR8_EL0}, 478249259Sdim {"pmevcntr9_el0", PMEVCNTR9_EL0}, 479249259Sdim {"pmevcntr10_el0", PMEVCNTR10_EL0}, 480249259Sdim {"pmevcntr11_el0", PMEVCNTR11_EL0}, 481249259Sdim {"pmevcntr12_el0", PMEVCNTR12_EL0}, 482249259Sdim {"pmevcntr13_el0", PMEVCNTR13_EL0}, 483249259Sdim {"pmevcntr14_el0", PMEVCNTR14_EL0}, 484249259Sdim {"pmevcntr15_el0", PMEVCNTR15_EL0}, 485249259Sdim {"pmevcntr16_el0", PMEVCNTR16_EL0}, 486249259Sdim {"pmevcntr17_el0", PMEVCNTR17_EL0}, 487249259Sdim {"pmevcntr18_el0", PMEVCNTR18_EL0}, 488249259Sdim {"pmevcntr19_el0", PMEVCNTR19_EL0}, 489249259Sdim {"pmevcntr20_el0", PMEVCNTR20_EL0}, 490249259Sdim {"pmevcntr21_el0", PMEVCNTR21_EL0}, 491249259Sdim {"pmevcntr22_el0", PMEVCNTR22_EL0}, 492249259Sdim {"pmevcntr23_el0", PMEVCNTR23_EL0}, 493249259Sdim {"pmevcntr24_el0", PMEVCNTR24_EL0}, 494249259Sdim {"pmevcntr25_el0", PMEVCNTR25_EL0}, 495249259Sdim {"pmevcntr26_el0", PMEVCNTR26_EL0}, 496249259Sdim {"pmevcntr27_el0", PMEVCNTR27_EL0}, 497249259Sdim {"pmevcntr28_el0", PMEVCNTR28_EL0}, 498249259Sdim {"pmevcntr29_el0", PMEVCNTR29_EL0}, 499249259Sdim {"pmevcntr30_el0", PMEVCNTR30_EL0}, 500249259Sdim {"pmccfiltr_el0", PMCCFILTR_EL0}, 501249259Sdim {"pmevtyper0_el0", PMEVTYPER0_EL0}, 502249259Sdim {"pmevtyper1_el0", PMEVTYPER1_EL0}, 503249259Sdim {"pmevtyper2_el0", PMEVTYPER2_EL0}, 504249259Sdim {"pmevtyper3_el0", PMEVTYPER3_EL0}, 505249259Sdim {"pmevtyper4_el0", PMEVTYPER4_EL0}, 506249259Sdim {"pmevtyper5_el0", PMEVTYPER5_EL0}, 507249259Sdim {"pmevtyper6_el0", PMEVTYPER6_EL0}, 508249259Sdim {"pmevtyper7_el0", PMEVTYPER7_EL0}, 509249259Sdim {"pmevtyper8_el0", PMEVTYPER8_EL0}, 510249259Sdim {"pmevtyper9_el0", PMEVTYPER9_EL0}, 511249259Sdim {"pmevtyper10_el0", PMEVTYPER10_EL0}, 512249259Sdim {"pmevtyper11_el0", PMEVTYPER11_EL0}, 513249259Sdim {"pmevtyper12_el0", PMEVTYPER12_EL0}, 514249259Sdim {"pmevtyper13_el0", PMEVTYPER13_EL0}, 515249259Sdim {"pmevtyper14_el0", PMEVTYPER14_EL0}, 516249259Sdim {"pmevtyper15_el0", PMEVTYPER15_EL0}, 517249259Sdim {"pmevtyper16_el0", PMEVTYPER16_EL0}, 518249259Sdim {"pmevtyper17_el0", PMEVTYPER17_EL0}, 519249259Sdim {"pmevtyper18_el0", PMEVTYPER18_EL0}, 520249259Sdim {"pmevtyper19_el0", PMEVTYPER19_EL0}, 521249259Sdim {"pmevtyper20_el0", PMEVTYPER20_EL0}, 522249259Sdim {"pmevtyper21_el0", PMEVTYPER21_EL0}, 523249259Sdim {"pmevtyper22_el0", PMEVTYPER22_EL0}, 524249259Sdim {"pmevtyper23_el0", PMEVTYPER23_EL0}, 525249259Sdim {"pmevtyper24_el0", PMEVTYPER24_EL0}, 526249259Sdim {"pmevtyper25_el0", PMEVTYPER25_EL0}, 527249259Sdim {"pmevtyper26_el0", PMEVTYPER26_EL0}, 528249259Sdim {"pmevtyper27_el0", PMEVTYPER27_EL0}, 529249259Sdim {"pmevtyper28_el0", PMEVTYPER28_EL0}, 530249259Sdim {"pmevtyper29_el0", PMEVTYPER29_EL0}, 531249259Sdim {"pmevtyper30_el0", PMEVTYPER30_EL0}, 532249259Sdim 533249259Sdim // Trace registers 534249259Sdim {"trcprgctlr", TRCPRGCTLR}, 535249259Sdim {"trcprocselr", TRCPROCSELR}, 536249259Sdim {"trcconfigr", TRCCONFIGR}, 537249259Sdim {"trcauxctlr", TRCAUXCTLR}, 538249259Sdim {"trceventctl0r", TRCEVENTCTL0R}, 539249259Sdim {"trceventctl1r", TRCEVENTCTL1R}, 540249259Sdim {"trcstallctlr", TRCSTALLCTLR}, 541249259Sdim {"trctsctlr", TRCTSCTLR}, 542249259Sdim {"trcsyncpr", TRCSYNCPR}, 543249259Sdim {"trcccctlr", TRCCCCTLR}, 544249259Sdim {"trcbbctlr", TRCBBCTLR}, 545249259Sdim {"trctraceidr", TRCTRACEIDR}, 546249259Sdim {"trcqctlr", TRCQCTLR}, 547249259Sdim {"trcvictlr", TRCVICTLR}, 548249259Sdim {"trcviiectlr", TRCVIIECTLR}, 549249259Sdim {"trcvissctlr", TRCVISSCTLR}, 550249259Sdim {"trcvipcssctlr", TRCVIPCSSCTLR}, 551249259Sdim {"trcvdctlr", TRCVDCTLR}, 552249259Sdim {"trcvdsacctlr", TRCVDSACCTLR}, 553249259Sdim {"trcvdarcctlr", TRCVDARCCTLR}, 554249259Sdim {"trcseqevr0", TRCSEQEVR0}, 555249259Sdim {"trcseqevr1", TRCSEQEVR1}, 556249259Sdim {"trcseqevr2", TRCSEQEVR2}, 557249259Sdim {"trcseqrstevr", TRCSEQRSTEVR}, 558249259Sdim {"trcseqstr", TRCSEQSTR}, 559249259Sdim {"trcextinselr", TRCEXTINSELR}, 560249259Sdim {"trccntrldvr0", TRCCNTRLDVR0}, 561249259Sdim {"trccntrldvr1", TRCCNTRLDVR1}, 562249259Sdim {"trccntrldvr2", TRCCNTRLDVR2}, 563249259Sdim {"trccntrldvr3", TRCCNTRLDVR3}, 564249259Sdim {"trccntctlr0", TRCCNTCTLR0}, 565249259Sdim {"trccntctlr1", TRCCNTCTLR1}, 566249259Sdim {"trccntctlr2", TRCCNTCTLR2}, 567249259Sdim {"trccntctlr3", TRCCNTCTLR3}, 568249259Sdim {"trccntvr0", TRCCNTVR0}, 569249259Sdim {"trccntvr1", TRCCNTVR1}, 570249259Sdim {"trccntvr2", TRCCNTVR2}, 571249259Sdim {"trccntvr3", TRCCNTVR3}, 572249259Sdim {"trcimspec0", TRCIMSPEC0}, 573249259Sdim {"trcimspec1", TRCIMSPEC1}, 574249259Sdim {"trcimspec2", TRCIMSPEC2}, 575249259Sdim {"trcimspec3", TRCIMSPEC3}, 576249259Sdim {"trcimspec4", TRCIMSPEC4}, 577249259Sdim {"trcimspec5", TRCIMSPEC5}, 578249259Sdim {"trcimspec6", TRCIMSPEC6}, 579249259Sdim {"trcimspec7", TRCIMSPEC7}, 580249259Sdim {"trcrsctlr2", TRCRSCTLR2}, 581249259Sdim {"trcrsctlr3", TRCRSCTLR3}, 582249259Sdim {"trcrsctlr4", TRCRSCTLR4}, 583249259Sdim {"trcrsctlr5", TRCRSCTLR5}, 584249259Sdim {"trcrsctlr6", TRCRSCTLR6}, 585249259Sdim {"trcrsctlr7", TRCRSCTLR7}, 586249259Sdim {"trcrsctlr8", TRCRSCTLR8}, 587249259Sdim {"trcrsctlr9", TRCRSCTLR9}, 588249259Sdim {"trcrsctlr10", TRCRSCTLR10}, 589249259Sdim {"trcrsctlr11", TRCRSCTLR11}, 590249259Sdim {"trcrsctlr12", TRCRSCTLR12}, 591249259Sdim {"trcrsctlr13", TRCRSCTLR13}, 592249259Sdim {"trcrsctlr14", TRCRSCTLR14}, 593249259Sdim {"trcrsctlr15", TRCRSCTLR15}, 594249259Sdim {"trcrsctlr16", TRCRSCTLR16}, 595249259Sdim {"trcrsctlr17", TRCRSCTLR17}, 596249259Sdim {"trcrsctlr18", TRCRSCTLR18}, 597249259Sdim {"trcrsctlr19", TRCRSCTLR19}, 598249259Sdim {"trcrsctlr20", TRCRSCTLR20}, 599249259Sdim {"trcrsctlr21", TRCRSCTLR21}, 600249259Sdim {"trcrsctlr22", TRCRSCTLR22}, 601249259Sdim {"trcrsctlr23", TRCRSCTLR23}, 602249259Sdim {"trcrsctlr24", TRCRSCTLR24}, 603249259Sdim {"trcrsctlr25", TRCRSCTLR25}, 604249259Sdim {"trcrsctlr26", TRCRSCTLR26}, 605249259Sdim {"trcrsctlr27", TRCRSCTLR27}, 606249259Sdim {"trcrsctlr28", TRCRSCTLR28}, 607249259Sdim {"trcrsctlr29", TRCRSCTLR29}, 608249259Sdim {"trcrsctlr30", TRCRSCTLR30}, 609249259Sdim {"trcrsctlr31", TRCRSCTLR31}, 610249259Sdim {"trcssccr0", TRCSSCCR0}, 611249259Sdim {"trcssccr1", TRCSSCCR1}, 612249259Sdim {"trcssccr2", TRCSSCCR2}, 613249259Sdim {"trcssccr3", TRCSSCCR3}, 614249259Sdim {"trcssccr4", TRCSSCCR4}, 615249259Sdim {"trcssccr5", TRCSSCCR5}, 616249259Sdim {"trcssccr6", TRCSSCCR6}, 617249259Sdim {"trcssccr7", TRCSSCCR7}, 618249259Sdim {"trcsscsr0", TRCSSCSR0}, 619249259Sdim {"trcsscsr1", TRCSSCSR1}, 620249259Sdim {"trcsscsr2", TRCSSCSR2}, 621249259Sdim {"trcsscsr3", TRCSSCSR3}, 622249259Sdim {"trcsscsr4", TRCSSCSR4}, 623249259Sdim {"trcsscsr5", TRCSSCSR5}, 624249259Sdim {"trcsscsr6", TRCSSCSR6}, 625249259Sdim {"trcsscsr7", TRCSSCSR7}, 626249259Sdim {"trcsspcicr0", TRCSSPCICR0}, 627249259Sdim {"trcsspcicr1", TRCSSPCICR1}, 628249259Sdim {"trcsspcicr2", TRCSSPCICR2}, 629249259Sdim {"trcsspcicr3", TRCSSPCICR3}, 630249259Sdim {"trcsspcicr4", TRCSSPCICR4}, 631249259Sdim {"trcsspcicr5", TRCSSPCICR5}, 632249259Sdim {"trcsspcicr6", TRCSSPCICR6}, 633249259Sdim {"trcsspcicr7", TRCSSPCICR7}, 634249259Sdim {"trcpdcr", TRCPDCR}, 635249259Sdim {"trcacvr0", TRCACVR0}, 636249259Sdim {"trcacvr1", TRCACVR1}, 637249259Sdim {"trcacvr2", TRCACVR2}, 638249259Sdim {"trcacvr3", TRCACVR3}, 639249259Sdim {"trcacvr4", TRCACVR4}, 640249259Sdim {"trcacvr5", TRCACVR5}, 641249259Sdim {"trcacvr6", TRCACVR6}, 642249259Sdim {"trcacvr7", TRCACVR7}, 643249259Sdim {"trcacvr8", TRCACVR8}, 644249259Sdim {"trcacvr9", TRCACVR9}, 645249259Sdim {"trcacvr10", TRCACVR10}, 646249259Sdim {"trcacvr11", TRCACVR11}, 647249259Sdim {"trcacvr12", TRCACVR12}, 648249259Sdim {"trcacvr13", TRCACVR13}, 649249259Sdim {"trcacvr14", TRCACVR14}, 650249259Sdim {"trcacvr15", TRCACVR15}, 651249259Sdim {"trcacatr0", TRCACATR0}, 652249259Sdim {"trcacatr1", TRCACATR1}, 653249259Sdim {"trcacatr2", TRCACATR2}, 654249259Sdim {"trcacatr3", TRCACATR3}, 655249259Sdim {"trcacatr4", TRCACATR4}, 656249259Sdim {"trcacatr5", TRCACATR5}, 657249259Sdim {"trcacatr6", TRCACATR6}, 658249259Sdim {"trcacatr7", TRCACATR7}, 659249259Sdim {"trcacatr8", TRCACATR8}, 660249259Sdim {"trcacatr9", TRCACATR9}, 661249259Sdim {"trcacatr10", TRCACATR10}, 662249259Sdim {"trcacatr11", TRCACATR11}, 663249259Sdim {"trcacatr12", TRCACATR12}, 664249259Sdim {"trcacatr13", TRCACATR13}, 665249259Sdim {"trcacatr14", TRCACATR14}, 666249259Sdim {"trcacatr15", TRCACATR15}, 667249259Sdim {"trcdvcvr0", TRCDVCVR0}, 668249259Sdim {"trcdvcvr1", TRCDVCVR1}, 669249259Sdim {"trcdvcvr2", TRCDVCVR2}, 670249259Sdim {"trcdvcvr3", TRCDVCVR3}, 671249259Sdim {"trcdvcvr4", TRCDVCVR4}, 672249259Sdim {"trcdvcvr5", TRCDVCVR5}, 673249259Sdim {"trcdvcvr6", TRCDVCVR6}, 674249259Sdim {"trcdvcvr7", TRCDVCVR7}, 675249259Sdim {"trcdvcmr0", TRCDVCMR0}, 676249259Sdim {"trcdvcmr1", TRCDVCMR1}, 677249259Sdim {"trcdvcmr2", TRCDVCMR2}, 678249259Sdim {"trcdvcmr3", TRCDVCMR3}, 679249259Sdim {"trcdvcmr4", TRCDVCMR4}, 680249259Sdim {"trcdvcmr5", TRCDVCMR5}, 681249259Sdim {"trcdvcmr6", TRCDVCMR6}, 682249259Sdim {"trcdvcmr7", TRCDVCMR7}, 683249259Sdim {"trccidcvr0", TRCCIDCVR0}, 684249259Sdim {"trccidcvr1", TRCCIDCVR1}, 685249259Sdim {"trccidcvr2", TRCCIDCVR2}, 686249259Sdim {"trccidcvr3", TRCCIDCVR3}, 687249259Sdim {"trccidcvr4", TRCCIDCVR4}, 688249259Sdim {"trccidcvr5", TRCCIDCVR5}, 689249259Sdim {"trccidcvr6", TRCCIDCVR6}, 690249259Sdim {"trccidcvr7", TRCCIDCVR7}, 691249259Sdim {"trcvmidcvr0", TRCVMIDCVR0}, 692249259Sdim {"trcvmidcvr1", TRCVMIDCVR1}, 693249259Sdim {"trcvmidcvr2", TRCVMIDCVR2}, 694249259Sdim {"trcvmidcvr3", TRCVMIDCVR3}, 695249259Sdim {"trcvmidcvr4", TRCVMIDCVR4}, 696249259Sdim {"trcvmidcvr5", TRCVMIDCVR5}, 697249259Sdim {"trcvmidcvr6", TRCVMIDCVR6}, 698249259Sdim {"trcvmidcvr7", TRCVMIDCVR7}, 699249259Sdim {"trccidcctlr0", TRCCIDCCTLR0}, 700249259Sdim {"trccidcctlr1", TRCCIDCCTLR1}, 701249259Sdim {"trcvmidcctlr0", TRCVMIDCCTLR0}, 702249259Sdim {"trcvmidcctlr1", TRCVMIDCCTLR1}, 703249259Sdim {"trcitctrl", TRCITCTRL}, 704249259Sdim {"trcclaimset", TRCCLAIMSET}, 705249259Sdim {"trcclaimclr", TRCCLAIMCLR}, 706249259Sdim 707249259Sdim // GICv3 registers 708249259Sdim {"icc_bpr1_el1", ICC_BPR1_EL1}, 709249259Sdim {"icc_bpr0_el1", ICC_BPR0_EL1}, 710249259Sdim {"icc_pmr_el1", ICC_PMR_EL1}, 711249259Sdim {"icc_ctlr_el1", ICC_CTLR_EL1}, 712249259Sdim {"icc_ctlr_el3", ICC_CTLR_EL3}, 713249259Sdim {"icc_sre_el1", ICC_SRE_EL1}, 714249259Sdim {"icc_sre_el2", ICC_SRE_EL2}, 715249259Sdim {"icc_sre_el3", ICC_SRE_EL3}, 716249259Sdim {"icc_igrpen0_el1", ICC_IGRPEN0_EL1}, 717249259Sdim {"icc_igrpen1_el1", ICC_IGRPEN1_EL1}, 718249259Sdim {"icc_igrpen1_el3", ICC_IGRPEN1_EL3}, 719249259Sdim {"icc_seien_el1", ICC_SEIEN_EL1}, 720249259Sdim {"icc_ap0r0_el1", ICC_AP0R0_EL1}, 721249259Sdim {"icc_ap0r1_el1", ICC_AP0R1_EL1}, 722249259Sdim {"icc_ap0r2_el1", ICC_AP0R2_EL1}, 723249259Sdim {"icc_ap0r3_el1", ICC_AP0R3_EL1}, 724249259Sdim {"icc_ap1r0_el1", ICC_AP1R0_EL1}, 725249259Sdim {"icc_ap1r1_el1", ICC_AP1R1_EL1}, 726249259Sdim {"icc_ap1r2_el1", ICC_AP1R2_EL1}, 727249259Sdim {"icc_ap1r3_el1", ICC_AP1R3_EL1}, 728249259Sdim {"ich_ap0r0_el2", ICH_AP0R0_EL2}, 729249259Sdim {"ich_ap0r1_el2", ICH_AP0R1_EL2}, 730249259Sdim {"ich_ap0r2_el2", ICH_AP0R2_EL2}, 731249259Sdim {"ich_ap0r3_el2", ICH_AP0R3_EL2}, 732249259Sdim {"ich_ap1r0_el2", ICH_AP1R0_EL2}, 733249259Sdim {"ich_ap1r1_el2", ICH_AP1R1_EL2}, 734249259Sdim {"ich_ap1r2_el2", ICH_AP1R2_EL2}, 735249259Sdim {"ich_ap1r3_el2", ICH_AP1R3_EL2}, 736249259Sdim {"ich_hcr_el2", ICH_HCR_EL2}, 737249259Sdim {"ich_misr_el2", ICH_MISR_EL2}, 738249259Sdim {"ich_vmcr_el2", ICH_VMCR_EL2}, 739249259Sdim {"ich_vseir_el2", ICH_VSEIR_EL2}, 740249259Sdim {"ich_lr0_el2", ICH_LR0_EL2}, 741249259Sdim {"ich_lr1_el2", ICH_LR1_EL2}, 742249259Sdim {"ich_lr2_el2", ICH_LR2_EL2}, 743249259Sdim {"ich_lr3_el2", ICH_LR3_EL2}, 744249259Sdim {"ich_lr4_el2", ICH_LR4_EL2}, 745249259Sdim {"ich_lr5_el2", ICH_LR5_EL2}, 746249259Sdim {"ich_lr6_el2", ICH_LR6_EL2}, 747249259Sdim {"ich_lr7_el2", ICH_LR7_EL2}, 748249259Sdim {"ich_lr8_el2", ICH_LR8_EL2}, 749249259Sdim {"ich_lr9_el2", ICH_LR9_EL2}, 750249259Sdim {"ich_lr10_el2", ICH_LR10_EL2}, 751249259Sdim {"ich_lr11_el2", ICH_LR11_EL2}, 752249259Sdim {"ich_lr12_el2", ICH_LR12_EL2}, 753249259Sdim {"ich_lr13_el2", ICH_LR13_EL2}, 754249259Sdim {"ich_lr14_el2", ICH_LR14_EL2}, 755249259Sdim {"ich_lr15_el2", ICH_LR15_EL2} 756249259Sdim}; 757249259Sdim 758276479Sdimconst AArch64NamedImmMapper::Mapping 759276479SdimAArch64SysReg::SysRegMapper::CycloneSysRegPairs[] = { 760276479Sdim {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3} 761276479Sdim}; 762276479Sdim 763249259Sdimuint32_t 764276479SdimAArch64SysReg::SysRegMapper::fromString(StringRef Name, bool &Valid) const { 765276479Sdim std::string NameLower = Name.lower(); 766276479Sdim 767249259Sdim // First search the registers shared by all 768249259Sdim for (unsigned i = 0; i < array_lengthof(SysRegPairs); ++i) { 769249259Sdim if (SysRegPairs[i].Name == NameLower) { 770249259Sdim Valid = true; 771249259Sdim return SysRegPairs[i].Value; 772249259Sdim } 773249259Sdim } 774249259Sdim 775276479Sdim // Next search for target specific registers 776276479Sdim if (FeatureBits & AArch64::ProcCyclone) { 777276479Sdim for (unsigned i = 0; i < array_lengthof(CycloneSysRegPairs); ++i) { 778276479Sdim if (CycloneSysRegPairs[i].Name == NameLower) { 779276479Sdim Valid = true; 780276479Sdim return CycloneSysRegPairs[i].Value; 781276479Sdim } 782276479Sdim } 783276479Sdim } 784276479Sdim 785249259Sdim // Now try the instruction-specific registers (either read-only or 786249259Sdim // write-only). 787249259Sdim for (unsigned i = 0; i < NumInstPairs; ++i) { 788249259Sdim if (InstPairs[i].Name == NameLower) { 789249259Sdim Valid = true; 790249259Sdim return InstPairs[i].Value; 791249259Sdim } 792249259Sdim } 793249259Sdim 794280031Sdim // Try to parse an S<op0>_<op1>_<Cn>_<Cm>_<op2> register name 795280031Sdim Regex GenericRegPattern("^s([0-3])_([0-7])_c([0-9]|1[0-5])_c([0-9]|1[0-5])_([0-7])$"); 796249259Sdim 797280031Sdim SmallVector<StringRef, 5> Ops; 798249259Sdim if (!GenericRegPattern.match(NameLower, &Ops)) { 799249259Sdim Valid = false; 800249259Sdim return -1; 801249259Sdim } 802249259Sdim 803280031Sdim uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; 804249259Sdim uint32_t Bits; 805280031Sdim Ops[1].getAsInteger(10, Op0); 806280031Sdim Ops[2].getAsInteger(10, Op1); 807280031Sdim Ops[3].getAsInteger(10, CRn); 808280031Sdim Ops[4].getAsInteger(10, CRm); 809280031Sdim Ops[5].getAsInteger(10, Op2); 810249259Sdim Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; 811249259Sdim 812249259Sdim Valid = true; 813249259Sdim return Bits; 814249259Sdim} 815249259Sdim 816249259Sdimstd::string 817280031SdimAArch64SysReg::SysRegMapper::toString(uint32_t Bits) const { 818276479Sdim // First search the registers shared by all 819249259Sdim for (unsigned i = 0; i < array_lengthof(SysRegPairs); ++i) { 820249259Sdim if (SysRegPairs[i].Value == Bits) { 821249259Sdim return SysRegPairs[i].Name; 822249259Sdim } 823249259Sdim } 824249259Sdim 825276479Sdim // Next search for target specific registers 826276479Sdim if (FeatureBits & AArch64::ProcCyclone) { 827276479Sdim for (unsigned i = 0; i < array_lengthof(CycloneSysRegPairs); ++i) { 828276479Sdim if (CycloneSysRegPairs[i].Value == Bits) { 829276479Sdim return CycloneSysRegPairs[i].Name; 830276479Sdim } 831276479Sdim } 832276479Sdim } 833276479Sdim 834276479Sdim // Now try the instruction-specific registers (either read-only or 835276479Sdim // write-only). 836249259Sdim for (unsigned i = 0; i < NumInstPairs; ++i) { 837249259Sdim if (InstPairs[i].Value == Bits) { 838249259Sdim return InstPairs[i].Name; 839249259Sdim } 840249259Sdim } 841249259Sdim 842280031Sdim assert(Bits < 0x10000); 843249259Sdim uint32_t Op0 = (Bits >> 14) & 0x3; 844249259Sdim uint32_t Op1 = (Bits >> 11) & 0x7; 845249259Sdim uint32_t CRn = (Bits >> 7) & 0xf; 846249259Sdim uint32_t CRm = (Bits >> 3) & 0xf; 847249259Sdim uint32_t Op2 = Bits & 0x7; 848249259Sdim 849280031Sdim return "s" + utostr(Op0)+ "_" + utostr(Op1) + "_c" + utostr(CRn) 850249259Sdim + "_c" + utostr(CRm) + "_" + utostr(Op2); 851249259Sdim} 852249259Sdim 853276479Sdimconst AArch64NamedImmMapper::Mapping AArch64TLBI::TLBIMapper::TLBIPairs[] = { 854249259Sdim {"ipas2e1is", IPAS2E1IS}, 855249259Sdim {"ipas2le1is", IPAS2LE1IS}, 856249259Sdim {"vmalle1is", VMALLE1IS}, 857249259Sdim {"alle2is", ALLE2IS}, 858249259Sdim {"alle3is", ALLE3IS}, 859249259Sdim {"vae1is", VAE1IS}, 860249259Sdim {"vae2is", VAE2IS}, 861249259Sdim {"vae3is", VAE3IS}, 862249259Sdim {"aside1is", ASIDE1IS}, 863249259Sdim {"vaae1is", VAAE1IS}, 864249259Sdim {"alle1is", ALLE1IS}, 865249259Sdim {"vale1is", VALE1IS}, 866249259Sdim {"vale2is", VALE2IS}, 867249259Sdim {"vale3is", VALE3IS}, 868249259Sdim {"vmalls12e1is", VMALLS12E1IS}, 869249259Sdim {"vaale1is", VAALE1IS}, 870249259Sdim {"ipas2e1", IPAS2E1}, 871249259Sdim {"ipas2le1", IPAS2LE1}, 872249259Sdim {"vmalle1", VMALLE1}, 873249259Sdim {"alle2", ALLE2}, 874249259Sdim {"alle3", ALLE3}, 875249259Sdim {"vae1", VAE1}, 876249259Sdim {"vae2", VAE2}, 877249259Sdim {"vae3", VAE3}, 878249259Sdim {"aside1", ASIDE1}, 879249259Sdim {"vaae1", VAAE1}, 880249259Sdim {"alle1", ALLE1}, 881249259Sdim {"vale1", VALE1}, 882249259Sdim {"vale2", VALE2}, 883249259Sdim {"vale3", VALE3}, 884249259Sdim {"vmalls12e1", VMALLS12E1}, 885249259Sdim {"vaale1", VAALE1} 886249259Sdim}; 887249259Sdim 888276479SdimAArch64TLBI::TLBIMapper::TLBIMapper() 889276479Sdim : AArch64NamedImmMapper(TLBIPairs, 0) {} 890