AArch64Subtarget.cpp revision 280031 
1//===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the AArch64 specific subclass of TargetSubtarget.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AArch64InstrInfo.h"
15#include "AArch64PBQPRegAlloc.h"
16#include "AArch64Subtarget.h"
17#include "llvm/ADT/SmallVector.h"
18#include "llvm/CodeGen/MachineScheduler.h"
19#include "llvm/IR/GlobalValue.h"
20#include "llvm/Support/TargetRegistry.h"
21
22using namespace llvm;
23
24#define DEBUG_TYPE "aarch64-subtarget"
25
26#define GET_SUBTARGETINFO_CTOR
27#define GET_SUBTARGETINFO_TARGET_DESC
28#include "AArch64GenSubtargetInfo.inc"
29
30static cl::opt<bool>
31EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
32                     "converter pass"), cl::init(true), cl::Hidden);
33
34AArch64Subtarget &
35AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
36  // Determine default and user-specified characteristics
37
38  if (CPUString.empty())
39    CPUString = "generic";
40
41  ParseSubtargetFeatures(CPUString, FS);
42  return *this;
43}
44
45AArch64Subtarget::AArch64Subtarget(const std::string &TT,
46                                   const std::string &CPU,
47                                   const std::string &FS,
48                                   const TargetMachine &TM, bool LittleEndian)
49    : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
50      HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
51      HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
52      TargetTriple(TT),
53      // This nested ternary is horrible, but DL needs to be properly
54      // initialized
55      // before TLInfo is constructed.
56      DL(isTargetMachO()
57             ? "e-m:o-i64:64-i128:128-n32:64-S128"
58             : (LittleEndian ? "e-m:e-i64:64-i128:128-n32:64-S128"
59                             : "E-m:e-i64:64-i128:128-n32:64-S128")),
60      FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS)),
61      TSInfo(&DL), TLInfo(TM) {}
62
63/// ClassifyGlobalReference - Find the target operand flags that describe
64/// how a global value should be referenced for the current subtarget.
65unsigned char
66AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
67                                        const TargetMachine &TM) const {
68  bool isDecl = GV->isDeclarationForLinker();
69
70  // MachO large model always goes via a GOT, simply to get a single 8-byte
71  // absolute relocation on all global addresses.
72  if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
73    return AArch64II::MO_GOT;
74
75  // The small code mode's direct accesses use ADRP, which cannot necessarily
76  // produce the value 0 (if the code is above 4GB).
77  if (TM.getCodeModel() == CodeModel::Small &&
78      GV->isWeakForLinker() && isDecl) {
79    // In PIC mode use the GOT, but in absolute mode use a constant pool load.
80    if (TM.getRelocationModel() == Reloc::Static)
81        return AArch64II::MO_CONSTPOOL;
82    else
83        return AArch64II::MO_GOT;
84  }
85
86  // If symbol visibility is hidden, the extra load is not needed if
87  // the symbol is definitely defined in the current translation unit.
88
89  // The handling of non-hidden symbols in PIC mode is rather target-dependent:
90  //   + On MachO, if the symbol is defined in this module the GOT can be
91  //     skipped.
92  //   + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
93  //     defined could end up in unexpected places. Use a GOT.
94  if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
95    if (isTargetMachO())
96      return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
97                                               : AArch64II::MO_NO_FLAG;
98    else
99      // No need to go through the GOT for local symbols on ELF.
100      return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
101  }
102
103  return AArch64II::MO_NO_FLAG;
104}
105
106/// This function returns the name of a function which has an interface
107/// like the non-standard bzero function, if such a function exists on
108/// the current subtarget and it is considered prefereable over
109/// memset with zero passed as the second argument. Otherwise it
110/// returns null.
111const char *AArch64Subtarget::getBZeroEntry() const {
112  // Prefer bzero on Darwin only.
113  if(isTargetDarwin())
114    return "bzero";
115
116  return nullptr;
117}
118
119void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
120                                         MachineInstr *begin, MachineInstr *end,
121                                         unsigned NumRegionInstrs) const {
122  // LNT run (at least on Cyclone) showed reasonably significant gains for
123  // bi-directional scheduling. 253.perlbmk.
124  Policy.OnlyTopDown = false;
125  Policy.OnlyBottomUp = false;
126}
127
128bool AArch64Subtarget::enableEarlyIfConversion() const {
129  return EnableEarlyIfConvert;
130}
131
132std::unique_ptr<PBQPRAConstraint>
133AArch64Subtarget::getCustomPBQPConstraints() const {
134  if (!isCortexA57())
135    return nullptr;
136
137  return llvm::make_unique<A57ChainingConstraint>();
138}
139