AArch64RegisterInfo.h revision 249259
1271440Sjkim//==- AArch64RegisterInfo.h - AArch64 Register Information Impl -*- C++ -*-===// 2271440Sjkim// 3271440Sjkim// The LLVM Compiler Infrastructure 4271440Sjkim// 5271440Sjkim// This file is distributed under the University of Illinois Open Source 6271440Sjkim// License. See LICENSE.TXT for details. 7271440Sjkim// 8271440Sjkim//===----------------------------------------------------------------------===// 9271440Sjkim// 10271440Sjkim// This file contains the AArch64 implementation of the MCRegisterInfo class. 11271440Sjkim// 12271440Sjkim//===----------------------------------------------------------------------===// 13271440Sjkim 14271440Sjkim#ifndef LLVM_TARGET_AARCH64REGISTERINFO_H 15271440Sjkim#define LLVM_TARGET_AARCH64REGISTERINFO_H 16271440Sjkim 17271440Sjkim#include "llvm/Target/TargetRegisterInfo.h" 18271440Sjkim 19271440Sjkim#define GET_REGINFO_HEADER 20271440Sjkim#include "AArch64GenRegisterInfo.inc" 21271440Sjkim 22271440Sjkimnamespace llvm { 23271440Sjkim 24271440Sjkimclass AArch64InstrInfo; 25271440Sjkimclass AArch64Subtarget; 26271440Sjkim 27271440Sjkimstruct AArch64RegisterInfo : public AArch64GenRegisterInfo { 28271440Sjkimprivate: 29271440Sjkim const AArch64InstrInfo &TII; 30271440Sjkim 31271440Sjkimpublic: 32271440Sjkim AArch64RegisterInfo(const AArch64InstrInfo &tii, 33271440Sjkim const AArch64Subtarget &sti); 34271440Sjkim 35271440Sjkim const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; 36271440Sjkim const uint32_t *getCallPreservedMask(CallingConv::ID) const; 37271440Sjkim 38271440Sjkim const uint32_t *getTLSDescCallPreservedMask() const; 39271440Sjkim 40271440Sjkim BitVector getReservedRegs(const MachineFunction &MF) const; 41271440Sjkim unsigned getFrameRegister(const MachineFunction &MF) const; 42271440Sjkim 43271440Sjkim void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, 44272444Sjkim unsigned FIOperandNum, 45272444Sjkim RegScavenger *Rs = NULL) const; 46271440Sjkim 47271440Sjkim /// getCrossCopyRegClass - Returns a legal register class to copy a register 48271440Sjkim /// in the specified class to or from. Returns original class if it is 49271440Sjkim /// possible to copy between a two registers of the specified class. 50271440Sjkim const TargetRegisterClass * 51271440Sjkim getCrossCopyRegClass(const TargetRegisterClass *RC) const; 52271440Sjkim 53271440Sjkim /// getLargestLegalSuperClass - Returns the largest super class of RC that is 54271440Sjkim /// legal to use in the current sub-target and has the same spill size. 55271440Sjkim const TargetRegisterClass* 56271440Sjkim getLargestLegalSuperClass(const TargetRegisterClass *RC) const { 57271440Sjkim if (RC == &AArch64::tcGPR64RegClass) 58271440Sjkim return &AArch64::GPR64RegClass; 59271440Sjkim 60271440Sjkim return RC; 61271440Sjkim } 62271440Sjkim 63271440Sjkim bool requiresRegisterScavenging(const MachineFunction &MF) const { 64271440Sjkim return true; 65271440Sjkim } 66271440Sjkim 67271440Sjkim bool requiresFrameIndexScavenging(const MachineFunction &MF) const { 68271440Sjkim return true; 69271440Sjkim } 70271440Sjkim 71271440Sjkim bool useFPForScavengingIndex(const MachineFunction &MF) const; 72271440Sjkim}; 73271440Sjkim 74271440Sjkim} // end namespace llvm 75271440Sjkim 76271440Sjkim#endif // LLVM_TARGET_AARCH64REGISTERINFO_H 77271440Sjkim