SelectionDAGBuilder.h revision 210299
1249033Ssjg//===-- SelectionDAGBuilder.h - Selection-DAG building --------------------===// 2236769Sobrien// 3236769Sobrien// The LLVM Compiler Infrastructure 4236769Sobrien// 5236769Sobrien// This file is distributed under the University of Illinois Open Source 6236769Sobrien// License. See LICENSE.TXT for details. 7236769Sobrien// 8236769Sobrien//===----------------------------------------------------------------------===// 9236769Sobrien// 10236769Sobrien// This implements routines for translating from LLVM IR into SelectionDAG IR. 11236769Sobrien// 12236769Sobrien//===----------------------------------------------------------------------===// 13236769Sobrien 14236769Sobrien#ifndef SELECTIONDAGBUILDER_H 15236769Sobrien#define SELECTIONDAGBUILDER_H 16236769Sobrien 17236769Sobrien#include "llvm/Constants.h" 18236769Sobrien#include "llvm/CodeGen/SelectionDAG.h" 19236769Sobrien#include "llvm/ADT/APInt.h" 20236769Sobrien#include "llvm/ADT/DenseMap.h" 21236769Sobrien#ifndef NDEBUG 22236769Sobrien#include "llvm/ADT/SmallSet.h" 23236769Sobrien#endif 24236769Sobrien#include "llvm/CodeGen/SelectionDAGNodes.h" 25236769Sobrien#include "llvm/CodeGen/ValueTypes.h" 26236769Sobrien#include "llvm/Support/CallSite.h" 27236769Sobrien#include "llvm/Support/ErrorHandling.h" 28236769Sobrien#include <vector> 29236769Sobrien#include <set> 30236769Sobrien 31236769Sobriennamespace llvm { 32236769Sobrien 33236769Sobrienclass AliasAnalysis; 34236769Sobrienclass AllocaInst; 35236769Sobrienclass BasicBlock; 36236769Sobrienclass BitCastInst; 37236769Sobrienclass BranchInst; 38236769Sobrienclass CallInst; 39236769Sobrienclass DbgValueInst; 40236769Sobrienclass ExtractElementInst; 41236769Sobrienclass ExtractValueInst; 42236769Sobrienclass FCmpInst; 43236769Sobrienclass FPExtInst; 44236769Sobrienclass FPToSIInst; 45236769Sobrienclass FPToUIInst; 46236769Sobrienclass FPTruncInst; 47236769Sobrienclass Function; 48236769Sobrienclass FunctionLoweringInfo; 49236769Sobrienclass GetElementPtrInst; 50236769Sobrienclass GCFunctionInfo; 51236769Sobrienclass ICmpInst; 52236769Sobrienclass IntToPtrInst; 53236769Sobrienclass IndirectBrInst; 54236769Sobrienclass InvokeInst; 55236769Sobrienclass InsertElementInst; 56236769Sobrienclass InsertValueInst; 57236769Sobrienclass Instruction; 58236769Sobrienclass LoadInst; 59236769Sobrienclass MachineBasicBlock; 60236769Sobrienclass MachineInstr; 61236769Sobrienclass MachineRegisterInfo; 62236769Sobrienclass MDNode; 63236769Sobrienclass PHINode; 64236769Sobrienclass PtrToIntInst; 65236769Sobrienclass ReturnInst; 66236769Sobrienclass SDISelAsmOperandInfo; 67236769Sobrienclass SExtInst; 68236769Sobrienclass SelectInst; 69236769Sobrienclass ShuffleVectorInst; 70236769Sobrienclass SIToFPInst; 71236769Sobrienclass StoreInst; 72249033Ssjgclass SwitchInst; 73236769Sobrienclass TargetData; 74236769Sobrienclass TargetLowering; 75236769Sobrienclass TruncInst; 76236769Sobrienclass UIToFPInst; 77236769Sobrienclass UnreachableInst; 78236769Sobrienclass UnwindInst; 79249033Ssjgclass VAArgInst; 80236769Sobrienclass ZExtInst; 81236769Sobrien 82236769Sobrien//===----------------------------------------------------------------------===// 83236769Sobrien/// SelectionDAGBuilder - This is the common target-independent lowering 84236769Sobrien/// implementation that is parameterized by a TargetLowering object. 85236769Sobrien/// 86236769Sobrienclass SelectionDAGBuilder { 87236769Sobrien /// CurDebugLoc - current file + line number. Changes as we build the DAG. 88236769Sobrien DebugLoc CurDebugLoc; 89236769Sobrien 90236769Sobrien DenseMap<const Value*, SDValue> NodeMap; 91236769Sobrien 92236769Sobrien /// UnusedArgNodeMap - Maps argument value for unused arguments. This is used 93236769Sobrien /// to preserve debug information for incoming arguments. 94236769Sobrien DenseMap<const Value*, SDValue> UnusedArgNodeMap; 95236769Sobrien 96236769Sobrienpublic: 97236769Sobrien /// PendingLoads - Loads are not emitted to the program immediately. We bunch 98236769Sobrien /// them up and then emit token factor nodes when possible. This allows us to 99236769Sobrien /// get simple disambiguation between loads without worrying about alias 100236769Sobrien /// analysis. 101236769Sobrien SmallVector<SDValue, 8> PendingLoads; 102236769Sobrienprivate: 103236769Sobrien 104236769Sobrien /// PendingExports - CopyToReg nodes that copy values to virtual registers 105236769Sobrien /// for export to other blocks need to be emitted before any terminator 106236769Sobrien /// instruction, but they have no other ordering requirements. We bunch them 107236769Sobrien /// up and the emit a single tokenfactor for them just before terminator 108236769Sobrien /// instructions. 109236769Sobrien SmallVector<SDValue, 8> PendingExports; 110236769Sobrien 111236769Sobrien /// SDNodeOrder - A unique monotonically increasing number used to order the 112236769Sobrien /// SDNodes we create. 113236769Sobrien unsigned SDNodeOrder; 114236769Sobrien 115236769Sobrien /// Case - A struct to record the Value for a switch case, and the 116236769Sobrien /// case's target basic block. 117236769Sobrien struct Case { 118236769Sobrien Constant* Low; 119236769Sobrien Constant* High; 120236769Sobrien MachineBasicBlock* BB; 121236769Sobrien 122236769Sobrien Case() : Low(0), High(0), BB(0) { } 123236769Sobrien Case(Constant* low, Constant* high, MachineBasicBlock* bb) : 124236769Sobrien Low(low), High(high), BB(bb) { } 125236769Sobrien APInt size() const { 126236769Sobrien const APInt &rHigh = cast<ConstantInt>(High)->getValue(); 127236769Sobrien const APInt &rLow = cast<ConstantInt>(Low)->getValue(); 128236769Sobrien return (rHigh - rLow + 1ULL); 129236769Sobrien } 130236769Sobrien }; 131236769Sobrien 132236769Sobrien struct CaseBits { 133236769Sobrien uint64_t Mask; 134236769Sobrien MachineBasicBlock* BB; 135236769Sobrien unsigned Bits; 136236769Sobrien 137236769Sobrien CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits): 138236769Sobrien Mask(mask), BB(bb), Bits(bits) { } 139236769Sobrien }; 140236769Sobrien 141236769Sobrien typedef std::vector<Case> CaseVector; 142236769Sobrien typedef std::vector<CaseBits> CaseBitsVector; 143236769Sobrien typedef CaseVector::iterator CaseItr; 144236769Sobrien typedef std::pair<CaseItr, CaseItr> CaseRange; 145236769Sobrien 146236769Sobrien /// CaseRec - A struct with ctor used in lowering switches to a binary tree 147236769Sobrien /// of conditional branches. 148236769Sobrien struct CaseRec { 149236769Sobrien CaseRec(MachineBasicBlock *bb, const Constant *lt, const Constant *ge, 150236769Sobrien CaseRange r) : 151236769Sobrien CaseBB(bb), LT(lt), GE(ge), Range(r) {} 152236769Sobrien 153236769Sobrien /// CaseBB - The MBB in which to emit the compare and branch 154236769Sobrien MachineBasicBlock *CaseBB; 155236769Sobrien /// LT, GE - If nonzero, we know the current case value must be less-than or 156236769Sobrien /// greater-than-or-equal-to these Constants. 157236769Sobrien const Constant *LT; 158236769Sobrien const Constant *GE; 159236769Sobrien /// Range - A pair of iterators representing the range of case values to be 160251958Ssjg /// processed at this point in the binary search tree. 161236769Sobrien CaseRange Range; 162236769Sobrien }; 163236769Sobrien 164236769Sobrien typedef std::vector<CaseRec> CaseRecVector; 165236769Sobrien 166236769Sobrien /// The comparison function for sorting the switch case values in the vector. 167236769Sobrien /// WARNING: Case ranges should be disjoint! 168236769Sobrien struct CaseCmp { 169236769Sobrien bool operator()(const Case &C1, const Case &C2) { 170236769Sobrien assert(isa<ConstantInt>(C1.Low) && isa<ConstantInt>(C2.High)); 171236769Sobrien const ConstantInt* CI1 = cast<const ConstantInt>(C1.Low); 172236769Sobrien const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); 173236769Sobrien return CI1->getValue().slt(CI2->getValue()); 174236769Sobrien } 175236769Sobrien }; 176236769Sobrien 177236769Sobrien struct CaseBitsCmp { 178236769Sobrien bool operator()(const CaseBits &C1, const CaseBits &C2) { 179236769Sobrien return C1.Bits > C2.Bits; 180236769Sobrien } 181236769Sobrien }; 182236769Sobrien 183236769Sobrien size_t Clusterify(CaseVector &Cases, const SwitchInst &SI); 184236769Sobrien 185236769Sobrien /// CaseBlock - This structure is used to communicate between 186236769Sobrien /// SelectionDAGBuilder and SDISel for the code generation of additional basic 187236769Sobrien /// blocks needed by multi-case switch statements. 188236769Sobrien struct CaseBlock { 189236769Sobrien CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs, 190236769Sobrien const Value *cmpmiddle, 191236769Sobrien MachineBasicBlock *truebb, MachineBasicBlock *falsebb, 192236769Sobrien MachineBasicBlock *me) 193236769Sobrien : CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs), 194236769Sobrien TrueBB(truebb), FalseBB(falsebb), ThisBB(me) {} 195236769Sobrien // CC - the condition code to use for the case block's setcc node 196236769Sobrien ISD::CondCode CC; 197236769Sobrien // CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit. 198236769Sobrien // Emit by default LHS op RHS. MHS is used for range comparisons: 199236769Sobrien // If MHS is not null: (LHS <= MHS) and (MHS <= RHS). 200236769Sobrien const Value *CmpLHS, *CmpMHS, *CmpRHS; 201236769Sobrien // TrueBB/FalseBB - the block to branch to if the setcc is true/false. 202236769Sobrien MachineBasicBlock *TrueBB, *FalseBB; 203236769Sobrien // ThisBB - the block into which to emit the code for the setcc and branches 204236769Sobrien MachineBasicBlock *ThisBB; 205236769Sobrien }; 206236769Sobrien struct JumpTable { 207236769Sobrien JumpTable(unsigned R, unsigned J, MachineBasicBlock *M, 208236769Sobrien MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {} 209236769Sobrien 210236769Sobrien /// Reg - the virtual register containing the index of the jump table entry 211236769Sobrien //. to jump to. 212236769Sobrien unsigned Reg; 213236769Sobrien /// JTI - the JumpTableIndex for this jump table in the function. 214236769Sobrien unsigned JTI; 215236769Sobrien /// MBB - the MBB into which to emit the code for the indirect jump. 216249033Ssjg MachineBasicBlock *MBB; 217236769Sobrien /// Default - the MBB of the default bb, which is a successor of the range 218236769Sobrien /// check MBB. This is when updating PHI nodes in successors. 219236769Sobrien MachineBasicBlock *Default; 220236769Sobrien }; 221236769Sobrien struct JumpTableHeader { 222236769Sobrien JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H, 223236769Sobrien bool E = false): 224236769Sobrien First(F), Last(L), SValue(SV), HeaderBB(H), Emitted(E) {} 225236769Sobrien APInt First; 226236769Sobrien APInt Last; 227236769Sobrien const Value *SValue; 228236769Sobrien MachineBasicBlock *HeaderBB; 229236769Sobrien bool Emitted; 230236769Sobrien }; 231236769Sobrien typedef std::pair<JumpTableHeader, JumpTable> JumpTableBlock; 232236769Sobrien 233236769Sobrien struct BitTestCase { 234236769Sobrien BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr): 235236769Sobrien Mask(M), ThisBB(T), TargetBB(Tr) { } 236236769Sobrien uint64_t Mask; 237236769Sobrien MachineBasicBlock *ThisBB; 238236769Sobrien MachineBasicBlock *TargetBB; 239236769Sobrien }; 240236769Sobrien 241236769Sobrien typedef SmallVector<BitTestCase, 3> BitTestInfo; 242236769Sobrien 243236769Sobrien struct BitTestBlock { 244236769Sobrien BitTestBlock(APInt F, APInt R, const Value* SV, 245236769Sobrien unsigned Rg, bool E, 246236769Sobrien MachineBasicBlock* P, MachineBasicBlock* D, 247236769Sobrien const BitTestInfo& C): 248236769Sobrien First(F), Range(R), SValue(SV), Reg(Rg), Emitted(E), 249236769Sobrien Parent(P), Default(D), Cases(C) { } 250236769Sobrien APInt First; 251236769Sobrien APInt Range; 252236769Sobrien const Value *SValue; 253236769Sobrien unsigned Reg; 254236769Sobrien bool Emitted; 255236769Sobrien MachineBasicBlock *Parent; 256236769Sobrien MachineBasicBlock *Default; 257236769Sobrien BitTestInfo Cases; 258236769Sobrien }; 259236769Sobrien 260236769Sobrienpublic: 261236769Sobrien // TLI - This is information that describes the available target features we 262236769Sobrien // need for lowering. This indicates when operations are unavailable, 263236769Sobrien // implemented with a libcall, etc. 264236769Sobrien const TargetMachine &TM; 265236769Sobrien const TargetLowering &TLI; 266236769Sobrien SelectionDAG &DAG; 267236769Sobrien const TargetData *TD; 268236769Sobrien AliasAnalysis *AA; 269236769Sobrien 270236769Sobrien /// SwitchCases - Vector of CaseBlock structures used to communicate 271236769Sobrien /// SwitchInst code generation information. 272236769Sobrien std::vector<CaseBlock> SwitchCases; 273236769Sobrien /// JTCases - Vector of JumpTable structures used to communicate 274236769Sobrien /// SwitchInst code generation information. 275236769Sobrien std::vector<JumpTableBlock> JTCases; 276236769Sobrien /// BitTestCases - Vector of BitTestBlock structures used to communicate 277236769Sobrien /// SwitchInst code generation information. 278236769Sobrien std::vector<BitTestBlock> BitTestCases; 279236769Sobrien 280236769Sobrien // Emit PHI-node-operand constants only once even if used by multiple 281236769Sobrien // PHI nodes. 282236769Sobrien DenseMap<const Constant *, unsigned> ConstantsOut; 283236769Sobrien 284236769Sobrien /// FuncInfo - Information about the function as a whole. 285236769Sobrien /// 286236769Sobrien FunctionLoweringInfo &FuncInfo; 287236769Sobrien 288236769Sobrien /// OptLevel - What optimization level we're generating code for. 289236769Sobrien /// 290236769Sobrien CodeGenOpt::Level OptLevel; 291236769Sobrien 292236769Sobrien /// GFI - Garbage collection metadata for the function. 293236769Sobrien GCFunctionInfo *GFI; 294236769Sobrien 295236769Sobrien /// HasTailCall - This is set to true if a call in the current 296236769Sobrien /// block has been translated as a tail call. In this case, 297236769Sobrien /// no subsequent DAG nodes should be created. 298236769Sobrien /// 299236769Sobrien bool HasTailCall; 300236769Sobrien 301236769Sobrien LLVMContext *Context; 302236769Sobrien 303236769Sobrien SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo, 304236769Sobrien CodeGenOpt::Level ol) 305236769Sobrien : SDNodeOrder(0), TM(dag.getTarget()), TLI(dag.getTargetLoweringInfo()), 306236769Sobrien DAG(dag), FuncInfo(funcinfo), OptLevel(ol), 307236769Sobrien HasTailCall(false), Context(dag.getContext()) { 308236769Sobrien } 309236769Sobrien 310236769Sobrien void init(GCFunctionInfo *gfi, AliasAnalysis &aa); 311236769Sobrien 312236769Sobrien /// clear - Clear out the current SelectionDAG and the associated 313236769Sobrien /// state and prepare this SelectionDAGBuilder object to be used 314236769Sobrien /// for a new block. This doesn't clear out information about 315236769Sobrien /// additional blocks that are needed to complete switch lowering 316236769Sobrien /// or PHI node updating; that information is cleared out as it is 317236769Sobrien /// consumed. 318236769Sobrien void clear(); 319236769Sobrien 320236769Sobrien /// getRoot - Return the current virtual root of the Selection DAG, 321236769Sobrien /// flushing any PendingLoad items. This must be done before emitting 322236769Sobrien /// a store or any other node that may need to be ordered after any 323236769Sobrien /// prior load instructions. 324236769Sobrien /// 325236769Sobrien SDValue getRoot(); 326236769Sobrien 327236769Sobrien /// getControlRoot - Similar to getRoot, but instead of flushing all the 328236769Sobrien /// PendingLoad items, flush all the PendingExports items. It is necessary 329236769Sobrien /// to do this before emitting a terminator instruction. 330236769Sobrien /// 331236769Sobrien SDValue getControlRoot(); 332236769Sobrien 333236769Sobrien DebugLoc getCurDebugLoc() const { return CurDebugLoc; } 334236769Sobrien 335236769Sobrien unsigned getSDNodeOrder() const { return SDNodeOrder; } 336236769Sobrien 337236769Sobrien void CopyValueToVirtualRegister(const Value *V, unsigned Reg); 338236769Sobrien 339236769Sobrien /// AssignOrderingToNode - Assign an ordering to the node. The order is gotten 340249033Ssjg /// from how the code appeared in the source. The ordering is used by the 341236769Sobrien /// scheduler to effectively turn off scheduling. 342236769Sobrien void AssignOrderingToNode(const SDNode *Node); 343236769Sobrien 344236769Sobrien void visit(const Instruction &I); 345236769Sobrien 346236769Sobrien void visit(unsigned Opcode, const User &I); 347236769Sobrien 348236769Sobrien SDValue getValue(const Value *V); 349236769Sobrien SDValue getNonRegisterValue(const Value *V); 350236769Sobrien SDValue getValueImpl(const Value *V); 351236769Sobrien 352237578Sobrien void setValue(const Value *V, SDValue NewN) { 353236769Sobrien SDValue &N = NodeMap[V]; 354237578Sobrien assert(N.getNode() == 0 && "Already set a value for this node!"); 355236769Sobrien N = NewN; 356236769Sobrien } 357236769Sobrien 358236769Sobrien void setUnusedArgValue(const Value *V, SDValue NewN) { 359236769Sobrien SDValue &N = UnusedArgNodeMap[V]; 360236769Sobrien assert(N.getNode() == 0 && "Already set a value for this node!"); 361236769Sobrien N = NewN; 362236769Sobrien } 363236769Sobrien 364236769Sobrien void GetRegistersForValue(SDISelAsmOperandInfo &OpInfo, 365236769Sobrien std::set<unsigned> &OutputRegs, 366236769Sobrien std::set<unsigned> &InputRegs); 367236769Sobrien 368236769Sobrien void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, 369236769Sobrien MachineBasicBlock *FBB, MachineBasicBlock *CurBB, 370236769Sobrien MachineBasicBlock *SwitchBB, unsigned Opc); 371236769Sobrien void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, 372236769Sobrien MachineBasicBlock *FBB, 373236769Sobrien MachineBasicBlock *CurBB, 374236769Sobrien MachineBasicBlock *SwitchBB); 375236769Sobrien bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases); 376236769Sobrien bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB); 377236769Sobrien void CopyToExportRegsIfNeeded(const Value *V); 378236769Sobrien void ExportFromCurrentBlock(const Value *V); 379236769Sobrien void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall, 380236769Sobrien MachineBasicBlock *LandingPad = NULL); 381236769Sobrien 382236769Sobrienprivate: 383236769Sobrien // Terminator instructions. 384236769Sobrien void visitRet(const ReturnInst &I); 385236769Sobrien void visitBr(const BranchInst &I); 386236769Sobrien void visitSwitch(const SwitchInst &I); 387236769Sobrien void visitIndirectBr(const IndirectBrInst &I); 388236769Sobrien void visitUnreachable(const UnreachableInst &I) { /* noop */ } 389236769Sobrien 390236769Sobrien // Helpers for visitSwitch 391236769Sobrien bool handleSmallSwitchRange(CaseRec& CR, 392236769Sobrien CaseRecVector& WorkList, 393236769Sobrien const Value* SV, 394236769Sobrien MachineBasicBlock* Default, 395236769Sobrien MachineBasicBlock *SwitchBB); 396236769Sobrien bool handleJTSwitchCase(CaseRec& CR, 397236769Sobrien CaseRecVector& WorkList, 398236769Sobrien const Value* SV, 399236769Sobrien MachineBasicBlock* Default, 400236769Sobrien MachineBasicBlock *SwitchBB); 401236769Sobrien bool handleBTSplitSwitchCase(CaseRec& CR, 402236769Sobrien CaseRecVector& WorkList, 403236769Sobrien const Value* SV, 404236769Sobrien MachineBasicBlock* Default, 405236769Sobrien MachineBasicBlock *SwitchBB); 406236769Sobrien bool handleBitTestsSwitchCase(CaseRec& CR, 407236769Sobrien CaseRecVector& WorkList, 408236769Sobrien const Value* SV, 409236769Sobrien MachineBasicBlock* Default, 410236769Sobrien MachineBasicBlock *SwitchBB); 411236769Sobrienpublic: 412236769Sobrien void visitSwitchCase(CaseBlock &CB, 413236769Sobrien MachineBasicBlock *SwitchBB); 414236769Sobrien void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB); 415236769Sobrien void visitBitTestCase(MachineBasicBlock* NextMBB, 416236769Sobrien unsigned Reg, 417236769Sobrien BitTestCase &B, 418236769Sobrien MachineBasicBlock *SwitchBB); 419236769Sobrien void visitJumpTable(JumpTable &JT); 420236769Sobrien void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH, 421236769Sobrien MachineBasicBlock *SwitchBB); 422236769Sobrien 423236769Sobrienprivate: 424236769Sobrien // These all get lowered before this pass. 425236769Sobrien void visitInvoke(const InvokeInst &I); 426236769Sobrien void visitUnwind(const UnwindInst &I); 427236769Sobrien 428236769Sobrien void visitBinary(const User &I, unsigned OpCode); 429236769Sobrien void visitShift(const User &I, unsigned Opcode); 430236769Sobrien void visitAdd(const User &I) { visitBinary(I, ISD::ADD); } 431236769Sobrien void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); } 432236769Sobrien void visitSub(const User &I) { visitBinary(I, ISD::SUB); } 433236769Sobrien void visitFSub(const User &I); 434236769Sobrien void visitMul(const User &I) { visitBinary(I, ISD::MUL); } 435236769Sobrien void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); } 436236769Sobrien void visitURem(const User &I) { visitBinary(I, ISD::UREM); } 437236769Sobrien void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } 438236769Sobrien void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } 439236769Sobrien void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } 440236769Sobrien void visitSDiv(const User &I) { visitBinary(I, ISD::SDIV); } 441236769Sobrien void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); } 442236769Sobrien void visitAnd (const User &I) { visitBinary(I, ISD::AND); } 443236769Sobrien void visitOr (const User &I) { visitBinary(I, ISD::OR); } 444236769Sobrien void visitXor (const User &I) { visitBinary(I, ISD::XOR); } 445236769Sobrien void visitShl (const User &I) { visitShift(I, ISD::SHL); } 446236769Sobrien void visitLShr(const User &I) { visitShift(I, ISD::SRL); } 447236769Sobrien void visitAShr(const User &I) { visitShift(I, ISD::SRA); } 448236769Sobrien void visitICmp(const User &I); 449236769Sobrien void visitFCmp(const User &I); 450236769Sobrien // Visit the conversion instructions 451236769Sobrien void visitTrunc(const User &I); 452236769Sobrien void visitZExt(const User &I); 453236769Sobrien void visitSExt(const User &I); 454236769Sobrien void visitFPTrunc(const User &I); 455236769Sobrien void visitFPExt(const User &I); 456236769Sobrien void visitFPToUI(const User &I); 457236769Sobrien void visitFPToSI(const User &I); 458236769Sobrien void visitUIToFP(const User &I); 459236769Sobrien void visitSIToFP(const User &I); 460236769Sobrien void visitPtrToInt(const User &I); 461236769Sobrien void visitIntToPtr(const User &I); 462236769Sobrien void visitBitCast(const User &I); 463236769Sobrien 464236769Sobrien void visitExtractElement(const User &I); 465236769Sobrien void visitInsertElement(const User &I); 466236769Sobrien void visitShuffleVector(const User &I); 467236769Sobrien 468236769Sobrien void visitExtractValue(const ExtractValueInst &I); 469236769Sobrien void visitInsertValue(const InsertValueInst &I); 470236769Sobrien 471236769Sobrien void visitGetElementPtr(const User &I); 472236769Sobrien void visitSelect(const User &I); 473236769Sobrien 474236769Sobrien void visitAlloca(const AllocaInst &I); 475236769Sobrien void visitLoad(const LoadInst &I); 476236769Sobrien void visitStore(const StoreInst &I); 477236769Sobrien void visitPHI(const PHINode &I); 478236769Sobrien void visitCall(const CallInst &I); 479236769Sobrien bool visitMemCmpCall(const CallInst &I); 480236769Sobrien 481236769Sobrien void visitInlineAsm(ImmutableCallSite CS); 482236769Sobrien const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic); 483236769Sobrien void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic); 484236769Sobrien 485236769Sobrien void visitPow(const CallInst &I); 486236769Sobrien void visitExp2(const CallInst &I); 487236769Sobrien void visitExp(const CallInst &I); 488236769Sobrien void visitLog(const CallInst &I); 489236769Sobrien void visitLog2(const CallInst &I); 490236769Sobrien void visitLog10(const CallInst &I); 491236769Sobrien 492236769Sobrien void visitVAStart(const CallInst &I); 493236769Sobrien void visitVAArg(const VAArgInst &I); 494236769Sobrien void visitVAEnd(const CallInst &I); 495236769Sobrien void visitVACopy(const CallInst &I); 496236769Sobrien 497236769Sobrien void visitUserOp1(const Instruction &I) { 498236769Sobrien llvm_unreachable("UserOp1 should not exist at instruction selection time!"); 499236769Sobrien } 500236769Sobrien void visitUserOp2(const Instruction &I) { 501236769Sobrien llvm_unreachable("UserOp2 should not exist at instruction selection time!"); 502236769Sobrien } 503236769Sobrien 504236769Sobrien const char *implVisitBinaryAtomic(const CallInst& I, ISD::NodeType Op); 505236769Sobrien const char *implVisitAluOverflow(const CallInst &I, ISD::NodeType Op); 506236769Sobrien 507236769Sobrien void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB); 508236769Sobrien 509236769Sobrien /// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a 510236769Sobrien /// function argument, create the corresponding DBG_VALUE machine instruction 511236769Sobrien /// for it now. At the end of instruction selection, they will be inserted to 512236769Sobrien /// the entry BB. 513236769Sobrien bool EmitFuncArgumentDbgValue(const DbgValueInst &DI, 514236769Sobrien const Value *V, MDNode *Variable, 515236769Sobrien uint64_t Offset, const SDValue &N); 516236769Sobrien}; 517236769Sobrien 518236769Sobrien} // end namespace llvm 519236769Sobrien 520236769Sobrien#endif 521236769Sobrien