ProcessImplicitDefs.cpp revision 276479
1139823Simp//===---------------------- ProcessImplicitDefs.cpp -----------------------===// 21541Srgrimes// 31541Srgrimes// The LLVM Compiler Infrastructure 41541Srgrimes// 51541Srgrimes// This file is distributed under the University of Illinois Open Source 61541Srgrimes// License. See LICENSE.TXT for details. 71541Srgrimes// 81541Srgrimes//===----------------------------------------------------------------------===// 91541Srgrimes 101541Srgrimes#include "llvm/ADT/SetVector.h" 111541Srgrimes#include "llvm/Analysis/AliasAnalysis.h" 121541Srgrimes#include "llvm/CodeGen/MachineFunctionPass.h" 131541Srgrimes#include "llvm/CodeGen/MachineInstr.h" 141541Srgrimes#include "llvm/CodeGen/MachineRegisterInfo.h" 151541Srgrimes#include "llvm/CodeGen/Passes.h" 161541Srgrimes#include "llvm/Support/Debug.h" 171541Srgrimes#include "llvm/Support/raw_ostream.h" 181541Srgrimes#include "llvm/Target/TargetInstrInfo.h" 191541Srgrimes 201541Srgrimesusing namespace llvm; 211541Srgrimes 221541Srgrimes#define DEBUG_TYPE "processimplicitdefs" 231541Srgrimes 241541Srgrimesnamespace { 251541Srgrimes/// Process IMPLICIT_DEF instructions and make sure there is one implicit_def 261541Srgrimes/// for each use. Add isUndef marker to implicit_def defs and their uses. 271541Srgrimesclass ProcessImplicitDefs : public MachineFunctionPass { 281541Srgrimes const TargetInstrInfo *TII; 291541Srgrimes const TargetRegisterInfo *TRI; 301541Srgrimes MachineRegisterInfo *MRI; 311541Srgrimes 321541Srgrimes SmallSetVector<MachineInstr*, 16> WorkList; 331541Srgrimes 341541Srgrimes void processImplicitDef(MachineInstr *MI); 351541Srgrimes bool canTurnIntoImplicitDef(MachineInstr *MI); 3650477Speter 371541Srgrimespublic: 381541Srgrimes static char ID; 392168Spaul 402168Spaul ProcessImplicitDefs() : MachineFunctionPass(ID) { 412168Spaul initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry()); 4287955Sjdp } 4370834Swollman 44134967Srwatson void getAnalysisUsage(AnalysisUsage &au) const override; 45148366Scsjp 46148366Scsjp bool runOnMachineFunction(MachineFunction &fn) override; 471549Srgrimes}; 481541Srgrimes} // end anonymous namespace 491541Srgrimes 501541Srgrimeschar ProcessImplicitDefs::ID = 0; 51177548Scsjpchar &llvm::ProcessImplicitDefsID = ProcessImplicitDefs::ID; 521541Srgrimes 53134967SrwatsonINITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs", 541541Srgrimes "Process Implicit Definitions", false, false) 55177548ScsjpINITIALIZE_PASS_END(ProcessImplicitDefs, "processimpdefs", 561541Srgrimes "Process Implicit Definitions", false, false) 571541Srgrimes 58166329Srwatsonvoid ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const { 591541Srgrimes AU.setPreservesCFG(); 60166329Srwatson AU.addPreserved<AliasAnalysis>(); 611541Srgrimes MachineFunctionPass::getAnalysisUsage(AU); 621541Srgrimes} 631541Srgrimes 641541Srgrimesbool ProcessImplicitDefs::canTurnIntoImplicitDef(MachineInstr *MI) { 651541Srgrimes if (!MI->isCopyLike() && 66244090Sghelmer !MI->isInsertSubreg() && 671541Srgrimes !MI->isRegSequence() && 681541Srgrimes !MI->isPHI()) 691541Srgrimes return false; 701541Srgrimes for (MIOperands MO(MI); MO.isValid(); ++MO) 711541Srgrimes if (MO->isReg() && MO->isUse() && MO->readsReg()) 721541Srgrimes return false; 731541Srgrimes return true; 74149376Scsjp} 75149376Scsjp 76196150Sjkimvoid ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) { 77177548Scsjp DEBUG(dbgs() << "Processing " << *MI); 78177548Scsjp unsigned Reg = MI->getOperand(0).getReg(); 791541Srgrimes 801541Srgrimes if (TargetRegisterInfo::isVirtualRegister(Reg)) { 811541Srgrimes // For virtual registers, mark all uses as <undef>, and convert users to 821541Srgrimes // implicit-def when possible. 83233938Smelifaro for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { 8452248Smsmith MO.setIsUndef(); 85167035Sjkim MachineInstr *UserMI = MO.getParent(); 86209216Sjkim if (!canTurnIntoImplicitDef(UserMI)) 87167035Sjkim continue; 889235Spst DEBUG(dbgs() << "Converting to IMPLICIT_DEF: " << *UserMI); 899235Spst UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF)); 9041087Struckman WorkList.insert(UserMI); 911541Srgrimes } 92235745Smelifaro MI->eraseFromParent(); 9387955Sjdp return; 94122524Srwatson } 95177548Scsjp 96148366Scsjp // This is a physreg implicit-def. 97149376Scsjp // Look for the first instruction to use or define an alias. 98177548Scsjp MachineBasicBlock::instr_iterator UserMI = MI; 99177548Scsjp MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end(); 100177548Scsjp bool Found = false; 101177548Scsjp for (++UserMI; UserMI != UserE; ++UserMI) { 102177548Scsjp for (MIOperands MO(UserMI); MO.isValid(); ++MO) { 103207195Skib if (!MO->isReg()) 1041541Srgrimes continue; 1051541Srgrimes unsigned UserReg = MO->getReg(); 10687955Sjdp if (!TargetRegisterInfo::isPhysicalRegister(UserReg) || 10787955Sjdp !TRI->regsOverlap(Reg, UserReg)) 10887955Sjdp continue; 10987955Sjdp // UserMI uses or redefines Reg. Set <undef> flags on all uses. 11087955Sjdp Found = true; 111235745Smelifaro if (MO->isUse()) 112235745Smelifaro MO->setIsUndef(); 113235745Smelifaro } 11472544Sjlemon if (Found) 115233937Smelifaro break; 116233937Smelifaro } 117233937Smelifaro 118233937Smelifaro // If we found the using MI, we can erase the IMPLICIT_DEF. 119233937Smelifaro if (Found) { 120233937Smelifaro DEBUG(dbgs() << "Physreg user: " << *UserMI); 1211541Srgrimes MI->eraseFromParent(); 122148366Scsjp return; 123148366Scsjp } 124148366Scsjp 125177548Scsjp // Using instr wasn't found, it could be in another block. 126148366Scsjp // Leave the physreg IMPLICIT_DEF, but trim any extra operands. 127148366Scsjp for (unsigned i = MI->getNumOperands() - 1; i; --i) 128177548Scsjp MI->RemoveOperand(i); 129148366Scsjp DEBUG(dbgs() << "Keeping physreg: " << *MI); 130167035Sjkim} 131167035Sjkim 132148366Scsjp/// processImplicitDefs - Process IMPLICIT_DEF instructions and turn them into 133177548Scsjp/// <undef> operands. 134177548Scsjpbool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &MF) { 135177548Scsjp 136148366Scsjp DEBUG(dbgs() << "********** PROCESS IMPLICIT DEFS **********\n" 137148366Scsjp << "********** Function: " << MF.getName() << '\n'); 138148366Scsjp 139148366Scsjp bool Changed = false; 140148366Scsjp 141148366Scsjp TII = MF.getTarget().getInstrInfo(); 142149376Scsjp TRI = MF.getTarget().getRegisterInfo(); 143177548Scsjp MRI = &MF.getRegInfo(); 144177548Scsjp assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form."); 145177548Scsjp assert(WorkList.empty() && "Inconsistent worklist state"); 146177548Scsjp 147177548Scsjp for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end(); 148177548Scsjp MFI != MFE; ++MFI) { 149177548Scsjp // Scan the basic block for implicit defs. 150177548Scsjp for (MachineBasicBlock::instr_iterator MBBI = MFI->instr_begin(), 151177548Scsjp MBBE = MFI->instr_end(); MBBI != MBBE; ++MBBI) 152177548Scsjp if (MBBI->isImplicitDef()) 153148366Scsjp WorkList.insert(MBBI); 154148366Scsjp 155233937Smelifaro if (WorkList.empty()) 156233937Smelifaro continue; 157233937Smelifaro 158233937Smelifaro DEBUG(dbgs() << "BB#" << MFI->getNumber() << " has " << WorkList.size() 15972544Sjlemon << " implicit defs.\n"); 160235745Smelifaro Changed = true; 161235745Smelifaro 1621541Srgrimes // Drain the WorkList to recursively process any new implicit defs. 163 do processImplicitDef(WorkList.pop_back_val()); 164 while (!WorkList.empty()); 165 } 166 return Changed; 167} 168