rtl.def revision 18334
118334Speter/* This file contains the definitions and documentation for the 218334Speter Register Transfer Expressions (rtx's) that make up the 318334Speter Register Transfer Language (rtl) used in the Back End of the GNU compiler. 418334Speter Copyright (C) 1987, 1988, 1992, 1994, 1995 Free Software Foundation, Inc. 518334Speter 618334SpeterThis file is part of GNU CC. 718334Speter 818334SpeterGNU CC is free software; you can redistribute it and/or modify 918334Speterit under the terms of the GNU General Public License as published by 1018334Speterthe Free Software Foundation; either version 2, or (at your option) 1118334Speterany later version. 1218334Speter 1318334SpeterGNU CC is distributed in the hope that it will be useful, 1418334Speterbut WITHOUT ANY WARRANTY; without even the implied warranty of 1518334SpeterMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1618334SpeterGNU General Public License for more details. 1718334Speter 1818334SpeterYou should have received a copy of the GNU General Public License 1918334Speteralong with GNU CC; see the file COPYING. If not, write to 2018334Speterthe Free Software Foundation, 59 Temple Place - Suite 330, 2118334SpeterBoston, MA 02111-1307, USA. */ 2218334Speter 2318334Speter 2418334Speter/* Expression definitions and descriptions for all targets are in this file. 2518334Speter Some will not be used for some targets. 2618334Speter 2718334Speter The fields in the cpp macro call "DEF_RTL_EXPR()" 2818334Speter are used to create declarations in the C source of the compiler. 2918334Speter 3018334Speter The fields are: 3118334Speter 3218334Speter 1. The internal name of the rtx used in the C source. 3318334Speter It is a tag in the enumeration "enum rtx_code" defined in "rtl.h". 3418334Speter By convention these are in UPPER_CASE. 3518334Speter 3618334Speter 2. The name of the rtx in the external ASCII format read by 3718334Speter read_rtx(), and printed by print_rtx(). 3818334Speter These names are stored in rtx_name[]. 3918334Speter By convention these are the internal (field 1) names in lower_case. 4018334Speter 4118334Speter 3. The print format, and type of each rtx->fld[] (field) in this rtx. 4218334Speter These formats are stored in rtx_format[]. 4318334Speter The meaning of the formats is documented in front of this array in rtl.c 4418334Speter 4518334Speter 4. The class of the rtx. These are stored in rtx_class and are accessed 4618334Speter via the GET_RTX_CLASS macro. They are defined as follows: 4718334Speter 4818334Speter "o" an rtx code that can be used to represent an object (e.g, REG, MEM) 4918334Speter "<" an rtx code for a comparison (e.g, EQ, NE, LT) 5018334Speter "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT) 5118334Speter "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT) 5218334Speter "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE) 5318334Speter "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV) 5418334Speter "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT) 5518334Speter "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) 5618334Speter "m" an rtx code for something that matches in insns (e.g, MATCH_DUP) 5718334Speter "x" everything else 5818334Speter 5918334Speter */ 6018334Speter 6118334Speter/* --------------------------------------------------------------------- 6218334Speter Expressions (and "meta" expressions) used for structuring the 6318334Speter rtl representation of a program. 6418334Speter --------------------------------------------------------------------- */ 6518334Speter 6618334Speter/* an expression code name unknown to the reader */ 6718334SpeterDEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x') 6818334Speter 6918334Speter/* (NIL) is used by rtl reader and printer to represent a null pointer. */ 7018334Speter 7118334SpeterDEF_RTL_EXPR(NIL, "nil", "*", 'x') 7218334Speter 7318334Speter/* --------------------------------------------------------------------- 7418334Speter Expressions used in constructing lists. 7518334Speter --------------------------------------------------------------------- */ 7618334Speter 7718334Speter/* a linked list of expressions */ 7818334SpeterDEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x') 7918334Speter 8018334Speter/* a linked list of instructions. 8118334Speter The insns are represented in print by their uids. */ 8218334SpeterDEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x') 8318334Speter 8418334Speter/* ---------------------------------------------------------------------- 8518334Speter Expression types for machine descriptions. 8618334Speter These do not appear in actual rtl code in the compiler. 8718334Speter ---------------------------------------------------------------------- */ 8818334Speter 8918334Speter/* Appears only in machine descriptions. 9018334Speter Means use the function named by the second arg (the string) 9118334Speter as a predicate; if matched, store the structure that was matched 9218334Speter in the operand table at index specified by the first arg (the integer). 9318334Speter If the second arg is the null string, the structure is just stored. 9418334Speter 9518334Speter A third string argument indicates to the register allocator restrictions 9618334Speter on where the operand can be allocated. 9718334Speter 9818334Speter If the target needs no restriction on any instruction this field should 9918334Speter be the null string. 10018334Speter 10118334Speter The string is prepended by: 10218334Speter '=' to indicate the operand is only written to. 10318334Speter '+' to indicate the operand is both read and written to. 10418334Speter 10518334Speter Each character in the string represents an allocatable class for an operand. 10618334Speter 'g' indicates the operand can be any valid class. 10718334Speter 'i' indicates the operand can be immediate (in the instruction) data. 10818334Speter 'r' indicates the operand can be in a register. 10918334Speter 'm' indicates the operand can be in memory. 11018334Speter 'o' a subset of the 'm' class. Those memory addressing modes that 11118334Speter can be offset at compile time (have a constant added to them). 11218334Speter 11318334Speter Other characters indicate target dependent operand classes and 11418334Speter are described in each target's machine description. 11518334Speter 11618334Speter For instructions with more than one operand, sets of classes can be 11718334Speter separated by a comma to indicate the appropriate multi-operand constraints. 11818334Speter There must be a 1 to 1 correspondence between these sets of classes in 11918334Speter all operands for an instruction. 12018334Speter */ 12118334SpeterDEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm') 12218334Speter 12318334Speter/* Appears only in machine descriptions. 12418334Speter Means match a SCRATCH or a register. When used to generate rtl, a 12518334Speter SCRATCH is generated. As for MATCH_OPERAND, the mode specifies 12618334Speter the desired mode and the first argument is the operand number. 12718334Speter The second argument is the constraint. */ 12818334SpeterDEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm') 12918334Speter 13018334Speter/* Appears only in machine descriptions. 13118334Speter Means match only something equal to what is stored in the operand table 13218334Speter at the index specified by the argument. */ 13318334SpeterDEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm') 13418334Speter 13518334Speter/* Appears only in machine descriptions. 13618334Speter Means apply a predicate, AND match recursively the operands of the rtx. 13718334Speter Operand 0 is the operand-number, as in match_operand. 13818334Speter Operand 1 is a predicate to apply (as a string, a function name). 13918334Speter Operand 2 is a vector of expressions, each of which must match 14018334Speter one subexpression of the rtx this construct is matching. */ 14118334SpeterDEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm') 14218334Speter 14318334Speter/* Appears only in machine descriptions. 14418334Speter Means to match a PARALLEL of arbitrary length. The predicate is applied 14518334Speter to the PARALLEL and the initial expressions in the PARALLEL are matched. 14618334Speter Operand 0 is the operand-number, as in match_operand. 14718334Speter Operand 1 is a predicate to apply to the PARALLEL. 14818334Speter Operand 2 is a vector of expressions, each of which must match the 14918334Speter corresponding element in the PARALLEL. */ 15018334SpeterDEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm') 15118334Speter 15218334Speter/* Appears only in machine descriptions. 15318334Speter Means match only something equal to what is stored in the operand table 15418334Speter at the index specified by the argument. For MATCH_OPERATOR. */ 15518334SpeterDEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm') 15618334Speter 15718334Speter/* Appears only in machine descriptions. 15818334Speter Means match only something equal to what is stored in the operand table 15918334Speter at the index specified by the argument. For MATCH_PARALLEL. */ 16018334SpeterDEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm') 16118334Speter 16218334Speter/* Appears only in machine descriptions. 16318334Speter Defines the pattern for one kind of instruction. 16418334Speter Operand: 16518334Speter 0: names this instruction. 16618334Speter If the name is the null string, the instruction is in the 16718334Speter machine description just to be recognized, and will never be emitted by 16818334Speter the tree to rtl expander. 16918334Speter 1: is the pattern. 17018334Speter 2: is a string which is a C expression 17118334Speter giving an additional condition for recognizing this pattern. 17218334Speter A null string means no extra condition. 17318334Speter 3: is the action to execute if this pattern is matched. 17418334Speter If this assembler code template starts with a * then it is a fragment of 17518334Speter C code to run to decide on a template to use. Otherwise, it is the 17618334Speter template to use. 17718334Speter 4: optionally, a vector of attributes for this insn. 17818334Speter */ 17918334SpeterDEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x') 18018334Speter 18118334Speter/* Definition of a peephole optimization. 18218334Speter 1st operand: vector of insn patterns to match 18318334Speter 2nd operand: C expression that must be true 18418334Speter 3rd operand: template or C code to produce assembler output. 18518334Speter 4: optionally, a vector of attributes for this insn. 18618334Speter */ 18718334SpeterDEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x') 18818334Speter 18918334Speter/* Definition of a split operation. 19018334Speter 1st operand: insn pattern to match 19118334Speter 2nd operand: C expression that must be true 19218334Speter 3rd operand: vector of insn patterns to place into a SEQUENCE 19318334Speter 4th operand: optionally, some C code to execute before generating the 19418334Speter insns. This might, for example, create some RTX's and store them in 19518334Speter elements of `recog_operand' for use by the vector of insn-patterns. 19618334Speter (`operands' is an alias here for `recog_operand'). */ 19718334SpeterDEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x') 19818334Speter 19918334Speter/* Definition of a combiner pattern. 20018334Speter Operands not defined yet. */ 20118334SpeterDEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x') 20218334Speter 20318334Speter/* Define how to generate multiple insns for a standard insn name. 20418334Speter 1st operand: the insn name. 20518334Speter 2nd operand: vector of insn-patterns. 20618334Speter Use match_operand to substitute an element of `recog_operand'. 20718334Speter 3rd operand: C expression that must be true for this to be available. 20818334Speter This may not test any operands. 20918334Speter 4th operand: Extra C code to execute before generating the insns. 21018334Speter This might, for example, create some RTX's and store them in 21118334Speter elements of `recog_operand' for use by the vector of insn-patterns. 21218334Speter (`operands' is an alias here for `recog_operand'). */ 21318334SpeterDEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x') 21418334Speter 21518334Speter/* Define a requirement for delay slots. 21618334Speter 1st operand: Condition involving insn attributes that, if true, 21718334Speter indicates that the insn requires the number of delay slots 21818334Speter shown. 21918334Speter 2nd operand: Vector whose length is the three times the number of delay 22018334Speter slots required. 22118334Speter Each entry gives three conditions, each involving attributes. 22218334Speter The first must be true for an insn to occupy that delay slot 22318334Speter location. The second is true for all insns that can be 22418334Speter annulled if the branch is true and the third is true for all 22518334Speter insns that can be annulled if the branch is false. 22618334Speter 22718334Speter Multiple DEFINE_DELAYs may be present. They indicate differing 22818334Speter requirements for delay slots. */ 22918334SpeterDEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x') 23018334Speter 23118334Speter/* Define a set of insns that requires a function unit. This means that 23218334Speter these insns produce their result after a delay and that there may be 23318334Speter restrictions on the number of insns of this type that can be scheduled 23418334Speter simultaneously. 23518334Speter 23618334Speter More than one DEFINE_FUNCTION_UNIT can be specified for a function unit. 23718334Speter Each gives a set of operations and associated delays. The first three 23818334Speter operands must be the same for each operation for the same function unit. 23918334Speter 24018334Speter All delays are specified in cycles. 24118334Speter 24218334Speter 1st operand: Name of function unit (mostly for documentation) 24318334Speter 2nd operand: Number of identical function units in CPU 24418334Speter 3rd operand: Total number of simultaneous insns that can execute on this 24518334Speter function unit; 0 if unlimited. 24618334Speter 4th operand: Condition involving insn attribute, that, if true, specifies 24718334Speter those insns that this expression applies to. 24818334Speter 5th operand: Constant delay after which insn result will be 24918334Speter available. 25018334Speter 6th operand: Delay until next insn can be scheduled on the function unit 25118334Speter executing this operation. The meaning depends on whether or 25218334Speter not the next operand is supplied. 25318334Speter 7th operand: If this operand is not specified, the 6th operand gives the 25418334Speter number of cycles after the instruction matching the 4th 25518334Speter operand begins using the function unit until a subsequent 25618334Speter insn can begin. A value of zero should be used for a 25718334Speter unit with no issue constraints. If only one operation can 25818334Speter be executed a time and the unit is busy for the entire time, 25918334Speter the 3rd operand should be specified as 1, the 6th operand 26018334Speter sould be specified as 0, and the 7th operand should not 26118334Speter be specified. 26218334Speter 26318334Speter If this operand is specified, it is a list of attribute 26418334Speter expressions. If an insn for which any of these expressions 26518334Speter is true is currently executing on the function unit, the 26618334Speter issue delay will be given by the 6th operand. Otherwise, 26718334Speter the insn can be immediately scheduled (subject to the limit 26818334Speter on the number of simultaneous operations executing on the 26918334Speter unit.) */ 27018334SpeterDEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x') 27118334Speter 27218334Speter/* Define attribute computation for `asm' instructions. */ 27318334SpeterDEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' ) 27418334Speter 27518334Speter/* SEQUENCE appears in the result of a `gen_...' function 27618334Speter for a DEFINE_EXPAND that wants to make several insns. 27718334Speter Its elements are the bodies of the insns that should be made. 27818334Speter `emit_insn' takes the SEQUENCE apart and makes separate insns. */ 27918334SpeterDEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x') 28018334Speter 28118334Speter/* Refers to the address of its argument. 28218334Speter This appears only in machine descriptions, indicating that 28318334Speter any expression that would be acceptable as the operand of MEM 28418334Speter should be matched. */ 28518334SpeterDEF_RTL_EXPR(ADDRESS, "address", "e", 'm') 28618334Speter 28718334Speter/* ---------------------------------------------------------------------- 28818334Speter Expressions used for insn attributes. These also do not appear in 28918334Speter actual rtl code in the compiler. 29018334Speter ---------------------------------------------------------------------- */ 29118334Speter 29218334Speter/* Definition of an insn attribute. 29318334Speter 1st operand: name of the attribute 29418334Speter 2nd operand: comma-separated list of possible attribute values 29518334Speter 3rd operand: expression for the default value of the attribute. */ 29618334SpeterDEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x') 29718334Speter 29818334Speter/* Marker for the name of an attribute. */ 29918334SpeterDEF_RTL_EXPR(ATTR, "attr", "s", 'x') 30018334Speter 30118334Speter/* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and 30218334Speter in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that 30318334Speter pattern. 30418334Speter 30518334Speter (set_attr "name" "value") is equivalent to 30618334Speter (set (attr "name") (const_string "value")) */ 30718334SpeterDEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x') 30818334Speter 30918334Speter/* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to 31018334Speter specify that attribute values are to be assigned according to the 31118334Speter alternative matched. 31218334Speter 31318334Speter The following three expressions are equivalent: 31418334Speter 31518334Speter (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1") 31618334Speter (eq_attrq "alternative" "2") (const_string "a2")] 31718334Speter (const_string "a3"))) 31818334Speter (set_attr_alternative "att" [(const_string "a1") (const_string "a2") 31918334Speter (const_string "a3")]) 32018334Speter (set_attr "att" "a1,a2,a3") 32118334Speter */ 32218334SpeterDEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x') 32318334Speter 32418334Speter/* A conditional expression true if the value of the specified attribute of 32518334Speter the current insn equals the specified value. The first operand is the 32618334Speter attribute name and the second is the comparison value. */ 32718334SpeterDEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x') 32818334Speter 32918334Speter/* A conditional expression which is true if the specified flag is 33018334Speter true for the insn being scheduled in reorg. 33118334Speter 33218334Speter genattr.c defines the following flags which can be tested by 33318334Speter (attr_flag "foo") expressions in eligible_for_delay. 33418334Speter 33518334Speter forward, backward, very_likely, likely, very_unlikely, and unlikely. */ 33618334Speter 33718334SpeterDEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x') 33818334Speter 33918334Speter/* ---------------------------------------------------------------------- 34018334Speter Expression types used for things in the instruction chain. 34118334Speter 34218334Speter All formats must start with "iuu" to handle the chain. 34318334Speter Each insn expression holds an rtl instruction and its semantics 34418334Speter during back-end processing. 34518334Speter See macros's in "rtl.h" for the meaning of each rtx->fld[]. 34618334Speter 34718334Speter ---------------------------------------------------------------------- */ 34818334Speter 34918334Speter/* An instruction that cannot jump. */ 35018334SpeterDEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i') 35118334Speter 35218334Speter/* An instruction that can possibly jump. 35318334Speter Fields ( rtx->fld[] ) have exact same meaning as INSN's. */ 35418334SpeterDEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i') 35518334Speter 35618334Speter/* An instruction that can possibly call a subroutine 35718334Speter but which will not change which instruction comes next 35818334Speter in the current function. 35918334Speter Field ( rtx->fld[7] ) is CALL_INSN_FUNCTION_USAGE. 36018334Speter All other fields ( rtx->fld[] ) have exact same meaning as INSN's. */ 36118334SpeterDEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueieee", 'i') 36218334Speter 36318334Speter/* A marker that indicates that control will not flow through. */ 36418334SpeterDEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x') 36518334Speter 36618334Speter/* Holds a label that is followed by instructions. 36718334Speter Operand: 36818334Speter 3: is a number that is unique in the entire compilation. 36918334Speter 4: is the user-given name of the label, if any. 37018334Speter 5: is used in jump.c for the use-count of the label. 37118334Speter and in flow.c to point to the chain of label_ref's to this label. */ 37218334SpeterDEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis0", 'x') 37318334Speter 37418334Speter/* Say where in the code a source line starts, for symbol table's sake. 37518334Speter Contains a filename and a line number. Line numbers <= 0 are special: 37618334Speter 0 is used in a dummy placed at the front of every function 37718334Speter just so there will never be a need to delete the first insn; 37818334Speter -1 indicates a dummy; insns to be deleted by flow analysis and combining 37918334Speter are really changed to NOTEs with a number of -1. 38018334Speter -2 means beginning of a name binding contour; output N_LBRAC. 38118334Speter -3 means end of a contour; output N_RBRAC. */ 38218334SpeterDEF_RTL_EXPR(NOTE, "note", "iuusn", 'x') 38318334Speter 38418334Speter/* INLINE_HEADER is use by inline function machinery. The information 38518334Speter it contains helps to build the mapping function between the rtx's of 38618334Speter the function to be inlined and the current function being expanded. */ 38718334Speter 38818334SpeterDEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuuiiiiiieeiiEe", 'x') 38918334Speter 39018334Speter/* ---------------------------------------------------------------------- 39118334Speter Top level constituents of INSN, JUMP_INSN and CALL_INSN. 39218334Speter ---------------------------------------------------------------------- */ 39318334Speter 39418334Speter/* Several operations to be done in parallel. */ 39518334SpeterDEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x') 39618334Speter 39718334Speter/* A string that is passed through to the assembler as input. 39818334Speter One can obviously pass comments through by using the 39918334Speter assembler comment syntax. 40018334Speter These occur in an insn all by themselves as the PATTERN. 40118334Speter They also appear inside an ASM_OPERANDS 40218334Speter as a convenient way to hold a string. */ 40318334SpeterDEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x') 40418334Speter 40518334Speter/* An assembler instruction with operands. 40618334Speter 1st operand is the instruction template. 40718334Speter 2nd operand is the constraint for the output. 40818334Speter 3rd operand is the number of the output this expression refers to. 40918334Speter When an insn stores more than one value, a separate ASM_OPERANDS 41018334Speter is made for each output; this integer distinguishes them. 41118334Speter 4th is a vector of values of input operands. 41218334Speter 5th is a vector of modes and constraints for the input operands. 41318334Speter Each element is an ASM_INPUT containing a constraint string 41418334Speter and whose mode indicates the mode of the input operand. 41518334Speter 6th is the name of the containing source file. 41618334Speter 7th is the source line number. */ 41718334SpeterDEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x') 41818334Speter 41918334Speter/* A machine-specific operation. 42018334Speter 1st operand is a vector of operands being used by the operation so that 42118334Speter any needed reloads can be done. 42218334Speter 2nd operand is a unique value saying which of a number of machine-specific 42318334Speter operations is to be performed. 42418334Speter (Note that the vector must be the first operand because of the way that 42518334Speter genrecog.c record positions within an insn.) 42618334Speter This can occur all by itself in a PATTERN, as a component of a PARALLEL, 42718334Speter or inside an expression. */ 42818334SpeterDEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x') 42918334Speter 43018334Speter/* Similar, but a volatile operation and one which may trap. */ 43118334SpeterDEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x') 43218334Speter 43318334Speter/* Vector of addresses, stored as full words. */ 43418334Speter/* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */ 43518334SpeterDEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x') 43618334Speter 43718334Speter/* Vector of address differences X0 - BASE, X1 - BASE, ... 43818334Speter First operand is BASE; the vector contains the X's. 43918334Speter The machine mode of this rtx says how much space to leave 44018334Speter for each difference. */ 44118334SpeterDEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE", 'x') 44218334Speter 44318334Speter/* ---------------------------------------------------------------------- 44418334Speter At the top level of an instruction (perhaps under PARALLEL). 44518334Speter ---------------------------------------------------------------------- */ 44618334Speter 44718334Speter/* Assignment. 44818334Speter Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to. 44918334Speter Operand 2 is the value stored there. 45018334Speter ALL assignment must use SET. 45118334Speter Instructions that do multiple assignments must use multiple SET, 45218334Speter under PARALLEL. */ 45318334SpeterDEF_RTL_EXPR(SET, "set", "ee", 'x') 45418334Speter 45518334Speter/* Indicate something is used in a way that we don't want to explain. 45618334Speter For example, subroutine calls will use the register 45718334Speter in which the static chain is passed. */ 45818334SpeterDEF_RTL_EXPR(USE, "use", "e", 'x') 45918334Speter 46018334Speter/* Indicate something is clobbered in a way that we don't want to explain. 46118334Speter For example, subroutine calls will clobber some physical registers 46218334Speter (the ones that are by convention not saved). */ 46318334SpeterDEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x') 46418334Speter 46518334Speter/* Call a subroutine. 46618334Speter Operand 1 is the address to call. 46718334Speter Operand 2 is the number of arguments. */ 46818334Speter 46918334SpeterDEF_RTL_EXPR(CALL, "call", "ee", 'x') 47018334Speter 47118334Speter/* Return from a subroutine. */ 47218334Speter 47318334SpeterDEF_RTL_EXPR(RETURN, "return", "", 'x') 47418334Speter 47518334Speter/* Conditional trap. 47618334Speter Operand 1 is the condition. 47718334Speter Operand 2 is the trap code. 47818334Speter For an unconditional trap, make the condition (const_int 1). */ 47918334SpeterDEF_RTL_EXPR(TRAP_IF, "trap_if", "ei", 'x') 48018334Speter 48118334Speter/* ---------------------------------------------------------------------- 48218334Speter Primitive values for use in expressions. 48318334Speter ---------------------------------------------------------------------- */ 48418334Speter 48518334Speter/* numeric integer constant */ 48618334SpeterDEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o') 48718334Speter 48818334Speter/* numeric double constant. 48918334Speter Operand 0 is the MEM that stores this constant in memory, 49018334Speter or various other things (see comments at immed_double_const in varasm.c). 49118334Speter Operand 1 is a chain of all CONST_DOUBLEs in use in the current function. 49218334Speter Remaining operands hold the actual value. 49318334Speter The number of operands may be more than 2 if cross-compiling; 49418334Speter see init_rtl. */ 49518334SpeterDEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ww", 'o') 49618334Speter 49718334Speter/* String constant. Used only for attributes right now. */ 49818334SpeterDEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o') 49918334Speter 50018334Speter/* This is used to encapsulate an expression whose value is constant 50118334Speter (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be 50218334Speter recognized as a constant operand rather than by arithmetic instructions. */ 50318334Speter 50418334SpeterDEF_RTL_EXPR(CONST, "const", "e", 'o') 50518334Speter 50618334Speter/* program counter. Ordinary jumps are represented 50718334Speter by a SET whose first operand is (PC). */ 50818334SpeterDEF_RTL_EXPR(PC, "pc", "", 'o') 50918334Speter 51018334Speter/* A register. The "operand" is the register number, accessed 51118334Speter with the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER 51218334Speter than a hardware register is being referred to. */ 51318334SpeterDEF_RTL_EXPR(REG, "reg", "i", 'o') 51418334Speter 51518334Speter/* A scratch register. This represents a register used only within a 51618334Speter single insn. It will be turned into a REG during register allocation 51718334Speter or reload unless the constraint indicates that the register won't be 51818334Speter needed, in which case it can remain a SCRATCH. This code is 51918334Speter marked as having one operand so it can be turned into a REG. */ 52018334SpeterDEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o') 52118334Speter 52218334Speter/* One word of a multi-word value. 52318334Speter The first operand is the complete value; the second says which word. 52418334Speter The WORDS_BIG_ENDIAN flag controls whether word number 0 52518334Speter (as numbered in a SUBREG) is the most or least significant word. 52618334Speter 52718334Speter This is also used to refer to a value in a different machine mode. 52818334Speter For example, it can be used to refer to a SImode value as if it were 52918334Speter Qimode, or vice versa. Then the word number is always 0. */ 53018334SpeterDEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x') 53118334Speter 53218334Speter/* This one-argument rtx is used for move instructions 53318334Speter that are guaranteed to alter only the low part of a destination. 53418334Speter Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...)) 53518334Speter has an unspecified effect on the high part of REG, 53618334Speter but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...)) 53718334Speter is guaranteed to alter only the bits of REG that are in HImode. 53818334Speter 53918334Speter The actual instruction used is probably the same in both cases, 54018334Speter but the register constraints may be tighter when STRICT_LOW_PART 54118334Speter is in use. */ 54218334Speter 54318334SpeterDEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x') 54418334Speter 54518334Speter/* (CONCAT a b) represents the virtual concatenation of a and b 54618334Speter to make a value that has as many bits as a and b put together. 54718334Speter This is used for complex values. Normally it appears only 54818334Speter in DECL_RTLs and during RTL generation, but not in the insn chain. */ 54918334SpeterDEF_RTL_EXPR(CONCAT, "concat", "ee", 'o') 55018334Speter 55118334Speter/* A memory location; operand is the address. 55218334Speter Can be nested inside a VOLATILE. */ 55318334SpeterDEF_RTL_EXPR(MEM, "mem", "e", 'o') 55418334Speter 55518334Speter/* Reference to an assembler label in the code for this function. 55618334Speter The operand is a CODE_LABEL found in the insn chain. 55718334Speter The unprinted fields 1 and 2 are used in flow.c for the 55818334Speter LABEL_NEXTREF and CONTAINING_INSN. */ 55918334SpeterDEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o') 56018334Speter 56118334Speter/* Reference to a named label: the string that is the first operand, 56218334Speter with `_' added implicitly in front. 56318334Speter Exception: if the first character explicitly given is `*', 56418334Speter to give it to the assembler, remove the `*' and do not add `_'. */ 56518334SpeterDEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o') 56618334Speter 56718334Speter/* The condition code register is represented, in our imagination, 56818334Speter as a register holding a value that can be compared to zero. 56918334Speter In fact, the machine has already compared them and recorded the 57018334Speter results; but instructions that look at the condition code 57118334Speter pretend to be looking at the entire value and comparing it. */ 57218334SpeterDEF_RTL_EXPR(CC0, "cc0", "", 'o') 57318334Speter 57418334Speter/* ===================================================================== 57518334Speter A QUEUED expression really points to a member of the queue of instructions 57618334Speter to be output later for postincrement/postdecrement. 57718334Speter QUEUED expressions never become part of instructions. 57818334Speter When a QUEUED expression would be put into an instruction, 57918334Speter instead either the incremented variable or a copy of its previous 58018334Speter value is used. 58118334Speter 58218334Speter Operands are: 58318334Speter 0. the variable to be incremented (a REG rtx). 58418334Speter 1. the incrementing instruction, or 0 if it hasn't been output yet. 58518334Speter 2. A REG rtx for a copy of the old value of the variable, or 0 if none yet. 58618334Speter 3. the body to use for the incrementing instruction 58718334Speter 4. the next QUEUED expression in the queue. 58818334Speter ====================================================================== */ 58918334Speter 59018334SpeterDEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x') 59118334Speter 59218334Speter/* ---------------------------------------------------------------------- 59318334Speter Expressions for operators in an rtl pattern 59418334Speter ---------------------------------------------------------------------- */ 59518334Speter 59618334Speter/* if_then_else. This is used in representing ordinary 59718334Speter conditional jump instructions. 59818334Speter Operand: 59918334Speter 0: condition 60018334Speter 1: then expr 60118334Speter 2: else expr */ 60218334SpeterDEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3') 60318334Speter 60418334Speter/* General conditional. The first operand is a vector composed of pairs of 60518334Speter expressions. The first element of each pair is evaluated, in turn. 60618334Speter The value of the conditional is the second expression of the first pair 60718334Speter whose first expression evaluates non-zero. If none of the expressions is 60818334Speter true, the second operand will be used as the value of the conditional. 60918334Speter 61018334Speter This should be replaced with use of IF_THEN_ELSE. */ 61118334SpeterDEF_RTL_EXPR(COND, "cond", "Ee", 'x') 61218334Speter 61318334Speter/* Comparison, produces a condition code result. */ 61418334SpeterDEF_RTL_EXPR(COMPARE, "compare", "ee", '2') 61518334Speter 61618334Speter/* plus */ 61718334SpeterDEF_RTL_EXPR(PLUS, "plus", "ee", 'c') 61818334Speter 61918334Speter/* Operand 0 minus operand 1. */ 62018334SpeterDEF_RTL_EXPR(MINUS, "minus", "ee", '2') 62118334Speter 62218334Speter/* Minus operand 0. */ 62318334SpeterDEF_RTL_EXPR(NEG, "neg", "e", '1') 62418334Speter 62518334SpeterDEF_RTL_EXPR(MULT, "mult", "ee", 'c') 62618334Speter 62718334Speter/* Operand 0 divided by operand 1. */ 62818334SpeterDEF_RTL_EXPR(DIV, "div", "ee", '2') 62918334Speter/* Remainder of operand 0 divided by operand 1. */ 63018334SpeterDEF_RTL_EXPR(MOD, "mod", "ee", '2') 63118334Speter 63218334Speter/* Unsigned divide and remainder. */ 63318334SpeterDEF_RTL_EXPR(UDIV, "udiv", "ee", '2') 63418334SpeterDEF_RTL_EXPR(UMOD, "umod", "ee", '2') 63518334Speter 63618334Speter/* Bitwise operations. */ 63718334SpeterDEF_RTL_EXPR(AND, "and", "ee", 'c') 63818334Speter 63918334SpeterDEF_RTL_EXPR(IOR, "ior", "ee", 'c') 64018334Speter 64118334SpeterDEF_RTL_EXPR(XOR, "xor", "ee", 'c') 64218334Speter 64318334SpeterDEF_RTL_EXPR(NOT, "not", "e", '1') 64418334Speter 64518334Speter/* Operand: 64618334Speter 0: value to be shifted. 64718334Speter 1: number of bits. */ 64818334SpeterDEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2') 64918334SpeterDEF_RTL_EXPR(ROTATE, "rotate", "ee", '2') 65018334Speter 65118334Speter/* Right shift operations, for machines where these are not the same 65218334Speter as left shifting with a negative argument. */ 65318334Speter 65418334SpeterDEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2') 65518334SpeterDEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2') 65618334SpeterDEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2') 65718334Speter 65818334Speter/* Minimum and maximum values of two operands. We need both signed and 65918334Speter unsigned forms. (We cannot use MIN for SMIN because it conflicts 66018334Speter with a macro of the same name.) */ 66118334Speter 66218334SpeterDEF_RTL_EXPR(SMIN, "smin", "ee", 'c') 66318334SpeterDEF_RTL_EXPR(SMAX, "smax", "ee", 'c') 66418334SpeterDEF_RTL_EXPR(UMIN, "umin", "ee", 'c') 66518334SpeterDEF_RTL_EXPR(UMAX, "umax", "ee", 'c') 66618334Speter 66718334Speter/* These unary operations are used to represent incrementation 66818334Speter and decrementation as they occur in memory addresses. 66918334Speter The amount of increment or decrement are not represented 67018334Speter because they can be understood from the machine-mode of the 67118334Speter containing MEM. These operations exist in only two cases: 67218334Speter 1. pushes onto the stack. 67318334Speter 2. created automatically by the life_analysis pass in flow.c. */ 67418334SpeterDEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x') 67518334SpeterDEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x') 67618334SpeterDEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x') 67718334SpeterDEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x') 67818334Speter 67918334Speter/* Comparison operations. The ordered comparisons exist in two 68018334Speter flavors, signed and unsigned. */ 68118334SpeterDEF_RTL_EXPR(NE, "ne", "ee", '<') 68218334SpeterDEF_RTL_EXPR(EQ, "eq", "ee", '<') 68318334SpeterDEF_RTL_EXPR(GE, "ge", "ee", '<') 68418334SpeterDEF_RTL_EXPR(GT, "gt", "ee", '<') 68518334SpeterDEF_RTL_EXPR(LE, "le", "ee", '<') 68618334SpeterDEF_RTL_EXPR(LT, "lt", "ee", '<') 68718334SpeterDEF_RTL_EXPR(GEU, "geu", "ee", '<') 68818334SpeterDEF_RTL_EXPR(GTU, "gtu", "ee", '<') 68918334SpeterDEF_RTL_EXPR(LEU, "leu", "ee", '<') 69018334SpeterDEF_RTL_EXPR(LTU, "ltu", "ee", '<') 69118334Speter 69218334Speter/* Represents the result of sign-extending the sole operand. 69318334Speter The machine modes of the operand and of the SIGN_EXTEND expression 69418334Speter determine how much sign-extension is going on. */ 69518334SpeterDEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1') 69618334Speter 69718334Speter/* Similar for zero-extension (such as unsigned short to int). */ 69818334SpeterDEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1') 69918334Speter 70018334Speter/* Similar but here the operand has a wider mode. */ 70118334SpeterDEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1') 70218334Speter 70318334Speter/* Similar for extending floating-point values (such as SFmode to DFmode). */ 70418334SpeterDEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1') 70518334SpeterDEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1') 70618334Speter 70718334Speter/* Conversion of fixed point operand to floating point value. */ 70818334SpeterDEF_RTL_EXPR(FLOAT, "float", "e", '1') 70918334Speter 71018334Speter/* With fixed-point machine mode: 71118334Speter Conversion of floating point operand to fixed point value. 71218334Speter Value is defined only when the operand's value is an integer. 71318334Speter With floating-point machine mode (and operand with same mode): 71418334Speter Operand is rounded toward zero to produce an integer value 71518334Speter represented in floating point. */ 71618334SpeterDEF_RTL_EXPR(FIX, "fix", "e", '1') 71718334Speter 71818334Speter/* Conversion of unsigned fixed point operand to floating point value. */ 71918334SpeterDEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1') 72018334Speter 72118334Speter/* With fixed-point machine mode: 72218334Speter Conversion of floating point operand to *unsigned* fixed point value. 72318334Speter Value is defined only when the operand's value is an integer. */ 72418334SpeterDEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1') 72518334Speter 72618334Speter/* Absolute value */ 72718334SpeterDEF_RTL_EXPR(ABS, "abs", "e", '1') 72818334Speter 72918334Speter/* Square root */ 73018334SpeterDEF_RTL_EXPR(SQRT, "sqrt", "e", '1') 73118334Speter 73218334Speter/* Find first bit that is set. 73318334Speter Value is 1 + number of trailing zeros in the arg., 73418334Speter or 0 if arg is 0. */ 73518334SpeterDEF_RTL_EXPR(FFS, "ffs", "e", '1') 73618334Speter 73718334Speter/* Reference to a signed bit-field of specified size and position. 73818334Speter Operand 0 is the memory unit (usually SImode or QImode) which 73918334Speter contains the field's first bit. Operand 1 is the width, in bits. 74018334Speter Operand 2 is the number of bits in the memory unit before the 74118334Speter first bit of this field. 74218334Speter If BITS_BIG_ENDIAN is defined, the first bit is the msb and 74318334Speter operand 2 counts from the msb of the memory unit. 74418334Speter Otherwise, the first bit is the lsb and operand 2 counts from 74518334Speter the lsb of the memory unit. */ 74618334SpeterDEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b') 74718334Speter 74818334Speter/* Similar for unsigned bit-field. */ 74918334SpeterDEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b') 75018334Speter 75118334Speter/* For RISC machines. These save memory when splitting insns. */ 75218334Speter 75318334Speter/* HIGH are the high-order bits of a constant expression. */ 75418334SpeterDEF_RTL_EXPR(HIGH, "high", "e", 'o') 75518334Speter 75618334Speter/* LO_SUM is the sum of a register and the low-order bits 75718334Speter of a constant expression. */ 75818334SpeterDEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o') 75918334Speter 76018334Speter/* 76118334SpeterLocal variables: 76218334Spetermode:c 76318334Speterversion-control: t 76418334SpeterEnd: 76518334Speter*/ 766